system.h 4.4 KB

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  1. #ifndef _H8300_SYSTEM_H
  2. #define _H8300_SYSTEM_H
  3. #include <linux/config.h> /* get configuration macros */
  4. #include <linux/linkage.h>
  5. #define prepare_to_switch() do { } while(0)
  6. /*
  7. * switch_to(n) should switch tasks to task ptr, first checking that
  8. * ptr isn't the current task, in which case it does nothing. This
  9. * also clears the TS-flag if the task we switched to has used the
  10. * math co-processor latest.
  11. */
  12. /*
  13. * switch_to() saves the extra registers, that are not saved
  14. * automatically by SAVE_SWITCH_STACK in resume(), ie. d0-d5 and
  15. * a0-a1. Some of these are used by schedule() and its predecessors
  16. * and so we might get see unexpected behaviors when a task returns
  17. * with unexpected register values.
  18. *
  19. * syscall stores these registers itself and none of them are used
  20. * by syscall after the function in the syscall has been called.
  21. *
  22. * Beware that resume now expects *next to be in d1 and the offset of
  23. * tss to be in a1. This saves a few instructions as we no longer have
  24. * to push them onto the stack and read them back right after.
  25. *
  26. * 02/17/96 - Jes Sorensen (jds@kom.auc.dk)
  27. *
  28. * Changed 96/09/19 by Andreas Schwab
  29. * pass prev in a0, next in a1, offset of tss in d1, and whether
  30. * the mm structures are shared in d2 (to avoid atc flushing).
  31. *
  32. * H8/300 Porting 2002/09/04 Yoshinori Sato
  33. */
  34. asmlinkage void resume(void);
  35. #define switch_to(prev,next,last) { \
  36. void *_last; \
  37. __asm__ __volatile__( \
  38. "mov.l %1, er0\n\t" \
  39. "mov.l %2, er1\n\t" \
  40. "mov.l %3, er2\n\t" \
  41. "jsr @_resume\n\t" \
  42. "mov.l er2,%0\n\t" \
  43. : "=r" (_last) \
  44. : "r" (&(prev->thread)), \
  45. "r" (&(next->thread)), \
  46. "g" (prev) \
  47. : "cc", "er0", "er1", "er2", "er3"); \
  48. (last) = _last; \
  49. }
  50. #define __sti() asm volatile ("andc #0x7f,ccr")
  51. #define __cli() asm volatile ("orc #0x80,ccr")
  52. #define __save_flags(x) \
  53. asm volatile ("stc ccr,%w0":"=r" (x))
  54. #define __restore_flags(x) \
  55. asm volatile ("ldc %w0,ccr": :"r" (x))
  56. #define irqs_disabled() \
  57. ({ \
  58. unsigned char flags; \
  59. __save_flags(flags); \
  60. ((flags & 0x80) == 0x80); \
  61. })
  62. #define iret() __asm__ __volatile__ ("rte": : :"memory", "sp", "cc")
  63. /* For spinlocks etc */
  64. #define local_irq_disable() __cli()
  65. #define local_irq_enable() __sti()
  66. #define local_irq_save(x) ({ __save_flags(x); local_irq_disable(); })
  67. #define local_irq_restore(x) __restore_flags(x)
  68. #define local_save_flags(x) __save_flags(x)
  69. /*
  70. * Force strict CPU ordering.
  71. * Not really required on H8...
  72. */
  73. #define nop() asm volatile ("nop"::)
  74. #define mb() asm volatile ("" : : :"memory")
  75. #define rmb() asm volatile ("" : : :"memory")
  76. #define wmb() asm volatile ("" : : :"memory")
  77. #define set_rmb(var, value) do { xchg(&var, value); } while (0)
  78. #define set_mb(var, value) set_rmb(var, value)
  79. #define set_wmb(var, value) do { var = value; wmb(); } while (0)
  80. #ifdef CONFIG_SMP
  81. #define smp_mb() mb()
  82. #define smp_rmb() rmb()
  83. #define smp_wmb() wmb()
  84. #define smp_read_barrier_depends() read_barrier_depends()
  85. #else
  86. #define smp_mb() barrier()
  87. #define smp_rmb() barrier()
  88. #define smp_wmb() barrier()
  89. #define smp_read_barrier_depends() do { } while(0)
  90. #endif
  91. #define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
  92. #define tas(ptr) (xchg((ptr),1))
  93. struct __xchg_dummy { unsigned long a[100]; };
  94. #define __xg(x) ((volatile struct __xchg_dummy *)(x))
  95. static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
  96. {
  97. unsigned long tmp, flags;
  98. local_irq_save(flags);
  99. switch (size) {
  100. case 1:
  101. __asm__ __volatile__
  102. ("mov.b %2,%0\n\t"
  103. "mov.b %1,%2"
  104. : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
  105. break;
  106. case 2:
  107. __asm__ __volatile__
  108. ("mov.w %2,%0\n\t"
  109. "mov.w %1,%2"
  110. : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
  111. break;
  112. case 4:
  113. __asm__ __volatile__
  114. ("mov.l %2,%0\n\t"
  115. "mov.l %1,%2"
  116. : "=&r" (tmp) : "r" (x), "m" (*__xg(ptr)) : "memory");
  117. break;
  118. default:
  119. tmp = 0;
  120. }
  121. local_irq_restore(flags);
  122. return tmp;
  123. }
  124. #define HARD_RESET_NOW() ({ \
  125. local_irq_disable(); \
  126. asm("jmp @@0"); \
  127. })
  128. #define arch_align_stack(x) (x)
  129. #endif /* _H8300_SYSTEM_H */