assembler.h 2.7 KB

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  1. /*
  2. * linux/include/asm-arm/assembler.h
  3. *
  4. * Copyright (C) 1996-2000 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This file contains arm architecture specific defines
  11. * for the different processors.
  12. *
  13. * Do not include any C declarations in this file - it is included by
  14. * assembler source.
  15. */
  16. #ifndef __ASSEMBLY__
  17. #error "Only include this from assembly code"
  18. #endif
  19. #include <asm/ptrace.h>
  20. /*
  21. * Endian independent macros for shifting bytes within registers.
  22. */
  23. #ifndef __ARMEB__
  24. #define pull lsr
  25. #define push lsl
  26. #define get_byte_0 lsl #0
  27. #define get_byte_1 lsr #8
  28. #define get_byte_2 lsr #16
  29. #define get_byte_3 lsr #24
  30. #define put_byte_0 lsl #0
  31. #define put_byte_1 lsl #8
  32. #define put_byte_2 lsl #16
  33. #define put_byte_3 lsl #24
  34. #else
  35. #define pull lsl
  36. #define push lsr
  37. #define get_byte_0 lsr #24
  38. #define get_byte_1 lsr #16
  39. #define get_byte_2 lsr #8
  40. #define get_byte_3 lsl #0
  41. #define put_byte_0 lsl #24
  42. #define put_byte_1 lsl #16
  43. #define put_byte_2 lsl #8
  44. #define put_byte_3 lsl #0
  45. #endif
  46. /*
  47. * Data preload for architectures that support it
  48. */
  49. #if __LINUX_ARM_ARCH__ >= 5
  50. #define PLD(code...) code
  51. #else
  52. #define PLD(code...)
  53. #endif
  54. #define MODE_USR USR_MODE
  55. #define MODE_FIQ FIQ_MODE
  56. #define MODE_IRQ IRQ_MODE
  57. #define MODE_SVC SVC_MODE
  58. #define DEFAULT_FIQ MODE_FIQ
  59. /*
  60. * LOADREGS - ldm with PC in register list (eg, ldmfd sp!, {pc})
  61. */
  62. #ifdef __STDC__
  63. #define LOADREGS(cond, base, reglist...)\
  64. ldm##cond base,reglist
  65. #else
  66. #define LOADREGS(cond, base, reglist...)\
  67. ldm/**/cond base,reglist
  68. #endif
  69. /*
  70. * Build a return instruction for this processor type.
  71. */
  72. #define RETINSTR(instr, regs...)\
  73. instr regs
  74. /*
  75. * Save the current IRQ state and disable IRQs. Note that this macro
  76. * assumes FIQs are enabled, and that the processor is in SVC mode.
  77. */
  78. .macro save_and_disable_irqs, oldcpsr
  79. mrs \oldcpsr, cpsr
  80. #if __LINUX_ARM_ARCH__ >= 6
  81. cpsid i
  82. #else
  83. msr cpsr_c, #PSR_I_BIT | MODE_SVC
  84. #endif
  85. .endm
  86. /*
  87. * Restore interrupt state previously stored in a register. We don't
  88. * guarantee that this will preserve the flags.
  89. */
  90. .macro restore_irqs, oldcpsr
  91. msr cpsr_c, \oldcpsr
  92. .endm
  93. /*
  94. * These two are used to save LR/restore PC over a user-based access.
  95. * The old 26-bit architecture requires that we do. On 32-bit
  96. * architecture, we can safely ignore this requirement.
  97. */
  98. .macro save_lr
  99. .endm
  100. .macro restore_pc
  101. mov pc, lr
  102. .endm
  103. #define USER(x...) \
  104. 9999: x; \
  105. .section __ex_table,"a"; \
  106. .align 3; \
  107. .long 9999b,9001f; \
  108. .previous