uhci-q.c 39 KB

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  1. /*
  2. * Universal Host Controller Interface driver for USB.
  3. *
  4. * Maintainer: Alan Stern <stern@rowland.harvard.edu>
  5. *
  6. * (C) Copyright 1999 Linus Torvalds
  7. * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
  8. * (C) Copyright 1999 Randy Dunlap
  9. * (C) Copyright 1999 Georg Acher, acher@in.tum.de
  10. * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
  11. * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
  12. * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
  13. * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
  14. * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
  15. * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
  16. * (C) Copyright 2004 Alan Stern, stern@rowland.harvard.edu
  17. */
  18. static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb);
  19. static void uhci_unlink_generic(struct uhci_hcd *uhci, struct urb *urb);
  20. static void uhci_remove_pending_urbps(struct uhci_hcd *uhci);
  21. static void uhci_free_pending_qhs(struct uhci_hcd *uhci);
  22. static void uhci_free_pending_tds(struct uhci_hcd *uhci);
  23. /*
  24. * Technically, updating td->status here is a race, but it's not really a
  25. * problem. The worst that can happen is that we set the IOC bit again
  26. * generating a spurious interrupt. We could fix this by creating another
  27. * QH and leaving the IOC bit always set, but then we would have to play
  28. * games with the FSBR code to make sure we get the correct order in all
  29. * the cases. I don't think it's worth the effort
  30. */
  31. static inline void uhci_set_next_interrupt(struct uhci_hcd *uhci)
  32. {
  33. if (uhci->is_stopped)
  34. mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
  35. uhci->term_td->status |= cpu_to_le32(TD_CTRL_IOC);
  36. }
  37. static inline void uhci_clear_next_interrupt(struct uhci_hcd *uhci)
  38. {
  39. uhci->term_td->status &= ~cpu_to_le32(TD_CTRL_IOC);
  40. }
  41. static inline void uhci_moveto_complete(struct uhci_hcd *uhci,
  42. struct urb_priv *urbp)
  43. {
  44. list_move_tail(&urbp->urb_list, &uhci->complete_list);
  45. }
  46. static struct uhci_td *uhci_alloc_td(struct uhci_hcd *uhci)
  47. {
  48. dma_addr_t dma_handle;
  49. struct uhci_td *td;
  50. td = dma_pool_alloc(uhci->td_pool, GFP_ATOMIC, &dma_handle);
  51. if (!td)
  52. return NULL;
  53. td->dma_handle = dma_handle;
  54. td->link = UHCI_PTR_TERM;
  55. td->buffer = 0;
  56. td->frame = -1;
  57. INIT_LIST_HEAD(&td->list);
  58. INIT_LIST_HEAD(&td->remove_list);
  59. INIT_LIST_HEAD(&td->fl_list);
  60. return td;
  61. }
  62. static inline void uhci_fill_td(struct uhci_td *td, u32 status,
  63. u32 token, u32 buffer)
  64. {
  65. td->status = cpu_to_le32(status);
  66. td->token = cpu_to_le32(token);
  67. td->buffer = cpu_to_le32(buffer);
  68. }
  69. /*
  70. * We insert Isochronous URBs directly into the frame list at the beginning
  71. */
  72. static void uhci_insert_td_frame_list(struct uhci_hcd *uhci, struct uhci_td *td, unsigned framenum)
  73. {
  74. framenum &= (UHCI_NUMFRAMES - 1);
  75. td->frame = framenum;
  76. /* Is there a TD already mapped there? */
  77. if (uhci->frame_cpu[framenum]) {
  78. struct uhci_td *ftd, *ltd;
  79. ftd = uhci->frame_cpu[framenum];
  80. ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list);
  81. list_add_tail(&td->fl_list, &ftd->fl_list);
  82. td->link = ltd->link;
  83. wmb();
  84. ltd->link = cpu_to_le32(td->dma_handle);
  85. } else {
  86. td->link = uhci->frame[framenum];
  87. wmb();
  88. uhci->frame[framenum] = cpu_to_le32(td->dma_handle);
  89. uhci->frame_cpu[framenum] = td;
  90. }
  91. }
  92. static inline void uhci_remove_td_frame_list(struct uhci_hcd *uhci,
  93. struct uhci_td *td)
  94. {
  95. /* If it's not inserted, don't remove it */
  96. if (td->frame == -1) {
  97. WARN_ON(!list_empty(&td->fl_list));
  98. return;
  99. }
  100. if (uhci->frame_cpu[td->frame] == td) {
  101. if (list_empty(&td->fl_list)) {
  102. uhci->frame[td->frame] = td->link;
  103. uhci->frame_cpu[td->frame] = NULL;
  104. } else {
  105. struct uhci_td *ntd;
  106. ntd = list_entry(td->fl_list.next, struct uhci_td, fl_list);
  107. uhci->frame[td->frame] = cpu_to_le32(ntd->dma_handle);
  108. uhci->frame_cpu[td->frame] = ntd;
  109. }
  110. } else {
  111. struct uhci_td *ptd;
  112. ptd = list_entry(td->fl_list.prev, struct uhci_td, fl_list);
  113. ptd->link = td->link;
  114. }
  115. list_del_init(&td->fl_list);
  116. td->frame = -1;
  117. }
  118. static void unlink_isochronous_tds(struct uhci_hcd *uhci, struct urb *urb)
  119. {
  120. struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
  121. struct uhci_td *td;
  122. list_for_each_entry(td, &urbp->td_list, list)
  123. uhci_remove_td_frame_list(uhci, td);
  124. wmb();
  125. }
  126. /*
  127. * Inserts a td list into qh.
  128. */
  129. static void uhci_insert_tds_in_qh(struct uhci_qh *qh, struct urb *urb, __le32 breadth)
  130. {
  131. struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
  132. struct uhci_td *td;
  133. __le32 *plink;
  134. /* Ordering isn't important here yet since the QH hasn't been */
  135. /* inserted into the schedule yet */
  136. plink = &qh->element;
  137. list_for_each_entry(td, &urbp->td_list, list) {
  138. *plink = cpu_to_le32(td->dma_handle) | breadth;
  139. plink = &td->link;
  140. }
  141. *plink = UHCI_PTR_TERM;
  142. }
  143. static void uhci_free_td(struct uhci_hcd *uhci, struct uhci_td *td)
  144. {
  145. if (!list_empty(&td->list))
  146. dev_warn(uhci_dev(uhci), "td %p still in list!\n", td);
  147. if (!list_empty(&td->remove_list))
  148. dev_warn(uhci_dev(uhci), "td %p still in remove_list!\n", td);
  149. if (!list_empty(&td->fl_list))
  150. dev_warn(uhci_dev(uhci), "td %p still in fl_list!\n", td);
  151. dma_pool_free(uhci->td_pool, td, td->dma_handle);
  152. }
  153. static struct uhci_qh *uhci_alloc_qh(struct uhci_hcd *uhci)
  154. {
  155. dma_addr_t dma_handle;
  156. struct uhci_qh *qh;
  157. qh = dma_pool_alloc(uhci->qh_pool, GFP_ATOMIC, &dma_handle);
  158. if (!qh)
  159. return NULL;
  160. qh->dma_handle = dma_handle;
  161. qh->element = UHCI_PTR_TERM;
  162. qh->link = UHCI_PTR_TERM;
  163. qh->urbp = NULL;
  164. INIT_LIST_HEAD(&qh->list);
  165. INIT_LIST_HEAD(&qh->remove_list);
  166. return qh;
  167. }
  168. static void uhci_free_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
  169. {
  170. if (!list_empty(&qh->list))
  171. dev_warn(uhci_dev(uhci), "qh %p list not empty!\n", qh);
  172. if (!list_empty(&qh->remove_list))
  173. dev_warn(uhci_dev(uhci), "qh %p still in remove_list!\n", qh);
  174. dma_pool_free(uhci->qh_pool, qh, qh->dma_handle);
  175. }
  176. /*
  177. * Append this urb's qh after the last qh in skelqh->list
  178. *
  179. * Note that urb_priv.queue_list doesn't have a separate queue head;
  180. * it's a ring with every element "live".
  181. */
  182. static void uhci_insert_qh(struct uhci_hcd *uhci, struct uhci_qh *skelqh, struct urb *urb)
  183. {
  184. struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
  185. struct urb_priv *turbp;
  186. struct uhci_qh *lqh;
  187. /* Grab the last QH */
  188. lqh = list_entry(skelqh->list.prev, struct uhci_qh, list);
  189. /* Point to the next skelqh */
  190. urbp->qh->link = lqh->link;
  191. wmb(); /* Ordering is important */
  192. /*
  193. * Patch QHs for previous endpoint's queued URBs? HC goes
  194. * here next, not to the next skelqh it now points to.
  195. *
  196. * lqh --> td ... --> qh ... --> td --> qh ... --> td
  197. * | | |
  198. * v v v
  199. * +<----------------+-----------------+
  200. * v
  201. * newqh --> td ... --> td
  202. * |
  203. * v
  204. * ...
  205. *
  206. * The HC could see (and use!) any of these as we write them.
  207. */
  208. lqh->link = cpu_to_le32(urbp->qh->dma_handle) | UHCI_PTR_QH;
  209. if (lqh->urbp) {
  210. list_for_each_entry(turbp, &lqh->urbp->queue_list, queue_list)
  211. turbp->qh->link = lqh->link;
  212. }
  213. list_add_tail(&urbp->qh->list, &skelqh->list);
  214. }
  215. /*
  216. * Start removal of QH from schedule; it finishes next frame.
  217. * TDs should be unlinked before this is called.
  218. */
  219. static void uhci_remove_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
  220. {
  221. struct uhci_qh *pqh;
  222. __le32 newlink;
  223. if (!qh)
  224. return;
  225. /*
  226. * Only go through the hoops if it's actually linked in
  227. */
  228. if (!list_empty(&qh->list)) {
  229. /* If our queue is nonempty, make the next URB the head */
  230. if (!list_empty(&qh->urbp->queue_list)) {
  231. struct urb_priv *nurbp;
  232. nurbp = list_entry(qh->urbp->queue_list.next,
  233. struct urb_priv, queue_list);
  234. nurbp->queued = 0;
  235. list_add(&nurbp->qh->list, &qh->list);
  236. newlink = cpu_to_le32(nurbp->qh->dma_handle) | UHCI_PTR_QH;
  237. } else
  238. newlink = qh->link;
  239. /* Fix up the previous QH's queue to link to either
  240. * the new head of this queue or the start of the
  241. * next endpoint's queue. */
  242. pqh = list_entry(qh->list.prev, struct uhci_qh, list);
  243. pqh->link = newlink;
  244. if (pqh->urbp) {
  245. struct urb_priv *turbp;
  246. list_for_each_entry(turbp, &pqh->urbp->queue_list,
  247. queue_list)
  248. turbp->qh->link = newlink;
  249. }
  250. wmb();
  251. /* Leave qh->link in case the HC is on the QH now, it will */
  252. /* continue the rest of the schedule */
  253. qh->element = UHCI_PTR_TERM;
  254. list_del_init(&qh->list);
  255. }
  256. list_del_init(&qh->urbp->queue_list);
  257. qh->urbp = NULL;
  258. uhci_get_current_frame_number(uhci);
  259. if (uhci->frame_number + uhci->is_stopped != uhci->qh_remove_age) {
  260. uhci_free_pending_qhs(uhci);
  261. uhci->qh_remove_age = uhci->frame_number;
  262. }
  263. /* Check to see if the remove list is empty. Set the IOC bit */
  264. /* to force an interrupt so we can remove the QH */
  265. if (list_empty(&uhci->qh_remove_list))
  266. uhci_set_next_interrupt(uhci);
  267. list_add(&qh->remove_list, &uhci->qh_remove_list);
  268. }
  269. static int uhci_fixup_toggle(struct urb *urb, unsigned int toggle)
  270. {
  271. struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
  272. struct uhci_td *td;
  273. list_for_each_entry(td, &urbp->td_list, list) {
  274. if (toggle)
  275. td->token |= cpu_to_le32(TD_TOKEN_TOGGLE);
  276. else
  277. td->token &= ~cpu_to_le32(TD_TOKEN_TOGGLE);
  278. toggle ^= 1;
  279. }
  280. return toggle;
  281. }
  282. /* This function will append one URB's QH to another URB's QH. This is for */
  283. /* queuing interrupt, control or bulk transfers */
  284. static void uhci_append_queued_urb(struct uhci_hcd *uhci, struct urb *eurb, struct urb *urb)
  285. {
  286. struct urb_priv *eurbp, *urbp, *furbp, *lurbp;
  287. struct uhci_td *lltd;
  288. eurbp = eurb->hcpriv;
  289. urbp = urb->hcpriv;
  290. /* Find the first URB in the queue */
  291. furbp = eurbp;
  292. if (eurbp->queued) {
  293. list_for_each_entry(furbp, &eurbp->queue_list, queue_list)
  294. if (!furbp->queued)
  295. break;
  296. }
  297. lurbp = list_entry(furbp->queue_list.prev, struct urb_priv, queue_list);
  298. lltd = list_entry(lurbp->td_list.prev, struct uhci_td, list);
  299. /* Control transfers always start with toggle 0 */
  300. if (!usb_pipecontrol(urb->pipe))
  301. usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
  302. usb_pipeout(urb->pipe),
  303. uhci_fixup_toggle(urb,
  304. uhci_toggle(td_token(lltd)) ^ 1));
  305. /* All qhs in the queue need to link to the next queue */
  306. urbp->qh->link = eurbp->qh->link;
  307. wmb(); /* Make sure we flush everything */
  308. lltd->link = cpu_to_le32(urbp->qh->dma_handle) | UHCI_PTR_QH;
  309. list_add_tail(&urbp->queue_list, &furbp->queue_list);
  310. urbp->queued = 1;
  311. }
  312. static void uhci_delete_queued_urb(struct uhci_hcd *uhci, struct urb *urb)
  313. {
  314. struct urb_priv *urbp, *nurbp, *purbp, *turbp;
  315. struct uhci_td *pltd;
  316. unsigned int toggle;
  317. urbp = urb->hcpriv;
  318. if (list_empty(&urbp->queue_list))
  319. return;
  320. nurbp = list_entry(urbp->queue_list.next, struct urb_priv, queue_list);
  321. /*
  322. * Fix up the toggle for the following URBs in the queue.
  323. * Only needed for bulk and interrupt: control and isochronous
  324. * endpoints don't propagate toggles between messages.
  325. */
  326. if (usb_pipebulk(urb->pipe) || usb_pipeint(urb->pipe)) {
  327. if (!urbp->queued)
  328. /* We just set the toggle in uhci_unlink_generic */
  329. toggle = usb_gettoggle(urb->dev,
  330. usb_pipeendpoint(urb->pipe),
  331. usb_pipeout(urb->pipe));
  332. else {
  333. /* If we're in the middle of the queue, grab the */
  334. /* toggle from the TD previous to us */
  335. purbp = list_entry(urbp->queue_list.prev,
  336. struct urb_priv, queue_list);
  337. pltd = list_entry(purbp->td_list.prev,
  338. struct uhci_td, list);
  339. toggle = uhci_toggle(td_token(pltd)) ^ 1;
  340. }
  341. list_for_each_entry(turbp, &urbp->queue_list, queue_list) {
  342. if (!turbp->queued)
  343. break;
  344. toggle = uhci_fixup_toggle(turbp->urb, toggle);
  345. }
  346. usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
  347. usb_pipeout(urb->pipe), toggle);
  348. }
  349. if (urbp->queued) {
  350. /* We're somewhere in the middle (or end). The case where
  351. * we're at the head is handled in uhci_remove_qh(). */
  352. purbp = list_entry(urbp->queue_list.prev, struct urb_priv,
  353. queue_list);
  354. pltd = list_entry(purbp->td_list.prev, struct uhci_td, list);
  355. if (nurbp->queued)
  356. pltd->link = cpu_to_le32(nurbp->qh->dma_handle) | UHCI_PTR_QH;
  357. else
  358. /* The next URB happens to be the beginning, so */
  359. /* we're the last, end the chain */
  360. pltd->link = UHCI_PTR_TERM;
  361. }
  362. /* urbp->queue_list is handled in uhci_remove_qh() */
  363. }
  364. static struct urb_priv *uhci_alloc_urb_priv(struct uhci_hcd *uhci, struct urb *urb)
  365. {
  366. struct urb_priv *urbp;
  367. urbp = kmem_cache_alloc(uhci_up_cachep, SLAB_ATOMIC);
  368. if (!urbp)
  369. return NULL;
  370. memset((void *)urbp, 0, sizeof(*urbp));
  371. urbp->fsbrtime = jiffies;
  372. urbp->urb = urb;
  373. INIT_LIST_HEAD(&urbp->td_list);
  374. INIT_LIST_HEAD(&urbp->queue_list);
  375. INIT_LIST_HEAD(&urbp->urb_list);
  376. list_add_tail(&urbp->urb_list, &uhci->urb_list);
  377. urb->hcpriv = urbp;
  378. return urbp;
  379. }
  380. static void uhci_add_td_to_urb(struct urb *urb, struct uhci_td *td)
  381. {
  382. struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
  383. list_add_tail(&td->list, &urbp->td_list);
  384. }
  385. static void uhci_remove_td_from_urb(struct uhci_td *td)
  386. {
  387. if (list_empty(&td->list))
  388. return;
  389. list_del_init(&td->list);
  390. }
  391. static void uhci_destroy_urb_priv(struct uhci_hcd *uhci, struct urb *urb)
  392. {
  393. struct uhci_td *td, *tmp;
  394. struct urb_priv *urbp;
  395. urbp = (struct urb_priv *)urb->hcpriv;
  396. if (!urbp)
  397. return;
  398. if (!list_empty(&urbp->urb_list))
  399. dev_warn(uhci_dev(uhci), "urb %p still on uhci->urb_list "
  400. "or uhci->remove_list!\n", urb);
  401. uhci_get_current_frame_number(uhci);
  402. if (uhci->frame_number + uhci->is_stopped != uhci->td_remove_age) {
  403. uhci_free_pending_tds(uhci);
  404. uhci->td_remove_age = uhci->frame_number;
  405. }
  406. /* Check to see if the remove list is empty. Set the IOC bit */
  407. /* to force an interrupt so we can remove the TDs*/
  408. if (list_empty(&uhci->td_remove_list))
  409. uhci_set_next_interrupt(uhci);
  410. list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
  411. uhci_remove_td_from_urb(td);
  412. list_add(&td->remove_list, &uhci->td_remove_list);
  413. }
  414. urb->hcpriv = NULL;
  415. kmem_cache_free(uhci_up_cachep, urbp);
  416. }
  417. static void uhci_inc_fsbr(struct uhci_hcd *uhci, struct urb *urb)
  418. {
  419. struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
  420. if ((!(urb->transfer_flags & URB_NO_FSBR)) && !urbp->fsbr) {
  421. urbp->fsbr = 1;
  422. if (!uhci->fsbr++ && !uhci->fsbrtimeout)
  423. uhci->skel_term_qh->link = cpu_to_le32(uhci->skel_fs_control_qh->dma_handle) | UHCI_PTR_QH;
  424. }
  425. }
  426. static void uhci_dec_fsbr(struct uhci_hcd *uhci, struct urb *urb)
  427. {
  428. struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
  429. if ((!(urb->transfer_flags & URB_NO_FSBR)) && urbp->fsbr) {
  430. urbp->fsbr = 0;
  431. if (!--uhci->fsbr)
  432. uhci->fsbrtimeout = jiffies + FSBR_DELAY;
  433. }
  434. }
  435. /*
  436. * Map status to standard result codes
  437. *
  438. * <status> is (td_status(td) & 0xF60000), a.k.a.
  439. * uhci_status_bits(td_status(td)).
  440. * Note: <status> does not include the TD_CTRL_NAK bit.
  441. * <dir_out> is True for output TDs and False for input TDs.
  442. */
  443. static int uhci_map_status(int status, int dir_out)
  444. {
  445. if (!status)
  446. return 0;
  447. if (status & TD_CTRL_BITSTUFF) /* Bitstuff error */
  448. return -EPROTO;
  449. if (status & TD_CTRL_CRCTIMEO) { /* CRC/Timeout */
  450. if (dir_out)
  451. return -EPROTO;
  452. else
  453. return -EILSEQ;
  454. }
  455. if (status & TD_CTRL_BABBLE) /* Babble */
  456. return -EOVERFLOW;
  457. if (status & TD_CTRL_DBUFERR) /* Buffer error */
  458. return -ENOSR;
  459. if (status & TD_CTRL_STALLED) /* Stalled */
  460. return -EPIPE;
  461. WARN_ON(status & TD_CTRL_ACTIVE); /* Active */
  462. return 0;
  463. }
  464. /*
  465. * Control transfers
  466. */
  467. static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb, struct urb *eurb)
  468. {
  469. struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
  470. struct uhci_td *td;
  471. struct uhci_qh *qh, *skelqh;
  472. unsigned long destination, status;
  473. int maxsze = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
  474. int len = urb->transfer_buffer_length;
  475. dma_addr_t data = urb->transfer_dma;
  476. /* The "pipe" thing contains the destination in bits 8--18 */
  477. destination = (urb->pipe & PIPE_DEVEP_MASK) | USB_PID_SETUP;
  478. /* 3 errors */
  479. status = TD_CTRL_ACTIVE | uhci_maxerr(3);
  480. if (urb->dev->speed == USB_SPEED_LOW)
  481. status |= TD_CTRL_LS;
  482. /*
  483. * Build the TD for the control request setup packet
  484. */
  485. td = uhci_alloc_td(uhci);
  486. if (!td)
  487. return -ENOMEM;
  488. uhci_add_td_to_urb(urb, td);
  489. uhci_fill_td(td, status, destination | uhci_explen(8),
  490. urb->setup_dma);
  491. /*
  492. * If direction is "send", change the packet ID from SETUP (0x2D)
  493. * to OUT (0xE1). Else change it from SETUP to IN (0x69) and
  494. * set Short Packet Detect (SPD) for all data packets.
  495. */
  496. if (usb_pipeout(urb->pipe))
  497. destination ^= (USB_PID_SETUP ^ USB_PID_OUT);
  498. else {
  499. destination ^= (USB_PID_SETUP ^ USB_PID_IN);
  500. status |= TD_CTRL_SPD;
  501. }
  502. /*
  503. * Build the DATA TDs
  504. */
  505. while (len > 0) {
  506. int pktsze = len;
  507. if (pktsze > maxsze)
  508. pktsze = maxsze;
  509. td = uhci_alloc_td(uhci);
  510. if (!td)
  511. return -ENOMEM;
  512. /* Alternate Data0/1 (start with Data1) */
  513. destination ^= TD_TOKEN_TOGGLE;
  514. uhci_add_td_to_urb(urb, td);
  515. uhci_fill_td(td, status, destination | uhci_explen(pktsze),
  516. data);
  517. data += pktsze;
  518. len -= pktsze;
  519. }
  520. /*
  521. * Build the final TD for control status
  522. */
  523. td = uhci_alloc_td(uhci);
  524. if (!td)
  525. return -ENOMEM;
  526. /*
  527. * It's IN if the pipe is an output pipe or we're not expecting
  528. * data back.
  529. */
  530. destination &= ~TD_TOKEN_PID_MASK;
  531. if (usb_pipeout(urb->pipe) || !urb->transfer_buffer_length)
  532. destination |= USB_PID_IN;
  533. else
  534. destination |= USB_PID_OUT;
  535. destination |= TD_TOKEN_TOGGLE; /* End in Data1 */
  536. status &= ~TD_CTRL_SPD;
  537. uhci_add_td_to_urb(urb, td);
  538. uhci_fill_td(td, status | TD_CTRL_IOC,
  539. destination | uhci_explen(0), 0);
  540. qh = uhci_alloc_qh(uhci);
  541. if (!qh)
  542. return -ENOMEM;
  543. urbp->qh = qh;
  544. qh->urbp = urbp;
  545. uhci_insert_tds_in_qh(qh, urb, UHCI_PTR_BREADTH);
  546. /* Low-speed transfers get a different queue, and won't hog the bus.
  547. * Also, some devices enumerate better without FSBR; the easiest way
  548. * to do that is to put URBs on the low-speed queue while the device
  549. * isn't in the CONFIGURED state. */
  550. if (urb->dev->speed == USB_SPEED_LOW ||
  551. urb->dev->state != USB_STATE_CONFIGURED)
  552. skelqh = uhci->skel_ls_control_qh;
  553. else {
  554. skelqh = uhci->skel_fs_control_qh;
  555. uhci_inc_fsbr(uhci, urb);
  556. }
  557. if (eurb)
  558. uhci_append_queued_urb(uhci, eurb, urb);
  559. else
  560. uhci_insert_qh(uhci, skelqh, urb);
  561. return -EINPROGRESS;
  562. }
  563. /*
  564. * If control-IN transfer was short, the status packet wasn't sent.
  565. * This routine changes the element pointer in the QH to point at the
  566. * status TD. It's safe to do this even while the QH is live, because
  567. * the hardware only updates the element pointer following a successful
  568. * transfer. The inactive TD for the short packet won't cause an update,
  569. * so the pointer won't get overwritten. The next time the controller
  570. * sees this QH, it will send the status packet.
  571. */
  572. static int usb_control_retrigger_status(struct uhci_hcd *uhci, struct urb *urb)
  573. {
  574. struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
  575. struct uhci_td *td;
  576. urbp->short_control_packet = 1;
  577. td = list_entry(urbp->td_list.prev, struct uhci_td, list);
  578. urbp->qh->element = cpu_to_le32(td->dma_handle);
  579. return -EINPROGRESS;
  580. }
  581. static int uhci_result_control(struct uhci_hcd *uhci, struct urb *urb)
  582. {
  583. struct list_head *tmp, *head;
  584. struct urb_priv *urbp = urb->hcpriv;
  585. struct uhci_td *td;
  586. unsigned int status;
  587. int ret = 0;
  588. if (list_empty(&urbp->td_list))
  589. return -EINVAL;
  590. head = &urbp->td_list;
  591. if (urbp->short_control_packet) {
  592. tmp = head->prev;
  593. goto status_stage;
  594. }
  595. tmp = head->next;
  596. td = list_entry(tmp, struct uhci_td, list);
  597. /* The first TD is the SETUP stage, check the status, but skip */
  598. /* the count */
  599. status = uhci_status_bits(td_status(td));
  600. if (status & TD_CTRL_ACTIVE)
  601. return -EINPROGRESS;
  602. if (status)
  603. goto td_error;
  604. urb->actual_length = 0;
  605. /* The rest of the TDs (but the last) are data */
  606. tmp = tmp->next;
  607. while (tmp != head && tmp->next != head) {
  608. unsigned int ctrlstat;
  609. td = list_entry(tmp, struct uhci_td, list);
  610. tmp = tmp->next;
  611. ctrlstat = td_status(td);
  612. status = uhci_status_bits(ctrlstat);
  613. if (status & TD_CTRL_ACTIVE)
  614. return -EINPROGRESS;
  615. urb->actual_length += uhci_actual_length(ctrlstat);
  616. if (status)
  617. goto td_error;
  618. /* Check to see if we received a short packet */
  619. if (uhci_actual_length(ctrlstat) <
  620. uhci_expected_length(td_token(td))) {
  621. if (urb->transfer_flags & URB_SHORT_NOT_OK) {
  622. ret = -EREMOTEIO;
  623. goto err;
  624. }
  625. if (uhci_packetid(td_token(td)) == USB_PID_IN)
  626. return usb_control_retrigger_status(uhci, urb);
  627. else
  628. return 0;
  629. }
  630. }
  631. status_stage:
  632. td = list_entry(tmp, struct uhci_td, list);
  633. /* Control status stage */
  634. status = td_status(td);
  635. #ifdef I_HAVE_BUGGY_APC_BACKUPS
  636. /* APC BackUPS Pro kludge */
  637. /* It tries to send all of the descriptor instead of the amount */
  638. /* we requested */
  639. if (status & TD_CTRL_IOC && /* IOC is masked out by uhci_status_bits */
  640. status & TD_CTRL_ACTIVE &&
  641. status & TD_CTRL_NAK)
  642. return 0;
  643. #endif
  644. status = uhci_status_bits(status);
  645. if (status & TD_CTRL_ACTIVE)
  646. return -EINPROGRESS;
  647. if (status)
  648. goto td_error;
  649. return 0;
  650. td_error:
  651. ret = uhci_map_status(status, uhci_packetout(td_token(td)));
  652. err:
  653. if ((debug == 1 && ret != -EPIPE) || debug > 1) {
  654. /* Some debugging code */
  655. dev_dbg(uhci_dev(uhci), "%s: failed with status %x\n",
  656. __FUNCTION__, status);
  657. if (errbuf) {
  658. /* Print the chain for debugging purposes */
  659. uhci_show_qh(urbp->qh, errbuf, ERRBUF_LEN, 0);
  660. lprintk(errbuf);
  661. }
  662. }
  663. return ret;
  664. }
  665. /*
  666. * Common submit for bulk and interrupt
  667. */
  668. static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb, struct urb *eurb, struct uhci_qh *skelqh)
  669. {
  670. struct uhci_td *td;
  671. struct uhci_qh *qh;
  672. unsigned long destination, status;
  673. int maxsze = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe));
  674. int len = urb->transfer_buffer_length;
  675. struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
  676. dma_addr_t data = urb->transfer_dma;
  677. if (len < 0)
  678. return -EINVAL;
  679. /* The "pipe" thing contains the destination in bits 8--18 */
  680. destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
  681. status = uhci_maxerr(3) | TD_CTRL_ACTIVE;
  682. if (urb->dev->speed == USB_SPEED_LOW)
  683. status |= TD_CTRL_LS;
  684. if (usb_pipein(urb->pipe))
  685. status |= TD_CTRL_SPD;
  686. /*
  687. * Build the DATA TDs
  688. */
  689. do { /* Allow zero length packets */
  690. int pktsze = maxsze;
  691. if (pktsze >= len) {
  692. pktsze = len;
  693. if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
  694. status &= ~TD_CTRL_SPD;
  695. }
  696. td = uhci_alloc_td(uhci);
  697. if (!td)
  698. return -ENOMEM;
  699. uhci_add_td_to_urb(urb, td);
  700. uhci_fill_td(td, status, destination | uhci_explen(pktsze) |
  701. (usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
  702. usb_pipeout(urb->pipe)) << TD_TOKEN_TOGGLE_SHIFT),
  703. data);
  704. data += pktsze;
  705. len -= maxsze;
  706. usb_dotoggle(urb->dev, usb_pipeendpoint(urb->pipe),
  707. usb_pipeout(urb->pipe));
  708. } while (len > 0);
  709. /*
  710. * URB_ZERO_PACKET means adding a 0-length packet, if direction
  711. * is OUT and the transfer_length was an exact multiple of maxsze,
  712. * hence (len = transfer_length - N * maxsze) == 0
  713. * however, if transfer_length == 0, the zero packet was already
  714. * prepared above.
  715. */
  716. if (usb_pipeout(urb->pipe) && (urb->transfer_flags & URB_ZERO_PACKET) &&
  717. !len && urb->transfer_buffer_length) {
  718. td = uhci_alloc_td(uhci);
  719. if (!td)
  720. return -ENOMEM;
  721. uhci_add_td_to_urb(urb, td);
  722. uhci_fill_td(td, status, destination | uhci_explen(0) |
  723. (usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
  724. usb_pipeout(urb->pipe)) << TD_TOKEN_TOGGLE_SHIFT),
  725. data);
  726. usb_dotoggle(urb->dev, usb_pipeendpoint(urb->pipe),
  727. usb_pipeout(urb->pipe));
  728. }
  729. /* Set the interrupt-on-completion flag on the last packet.
  730. * A more-or-less typical 4 KB URB (= size of one memory page)
  731. * will require about 3 ms to transfer; that's a little on the
  732. * fast side but not enough to justify delaying an interrupt
  733. * more than 2 or 3 URBs, so we will ignore the URB_NO_INTERRUPT
  734. * flag setting. */
  735. td->status |= cpu_to_le32(TD_CTRL_IOC);
  736. qh = uhci_alloc_qh(uhci);
  737. if (!qh)
  738. return -ENOMEM;
  739. urbp->qh = qh;
  740. qh->urbp = urbp;
  741. /* Always breadth first */
  742. uhci_insert_tds_in_qh(qh, urb, UHCI_PTR_BREADTH);
  743. if (eurb)
  744. uhci_append_queued_urb(uhci, eurb, urb);
  745. else
  746. uhci_insert_qh(uhci, skelqh, urb);
  747. return -EINPROGRESS;
  748. }
  749. /*
  750. * Common result for bulk and interrupt
  751. */
  752. static int uhci_result_common(struct uhci_hcd *uhci, struct urb *urb)
  753. {
  754. struct urb_priv *urbp = urb->hcpriv;
  755. struct uhci_td *td;
  756. unsigned int status = 0;
  757. int ret = 0;
  758. urb->actual_length = 0;
  759. list_for_each_entry(td, &urbp->td_list, list) {
  760. unsigned int ctrlstat = td_status(td);
  761. status = uhci_status_bits(ctrlstat);
  762. if (status & TD_CTRL_ACTIVE)
  763. return -EINPROGRESS;
  764. urb->actual_length += uhci_actual_length(ctrlstat);
  765. if (status)
  766. goto td_error;
  767. if (uhci_actual_length(ctrlstat) <
  768. uhci_expected_length(td_token(td))) {
  769. if (urb->transfer_flags & URB_SHORT_NOT_OK) {
  770. ret = -EREMOTEIO;
  771. goto err;
  772. } else
  773. return 0;
  774. }
  775. }
  776. return 0;
  777. td_error:
  778. ret = uhci_map_status(status, uhci_packetout(td_token(td)));
  779. err:
  780. /*
  781. * Enable this chunk of code if you want to see some more debugging.
  782. * But be careful, it has the tendancy to starve out khubd and prevent
  783. * disconnects from happening successfully if you have a slow debug
  784. * log interface (like a serial console.
  785. */
  786. #if 0
  787. if ((debug == 1 && ret != -EPIPE) || debug > 1) {
  788. /* Some debugging code */
  789. dev_dbg(uhci_dev(uhci), "%s: failed with status %x\n",
  790. __FUNCTION__, status);
  791. if (errbuf) {
  792. /* Print the chain for debugging purposes */
  793. uhci_show_qh(urbp->qh, errbuf, ERRBUF_LEN, 0);
  794. lprintk(errbuf);
  795. }
  796. }
  797. #endif
  798. return ret;
  799. }
  800. static inline int uhci_submit_bulk(struct uhci_hcd *uhci, struct urb *urb, struct urb *eurb)
  801. {
  802. int ret;
  803. /* Can't have low-speed bulk transfers */
  804. if (urb->dev->speed == USB_SPEED_LOW)
  805. return -EINVAL;
  806. ret = uhci_submit_common(uhci, urb, eurb, uhci->skel_bulk_qh);
  807. if (ret == -EINPROGRESS)
  808. uhci_inc_fsbr(uhci, urb);
  809. return ret;
  810. }
  811. static inline int uhci_submit_interrupt(struct uhci_hcd *uhci, struct urb *urb, struct urb *eurb)
  812. {
  813. /* USB 1.1 interrupt transfers only involve one packet per interval;
  814. * that's the uhci_submit_common() "breadth first" policy. Drivers
  815. * can submit urbs of any length, but longer ones might need many
  816. * intervals to complete.
  817. */
  818. return uhci_submit_common(uhci, urb, eurb, uhci->skelqh[__interval_to_skel(urb->interval)]);
  819. }
  820. /*
  821. * Isochronous transfers
  822. */
  823. static int isochronous_find_limits(struct uhci_hcd *uhci, struct urb *urb, unsigned int *start, unsigned int *end)
  824. {
  825. struct urb *last_urb = NULL;
  826. struct urb_priv *up;
  827. int ret = 0;
  828. list_for_each_entry(up, &uhci->urb_list, urb_list) {
  829. struct urb *u = up->urb;
  830. /* look for pending URBs with identical pipe handle */
  831. if ((urb->pipe == u->pipe) && (urb->dev == u->dev) &&
  832. (u->status == -EINPROGRESS) && (u != urb)) {
  833. if (!last_urb)
  834. *start = u->start_frame;
  835. last_urb = u;
  836. }
  837. }
  838. if (last_urb) {
  839. *end = (last_urb->start_frame + last_urb->number_of_packets *
  840. last_urb->interval) & (UHCI_NUMFRAMES-1);
  841. ret = 0;
  842. } else
  843. ret = -1; /* no previous urb found */
  844. return ret;
  845. }
  846. static int isochronous_find_start(struct uhci_hcd *uhci, struct urb *urb)
  847. {
  848. int limits;
  849. unsigned int start = 0, end = 0;
  850. if (urb->number_of_packets > 900) /* 900? Why? */
  851. return -EFBIG;
  852. limits = isochronous_find_limits(uhci, urb, &start, &end);
  853. if (urb->transfer_flags & URB_ISO_ASAP) {
  854. if (limits) {
  855. uhci_get_current_frame_number(uhci);
  856. urb->start_frame = (uhci->frame_number + 10)
  857. & (UHCI_NUMFRAMES - 1);
  858. } else
  859. urb->start_frame = end;
  860. } else {
  861. urb->start_frame &= (UHCI_NUMFRAMES - 1);
  862. /* FIXME: Sanity check */
  863. }
  864. return 0;
  865. }
  866. /*
  867. * Isochronous transfers
  868. */
  869. static int uhci_submit_isochronous(struct uhci_hcd *uhci, struct urb *urb)
  870. {
  871. struct uhci_td *td;
  872. int i, ret, frame;
  873. int status, destination;
  874. struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
  875. status = TD_CTRL_ACTIVE | TD_CTRL_IOS;
  876. destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
  877. ret = isochronous_find_start(uhci, urb);
  878. if (ret)
  879. return ret;
  880. for (i = 0; i < urb->number_of_packets; i++) {
  881. td = uhci_alloc_td(uhci);
  882. if (!td)
  883. return -ENOMEM;
  884. uhci_add_td_to_urb(urb, td);
  885. uhci_fill_td(td, status, destination | uhci_explen(urb->iso_frame_desc[i].length),
  886. urb->transfer_dma + urb->iso_frame_desc[i].offset);
  887. if (i + 1 >= urb->number_of_packets)
  888. td->status |= cpu_to_le32(TD_CTRL_IOC);
  889. }
  890. frame = urb->start_frame;
  891. list_for_each_entry(td, &urbp->td_list, list) {
  892. uhci_insert_td_frame_list(uhci, td, frame);
  893. frame += urb->interval;
  894. }
  895. return -EINPROGRESS;
  896. }
  897. static int uhci_result_isochronous(struct uhci_hcd *uhci, struct urb *urb)
  898. {
  899. struct uhci_td *td;
  900. struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
  901. int status;
  902. int i, ret = 0;
  903. urb->actual_length = urb->error_count = 0;
  904. i = 0;
  905. list_for_each_entry(td, &urbp->td_list, list) {
  906. int actlength;
  907. unsigned int ctrlstat = td_status(td);
  908. if (ctrlstat & TD_CTRL_ACTIVE)
  909. return -EINPROGRESS;
  910. actlength = uhci_actual_length(ctrlstat);
  911. urb->iso_frame_desc[i].actual_length = actlength;
  912. urb->actual_length += actlength;
  913. status = uhci_map_status(uhci_status_bits(ctrlstat),
  914. usb_pipeout(urb->pipe));
  915. urb->iso_frame_desc[i].status = status;
  916. if (status) {
  917. urb->error_count++;
  918. ret = status;
  919. }
  920. i++;
  921. }
  922. unlink_isochronous_tds(uhci, urb);
  923. return ret;
  924. }
  925. static struct urb *uhci_find_urb_ep(struct uhci_hcd *uhci, struct urb *urb)
  926. {
  927. struct urb_priv *up;
  928. /* We don't match Isoc transfers since they are special */
  929. if (usb_pipeisoc(urb->pipe))
  930. return NULL;
  931. list_for_each_entry(up, &uhci->urb_list, urb_list) {
  932. struct urb *u = up->urb;
  933. if (u->dev == urb->dev && u->status == -EINPROGRESS) {
  934. /* For control, ignore the direction */
  935. if (usb_pipecontrol(urb->pipe) &&
  936. (u->pipe & ~USB_DIR_IN) == (urb->pipe & ~USB_DIR_IN))
  937. return u;
  938. else if (u->pipe == urb->pipe)
  939. return u;
  940. }
  941. }
  942. return NULL;
  943. }
  944. static int uhci_urb_enqueue(struct usb_hcd *hcd,
  945. struct usb_host_endpoint *ep,
  946. struct urb *urb, gfp_t mem_flags)
  947. {
  948. int ret;
  949. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  950. unsigned long flags;
  951. struct urb *eurb;
  952. int bustime;
  953. spin_lock_irqsave(&uhci->lock, flags);
  954. ret = urb->status;
  955. if (ret != -EINPROGRESS) /* URB already unlinked! */
  956. goto out;
  957. eurb = uhci_find_urb_ep(uhci, urb);
  958. if (!uhci_alloc_urb_priv(uhci, urb)) {
  959. ret = -ENOMEM;
  960. goto out;
  961. }
  962. switch (usb_pipetype(urb->pipe)) {
  963. case PIPE_CONTROL:
  964. ret = uhci_submit_control(uhci, urb, eurb);
  965. break;
  966. case PIPE_INTERRUPT:
  967. if (!eurb) {
  968. bustime = usb_check_bandwidth(urb->dev, urb);
  969. if (bustime < 0)
  970. ret = bustime;
  971. else {
  972. ret = uhci_submit_interrupt(uhci, urb, eurb);
  973. if (ret == -EINPROGRESS)
  974. usb_claim_bandwidth(urb->dev, urb, bustime, 0);
  975. }
  976. } else { /* inherit from parent */
  977. urb->bandwidth = eurb->bandwidth;
  978. ret = uhci_submit_interrupt(uhci, urb, eurb);
  979. }
  980. break;
  981. case PIPE_BULK:
  982. ret = uhci_submit_bulk(uhci, urb, eurb);
  983. break;
  984. case PIPE_ISOCHRONOUS:
  985. bustime = usb_check_bandwidth(urb->dev, urb);
  986. if (bustime < 0) {
  987. ret = bustime;
  988. break;
  989. }
  990. ret = uhci_submit_isochronous(uhci, urb);
  991. if (ret == -EINPROGRESS)
  992. usb_claim_bandwidth(urb->dev, urb, bustime, 1);
  993. break;
  994. }
  995. if (ret != -EINPROGRESS) {
  996. /* Submit failed, so delete it from the urb_list */
  997. struct urb_priv *urbp = urb->hcpriv;
  998. list_del_init(&urbp->urb_list);
  999. uhci_destroy_urb_priv(uhci, urb);
  1000. } else
  1001. ret = 0;
  1002. out:
  1003. spin_unlock_irqrestore(&uhci->lock, flags);
  1004. return ret;
  1005. }
  1006. /*
  1007. * Return the result of a transfer
  1008. */
  1009. static void uhci_transfer_result(struct uhci_hcd *uhci, struct urb *urb)
  1010. {
  1011. int ret = -EINPROGRESS;
  1012. struct urb_priv *urbp;
  1013. spin_lock(&urb->lock);
  1014. urbp = (struct urb_priv *)urb->hcpriv;
  1015. if (urb->status != -EINPROGRESS) /* URB already dequeued */
  1016. goto out;
  1017. switch (usb_pipetype(urb->pipe)) {
  1018. case PIPE_CONTROL:
  1019. ret = uhci_result_control(uhci, urb);
  1020. break;
  1021. case PIPE_BULK:
  1022. case PIPE_INTERRUPT:
  1023. ret = uhci_result_common(uhci, urb);
  1024. break;
  1025. case PIPE_ISOCHRONOUS:
  1026. ret = uhci_result_isochronous(uhci, urb);
  1027. break;
  1028. }
  1029. if (ret == -EINPROGRESS)
  1030. goto out;
  1031. urb->status = ret;
  1032. switch (usb_pipetype(urb->pipe)) {
  1033. case PIPE_CONTROL:
  1034. case PIPE_BULK:
  1035. case PIPE_ISOCHRONOUS:
  1036. /* Release bandwidth for Interrupt or Isoc. transfers */
  1037. if (urb->bandwidth)
  1038. usb_release_bandwidth(urb->dev, urb, 1);
  1039. uhci_unlink_generic(uhci, urb);
  1040. break;
  1041. case PIPE_INTERRUPT:
  1042. /* Release bandwidth for Interrupt or Isoc. transfers */
  1043. /* Make sure we don't release if we have a queued URB */
  1044. if (list_empty(&urbp->queue_list) && urb->bandwidth)
  1045. usb_release_bandwidth(urb->dev, urb, 0);
  1046. else
  1047. /* bandwidth was passed on to queued URB, */
  1048. /* so don't let usb_unlink_urb() release it */
  1049. urb->bandwidth = 0;
  1050. uhci_unlink_generic(uhci, urb);
  1051. break;
  1052. default:
  1053. dev_info(uhci_dev(uhci), "%s: unknown pipe type %d "
  1054. "for urb %p\n",
  1055. __FUNCTION__, usb_pipetype(urb->pipe), urb);
  1056. }
  1057. /* Move it from uhci->urb_list to uhci->complete_list */
  1058. uhci_moveto_complete(uhci, urbp);
  1059. out:
  1060. spin_unlock(&urb->lock);
  1061. }
  1062. static void uhci_unlink_generic(struct uhci_hcd *uhci, struct urb *urb)
  1063. {
  1064. struct list_head *head;
  1065. struct uhci_td *td;
  1066. struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
  1067. int prevactive = 0;
  1068. uhci_dec_fsbr(uhci, urb); /* Safe since it checks */
  1069. /*
  1070. * Now we need to find out what the last successful toggle was
  1071. * so we can update the local data toggle for the next transfer
  1072. *
  1073. * There are 2 ways the last successful completed TD is found:
  1074. *
  1075. * 1) The TD is NOT active and the actual length < expected length
  1076. * 2) The TD is NOT active and it's the last TD in the chain
  1077. *
  1078. * and a third way the first uncompleted TD is found:
  1079. *
  1080. * 3) The TD is active and the previous TD is NOT active
  1081. *
  1082. * Control and Isochronous ignore the toggle, so this is safe
  1083. * for all types
  1084. *
  1085. * FIXME: The toggle fixups won't be 100% reliable until we
  1086. * change over to using a single queue for each endpoint and
  1087. * stop the queue before unlinking.
  1088. */
  1089. head = &urbp->td_list;
  1090. list_for_each_entry(td, head, list) {
  1091. unsigned int ctrlstat = td_status(td);
  1092. if (!(ctrlstat & TD_CTRL_ACTIVE) &&
  1093. (uhci_actual_length(ctrlstat) <
  1094. uhci_expected_length(td_token(td)) ||
  1095. td->list.next == head))
  1096. usb_settoggle(urb->dev, uhci_endpoint(td_token(td)),
  1097. uhci_packetout(td_token(td)),
  1098. uhci_toggle(td_token(td)) ^ 1);
  1099. else if ((ctrlstat & TD_CTRL_ACTIVE) && !prevactive)
  1100. usb_settoggle(urb->dev, uhci_endpoint(td_token(td)),
  1101. uhci_packetout(td_token(td)),
  1102. uhci_toggle(td_token(td)));
  1103. prevactive = ctrlstat & TD_CTRL_ACTIVE;
  1104. }
  1105. uhci_delete_queued_urb(uhci, urb);
  1106. /* The interrupt loop will reclaim the QHs */
  1107. uhci_remove_qh(uhci, urbp->qh);
  1108. urbp->qh = NULL;
  1109. }
  1110. static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
  1111. {
  1112. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  1113. unsigned long flags;
  1114. struct urb_priv *urbp;
  1115. spin_lock_irqsave(&uhci->lock, flags);
  1116. urbp = urb->hcpriv;
  1117. if (!urbp) /* URB was never linked! */
  1118. goto done;
  1119. list_del_init(&urbp->urb_list);
  1120. if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS)
  1121. unlink_isochronous_tds(uhci, urb);
  1122. uhci_unlink_generic(uhci, urb);
  1123. uhci_get_current_frame_number(uhci);
  1124. if (uhci->frame_number + uhci->is_stopped != uhci->urb_remove_age) {
  1125. uhci_remove_pending_urbps(uhci);
  1126. uhci->urb_remove_age = uhci->frame_number;
  1127. }
  1128. /* If we're the first, set the next interrupt bit */
  1129. if (list_empty(&uhci->urb_remove_list))
  1130. uhci_set_next_interrupt(uhci);
  1131. list_add_tail(&urbp->urb_list, &uhci->urb_remove_list);
  1132. done:
  1133. spin_unlock_irqrestore(&uhci->lock, flags);
  1134. return 0;
  1135. }
  1136. static int uhci_fsbr_timeout(struct uhci_hcd *uhci, struct urb *urb)
  1137. {
  1138. struct urb_priv *urbp = (struct urb_priv *)urb->hcpriv;
  1139. struct list_head *head;
  1140. struct uhci_td *td;
  1141. int count = 0;
  1142. uhci_dec_fsbr(uhci, urb);
  1143. urbp->fsbr_timeout = 1;
  1144. /*
  1145. * Ideally we would want to fix qh->element as well, but it's
  1146. * read/write by the HC, so that can introduce a race. It's not
  1147. * really worth the hassle
  1148. */
  1149. head = &urbp->td_list;
  1150. list_for_each_entry(td, head, list) {
  1151. /*
  1152. * Make sure we don't do the last one (since it'll have the
  1153. * TERM bit set) as well as we skip every so many TDs to
  1154. * make sure it doesn't hog the bandwidth
  1155. */
  1156. if (td->list.next != head && (count % DEPTH_INTERVAL) ==
  1157. (DEPTH_INTERVAL - 1))
  1158. td->link |= UHCI_PTR_DEPTH;
  1159. count++;
  1160. }
  1161. return 0;
  1162. }
  1163. static void uhci_free_pending_qhs(struct uhci_hcd *uhci)
  1164. {
  1165. struct uhci_qh *qh, *tmp;
  1166. list_for_each_entry_safe(qh, tmp, &uhci->qh_remove_list, remove_list) {
  1167. list_del_init(&qh->remove_list);
  1168. uhci_free_qh(uhci, qh);
  1169. }
  1170. }
  1171. static void uhci_free_pending_tds(struct uhci_hcd *uhci)
  1172. {
  1173. struct uhci_td *td, *tmp;
  1174. list_for_each_entry_safe(td, tmp, &uhci->td_remove_list, remove_list) {
  1175. list_del_init(&td->remove_list);
  1176. uhci_free_td(uhci, td);
  1177. }
  1178. }
  1179. static void
  1180. uhci_finish_urb(struct usb_hcd *hcd, struct urb *urb, struct pt_regs *regs)
  1181. __releases(uhci->lock)
  1182. __acquires(uhci->lock)
  1183. {
  1184. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  1185. uhci_destroy_urb_priv(uhci, urb);
  1186. spin_unlock(&uhci->lock);
  1187. usb_hcd_giveback_urb(hcd, urb, regs);
  1188. spin_lock(&uhci->lock);
  1189. }
  1190. static void uhci_finish_completion(struct uhci_hcd *uhci, struct pt_regs *regs)
  1191. {
  1192. struct urb_priv *urbp, *tmp;
  1193. list_for_each_entry_safe(urbp, tmp, &uhci->complete_list, urb_list) {
  1194. struct urb *urb = urbp->urb;
  1195. list_del_init(&urbp->urb_list);
  1196. uhci_finish_urb(uhci_to_hcd(uhci), urb, regs);
  1197. }
  1198. }
  1199. static void uhci_remove_pending_urbps(struct uhci_hcd *uhci)
  1200. {
  1201. /* Splice the urb_remove_list onto the end of the complete_list */
  1202. list_splice_init(&uhci->urb_remove_list, uhci->complete_list.prev);
  1203. }
  1204. /* Process events in the schedule, but only in one thread at a time */
  1205. static void uhci_scan_schedule(struct uhci_hcd *uhci, struct pt_regs *regs)
  1206. {
  1207. struct urb_priv *urbp, *tmp;
  1208. /* Don't allow re-entrant calls */
  1209. if (uhci->scan_in_progress) {
  1210. uhci->need_rescan = 1;
  1211. return;
  1212. }
  1213. uhci->scan_in_progress = 1;
  1214. rescan:
  1215. uhci->need_rescan = 0;
  1216. uhci_clear_next_interrupt(uhci);
  1217. uhci_get_current_frame_number(uhci);
  1218. if (uhci->frame_number + uhci->is_stopped != uhci->qh_remove_age)
  1219. uhci_free_pending_qhs(uhci);
  1220. if (uhci->frame_number + uhci->is_stopped != uhci->td_remove_age)
  1221. uhci_free_pending_tds(uhci);
  1222. if (uhci->frame_number + uhci->is_stopped != uhci->urb_remove_age)
  1223. uhci_remove_pending_urbps(uhci);
  1224. /* Walk the list of pending URBs to see which ones completed
  1225. * (must be _safe because uhci_transfer_result() dequeues URBs) */
  1226. list_for_each_entry_safe(urbp, tmp, &uhci->urb_list, urb_list) {
  1227. struct urb *urb = urbp->urb;
  1228. /* Checks the status and does all of the magic necessary */
  1229. uhci_transfer_result(uhci, urb);
  1230. }
  1231. uhci_finish_completion(uhci, regs);
  1232. /* If the controller is stopped, we can finish these off right now */
  1233. if (uhci->is_stopped) {
  1234. uhci_free_pending_qhs(uhci);
  1235. uhci_free_pending_tds(uhci);
  1236. uhci_remove_pending_urbps(uhci);
  1237. }
  1238. if (uhci->need_rescan)
  1239. goto rescan;
  1240. uhci->scan_in_progress = 0;
  1241. if (list_empty(&uhci->urb_remove_list) &&
  1242. list_empty(&uhci->td_remove_list) &&
  1243. list_empty(&uhci->qh_remove_list))
  1244. uhci_clear_next_interrupt(uhci);
  1245. else
  1246. uhci_set_next_interrupt(uhci);
  1247. /* Wake up anyone waiting for an URB to complete */
  1248. wake_up_all(&uhci->waitqh);
  1249. }
  1250. static void check_fsbr(struct uhci_hcd *uhci)
  1251. {
  1252. struct urb_priv *up;
  1253. list_for_each_entry(up, &uhci->urb_list, urb_list) {
  1254. struct urb *u = up->urb;
  1255. spin_lock(&u->lock);
  1256. /* Check if the FSBR timed out */
  1257. if (up->fsbr && !up->fsbr_timeout && time_after_eq(jiffies, up->fsbrtime + IDLE_TIMEOUT))
  1258. uhci_fsbr_timeout(uhci, u);
  1259. spin_unlock(&u->lock);
  1260. }
  1261. /* Really disable FSBR */
  1262. if (!uhci->fsbr && uhci->fsbrtimeout && time_after_eq(jiffies, uhci->fsbrtimeout)) {
  1263. uhci->fsbrtimeout = 0;
  1264. uhci->skel_term_qh->link = UHCI_PTR_TERM;
  1265. }
  1266. }