mpc52xx_uart.c 22 KB

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  1. /*
  2. * drivers/serial/mpc52xx_uart.c
  3. *
  4. * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
  5. *
  6. * FIXME According to the usermanual the status bits in the status register
  7. * are only updated when the peripherals access the FIFO and not when the
  8. * CPU access them. So since we use this bits to know when we stop writing
  9. * and reading, they may not be updated in-time and a race condition may
  10. * exists. But I haven't be able to prove this and I don't care. But if
  11. * any problem arises, it might worth checking. The TX/RX FIFO Stats
  12. * registers should be used in addition.
  13. * Update: Actually, they seem updated ... At least the bits we use.
  14. *
  15. *
  16. * Maintainer : Sylvain Munaut <tnt@246tNt.com>
  17. *
  18. * Some of the code has been inspired/copied from the 2.4 code written
  19. * by Dale Farnsworth <dfarnsworth@mvista.com>.
  20. *
  21. * Copyright (C) 2004-2005 Sylvain Munaut <tnt@246tNt.com>
  22. * Copyright (C) 2003 MontaVista, Software, Inc.
  23. *
  24. * This file is licensed under the terms of the GNU General Public License
  25. * version 2. This program is licensed "as is" without any warranty of any
  26. * kind, whether express or implied.
  27. */
  28. /* Platform device Usage :
  29. *
  30. * Since PSCs can have multiple function, the correct driver for each one
  31. * is selected by calling mpc52xx_match_psc_function(...). The function
  32. * handled by this driver is "uart".
  33. *
  34. * The driver init all necessary registers to place the PSC in uart mode without
  35. * DCD. However, the pin multiplexing aren't changed and should be set either
  36. * by the bootloader or in the platform init code.
  37. *
  38. * The idx field must be equal to the PSC index ( e.g. 0 for PSC1, 1 for PSC2,
  39. * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
  40. * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
  41. * fpr the console code : without this 1:1 mapping, at early boot time, when we
  42. * are parsing the kernel args console=ttyPSC?, we wouldn't know wich PSC it
  43. * will be mapped to.
  44. */
  45. #include <linux/config.h>
  46. #include <linux/platform_device.h>
  47. #include <linux/module.h>
  48. #include <linux/tty.h>
  49. #include <linux/serial.h>
  50. #include <linux/sysrq.h>
  51. #include <linux/console.h>
  52. #include <asm/delay.h>
  53. #include <asm/io.h>
  54. #include <asm/mpc52xx.h>
  55. #include <asm/mpc52xx_psc.h>
  56. #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  57. #define SUPPORT_SYSRQ
  58. #endif
  59. #include <linux/serial_core.h>
  60. /* We've been assigned a range on the "Low-density serial ports" major */
  61. #define SERIAL_PSC_MAJOR 204
  62. #define SERIAL_PSC_MINOR 148
  63. #define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */
  64. static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM];
  65. /* Rem: - We use the read_status_mask as a shadow of
  66. * psc->mpc52xx_psc_imr
  67. * - It's important that is array is all zero on start as we
  68. * use it to know if it's initialized or not ! If it's not sure
  69. * it's cleared, then a memset(...,0,...) should be added to
  70. * the console_init
  71. */
  72. #define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
  73. /* Forward declaration of the interruption handling routine */
  74. static irqreturn_t mpc52xx_uart_int(int irq,void *dev_id,struct pt_regs *regs);
  75. /* Simple macro to test if a port is console or not. This one is taken
  76. * for serial_core.c and maybe should be moved to serial_core.h ? */
  77. #ifdef CONFIG_SERIAL_CORE_CONSOLE
  78. #define uart_console(port) ((port)->cons && (port)->cons->index == (port)->line)
  79. #else
  80. #define uart_console(port) (0)
  81. #endif
  82. /* ======================================================================== */
  83. /* UART operations */
  84. /* ======================================================================== */
  85. static unsigned int
  86. mpc52xx_uart_tx_empty(struct uart_port *port)
  87. {
  88. int status = in_be16(&PSC(port)->mpc52xx_psc_status);
  89. return (status & MPC52xx_PSC_SR_TXEMP) ? TIOCSER_TEMT : 0;
  90. }
  91. static void
  92. mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
  93. {
  94. /* Not implemented */
  95. }
  96. static unsigned int
  97. mpc52xx_uart_get_mctrl(struct uart_port *port)
  98. {
  99. /* Not implemented */
  100. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  101. }
  102. static void
  103. mpc52xx_uart_stop_tx(struct uart_port *port)
  104. {
  105. /* port->lock taken by caller */
  106. port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
  107. out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
  108. }
  109. static void
  110. mpc52xx_uart_start_tx(struct uart_port *port)
  111. {
  112. /* port->lock taken by caller */
  113. port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
  114. out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
  115. }
  116. static void
  117. mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
  118. {
  119. unsigned long flags;
  120. spin_lock_irqsave(&port->lock, flags);
  121. port->x_char = ch;
  122. if (ch) {
  123. /* Make sure tx interrupts are on */
  124. /* Truly necessary ??? They should be anyway */
  125. port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
  126. out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
  127. }
  128. spin_unlock_irqrestore(&port->lock, flags);
  129. }
  130. static void
  131. mpc52xx_uart_stop_rx(struct uart_port *port)
  132. {
  133. /* port->lock taken by caller */
  134. port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
  135. out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
  136. }
  137. static void
  138. mpc52xx_uart_enable_ms(struct uart_port *port)
  139. {
  140. /* Not implemented */
  141. }
  142. static void
  143. mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
  144. {
  145. unsigned long flags;
  146. spin_lock_irqsave(&port->lock, flags);
  147. if ( ctl == -1 )
  148. out_8(&PSC(port)->command,MPC52xx_PSC_START_BRK);
  149. else
  150. out_8(&PSC(port)->command,MPC52xx_PSC_STOP_BRK);
  151. spin_unlock_irqrestore(&port->lock, flags);
  152. }
  153. static int
  154. mpc52xx_uart_startup(struct uart_port *port)
  155. {
  156. struct mpc52xx_psc __iomem *psc = PSC(port);
  157. int ret;
  158. /* Request IRQ */
  159. ret = request_irq(port->irq, mpc52xx_uart_int,
  160. SA_INTERRUPT | SA_SAMPLE_RANDOM, "mpc52xx_psc_uart", port);
  161. if (ret)
  162. return ret;
  163. /* Reset/activate the port, clear and enable interrupts */
  164. out_8(&psc->command,MPC52xx_PSC_RST_RX);
  165. out_8(&psc->command,MPC52xx_PSC_RST_TX);
  166. out_be32(&psc->sicr,0); /* UART mode DCD ignored */
  167. out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); /* /16 prescaler on */
  168. out_8(&psc->rfcntl, 0x00);
  169. out_be16(&psc->rfalarm, 0x1ff);
  170. out_8(&psc->tfcntl, 0x07);
  171. out_be16(&psc->tfalarm, 0x80);
  172. port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
  173. out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
  174. out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
  175. out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
  176. return 0;
  177. }
  178. static void
  179. mpc52xx_uart_shutdown(struct uart_port *port)
  180. {
  181. struct mpc52xx_psc __iomem *psc = PSC(port);
  182. /* Shut down the port, interrupt and all */
  183. out_8(&psc->command,MPC52xx_PSC_RST_RX);
  184. out_8(&psc->command,MPC52xx_PSC_RST_TX);
  185. port->read_status_mask = 0;
  186. out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
  187. /* Release interrupt */
  188. free_irq(port->irq, port);
  189. }
  190. static void
  191. mpc52xx_uart_set_termios(struct uart_port *port, struct termios *new,
  192. struct termios *old)
  193. {
  194. struct mpc52xx_psc __iomem *psc = PSC(port);
  195. unsigned long flags;
  196. unsigned char mr1, mr2;
  197. unsigned short ctr;
  198. unsigned int j, baud, quot;
  199. /* Prepare what we're gonna write */
  200. mr1 = 0;
  201. switch (new->c_cflag & CSIZE) {
  202. case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS;
  203. break;
  204. case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS;
  205. break;
  206. case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS;
  207. break;
  208. case CS8:
  209. default: mr1 |= MPC52xx_PSC_MODE_8_BITS;
  210. }
  211. if (new->c_cflag & PARENB) {
  212. mr1 |= (new->c_cflag & PARODD) ?
  213. MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
  214. } else
  215. mr1 |= MPC52xx_PSC_MODE_PARNONE;
  216. mr2 = 0;
  217. if (new->c_cflag & CSTOPB)
  218. mr2 |= MPC52xx_PSC_MODE_TWO_STOP;
  219. else
  220. mr2 |= ((new->c_cflag & CSIZE) == CS5) ?
  221. MPC52xx_PSC_MODE_ONE_STOP_5_BITS :
  222. MPC52xx_PSC_MODE_ONE_STOP;
  223. baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
  224. quot = uart_get_divisor(port, baud);
  225. ctr = quot & 0xffff;
  226. /* Get the lock */
  227. spin_lock_irqsave(&port->lock, flags);
  228. /* Update the per-port timeout */
  229. uart_update_timeout(port, new->c_cflag, baud);
  230. /* Do our best to flush TX & RX, so we don't loose anything */
  231. /* But we don't wait indefinitly ! */
  232. j = 5000000; /* Maximum wait */
  233. /* FIXME Can't receive chars since set_termios might be called at early
  234. * boot for the console, all stuff is not yet ready to receive at that
  235. * time and that just makes the kernel oops */
  236. /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
  237. while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
  238. --j)
  239. udelay(1);
  240. if (!j)
  241. printk( KERN_ERR "mpc52xx_uart.c: "
  242. "Unable to flush RX & TX fifos in-time in set_termios."
  243. "Some chars may have been lost.\n" );
  244. /* Reset the TX & RX */
  245. out_8(&psc->command,MPC52xx_PSC_RST_RX);
  246. out_8(&psc->command,MPC52xx_PSC_RST_TX);
  247. /* Send new mode settings */
  248. out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
  249. out_8(&psc->mode,mr1);
  250. out_8(&psc->mode,mr2);
  251. out_8(&psc->ctur,ctr >> 8);
  252. out_8(&psc->ctlr,ctr & 0xff);
  253. /* Reenable TX & RX */
  254. out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
  255. out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
  256. /* We're all set, release the lock */
  257. spin_unlock_irqrestore(&port->lock, flags);
  258. }
  259. static const char *
  260. mpc52xx_uart_type(struct uart_port *port)
  261. {
  262. return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL;
  263. }
  264. static void
  265. mpc52xx_uart_release_port(struct uart_port *port)
  266. {
  267. if (port->flags & UPF_IOREMAP) { /* remapped by us ? */
  268. iounmap(port->membase);
  269. port->membase = NULL;
  270. }
  271. release_mem_region(port->mapbase, MPC52xx_PSC_SIZE);
  272. }
  273. static int
  274. mpc52xx_uart_request_port(struct uart_port *port)
  275. {
  276. if (port->flags & UPF_IOREMAP) /* Need to remap ? */
  277. port->membase = ioremap(port->mapbase, MPC52xx_PSC_SIZE);
  278. if (!port->membase)
  279. return -EINVAL;
  280. return request_mem_region(port->mapbase, MPC52xx_PSC_SIZE,
  281. "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY;
  282. }
  283. static void
  284. mpc52xx_uart_config_port(struct uart_port *port, int flags)
  285. {
  286. if ( (flags & UART_CONFIG_TYPE) &&
  287. (mpc52xx_uart_request_port(port) == 0) )
  288. port->type = PORT_MPC52xx;
  289. }
  290. static int
  291. mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
  292. {
  293. if ( ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx )
  294. return -EINVAL;
  295. if ( (ser->irq != port->irq) ||
  296. (ser->io_type != SERIAL_IO_MEM) ||
  297. (ser->baud_base != port->uartclk) ||
  298. (ser->iomem_base != (void*)port->mapbase) ||
  299. (ser->hub6 != 0 ) )
  300. return -EINVAL;
  301. return 0;
  302. }
  303. static struct uart_ops mpc52xx_uart_ops = {
  304. .tx_empty = mpc52xx_uart_tx_empty,
  305. .set_mctrl = mpc52xx_uart_set_mctrl,
  306. .get_mctrl = mpc52xx_uart_get_mctrl,
  307. .stop_tx = mpc52xx_uart_stop_tx,
  308. .start_tx = mpc52xx_uart_start_tx,
  309. .send_xchar = mpc52xx_uart_send_xchar,
  310. .stop_rx = mpc52xx_uart_stop_rx,
  311. .enable_ms = mpc52xx_uart_enable_ms,
  312. .break_ctl = mpc52xx_uart_break_ctl,
  313. .startup = mpc52xx_uart_startup,
  314. .shutdown = mpc52xx_uart_shutdown,
  315. .set_termios = mpc52xx_uart_set_termios,
  316. /* .pm = mpc52xx_uart_pm, Not supported yet */
  317. /* .set_wake = mpc52xx_uart_set_wake, Not supported yet */
  318. .type = mpc52xx_uart_type,
  319. .release_port = mpc52xx_uart_release_port,
  320. .request_port = mpc52xx_uart_request_port,
  321. .config_port = mpc52xx_uart_config_port,
  322. .verify_port = mpc52xx_uart_verify_port
  323. };
  324. /* ======================================================================== */
  325. /* Interrupt handling */
  326. /* ======================================================================== */
  327. static inline int
  328. mpc52xx_uart_int_rx_chars(struct uart_port *port, struct pt_regs *regs)
  329. {
  330. struct tty_struct *tty = port->info->tty;
  331. unsigned char ch, flag;
  332. unsigned short status;
  333. /* While we can read, do so ! */
  334. while ( (status = in_be16(&PSC(port)->mpc52xx_psc_status)) &
  335. MPC52xx_PSC_SR_RXRDY) {
  336. /* Get the char */
  337. ch = in_8(&PSC(port)->mpc52xx_psc_buffer_8);
  338. /* Handle sysreq char */
  339. #ifdef SUPPORT_SYSRQ
  340. if (uart_handle_sysrq_char(port, ch, regs)) {
  341. port->sysrq = 0;
  342. continue;
  343. }
  344. #endif
  345. /* Store it */
  346. flag = TTY_NORMAL;
  347. port->icount.rx++;
  348. if ( status & (MPC52xx_PSC_SR_PE |
  349. MPC52xx_PSC_SR_FE |
  350. MPC52xx_PSC_SR_RB) ) {
  351. if (status & MPC52xx_PSC_SR_RB) {
  352. flag = TTY_BREAK;
  353. uart_handle_break(port);
  354. } else if (status & MPC52xx_PSC_SR_PE)
  355. flag = TTY_PARITY;
  356. else if (status & MPC52xx_PSC_SR_FE)
  357. flag = TTY_FRAME;
  358. /* Clear error condition */
  359. out_8(&PSC(port)->command,MPC52xx_PSC_RST_ERR_STAT);
  360. }
  361. tty_insert_flip_char(tty, ch, flag);
  362. if (status & MPC52xx_PSC_SR_OE) {
  363. /*
  364. * Overrun is special, since it's
  365. * reported immediately, and doesn't
  366. * affect the current character
  367. */
  368. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  369. }
  370. }
  371. tty_flip_buffer_push(tty);
  372. return in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_RXRDY;
  373. }
  374. static inline int
  375. mpc52xx_uart_int_tx_chars(struct uart_port *port)
  376. {
  377. struct circ_buf *xmit = &port->info->xmit;
  378. /* Process out of band chars */
  379. if (port->x_char) {
  380. out_8(&PSC(port)->mpc52xx_psc_buffer_8, port->x_char);
  381. port->icount.tx++;
  382. port->x_char = 0;
  383. return 1;
  384. }
  385. /* Nothing to do ? */
  386. if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
  387. mpc52xx_uart_stop_tx(port);
  388. return 0;
  389. }
  390. /* Send chars */
  391. while (in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXRDY) {
  392. out_8(&PSC(port)->mpc52xx_psc_buffer_8, xmit->buf[xmit->tail]);
  393. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  394. port->icount.tx++;
  395. if (uart_circ_empty(xmit))
  396. break;
  397. }
  398. /* Wake up */
  399. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  400. uart_write_wakeup(port);
  401. /* Maybe we're done after all */
  402. if (uart_circ_empty(xmit)) {
  403. mpc52xx_uart_stop_tx(port);
  404. return 0;
  405. }
  406. return 1;
  407. }
  408. static irqreturn_t
  409. mpc52xx_uart_int(int irq, void *dev_id, struct pt_regs *regs)
  410. {
  411. struct uart_port *port = (struct uart_port *) dev_id;
  412. unsigned long pass = ISR_PASS_LIMIT;
  413. unsigned int keepgoing;
  414. unsigned short status;
  415. if ( irq != port->irq ) {
  416. printk( KERN_WARNING
  417. "mpc52xx_uart_int : " \
  418. "Received wrong int %d. Waiting for %d\n",
  419. irq, port->irq);
  420. return IRQ_NONE;
  421. }
  422. spin_lock(&port->lock);
  423. /* While we have stuff to do, we continue */
  424. do {
  425. /* If we don't find anything to do, we stop */
  426. keepgoing = 0;
  427. /* Read status */
  428. status = in_be16(&PSC(port)->mpc52xx_psc_isr);
  429. status &= port->read_status_mask;
  430. /* Do we need to receive chars ? */
  431. /* For this RX interrupts must be on and some chars waiting */
  432. if ( status & MPC52xx_PSC_IMR_RXRDY )
  433. keepgoing |= mpc52xx_uart_int_rx_chars(port, regs);
  434. /* Do we need to send chars ? */
  435. /* For this, TX must be ready and TX interrupt enabled */
  436. if ( status & MPC52xx_PSC_IMR_TXRDY )
  437. keepgoing |= mpc52xx_uart_int_tx_chars(port);
  438. /* Limit number of iteration */
  439. if ( !(--pass) )
  440. keepgoing = 0;
  441. } while (keepgoing);
  442. spin_unlock(&port->lock);
  443. return IRQ_HANDLED;
  444. }
  445. /* ======================================================================== */
  446. /* Console ( if applicable ) */
  447. /* ======================================================================== */
  448. #ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
  449. static void __init
  450. mpc52xx_console_get_options(struct uart_port *port,
  451. int *baud, int *parity, int *bits, int *flow)
  452. {
  453. struct mpc52xx_psc __iomem *psc = PSC(port);
  454. unsigned char mr1;
  455. /* Read the mode registers */
  456. out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
  457. mr1 = in_8(&psc->mode);
  458. /* CT{U,L}R are write-only ! */
  459. *baud = __res.bi_baudrate ?
  460. __res.bi_baudrate : CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
  461. /* Parse them */
  462. switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
  463. case MPC52xx_PSC_MODE_5_BITS: *bits = 5; break;
  464. case MPC52xx_PSC_MODE_6_BITS: *bits = 6; break;
  465. case MPC52xx_PSC_MODE_7_BITS: *bits = 7; break;
  466. case MPC52xx_PSC_MODE_8_BITS:
  467. default: *bits = 8;
  468. }
  469. if (mr1 & MPC52xx_PSC_MODE_PARNONE)
  470. *parity = 'n';
  471. else
  472. *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
  473. }
  474. static void
  475. mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
  476. {
  477. struct uart_port *port = &mpc52xx_uart_ports[co->index];
  478. struct mpc52xx_psc __iomem *psc = PSC(port);
  479. unsigned int i, j;
  480. /* Disable interrupts */
  481. out_be16(&psc->mpc52xx_psc_imr, 0);
  482. /* Wait the TX buffer to be empty */
  483. j = 5000000; /* Maximum wait */
  484. while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
  485. --j)
  486. udelay(1);
  487. /* Write all the chars */
  488. for ( i=0 ; i<count ; i++ ) {
  489. /* Send the char */
  490. out_8(&psc->mpc52xx_psc_buffer_8, *s);
  491. /* Line return handling */
  492. if ( *s++ == '\n' )
  493. out_8(&psc->mpc52xx_psc_buffer_8, '\r');
  494. /* Wait the TX buffer to be empty */
  495. j = 20000; /* Maximum wait */
  496. while (!(in_be16(&psc->mpc52xx_psc_status) &
  497. MPC52xx_PSC_SR_TXEMP) && --j)
  498. udelay(1);
  499. }
  500. /* Restore interrupt state */
  501. out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
  502. }
  503. static int __init
  504. mpc52xx_console_setup(struct console *co, char *options)
  505. {
  506. struct uart_port *port = &mpc52xx_uart_ports[co->index];
  507. int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
  508. int bits = 8;
  509. int parity = 'n';
  510. int flow = 'n';
  511. if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM)
  512. return -EINVAL;
  513. /* Basic port init. Needed since we use some uart_??? func before
  514. * real init for early access */
  515. spin_lock_init(&port->lock);
  516. port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
  517. port->ops = &mpc52xx_uart_ops;
  518. port->mapbase = MPC52xx_PA(MPC52xx_PSCx_OFFSET(co->index+1));
  519. /* We ioremap ourself */
  520. port->membase = ioremap(port->mapbase, MPC52xx_PSC_SIZE);
  521. if (port->membase == NULL)
  522. return -EINVAL;
  523. /* Setup the port parameters accoding to options */
  524. if (options)
  525. uart_parse_options(options, &baud, &parity, &bits, &flow);
  526. else
  527. mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
  528. return uart_set_options(port, co, baud, parity, bits, flow);
  529. }
  530. static struct uart_driver mpc52xx_uart_driver;
  531. static struct console mpc52xx_console = {
  532. .name = "ttyPSC",
  533. .write = mpc52xx_console_write,
  534. .device = uart_console_device,
  535. .setup = mpc52xx_console_setup,
  536. .flags = CON_PRINTBUFFER,
  537. .index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0 ) */
  538. .data = &mpc52xx_uart_driver,
  539. };
  540. static int __init
  541. mpc52xx_console_init(void)
  542. {
  543. register_console(&mpc52xx_console);
  544. return 0;
  545. }
  546. console_initcall(mpc52xx_console_init);
  547. #define MPC52xx_PSC_CONSOLE &mpc52xx_console
  548. #else
  549. #define MPC52xx_PSC_CONSOLE NULL
  550. #endif
  551. /* ======================================================================== */
  552. /* UART Driver */
  553. /* ======================================================================== */
  554. static struct uart_driver mpc52xx_uart_driver = {
  555. .owner = THIS_MODULE,
  556. .driver_name = "mpc52xx_psc_uart",
  557. .dev_name = "ttyPSC",
  558. .devfs_name = "ttyPSC",
  559. .major = SERIAL_PSC_MAJOR,
  560. .minor = SERIAL_PSC_MINOR,
  561. .nr = MPC52xx_PSC_MAXNUM,
  562. .cons = MPC52xx_PSC_CONSOLE,
  563. };
  564. /* ======================================================================== */
  565. /* Platform Driver */
  566. /* ======================================================================== */
  567. static int __devinit
  568. mpc52xx_uart_probe(struct platform_device *dev)
  569. {
  570. struct resource *res = dev->resource;
  571. struct uart_port *port = NULL;
  572. int i, idx, ret;
  573. /* Check validity & presence */
  574. idx = dev->id;
  575. if (idx < 0 || idx >= MPC52xx_PSC_MAXNUM)
  576. return -EINVAL;
  577. if (!mpc52xx_match_psc_function(idx,"uart"))
  578. return -ENODEV;
  579. /* Init the port structure */
  580. port = &mpc52xx_uart_ports[idx];
  581. memset(port, 0x00, sizeof(struct uart_port));
  582. spin_lock_init(&port->lock);
  583. port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
  584. port->fifosize = 255; /* Should be 512 ! But it can't be */
  585. /* stored in a unsigned char */
  586. port->iotype = UPIO_MEM;
  587. port->flags = UPF_BOOT_AUTOCONF |
  588. ( uart_console(port) ? 0 : UPF_IOREMAP );
  589. port->line = idx;
  590. port->ops = &mpc52xx_uart_ops;
  591. /* Search for IRQ and mapbase */
  592. for (i=0 ; i<dev->num_resources ; i++, res++) {
  593. if (res->flags & IORESOURCE_MEM)
  594. port->mapbase = res->start;
  595. else if (res->flags & IORESOURCE_IRQ)
  596. port->irq = res->start;
  597. }
  598. if (!port->irq || !port->mapbase)
  599. return -EINVAL;
  600. /* Add the port to the uart sub-system */
  601. ret = uart_add_one_port(&mpc52xx_uart_driver, port);
  602. if (!ret)
  603. platform_set_drvdata(dev, (void*)port);
  604. return ret;
  605. }
  606. static int
  607. mpc52xx_uart_remove(struct platform_device *dev)
  608. {
  609. struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
  610. platform_set_drvdata(dev, NULL);
  611. if (port)
  612. uart_remove_one_port(&mpc52xx_uart_driver, port);
  613. return 0;
  614. }
  615. #ifdef CONFIG_PM
  616. static int
  617. mpc52xx_uart_suspend(struct platform_device *dev, pm_message_t state)
  618. {
  619. struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
  620. if (sport)
  621. uart_suspend_port(&mpc52xx_uart_driver, port);
  622. return 0;
  623. }
  624. static int
  625. mpc52xx_uart_resume(struct platform_device *dev)
  626. {
  627. struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
  628. if (port)
  629. uart_resume_port(&mpc52xx_uart_driver, port);
  630. return 0;
  631. }
  632. #endif
  633. static struct platform_driver mpc52xx_uart_platform_driver = {
  634. .probe = mpc52xx_uart_probe,
  635. .remove = mpc52xx_uart_remove,
  636. #ifdef CONFIG_PM
  637. .suspend = mpc52xx_uart_suspend,
  638. .resume = mpc52xx_uart_resume,
  639. #endif
  640. .driver = {
  641. .name = "mpc52xx-psc",
  642. },
  643. };
  644. /* ======================================================================== */
  645. /* Module */
  646. /* ======================================================================== */
  647. static int __init
  648. mpc52xx_uart_init(void)
  649. {
  650. int ret;
  651. printk(KERN_INFO "Serial: MPC52xx PSC driver\n");
  652. ret = uart_register_driver(&mpc52xx_uart_driver);
  653. if (ret == 0) {
  654. ret = platform_driver_register(&mpc52xx_uart_platform_driver);
  655. if (ret)
  656. uart_unregister_driver(&mpc52xx_uart_driver);
  657. }
  658. return ret;
  659. }
  660. static void __exit
  661. mpc52xx_uart_exit(void)
  662. {
  663. platform_driver_unregister(&mpc52xx_uart_platform_driver);
  664. uart_unregister_driver(&mpc52xx_uart_driver);
  665. }
  666. module_init(mpc52xx_uart_init);
  667. module_exit(mpc52xx_uart_exit);
  668. MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
  669. MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
  670. MODULE_LICENSE("GPL");