psi_chip.h 6.6 KB

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  1. /*+M*************************************************************************
  2. * Perceptive Solutions, Inc. PSI-240I device driver proc support for Linux.
  3. *
  4. * Copyright (c) 1997 Perceptive Solutions, Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2, or (at your option)
  9. * any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; see the file COPYING. If not, write to
  18. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  19. *
  20. *
  21. * File Name: psi_chip.h
  22. *
  23. * Description: This file contains the interface defines and
  24. * error codes.
  25. *
  26. *-M*************************************************************************/
  27. #ifndef PSI_CHIP
  28. #define PSI_CHIP
  29. /************************************************/
  30. /* Misc konstants */
  31. /************************************************/
  32. #define CHIP_MAXDRIVES 8
  33. /************************************************/
  34. /* Chip I/O addresses */
  35. /************************************************/
  36. #define CHIP_ADRS_0 0x0130
  37. #define CHIP_ADRS_1 0x0150
  38. #define CHIP_ADRS_2 0x0190
  39. #define CHIP_ADRS_3 0x0210
  40. #define CHIP_ADRS_4 0x0230
  41. #define CHIP_ADRS_5 0x0250
  42. /************************************************/
  43. /* EEPROM locations */
  44. /************************************************/
  45. #define CHIP_EEPROM_BIOS 0x0000 // BIOS base address
  46. #define CHIP_EEPROM_DATA 0x2000 // SETUP data base address
  47. #define CHIP_EEPROM_FACTORY 0x2400 // FACTORY data base address
  48. #define CHIP_EEPROM_SETUP 0x3000 // SETUP PROGRAM base address
  49. #define CHIP_EEPROM_SIZE 32768U // size of the entire EEPROM
  50. #define CHIP_EEPROM_BIOS_SIZE 8192 // size of the BIOS in bytes
  51. #define CHIP_EEPROM_DATA_SIZE 4096 // size of factory, setup, log data block in bytes
  52. #define CHIP_EEPROM_SETUP_SIZE 20480U // size of the setup program in bytes
  53. /************************************************/
  54. /* Chip Interrupts */
  55. /************************************************/
  56. #define CHIP_IRQ_10 0x72
  57. #define CHIP_IRQ_11 0x73
  58. #define CHIP_IRQ_12 0x74
  59. /************************************************/
  60. /* Chip Setup addresses */
  61. /************************************************/
  62. #define CHIP_SETUP_BASE 0x0000C000L
  63. /************************************************/
  64. /* Chip Register address offsets */
  65. /************************************************/
  66. #define REG_DATA 0x00
  67. #define REG_ERROR 0x01
  68. #define REG_SECTOR_COUNT 0x02
  69. #define REG_LBA_0 0x03
  70. #define REG_LBA_8 0x04
  71. #define REG_LBA_16 0x05
  72. #define REG_LBA_24 0x06
  73. #define REG_STAT_CMD 0x07
  74. #define REG_SEL_FAIL 0x08
  75. #define REG_IRQ_STATUS 0x09
  76. #define REG_ADDRESS 0x0A
  77. #define REG_FAIL 0x0C
  78. #define REG_ALT_STAT 0x0E
  79. #define REG_DRIVE_ADRS 0x0F
  80. /************************************************/
  81. /* Chip RAM locations */
  82. /************************************************/
  83. #define CHIP_DEVICE 0x8000
  84. #define CHIP_DEVICE_0 0x8000
  85. #define CHIP_DEVICE_1 0x8008
  86. #define CHIP_DEVICE_2 0x8010
  87. #define CHIP_DEVICE_3 0x8018
  88. #define CHIP_DEVICE_4 0x8020
  89. #define CHIP_DEVICE_5 0x8028
  90. #define CHIP_DEVICE_6 0x8030
  91. #define CHIP_DEVICE_7 0x8038
  92. typedef struct
  93. {
  94. UCHAR channel; // channel of this device (0-8).
  95. UCHAR spt; // Sectors Per Track.
  96. ULONG spc; // Sectors Per Cylinder.
  97. } CHIP_DEVICE_N;
  98. #define CHIP_CONFIG 0x8100 // address of boards configuration.
  99. typedef struct
  100. {
  101. UCHAR irq; // interrupt request channel number
  102. UCHAR numDrives; // Number of accessible drives
  103. UCHAR fastFormat; // Boolean for fast format enable
  104. } CHIP_CONFIG_N;
  105. #define CHIP_MAP 0x8108 // eight byte device type map.
  106. #define CHIP_RAID 0x8120 // array of RAID signature structures and LBA
  107. #define CHIP_RAID_1 0x8120
  108. #define CHIP_RAID_2 0x8130
  109. #define CHIP_RAID_3 0x8140
  110. #define CHIP_RAID_4 0x8150
  111. /************************************************/
  112. /* Chip Register Masks */
  113. /************************************************/
  114. #define CHIP_ID 0x7B
  115. #define SEL_RAM 0x8000
  116. #define MASK_FAIL 0x80
  117. /************************************************/
  118. /* Chip cable select bits */
  119. /************************************************/
  120. #define SECTORSXFER 8
  121. /************************************************/
  122. /* Chip cable select bits */
  123. /************************************************/
  124. #define SEL_NONE 0x00
  125. #define SEL_1 0x01
  126. #define SEL_2 0x02
  127. #define SEL_3 0x04
  128. #define SEL_4 0x08
  129. /************************************************/
  130. /* Programmable Interrupt Controller*/
  131. /************************************************/
  132. #define PIC1 0x20 // first 8259 base port address
  133. #define PIC2 0xA0 // second 8259 base port address
  134. #define INT_OCW1 1 // Operation Control Word 1: IRQ mask
  135. #define EOI 0x20 // non-specific end-of-interrupt
  136. /************************************************/
  137. /* Device/Geometry controls */
  138. /************************************************/
  139. #define GEOMETRY_NONE 0x0 // No device
  140. #define GEOMETRY_AUTO 0x1 // Geometry set automatically
  141. #define GEOMETRY_USER 0x2 // User supplied geometry
  142. #define DEVICE_NONE 0x0 // No device present
  143. #define DEVICE_INACTIVE 0x1 // device present but not registered active
  144. #define DEVICE_ATAPI 0x2 // ATAPI device (CD_ROM, Tape, Etc...)
  145. #define DEVICE_DASD_NONLBA 0x3 // Non LBA incompatible device
  146. #define DEVICE_DASD_LBA 0x4 // LBA compatible device
  147. /************************************************/
  148. /* Setup Structure Definitions */
  149. /************************************************/
  150. typedef struct // device setup parameters
  151. {
  152. UCHAR geometryControl; // geometry control flags
  153. UCHAR device; // device code
  154. USHORT sectors; // number of sectors per track
  155. USHORT heads; // number of heads
  156. USHORT cylinders; // number of cylinders for this device
  157. ULONG blocks; // number of blocks on device
  158. USHORT spare1;
  159. USHORT spare2;
  160. } SETUP_DEVICE, *PSETUP_DEVICE;
  161. typedef struct // master setup structure
  162. {
  163. USHORT startupDelay;
  164. USHORT promptBIOS;
  165. USHORT fastFormat;
  166. USHORT spare2;
  167. USHORT spare3;
  168. USHORT spare4;
  169. USHORT spare5;
  170. USHORT spare6;
  171. SETUP_DEVICE setupDevice[8];
  172. } SETUP, *PSETUP;
  173. #endif