lpfc_mbox.c 18 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex Linux Device Driver for *
  3. * Fibre Channel Host Bus Adapters. *
  4. * Copyright (C) 2004-2005 Emulex. All rights reserved. *
  5. * EMULEX and SLI are trademarks of Emulex. *
  6. * www.emulex.com *
  7. * Portions Copyright (C) 2004-2005 Christoph Hellwig *
  8. * *
  9. * This program is free software; you can redistribute it and/or *
  10. * modify it under the terms of version 2 of the GNU General *
  11. * Public License as published by the Free Software Foundation. *
  12. * This program is distributed in the hope that it will be useful. *
  13. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
  14. * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
  15. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
  16. * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  17. * TO BE LEGALLY INVALID. See the GNU General Public License for *
  18. * more details, a copy of which can be found in the file COPYING *
  19. * included with this package. *
  20. *******************************************************************/
  21. #include <linux/blkdev.h>
  22. #include <linux/pci.h>
  23. #include <linux/interrupt.h>
  24. #include <scsi/scsi_device.h>
  25. #include <scsi/scsi_transport_fc.h>
  26. #include <scsi/scsi.h>
  27. #include "lpfc_hw.h"
  28. #include "lpfc_sli.h"
  29. #include "lpfc_disc.h"
  30. #include "lpfc_scsi.h"
  31. #include "lpfc.h"
  32. #include "lpfc_logmsg.h"
  33. #include "lpfc_crtn.h"
  34. #include "lpfc_compat.h"
  35. /**********************************************/
  36. /* mailbox command */
  37. /**********************************************/
  38. void
  39. lpfc_dump_mem(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, uint16_t offset)
  40. {
  41. MAILBOX_t *mb;
  42. void *ctx;
  43. mb = &pmb->mb;
  44. ctx = pmb->context2;
  45. /* Setup to dump VPD region */
  46. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  47. mb->mbxCommand = MBX_DUMP_MEMORY;
  48. mb->un.varDmp.cv = 1;
  49. mb->un.varDmp.type = DMP_NV_PARAMS;
  50. mb->un.varDmp.entry_index = offset;
  51. mb->un.varDmp.region_id = DMP_REGION_VPD;
  52. mb->un.varDmp.word_cnt = (DMP_RSP_SIZE / sizeof (uint32_t));
  53. mb->un.varDmp.co = 0;
  54. mb->un.varDmp.resp_offset = 0;
  55. pmb->context2 = ctx;
  56. mb->mbxOwner = OWN_HOST;
  57. return;
  58. }
  59. /**********************************************/
  60. /* lpfc_read_nv Issue a READ NVPARAM */
  61. /* mailbox command */
  62. /**********************************************/
  63. void
  64. lpfc_read_nv(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  65. {
  66. MAILBOX_t *mb;
  67. mb = &pmb->mb;
  68. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  69. mb->mbxCommand = MBX_READ_NV;
  70. mb->mbxOwner = OWN_HOST;
  71. return;
  72. }
  73. /**********************************************/
  74. /* lpfc_read_la Issue a READ LA */
  75. /* mailbox command */
  76. /**********************************************/
  77. int
  78. lpfc_read_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, struct lpfc_dmabuf *mp)
  79. {
  80. MAILBOX_t *mb;
  81. struct lpfc_sli *psli;
  82. psli = &phba->sli;
  83. mb = &pmb->mb;
  84. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  85. INIT_LIST_HEAD(&mp->list);
  86. mb->mbxCommand = MBX_READ_LA64;
  87. mb->un.varReadLA.un.lilpBde64.tus.f.bdeSize = 128;
  88. mb->un.varReadLA.un.lilpBde64.addrHigh = putPaddrHigh(mp->phys);
  89. mb->un.varReadLA.un.lilpBde64.addrLow = putPaddrLow(mp->phys);
  90. /* Save address for later completion and set the owner to host so that
  91. * the FW knows this mailbox is available for processing.
  92. */
  93. pmb->context1 = (uint8_t *) mp;
  94. mb->mbxOwner = OWN_HOST;
  95. return (0);
  96. }
  97. /**********************************************/
  98. /* lpfc_clear_la Issue a CLEAR LA */
  99. /* mailbox command */
  100. /**********************************************/
  101. void
  102. lpfc_clear_la(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  103. {
  104. MAILBOX_t *mb;
  105. mb = &pmb->mb;
  106. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  107. mb->un.varClearLA.eventTag = phba->fc_eventTag;
  108. mb->mbxCommand = MBX_CLEAR_LA;
  109. mb->mbxOwner = OWN_HOST;
  110. return;
  111. }
  112. /**************************************************/
  113. /* lpfc_config_link Issue a CONFIG LINK */
  114. /* mailbox command */
  115. /**************************************************/
  116. void
  117. lpfc_config_link(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  118. {
  119. MAILBOX_t *mb = &pmb->mb;
  120. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  121. /* NEW_FEATURE
  122. * SLI-2, Coalescing Response Feature.
  123. */
  124. if (phba->cfg_cr_delay) {
  125. mb->un.varCfgLnk.cr = 1;
  126. mb->un.varCfgLnk.ci = 1;
  127. mb->un.varCfgLnk.cr_delay = phba->cfg_cr_delay;
  128. mb->un.varCfgLnk.cr_count = phba->cfg_cr_count;
  129. }
  130. mb->un.varCfgLnk.myId = phba->fc_myDID;
  131. mb->un.varCfgLnk.edtov = phba->fc_edtov;
  132. mb->un.varCfgLnk.arbtov = phba->fc_arbtov;
  133. mb->un.varCfgLnk.ratov = phba->fc_ratov;
  134. mb->un.varCfgLnk.rttov = phba->fc_rttov;
  135. mb->un.varCfgLnk.altov = phba->fc_altov;
  136. mb->un.varCfgLnk.crtov = phba->fc_crtov;
  137. mb->un.varCfgLnk.citov = phba->fc_citov;
  138. if (phba->cfg_ack0)
  139. mb->un.varCfgLnk.ack0_enable = 1;
  140. mb->mbxCommand = MBX_CONFIG_LINK;
  141. mb->mbxOwner = OWN_HOST;
  142. return;
  143. }
  144. /**********************************************/
  145. /* lpfc_init_link Issue an INIT LINK */
  146. /* mailbox command */
  147. /**********************************************/
  148. void
  149. lpfc_init_link(struct lpfc_hba * phba,
  150. LPFC_MBOXQ_t * pmb, uint32_t topology, uint32_t linkspeed)
  151. {
  152. lpfc_vpd_t *vpd;
  153. struct lpfc_sli *psli;
  154. MAILBOX_t *mb;
  155. mb = &pmb->mb;
  156. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  157. psli = &phba->sli;
  158. switch (topology) {
  159. case FLAGS_TOPOLOGY_MODE_LOOP_PT:
  160. mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP;
  161. mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER;
  162. break;
  163. case FLAGS_TOPOLOGY_MODE_PT_PT:
  164. mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT;
  165. break;
  166. case FLAGS_TOPOLOGY_MODE_LOOP:
  167. mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_LOOP;
  168. break;
  169. case FLAGS_TOPOLOGY_MODE_PT_LOOP:
  170. mb->un.varInitLnk.link_flags = FLAGS_TOPOLOGY_MODE_PT_PT;
  171. mb->un.varInitLnk.link_flags |= FLAGS_TOPOLOGY_FAILOVER;
  172. break;
  173. }
  174. /* NEW_FEATURE
  175. * Setting up the link speed
  176. */
  177. vpd = &phba->vpd;
  178. if (vpd->rev.feaLevelHigh >= 0x02){
  179. switch(linkspeed){
  180. case LINK_SPEED_1G:
  181. case LINK_SPEED_2G:
  182. case LINK_SPEED_4G:
  183. mb->un.varInitLnk.link_flags |=
  184. FLAGS_LINK_SPEED;
  185. mb->un.varInitLnk.link_speed = linkspeed;
  186. break;
  187. case LINK_SPEED_AUTO:
  188. default:
  189. mb->un.varInitLnk.link_speed =
  190. LINK_SPEED_AUTO;
  191. break;
  192. }
  193. }
  194. else
  195. mb->un.varInitLnk.link_speed = LINK_SPEED_AUTO;
  196. mb->mbxCommand = (volatile uint8_t)MBX_INIT_LINK;
  197. mb->mbxOwner = OWN_HOST;
  198. mb->un.varInitLnk.fabric_AL_PA = phba->fc_pref_ALPA;
  199. return;
  200. }
  201. /**********************************************/
  202. /* lpfc_read_sparam Issue a READ SPARAM */
  203. /* mailbox command */
  204. /**********************************************/
  205. int
  206. lpfc_read_sparam(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  207. {
  208. struct lpfc_dmabuf *mp;
  209. MAILBOX_t *mb;
  210. struct lpfc_sli *psli;
  211. psli = &phba->sli;
  212. mb = &pmb->mb;
  213. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  214. mb->mbxOwner = OWN_HOST;
  215. /* Get a buffer to hold the HBAs Service Parameters */
  216. if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL)) == 0) ||
  217. ((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) {
  218. kfree(mp);
  219. mb->mbxCommand = MBX_READ_SPARM64;
  220. /* READ_SPARAM: no buffers */
  221. lpfc_printf_log(phba,
  222. KERN_WARNING,
  223. LOG_MBOX,
  224. "%d:0301 READ_SPARAM: no buffers\n",
  225. phba->brd_no);
  226. return (1);
  227. }
  228. INIT_LIST_HEAD(&mp->list);
  229. mb->mbxCommand = MBX_READ_SPARM64;
  230. mb->un.varRdSparm.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm);
  231. mb->un.varRdSparm.un.sp64.addrHigh = putPaddrHigh(mp->phys);
  232. mb->un.varRdSparm.un.sp64.addrLow = putPaddrLow(mp->phys);
  233. /* save address for completion */
  234. pmb->context1 = mp;
  235. return (0);
  236. }
  237. /********************************************/
  238. /* lpfc_unreg_did Issue a UNREG_DID */
  239. /* mailbox command */
  240. /********************************************/
  241. void
  242. lpfc_unreg_did(struct lpfc_hba * phba, uint32_t did, LPFC_MBOXQ_t * pmb)
  243. {
  244. MAILBOX_t *mb;
  245. mb = &pmb->mb;
  246. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  247. mb->un.varUnregDID.did = did;
  248. mb->mbxCommand = MBX_UNREG_D_ID;
  249. mb->mbxOwner = OWN_HOST;
  250. return;
  251. }
  252. /***********************************************/
  253. /* command to write slim */
  254. /***********************************************/
  255. void
  256. lpfc_set_slim(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb, uint32_t addr,
  257. uint32_t value)
  258. {
  259. MAILBOX_t *mb;
  260. mb = &pmb->mb;
  261. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  262. /* addr = 0x090597 is AUTO ABTS disable for ELS commands */
  263. /* addr = 0x052198 is DELAYED ABTS enable for ELS commands */
  264. /*
  265. * Always turn on DELAYED ABTS for ELS timeouts
  266. */
  267. if ((addr == 0x052198) && (value == 0))
  268. value = 1;
  269. mb->un.varWords[0] = addr;
  270. mb->un.varWords[1] = value;
  271. mb->mbxCommand = MBX_SET_SLIM;
  272. mb->mbxOwner = OWN_HOST;
  273. return;
  274. }
  275. /**********************************************/
  276. /* lpfc_read_nv Issue a READ CONFIG */
  277. /* mailbox command */
  278. /**********************************************/
  279. void
  280. lpfc_read_config(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  281. {
  282. MAILBOX_t *mb;
  283. mb = &pmb->mb;
  284. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  285. mb->mbxCommand = MBX_READ_CONFIG;
  286. mb->mbxOwner = OWN_HOST;
  287. return;
  288. }
  289. /********************************************/
  290. /* lpfc_reg_login Issue a REG_LOGIN */
  291. /* mailbox command */
  292. /********************************************/
  293. int
  294. lpfc_reg_login(struct lpfc_hba * phba,
  295. uint32_t did, uint8_t * param, LPFC_MBOXQ_t * pmb, uint32_t flag)
  296. {
  297. uint8_t *sparam;
  298. struct lpfc_dmabuf *mp;
  299. MAILBOX_t *mb;
  300. struct lpfc_sli *psli;
  301. psli = &phba->sli;
  302. mb = &pmb->mb;
  303. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  304. mb->un.varRegLogin.rpi = 0;
  305. mb->un.varRegLogin.did = did;
  306. mb->un.varWords[30] = flag; /* Set flag to issue action on cmpl */
  307. mb->mbxOwner = OWN_HOST;
  308. /* Get a buffer to hold NPorts Service Parameters */
  309. if (((mp = kmalloc(sizeof (struct lpfc_dmabuf), GFP_KERNEL)) == NULL) ||
  310. ((mp->virt = lpfc_mbuf_alloc(phba, 0, &(mp->phys))) == 0)) {
  311. kfree(mp);
  312. mb->mbxCommand = MBX_REG_LOGIN64;
  313. /* REG_LOGIN: no buffers */
  314. lpfc_printf_log(phba,
  315. KERN_WARNING,
  316. LOG_MBOX,
  317. "%d:0302 REG_LOGIN: no buffers Data x%x x%x\n",
  318. phba->brd_no,
  319. (uint32_t) did, (uint32_t) flag);
  320. return (1);
  321. }
  322. INIT_LIST_HEAD(&mp->list);
  323. sparam = mp->virt;
  324. /* Copy param's into a new buffer */
  325. memcpy(sparam, param, sizeof (struct serv_parm));
  326. /* save address for completion */
  327. pmb->context1 = (uint8_t *) mp;
  328. mb->mbxCommand = MBX_REG_LOGIN64;
  329. mb->un.varRegLogin.un.sp64.tus.f.bdeSize = sizeof (struct serv_parm);
  330. mb->un.varRegLogin.un.sp64.addrHigh = putPaddrHigh(mp->phys);
  331. mb->un.varRegLogin.un.sp64.addrLow = putPaddrLow(mp->phys);
  332. return (0);
  333. }
  334. /**********************************************/
  335. /* lpfc_unreg_login Issue a UNREG_LOGIN */
  336. /* mailbox command */
  337. /**********************************************/
  338. void
  339. lpfc_unreg_login(struct lpfc_hba * phba, uint32_t rpi, LPFC_MBOXQ_t * pmb)
  340. {
  341. MAILBOX_t *mb;
  342. mb = &pmb->mb;
  343. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  344. mb->un.varUnregLogin.rpi = (uint16_t) rpi;
  345. mb->un.varUnregLogin.rsvd1 = 0;
  346. mb->mbxCommand = MBX_UNREG_LOGIN;
  347. mb->mbxOwner = OWN_HOST;
  348. return;
  349. }
  350. static void
  351. lpfc_config_pcb_setup(struct lpfc_hba * phba)
  352. {
  353. struct lpfc_sli *psli = &phba->sli;
  354. struct lpfc_sli_ring *pring;
  355. PCB_t *pcbp = &phba->slim2p->pcb;
  356. dma_addr_t pdma_addr;
  357. uint32_t offset;
  358. uint32_t iocbCnt;
  359. int i;
  360. pcbp->maxRing = (psli->num_rings - 1);
  361. iocbCnt = 0;
  362. for (i = 0; i < psli->num_rings; i++) {
  363. pring = &psli->ring[i];
  364. /* A ring MUST have both cmd and rsp entries defined to be
  365. valid */
  366. if ((pring->numCiocb == 0) || (pring->numRiocb == 0)) {
  367. pcbp->rdsc[i].cmdEntries = 0;
  368. pcbp->rdsc[i].rspEntries = 0;
  369. pcbp->rdsc[i].cmdAddrHigh = 0;
  370. pcbp->rdsc[i].rspAddrHigh = 0;
  371. pcbp->rdsc[i].cmdAddrLow = 0;
  372. pcbp->rdsc[i].rspAddrLow = 0;
  373. pring->cmdringaddr = NULL;
  374. pring->rspringaddr = NULL;
  375. continue;
  376. }
  377. /* Command ring setup for ring */
  378. pring->cmdringaddr =
  379. (void *)&phba->slim2p->IOCBs[iocbCnt];
  380. pcbp->rdsc[i].cmdEntries = pring->numCiocb;
  381. offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] -
  382. (uint8_t *)phba->slim2p;
  383. pdma_addr = phba->slim2p_mapping + offset;
  384. pcbp->rdsc[i].cmdAddrHigh = putPaddrHigh(pdma_addr);
  385. pcbp->rdsc[i].cmdAddrLow = putPaddrLow(pdma_addr);
  386. iocbCnt += pring->numCiocb;
  387. /* Response ring setup for ring */
  388. pring->rspringaddr =
  389. (void *)&phba->slim2p->IOCBs[iocbCnt];
  390. pcbp->rdsc[i].rspEntries = pring->numRiocb;
  391. offset = (uint8_t *)&phba->slim2p->IOCBs[iocbCnt] -
  392. (uint8_t *)phba->slim2p;
  393. pdma_addr = phba->slim2p_mapping + offset;
  394. pcbp->rdsc[i].rspAddrHigh = putPaddrHigh(pdma_addr);
  395. pcbp->rdsc[i].rspAddrLow = putPaddrLow(pdma_addr);
  396. iocbCnt += pring->numRiocb;
  397. }
  398. }
  399. void
  400. lpfc_read_rev(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  401. {
  402. MAILBOX_t *mb;
  403. mb = &pmb->mb;
  404. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  405. mb->un.varRdRev.cv = 1;
  406. mb->mbxCommand = MBX_READ_REV;
  407. mb->mbxOwner = OWN_HOST;
  408. return;
  409. }
  410. void
  411. lpfc_config_ring(struct lpfc_hba * phba, int ring, LPFC_MBOXQ_t * pmb)
  412. {
  413. int i;
  414. MAILBOX_t *mb = &pmb->mb;
  415. struct lpfc_sli *psli;
  416. struct lpfc_sli_ring *pring;
  417. memset(pmb, 0, sizeof (LPFC_MBOXQ_t));
  418. mb->un.varCfgRing.ring = ring;
  419. mb->un.varCfgRing.maxOrigXchg = 0;
  420. mb->un.varCfgRing.maxRespXchg = 0;
  421. mb->un.varCfgRing.recvNotify = 1;
  422. psli = &phba->sli;
  423. pring = &psli->ring[ring];
  424. mb->un.varCfgRing.numMask = pring->num_mask;
  425. mb->mbxCommand = MBX_CONFIG_RING;
  426. mb->mbxOwner = OWN_HOST;
  427. /* Is this ring configured for a specific profile */
  428. if (pring->prt[0].profile) {
  429. mb->un.varCfgRing.profile = pring->prt[0].profile;
  430. return;
  431. }
  432. /* Otherwise we setup specific rctl / type masks for this ring */
  433. for (i = 0; i < pring->num_mask; i++) {
  434. mb->un.varCfgRing.rrRegs[i].rval = pring->prt[i].rctl;
  435. if (mb->un.varCfgRing.rrRegs[i].rval != FC_ELS_REQ)
  436. mb->un.varCfgRing.rrRegs[i].rmask = 0xff;
  437. else
  438. mb->un.varCfgRing.rrRegs[i].rmask = 0xfe;
  439. mb->un.varCfgRing.rrRegs[i].tval = pring->prt[i].type;
  440. mb->un.varCfgRing.rrRegs[i].tmask = 0xff;
  441. }
  442. return;
  443. }
  444. void
  445. lpfc_config_port(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  446. {
  447. MAILBOX_t *mb = &pmb->mb;
  448. dma_addr_t pdma_addr;
  449. uint32_t bar_low, bar_high;
  450. size_t offset;
  451. struct lpfc_hgp hgp;
  452. void __iomem *to_slim;
  453. int i;
  454. memset(pmb, 0, sizeof(LPFC_MBOXQ_t));
  455. mb->mbxCommand = MBX_CONFIG_PORT;
  456. mb->mbxOwner = OWN_HOST;
  457. mb->un.varCfgPort.pcbLen = sizeof(PCB_t);
  458. offset = (uint8_t *)&phba->slim2p->pcb - (uint8_t *)phba->slim2p;
  459. pdma_addr = phba->slim2p_mapping + offset;
  460. mb->un.varCfgPort.pcbLow = putPaddrLow(pdma_addr);
  461. mb->un.varCfgPort.pcbHigh = putPaddrHigh(pdma_addr);
  462. /* Now setup pcb */
  463. phba->slim2p->pcb.type = TYPE_NATIVE_SLI2;
  464. phba->slim2p->pcb.feature = FEATURE_INITIAL_SLI2;
  465. /* Setup Mailbox pointers */
  466. phba->slim2p->pcb.mailBoxSize = sizeof(MAILBOX_t);
  467. offset = (uint8_t *)&phba->slim2p->mbx - (uint8_t *)phba->slim2p;
  468. pdma_addr = phba->slim2p_mapping + offset;
  469. phba->slim2p->pcb.mbAddrHigh = putPaddrHigh(pdma_addr);
  470. phba->slim2p->pcb.mbAddrLow = putPaddrLow(pdma_addr);
  471. /*
  472. * Setup Host Group ring pointer.
  473. *
  474. * For efficiency reasons, the ring get/put pointers can be
  475. * placed in adapter memory (SLIM) rather than in host memory.
  476. * This allows firmware to avoid PCI reads/writes when updating
  477. * and checking pointers.
  478. *
  479. * The firmware recognizes the use of SLIM memory by comparing
  480. * the address of the get/put pointers structure with that of
  481. * the SLIM BAR (BAR0).
  482. *
  483. * Caution: be sure to use the PCI config space value of BAR0/BAR1
  484. * (the hardware's view of the base address), not the OS's
  485. * value of pci_resource_start() as the OS value may be a cookie
  486. * for ioremap/iomap.
  487. */
  488. pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_0, &bar_low);
  489. pci_read_config_dword(phba->pcidev, PCI_BASE_ADDRESS_1, &bar_high);
  490. /* mask off BAR0's flag bits 0 - 3 */
  491. phba->slim2p->pcb.hgpAddrLow = (bar_low & PCI_BASE_ADDRESS_MEM_MASK) +
  492. (SLIMOFF*sizeof(uint32_t));
  493. if (bar_low & PCI_BASE_ADDRESS_MEM_TYPE_64)
  494. phba->slim2p->pcb.hgpAddrHigh = bar_high;
  495. else
  496. phba->slim2p->pcb.hgpAddrHigh = 0;
  497. /* write HGP data to SLIM at the required longword offset */
  498. memset(&hgp, 0, sizeof(struct lpfc_hgp));
  499. to_slim = phba->MBslimaddr + (SLIMOFF*sizeof (uint32_t));
  500. for (i=0; i < phba->sli.num_rings; i++) {
  501. lpfc_memcpy_to_slim(to_slim, &hgp, sizeof(struct lpfc_hgp));
  502. to_slim += sizeof (struct lpfc_hgp);
  503. }
  504. /* Setup Port Group ring pointer */
  505. offset = (uint8_t *)&phba->slim2p->mbx.us.s2.port -
  506. (uint8_t *)phba->slim2p;
  507. pdma_addr = phba->slim2p_mapping + offset;
  508. phba->slim2p->pcb.pgpAddrHigh = putPaddrHigh(pdma_addr);
  509. phba->slim2p->pcb.pgpAddrLow = putPaddrLow(pdma_addr);
  510. /* Use callback routine to setp rings in the pcb */
  511. lpfc_config_pcb_setup(phba);
  512. /* special handling for LC HBAs */
  513. if (lpfc_is_LC_HBA(phba->pcidev->device)) {
  514. uint32_t hbainit[5];
  515. lpfc_hba_init(phba, hbainit);
  516. memcpy(&mb->un.varCfgPort.hbainit, hbainit, 20);
  517. }
  518. /* Swap PCB if needed */
  519. lpfc_sli_pcimem_bcopy(&phba->slim2p->pcb, &phba->slim2p->pcb,
  520. sizeof (PCB_t));
  521. lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
  522. "%d:0405 Service Level Interface (SLI) 2 selected\n",
  523. phba->brd_no);
  524. }
  525. void
  526. lpfc_mbox_put(struct lpfc_hba * phba, LPFC_MBOXQ_t * mbq)
  527. {
  528. struct lpfc_sli *psli;
  529. psli = &phba->sli;
  530. list_add_tail(&mbq->list, &psli->mboxq);
  531. psli->mboxq_cnt++;
  532. return;
  533. }
  534. LPFC_MBOXQ_t *
  535. lpfc_mbox_get(struct lpfc_hba * phba)
  536. {
  537. LPFC_MBOXQ_t *mbq = NULL;
  538. struct lpfc_sli *psli = &phba->sli;
  539. list_remove_head((&psli->mboxq), mbq, LPFC_MBOXQ_t,
  540. list);
  541. if (mbq) {
  542. psli->mboxq_cnt--;
  543. }
  544. return mbq;
  545. }