Kconfig 11 KB

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  1. # drivers/mtd/chips/Kconfig
  2. # $Id: Kconfig,v 1.18 2005/11/07 11:14:22 gleixner Exp $
  3. menu "RAM/ROM/Flash chip drivers"
  4. depends on MTD!=n
  5. config MTD_CFI
  6. tristate "Detect flash chips by Common Flash Interface (CFI) probe"
  7. depends on MTD
  8. select MTD_GEN_PROBE
  9. help
  10. The Common Flash Interface specification was developed by Intel,
  11. AMD and other flash manufactures that provides a universal method
  12. for probing the capabilities of flash devices. If you wish to
  13. support any device that is CFI-compliant, you need to enable this
  14. option. Visit <http://www.amd.com/products/nvd/overview/cfi.html>
  15. for more information on CFI.
  16. config MTD_JEDECPROBE
  17. tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"
  18. depends on MTD
  19. select MTD_GEN_PROBE
  20. help
  21. This option enables JEDEC-style probing of flash chips which are not
  22. compatible with the Common Flash Interface, but will use the common
  23. CFI-targetted flash drivers for any chips which are identified which
  24. are in fact compatible in all but the probe method. This actually
  25. covers most AMD/Fujitsu-compatible chips, and will shortly cover also
  26. non-CFI Intel chips (that code is in MTD CVS and should shortly be sent
  27. for inclusion in Linus' tree)
  28. config MTD_GEN_PROBE
  29. tristate
  30. select OBSOLETE_INTERMODULE
  31. config MTD_CFI_ADV_OPTIONS
  32. bool "Flash chip driver advanced configuration options"
  33. depends on MTD_GEN_PROBE
  34. help
  35. If you need to specify a specific endianness for access to flash
  36. chips, or if you wish to reduce the size of the kernel by including
  37. support for only specific arrangements of flash chips, say 'Y'. This
  38. option does not directly affect the code, but will enable other
  39. configuration options which allow you to do so.
  40. If unsure, say 'N'.
  41. choice
  42. prompt "Flash cmd/query data swapping"
  43. depends on MTD_CFI_ADV_OPTIONS
  44. default MTD_CFI_NOSWAP
  45. config MTD_CFI_NOSWAP
  46. bool "NO"
  47. ---help---
  48. This option defines the way in which the CPU attempts to arrange
  49. data bits when writing the 'magic' commands to the chips. Saying
  50. 'NO', which is the default when CONFIG_MTD_CFI_ADV_OPTIONS isn't
  51. enabled, means that the CPU will not do any swapping; the chips
  52. are expected to be wired to the CPU in 'host-endian' form.
  53. Specific arrangements are possible with the BIG_ENDIAN_BYTE and
  54. LITTLE_ENDIAN_BYTE, if the bytes are reversed.
  55. If you have a LART, on which the data (and address) lines were
  56. connected in a fashion which ensured that the nets were as short
  57. as possible, resulting in a bit-shuffling which seems utterly
  58. random to the untrained eye, you need the LART_ENDIAN_BYTE option.
  59. Yes, there really exists something sicker than PDP-endian :)
  60. config MTD_CFI_BE_BYTE_SWAP
  61. bool "BIG_ENDIAN_BYTE"
  62. config MTD_CFI_LE_BYTE_SWAP
  63. bool "LITTLE_ENDIAN_BYTE"
  64. endchoice
  65. config MTD_CFI_GEOMETRY
  66. bool "Specific CFI Flash geometry selection"
  67. depends on MTD_CFI_ADV_OPTIONS
  68. help
  69. This option does not affect the code directly, but will enable
  70. some other configuration options which would allow you to reduce
  71. the size of the kernel by including support for only certain
  72. arrangements of CFI chips. If unsure, say 'N' and all options
  73. which are supported by the current code will be enabled.
  74. config MTD_MAP_BANK_WIDTH_1
  75. bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY
  76. default y
  77. help
  78. If you wish to support CFI devices on a physical bus which is
  79. 8 bits wide, say 'Y'.
  80. config MTD_MAP_BANK_WIDTH_2
  81. bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY
  82. default y
  83. help
  84. If you wish to support CFI devices on a physical bus which is
  85. 16 bits wide, say 'Y'.
  86. config MTD_MAP_BANK_WIDTH_4
  87. bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY
  88. default y
  89. help
  90. If you wish to support CFI devices on a physical bus which is
  91. 32 bits wide, say 'Y'.
  92. config MTD_MAP_BANK_WIDTH_8
  93. bool "Support 64-bit buswidth" if MTD_CFI_GEOMETRY
  94. default n
  95. help
  96. If you wish to support CFI devices on a physical bus which is
  97. 64 bits wide, say 'Y'.
  98. config MTD_MAP_BANK_WIDTH_16
  99. bool "Support 128-bit buswidth" if MTD_CFI_GEOMETRY
  100. default n
  101. help
  102. If you wish to support CFI devices on a physical bus which is
  103. 128 bits wide, say 'Y'.
  104. config MTD_MAP_BANK_WIDTH_32
  105. bool "Support 256-bit buswidth" if MTD_CFI_GEOMETRY
  106. default n
  107. help
  108. If you wish to support CFI devices on a physical bus which is
  109. 256 bits wide, say 'Y'.
  110. config MTD_CFI_I1
  111. bool "Support 1-chip flash interleave" if MTD_CFI_GEOMETRY
  112. default y
  113. help
  114. If your flash chips are not interleaved - i.e. you only have one
  115. flash chip addressed by each bus cycle, then say 'Y'.
  116. config MTD_CFI_I2
  117. bool "Support 2-chip flash interleave" if MTD_CFI_GEOMETRY
  118. default y
  119. help
  120. If your flash chips are interleaved in pairs - i.e. you have two
  121. flash chips addressed by each bus cycle, then say 'Y'.
  122. config MTD_CFI_I4
  123. bool "Support 4-chip flash interleave" if MTD_CFI_GEOMETRY
  124. default n
  125. help
  126. If your flash chips are interleaved in fours - i.e. you have four
  127. flash chips addressed by each bus cycle, then say 'Y'.
  128. config MTD_CFI_I8
  129. bool "Support 8-chip flash interleave" if MTD_CFI_GEOMETRY
  130. default n
  131. help
  132. If your flash chips are interleaved in eights - i.e. you have eight
  133. flash chips addressed by each bus cycle, then say 'Y'.
  134. config MTD_OTP
  135. bool "Protection Registers aka one-time programmable (OTP) bits"
  136. depends on MTD_CFI_ADV_OPTIONS
  137. default n
  138. help
  139. This enables support for reading, writing and locking so called
  140. "Protection Registers" present on some flash chips.
  141. A subset of them are pre-programmed at the factory with a
  142. unique set of values. The rest is user-programmable.
  143. The user-programmable Protection Registers contain one-time
  144. programmable (OTP) bits; when programmed, register bits cannot be
  145. erased. Each Protection Register can be accessed multiple times to
  146. program individual bits, as long as the register remains unlocked.
  147. Each Protection Register has an associated Lock Register bit. When a
  148. Lock Register bit is programmed, the associated Protection Register
  149. can only be read; it can no longer be programmed. Additionally,
  150. because the Lock Register bits themselves are OTP, when programmed,
  151. Lock Register bits cannot be erased. Therefore, when a Protection
  152. Register is locked, it cannot be unlocked.
  153. This feature should therefore be used with extreme care. Any mistake
  154. in the programming of OTP bits will waste them.
  155. config MTD_CFI_INTELEXT
  156. tristate "Support for Intel/Sharp flash chips"
  157. depends on MTD_GEN_PROBE
  158. select MTD_CFI_UTIL
  159. help
  160. The Common Flash Interface defines a number of different command
  161. sets which a CFI-compliant chip may claim to implement. This code
  162. provides support for one of those command sets, used on Intel
  163. StrataFlash and other parts.
  164. config MTD_CFI_AMDSTD
  165. tristate "Support for AMD/Fujitsu flash chips"
  166. depends on MTD_GEN_PROBE
  167. select MTD_CFI_UTIL
  168. help
  169. The Common Flash Interface defines a number of different command
  170. sets which a CFI-compliant chip may claim to implement. This code
  171. provides support for one of those command sets, used on chips
  172. including the AMD Am29LV320.
  173. config MTD_CFI_AMDSTD_RETRY
  174. int "Retry failed commands (erase/program)"
  175. depends on MTD_CFI_AMDSTD
  176. default "0"
  177. help
  178. Some chips, when attached to a shared bus, don't properly filter
  179. bus traffic that is destined to other devices. This broken
  180. behavior causes erase and program sequences to be aborted when
  181. the sequences are mixed with traffic for other devices.
  182. SST49LF040 (and related) chips are know to be broken.
  183. config MTD_CFI_AMDSTD_RETRY_MAX
  184. int "Max retries of failed commands (erase/program)"
  185. depends on MTD_CFI_AMDSTD_RETRY
  186. default "0"
  187. help
  188. If you have an SST49LF040 (or related chip) then this value should
  189. be set to at least 1. This can also be adjusted at driver load
  190. time with the retry_cmd_max module parameter.
  191. config MTD_CFI_STAA
  192. tristate "Support for ST (Advanced Architecture) flash chips"
  193. depends on MTD_GEN_PROBE
  194. select MTD_CFI_UTIL
  195. help
  196. The Common Flash Interface defines a number of different command
  197. sets which a CFI-compliant chip may claim to implement. This code
  198. provides support for one of those command sets.
  199. config MTD_CFI_UTIL
  200. tristate
  201. config MTD_RAM
  202. tristate "Support for RAM chips in bus mapping"
  203. depends on MTD
  204. help
  205. This option enables basic support for RAM chips accessed through
  206. a bus mapping driver.
  207. config MTD_ROM
  208. tristate "Support for ROM chips in bus mapping"
  209. depends on MTD
  210. help
  211. This option enables basic support for ROM chips accessed through
  212. a bus mapping driver.
  213. config MTD_ABSENT
  214. tristate "Support for absent chips in bus mapping"
  215. depends on MTD
  216. help
  217. This option enables support for a dummy probing driver used to
  218. allocated placeholder MTD devices on systems that have socketed
  219. or removable media. Use of this driver as a fallback chip probe
  220. preserves the expected registration order of MTD device nodes on
  221. the system regardless of media presence. Device nodes created
  222. with this driver will return -ENODEV upon access.
  223. config MTD_OBSOLETE_CHIPS
  224. depends on MTD
  225. bool "Older (theoretically obsoleted now) drivers for non-CFI chips"
  226. help
  227. This option does not enable any code directly, but will allow you to
  228. select some other chip drivers which are now considered obsolete,
  229. because the generic CONFIG_JEDECPROBE code above should now detect
  230. the chips which are supported by these drivers, and allow the generic
  231. CFI-compatible drivers to drive the chips. Say 'N' here unless you have
  232. already tried the CONFIG_JEDECPROBE method and reported its failure
  233. to the MTD mailing list at <linux-mtd@lists.infradead.org>
  234. config MTD_AMDSTD
  235. tristate "AMD compatible flash chip support (non-CFI)"
  236. depends on MTD && MTD_OBSOLETE_CHIPS && BROKEN
  237. help
  238. This option enables support for flash chips using AMD-compatible
  239. commands, including some which are not CFI-compatible and hence
  240. cannot be used with the CONFIG_MTD_CFI_AMDSTD option.
  241. It also works on AMD compatible chips that do conform to CFI.
  242. config MTD_SHARP
  243. tristate "pre-CFI Sharp chip support"
  244. depends on MTD && MTD_OBSOLETE_CHIPS
  245. help
  246. This option enables support for flash chips using Sharp-compatible
  247. commands, including some which are not CFI-compatible and hence
  248. cannot be used with the CONFIG_MTD_CFI_INTELxxx options.
  249. config MTD_JEDEC
  250. tristate "JEDEC device support"
  251. depends on MTD && MTD_OBSOLETE_CHIPS && BROKEN
  252. help
  253. Enable older older JEDEC flash interface devices for self
  254. programming flash. It is commonly used in older AMD chips. It is
  255. only called JEDEC because the JEDEC association
  256. <http://www.jedec.org/> distributes the identification codes for the
  257. chips.
  258. config MTD_XIP
  259. bool "XIP aware MTD support"
  260. depends on !SMP && (MTD_CFI_INTELEXT || MTD_CFI_AMDSTD) && EXPERIMENTAL && ARM
  261. default y if XIP_KERNEL
  262. help
  263. This allows MTD support to work with flash memory which is also
  264. used for XIP purposes. If you're not sure what this is all about
  265. then say N.
  266. endmenu