mthca_provider.c 31 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
  4. * Copyright (c) 2005 Cisco Systems. All rights reserved.
  5. * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
  6. * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
  7. *
  8. * This software is available to you under a choice of one of two
  9. * licenses. You may choose to be licensed under the terms of the GNU
  10. * General Public License (GPL) Version 2, available from the file
  11. * COPYING in the main directory of this source tree, or the
  12. * OpenIB.org BSD license below:
  13. *
  14. * Redistribution and use in source and binary forms, with or
  15. * without modification, are permitted provided that the following
  16. * conditions are met:
  17. *
  18. * - Redistributions of source code must retain the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer.
  21. *
  22. * - Redistributions in binary form must reproduce the above
  23. * copyright notice, this list of conditions and the following
  24. * disclaimer in the documentation and/or other materials
  25. * provided with the distribution.
  26. *
  27. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  28. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  29. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  30. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  31. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  32. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  33. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  34. * SOFTWARE.
  35. *
  36. * $Id: mthca_provider.c 4859 2006-01-09 21:55:10Z roland $
  37. */
  38. #include <rdma/ib_smi.h>
  39. #include <rdma/ib_user_verbs.h>
  40. #include <linux/mm.h>
  41. #include "mthca_dev.h"
  42. #include "mthca_cmd.h"
  43. #include "mthca_user.h"
  44. #include "mthca_memfree.h"
  45. static void init_query_mad(struct ib_smp *mad)
  46. {
  47. mad->base_version = 1;
  48. mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
  49. mad->class_version = 1;
  50. mad->method = IB_MGMT_METHOD_GET;
  51. }
  52. static int mthca_query_device(struct ib_device *ibdev,
  53. struct ib_device_attr *props)
  54. {
  55. struct ib_smp *in_mad = NULL;
  56. struct ib_smp *out_mad = NULL;
  57. int err = -ENOMEM;
  58. struct mthca_dev* mdev = to_mdev(ibdev);
  59. u8 status;
  60. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  61. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  62. if (!in_mad || !out_mad)
  63. goto out;
  64. memset(props, 0, sizeof *props);
  65. props->fw_ver = mdev->fw_ver;
  66. init_query_mad(in_mad);
  67. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  68. err = mthca_MAD_IFC(mdev, 1, 1,
  69. 1, NULL, NULL, in_mad, out_mad,
  70. &status);
  71. if (err)
  72. goto out;
  73. if (status) {
  74. err = -EINVAL;
  75. goto out;
  76. }
  77. props->device_cap_flags = mdev->device_cap_flags;
  78. props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
  79. 0xffffff;
  80. props->vendor_part_id = be16_to_cpup((__be16 *) (out_mad->data + 30));
  81. props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
  82. memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
  83. props->max_mr_size = ~0ull;
  84. props->page_size_cap = mdev->limits.page_size_cap;
  85. props->max_qp = mdev->limits.num_qps - mdev->limits.reserved_qps;
  86. props->max_qp_wr = mdev->limits.max_wqes;
  87. props->max_sge = mdev->limits.max_sg;
  88. props->max_cq = mdev->limits.num_cqs - mdev->limits.reserved_cqs;
  89. props->max_cqe = mdev->limits.max_cqes;
  90. props->max_mr = mdev->limits.num_mpts - mdev->limits.reserved_mrws;
  91. props->max_pd = mdev->limits.num_pds - mdev->limits.reserved_pds;
  92. props->max_qp_rd_atom = 1 << mdev->qp_table.rdb_shift;
  93. props->max_qp_init_rd_atom = mdev->limits.max_qp_init_rdma;
  94. props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
  95. props->max_srq = mdev->limits.num_srqs - mdev->limits.reserved_srqs;
  96. props->max_srq_wr = mdev->limits.max_srq_wqes;
  97. props->max_srq_sge = mdev->limits.max_sg;
  98. props->local_ca_ack_delay = mdev->limits.local_ca_ack_delay;
  99. props->atomic_cap = mdev->limits.flags & DEV_LIM_FLAG_ATOMIC ?
  100. IB_ATOMIC_HCA : IB_ATOMIC_NONE;
  101. props->max_pkeys = mdev->limits.pkey_table_len;
  102. props->max_mcast_grp = mdev->limits.num_mgms + mdev->limits.num_amgms;
  103. props->max_mcast_qp_attach = MTHCA_QP_PER_MGM;
  104. props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
  105. props->max_mcast_grp;
  106. err = 0;
  107. out:
  108. kfree(in_mad);
  109. kfree(out_mad);
  110. return err;
  111. }
  112. static int mthca_query_port(struct ib_device *ibdev,
  113. u8 port, struct ib_port_attr *props)
  114. {
  115. struct ib_smp *in_mad = NULL;
  116. struct ib_smp *out_mad = NULL;
  117. int err = -ENOMEM;
  118. u8 status;
  119. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  120. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  121. if (!in_mad || !out_mad)
  122. goto out;
  123. memset(props, 0, sizeof *props);
  124. init_query_mad(in_mad);
  125. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  126. in_mad->attr_mod = cpu_to_be32(port);
  127. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  128. port, NULL, NULL, in_mad, out_mad,
  129. &status);
  130. if (err)
  131. goto out;
  132. if (status) {
  133. err = -EINVAL;
  134. goto out;
  135. }
  136. props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
  137. props->lmc = out_mad->data[34] & 0x7;
  138. props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
  139. props->sm_sl = out_mad->data[36] & 0xf;
  140. props->state = out_mad->data[32] & 0xf;
  141. props->phys_state = out_mad->data[33] >> 4;
  142. props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
  143. props->gid_tbl_len = to_mdev(ibdev)->limits.gid_table_len;
  144. props->max_msg_sz = 0x80000000;
  145. props->pkey_tbl_len = to_mdev(ibdev)->limits.pkey_table_len;
  146. props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
  147. props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
  148. props->active_width = out_mad->data[31] & 0xf;
  149. props->active_speed = out_mad->data[35] >> 4;
  150. props->max_mtu = out_mad->data[41] & 0xf;
  151. props->active_mtu = out_mad->data[36] >> 4;
  152. props->subnet_timeout = out_mad->data[51] & 0x1f;
  153. out:
  154. kfree(in_mad);
  155. kfree(out_mad);
  156. return err;
  157. }
  158. static int mthca_modify_port(struct ib_device *ibdev,
  159. u8 port, int port_modify_mask,
  160. struct ib_port_modify *props)
  161. {
  162. struct mthca_set_ib_param set_ib;
  163. struct ib_port_attr attr;
  164. int err;
  165. u8 status;
  166. if (mutex_lock_interruptible(&to_mdev(ibdev)->cap_mask_mutex))
  167. return -ERESTARTSYS;
  168. err = mthca_query_port(ibdev, port, &attr);
  169. if (err)
  170. goto out;
  171. set_ib.set_si_guid = 0;
  172. set_ib.reset_qkey_viol = !!(port_modify_mask & IB_PORT_RESET_QKEY_CNTR);
  173. set_ib.cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
  174. ~props->clr_port_cap_mask;
  175. err = mthca_SET_IB(to_mdev(ibdev), &set_ib, port, &status);
  176. if (err)
  177. goto out;
  178. if (status) {
  179. err = -EINVAL;
  180. goto out;
  181. }
  182. out:
  183. mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
  184. return err;
  185. }
  186. static int mthca_query_pkey(struct ib_device *ibdev,
  187. u8 port, u16 index, u16 *pkey)
  188. {
  189. struct ib_smp *in_mad = NULL;
  190. struct ib_smp *out_mad = NULL;
  191. int err = -ENOMEM;
  192. u8 status;
  193. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  194. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  195. if (!in_mad || !out_mad)
  196. goto out;
  197. init_query_mad(in_mad);
  198. in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
  199. in_mad->attr_mod = cpu_to_be32(index / 32);
  200. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  201. port, NULL, NULL, in_mad, out_mad,
  202. &status);
  203. if (err)
  204. goto out;
  205. if (status) {
  206. err = -EINVAL;
  207. goto out;
  208. }
  209. *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
  210. out:
  211. kfree(in_mad);
  212. kfree(out_mad);
  213. return err;
  214. }
  215. static int mthca_query_gid(struct ib_device *ibdev, u8 port,
  216. int index, union ib_gid *gid)
  217. {
  218. struct ib_smp *in_mad = NULL;
  219. struct ib_smp *out_mad = NULL;
  220. int err = -ENOMEM;
  221. u8 status;
  222. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  223. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  224. if (!in_mad || !out_mad)
  225. goto out;
  226. init_query_mad(in_mad);
  227. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  228. in_mad->attr_mod = cpu_to_be32(port);
  229. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  230. port, NULL, NULL, in_mad, out_mad,
  231. &status);
  232. if (err)
  233. goto out;
  234. if (status) {
  235. err = -EINVAL;
  236. goto out;
  237. }
  238. memcpy(gid->raw, out_mad->data + 8, 8);
  239. init_query_mad(in_mad);
  240. in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
  241. in_mad->attr_mod = cpu_to_be32(index / 8);
  242. err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
  243. port, NULL, NULL, in_mad, out_mad,
  244. &status);
  245. if (err)
  246. goto out;
  247. if (status) {
  248. err = -EINVAL;
  249. goto out;
  250. }
  251. memcpy(gid->raw + 8, out_mad->data + (index % 8) * 16, 8);
  252. out:
  253. kfree(in_mad);
  254. kfree(out_mad);
  255. return err;
  256. }
  257. static struct ib_ucontext *mthca_alloc_ucontext(struct ib_device *ibdev,
  258. struct ib_udata *udata)
  259. {
  260. struct mthca_alloc_ucontext_resp uresp;
  261. struct mthca_ucontext *context;
  262. int err;
  263. memset(&uresp, 0, sizeof uresp);
  264. uresp.qp_tab_size = to_mdev(ibdev)->limits.num_qps;
  265. if (mthca_is_memfree(to_mdev(ibdev)))
  266. uresp.uarc_size = to_mdev(ibdev)->uar_table.uarc_size;
  267. else
  268. uresp.uarc_size = 0;
  269. context = kmalloc(sizeof *context, GFP_KERNEL);
  270. if (!context)
  271. return ERR_PTR(-ENOMEM);
  272. err = mthca_uar_alloc(to_mdev(ibdev), &context->uar);
  273. if (err) {
  274. kfree(context);
  275. return ERR_PTR(err);
  276. }
  277. context->db_tab = mthca_init_user_db_tab(to_mdev(ibdev));
  278. if (IS_ERR(context->db_tab)) {
  279. err = PTR_ERR(context->db_tab);
  280. mthca_uar_free(to_mdev(ibdev), &context->uar);
  281. kfree(context);
  282. return ERR_PTR(err);
  283. }
  284. if (ib_copy_to_udata(udata, &uresp, sizeof uresp)) {
  285. mthca_cleanup_user_db_tab(to_mdev(ibdev), &context->uar, context->db_tab);
  286. mthca_uar_free(to_mdev(ibdev), &context->uar);
  287. kfree(context);
  288. return ERR_PTR(-EFAULT);
  289. }
  290. return &context->ibucontext;
  291. }
  292. static int mthca_dealloc_ucontext(struct ib_ucontext *context)
  293. {
  294. mthca_cleanup_user_db_tab(to_mdev(context->device), &to_mucontext(context)->uar,
  295. to_mucontext(context)->db_tab);
  296. mthca_uar_free(to_mdev(context->device), &to_mucontext(context)->uar);
  297. kfree(to_mucontext(context));
  298. return 0;
  299. }
  300. static int mthca_mmap_uar(struct ib_ucontext *context,
  301. struct vm_area_struct *vma)
  302. {
  303. if (vma->vm_end - vma->vm_start != PAGE_SIZE)
  304. return -EINVAL;
  305. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  306. if (io_remap_pfn_range(vma, vma->vm_start,
  307. to_mucontext(context)->uar.pfn,
  308. PAGE_SIZE, vma->vm_page_prot))
  309. return -EAGAIN;
  310. return 0;
  311. }
  312. static struct ib_pd *mthca_alloc_pd(struct ib_device *ibdev,
  313. struct ib_ucontext *context,
  314. struct ib_udata *udata)
  315. {
  316. struct mthca_pd *pd;
  317. int err;
  318. pd = kmalloc(sizeof *pd, GFP_KERNEL);
  319. if (!pd)
  320. return ERR_PTR(-ENOMEM);
  321. err = mthca_pd_alloc(to_mdev(ibdev), !context, pd);
  322. if (err) {
  323. kfree(pd);
  324. return ERR_PTR(err);
  325. }
  326. if (context) {
  327. if (ib_copy_to_udata(udata, &pd->pd_num, sizeof (__u32))) {
  328. mthca_pd_free(to_mdev(ibdev), pd);
  329. kfree(pd);
  330. return ERR_PTR(-EFAULT);
  331. }
  332. }
  333. return &pd->ibpd;
  334. }
  335. static int mthca_dealloc_pd(struct ib_pd *pd)
  336. {
  337. mthca_pd_free(to_mdev(pd->device), to_mpd(pd));
  338. kfree(pd);
  339. return 0;
  340. }
  341. static struct ib_ah *mthca_ah_create(struct ib_pd *pd,
  342. struct ib_ah_attr *ah_attr)
  343. {
  344. int err;
  345. struct mthca_ah *ah;
  346. ah = kmalloc(sizeof *ah, GFP_ATOMIC);
  347. if (!ah)
  348. return ERR_PTR(-ENOMEM);
  349. err = mthca_create_ah(to_mdev(pd->device), to_mpd(pd), ah_attr, ah);
  350. if (err) {
  351. kfree(ah);
  352. return ERR_PTR(err);
  353. }
  354. return &ah->ibah;
  355. }
  356. static int mthca_ah_destroy(struct ib_ah *ah)
  357. {
  358. mthca_destroy_ah(to_mdev(ah->device), to_mah(ah));
  359. kfree(ah);
  360. return 0;
  361. }
  362. static struct ib_srq *mthca_create_srq(struct ib_pd *pd,
  363. struct ib_srq_init_attr *init_attr,
  364. struct ib_udata *udata)
  365. {
  366. struct mthca_create_srq ucmd;
  367. struct mthca_ucontext *context = NULL;
  368. struct mthca_srq *srq;
  369. int err;
  370. srq = kmalloc(sizeof *srq, GFP_KERNEL);
  371. if (!srq)
  372. return ERR_PTR(-ENOMEM);
  373. if (pd->uobject) {
  374. context = to_mucontext(pd->uobject->context);
  375. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd)) {
  376. err = -EFAULT;
  377. goto err_free;
  378. }
  379. err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
  380. context->db_tab, ucmd.db_index,
  381. ucmd.db_page);
  382. if (err)
  383. goto err_free;
  384. srq->mr.ibmr.lkey = ucmd.lkey;
  385. srq->db_index = ucmd.db_index;
  386. }
  387. err = mthca_alloc_srq(to_mdev(pd->device), to_mpd(pd),
  388. &init_attr->attr, srq);
  389. if (err && pd->uobject)
  390. mthca_unmap_user_db(to_mdev(pd->device), &context->uar,
  391. context->db_tab, ucmd.db_index);
  392. if (err)
  393. goto err_free;
  394. if (context && ib_copy_to_udata(udata, &srq->srqn, sizeof (__u32))) {
  395. mthca_free_srq(to_mdev(pd->device), srq);
  396. err = -EFAULT;
  397. goto err_free;
  398. }
  399. return &srq->ibsrq;
  400. err_free:
  401. kfree(srq);
  402. return ERR_PTR(err);
  403. }
  404. static int mthca_destroy_srq(struct ib_srq *srq)
  405. {
  406. struct mthca_ucontext *context;
  407. if (srq->uobject) {
  408. context = to_mucontext(srq->uobject->context);
  409. mthca_unmap_user_db(to_mdev(srq->device), &context->uar,
  410. context->db_tab, to_msrq(srq)->db_index);
  411. }
  412. mthca_free_srq(to_mdev(srq->device), to_msrq(srq));
  413. kfree(srq);
  414. return 0;
  415. }
  416. static struct ib_qp *mthca_create_qp(struct ib_pd *pd,
  417. struct ib_qp_init_attr *init_attr,
  418. struct ib_udata *udata)
  419. {
  420. struct mthca_create_qp ucmd;
  421. struct mthca_qp *qp;
  422. int err;
  423. switch (init_attr->qp_type) {
  424. case IB_QPT_RC:
  425. case IB_QPT_UC:
  426. case IB_QPT_UD:
  427. {
  428. struct mthca_ucontext *context;
  429. qp = kmalloc(sizeof *qp, GFP_KERNEL);
  430. if (!qp)
  431. return ERR_PTR(-ENOMEM);
  432. if (pd->uobject) {
  433. context = to_mucontext(pd->uobject->context);
  434. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd)) {
  435. kfree(qp);
  436. return ERR_PTR(-EFAULT);
  437. }
  438. err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
  439. context->db_tab,
  440. ucmd.sq_db_index, ucmd.sq_db_page);
  441. if (err) {
  442. kfree(qp);
  443. return ERR_PTR(err);
  444. }
  445. err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
  446. context->db_tab,
  447. ucmd.rq_db_index, ucmd.rq_db_page);
  448. if (err) {
  449. mthca_unmap_user_db(to_mdev(pd->device),
  450. &context->uar,
  451. context->db_tab,
  452. ucmd.sq_db_index);
  453. kfree(qp);
  454. return ERR_PTR(err);
  455. }
  456. qp->mr.ibmr.lkey = ucmd.lkey;
  457. qp->sq.db_index = ucmd.sq_db_index;
  458. qp->rq.db_index = ucmd.rq_db_index;
  459. }
  460. err = mthca_alloc_qp(to_mdev(pd->device), to_mpd(pd),
  461. to_mcq(init_attr->send_cq),
  462. to_mcq(init_attr->recv_cq),
  463. init_attr->qp_type, init_attr->sq_sig_type,
  464. &init_attr->cap, qp);
  465. if (err && pd->uobject) {
  466. context = to_mucontext(pd->uobject->context);
  467. mthca_unmap_user_db(to_mdev(pd->device),
  468. &context->uar,
  469. context->db_tab,
  470. ucmd.sq_db_index);
  471. mthca_unmap_user_db(to_mdev(pd->device),
  472. &context->uar,
  473. context->db_tab,
  474. ucmd.rq_db_index);
  475. }
  476. qp->ibqp.qp_num = qp->qpn;
  477. break;
  478. }
  479. case IB_QPT_SMI:
  480. case IB_QPT_GSI:
  481. {
  482. /* Don't allow userspace to create special QPs */
  483. if (pd->uobject)
  484. return ERR_PTR(-EINVAL);
  485. qp = kmalloc(sizeof (struct mthca_sqp), GFP_KERNEL);
  486. if (!qp)
  487. return ERR_PTR(-ENOMEM);
  488. qp->ibqp.qp_num = init_attr->qp_type == IB_QPT_SMI ? 0 : 1;
  489. err = mthca_alloc_sqp(to_mdev(pd->device), to_mpd(pd),
  490. to_mcq(init_attr->send_cq),
  491. to_mcq(init_attr->recv_cq),
  492. init_attr->sq_sig_type, &init_attr->cap,
  493. qp->ibqp.qp_num, init_attr->port_num,
  494. to_msqp(qp));
  495. break;
  496. }
  497. default:
  498. /* Don't support raw QPs */
  499. return ERR_PTR(-ENOSYS);
  500. }
  501. if (err) {
  502. kfree(qp);
  503. return ERR_PTR(err);
  504. }
  505. init_attr->cap.max_send_wr = qp->sq.max;
  506. init_attr->cap.max_recv_wr = qp->rq.max;
  507. init_attr->cap.max_send_sge = qp->sq.max_gs;
  508. init_attr->cap.max_recv_sge = qp->rq.max_gs;
  509. init_attr->cap.max_inline_data = qp->max_inline_data;
  510. return &qp->ibqp;
  511. }
  512. static int mthca_destroy_qp(struct ib_qp *qp)
  513. {
  514. if (qp->uobject) {
  515. mthca_unmap_user_db(to_mdev(qp->device),
  516. &to_mucontext(qp->uobject->context)->uar,
  517. to_mucontext(qp->uobject->context)->db_tab,
  518. to_mqp(qp)->sq.db_index);
  519. mthca_unmap_user_db(to_mdev(qp->device),
  520. &to_mucontext(qp->uobject->context)->uar,
  521. to_mucontext(qp->uobject->context)->db_tab,
  522. to_mqp(qp)->rq.db_index);
  523. }
  524. mthca_free_qp(to_mdev(qp->device), to_mqp(qp));
  525. kfree(qp);
  526. return 0;
  527. }
  528. static struct ib_cq *mthca_create_cq(struct ib_device *ibdev, int entries,
  529. struct ib_ucontext *context,
  530. struct ib_udata *udata)
  531. {
  532. struct mthca_create_cq ucmd;
  533. struct mthca_cq *cq;
  534. int nent;
  535. int err;
  536. if (entries < 1 || entries > to_mdev(ibdev)->limits.max_cqes)
  537. return ERR_PTR(-EINVAL);
  538. if (context) {
  539. if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd))
  540. return ERR_PTR(-EFAULT);
  541. err = mthca_map_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  542. to_mucontext(context)->db_tab,
  543. ucmd.set_db_index, ucmd.set_db_page);
  544. if (err)
  545. return ERR_PTR(err);
  546. err = mthca_map_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  547. to_mucontext(context)->db_tab,
  548. ucmd.arm_db_index, ucmd.arm_db_page);
  549. if (err)
  550. goto err_unmap_set;
  551. }
  552. cq = kmalloc(sizeof *cq, GFP_KERNEL);
  553. if (!cq) {
  554. err = -ENOMEM;
  555. goto err_unmap_arm;
  556. }
  557. if (context) {
  558. cq->mr.ibmr.lkey = ucmd.lkey;
  559. cq->set_ci_db_index = ucmd.set_db_index;
  560. cq->arm_db_index = ucmd.arm_db_index;
  561. }
  562. for (nent = 1; nent <= entries; nent <<= 1)
  563. ; /* nothing */
  564. err = mthca_init_cq(to_mdev(ibdev), nent,
  565. context ? to_mucontext(context) : NULL,
  566. context ? ucmd.pdn : to_mdev(ibdev)->driver_pd.pd_num,
  567. cq);
  568. if (err)
  569. goto err_free;
  570. if (context && ib_copy_to_udata(udata, &cq->cqn, sizeof (__u32))) {
  571. mthca_free_cq(to_mdev(ibdev), cq);
  572. goto err_free;
  573. }
  574. return &cq->ibcq;
  575. err_free:
  576. kfree(cq);
  577. err_unmap_arm:
  578. if (context)
  579. mthca_unmap_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  580. to_mucontext(context)->db_tab, ucmd.arm_db_index);
  581. err_unmap_set:
  582. if (context)
  583. mthca_unmap_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
  584. to_mucontext(context)->db_tab, ucmd.set_db_index);
  585. return ERR_PTR(err);
  586. }
  587. static int mthca_destroy_cq(struct ib_cq *cq)
  588. {
  589. if (cq->uobject) {
  590. mthca_unmap_user_db(to_mdev(cq->device),
  591. &to_mucontext(cq->uobject->context)->uar,
  592. to_mucontext(cq->uobject->context)->db_tab,
  593. to_mcq(cq)->arm_db_index);
  594. mthca_unmap_user_db(to_mdev(cq->device),
  595. &to_mucontext(cq->uobject->context)->uar,
  596. to_mucontext(cq->uobject->context)->db_tab,
  597. to_mcq(cq)->set_ci_db_index);
  598. }
  599. mthca_free_cq(to_mdev(cq->device), to_mcq(cq));
  600. kfree(cq);
  601. return 0;
  602. }
  603. static inline u32 convert_access(int acc)
  604. {
  605. return (acc & IB_ACCESS_REMOTE_ATOMIC ? MTHCA_MPT_FLAG_ATOMIC : 0) |
  606. (acc & IB_ACCESS_REMOTE_WRITE ? MTHCA_MPT_FLAG_REMOTE_WRITE : 0) |
  607. (acc & IB_ACCESS_REMOTE_READ ? MTHCA_MPT_FLAG_REMOTE_READ : 0) |
  608. (acc & IB_ACCESS_LOCAL_WRITE ? MTHCA_MPT_FLAG_LOCAL_WRITE : 0) |
  609. MTHCA_MPT_FLAG_LOCAL_READ;
  610. }
  611. static struct ib_mr *mthca_get_dma_mr(struct ib_pd *pd, int acc)
  612. {
  613. struct mthca_mr *mr;
  614. int err;
  615. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  616. if (!mr)
  617. return ERR_PTR(-ENOMEM);
  618. err = mthca_mr_alloc_notrans(to_mdev(pd->device),
  619. to_mpd(pd)->pd_num,
  620. convert_access(acc), mr);
  621. if (err) {
  622. kfree(mr);
  623. return ERR_PTR(err);
  624. }
  625. return &mr->ibmr;
  626. }
  627. static struct ib_mr *mthca_reg_phys_mr(struct ib_pd *pd,
  628. struct ib_phys_buf *buffer_list,
  629. int num_phys_buf,
  630. int acc,
  631. u64 *iova_start)
  632. {
  633. struct mthca_mr *mr;
  634. u64 *page_list;
  635. u64 total_size;
  636. u64 mask;
  637. int shift;
  638. int npages;
  639. int err;
  640. int i, j, n;
  641. /* First check that we have enough alignment */
  642. if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK))
  643. return ERR_PTR(-EINVAL);
  644. mask = 0;
  645. total_size = 0;
  646. for (i = 0; i < num_phys_buf; ++i) {
  647. if (i != 0)
  648. mask |= buffer_list[i].addr;
  649. if (i != num_phys_buf - 1)
  650. mask |= buffer_list[i].addr + buffer_list[i].size;
  651. total_size += buffer_list[i].size;
  652. }
  653. if (mask & ~PAGE_MASK)
  654. return ERR_PTR(-EINVAL);
  655. /* Find largest page shift we can use to cover buffers */
  656. for (shift = PAGE_SHIFT; shift < 31; ++shift)
  657. if (num_phys_buf > 1) {
  658. if ((1ULL << shift) & mask)
  659. break;
  660. } else {
  661. if (1ULL << shift >=
  662. buffer_list[0].size +
  663. (buffer_list[0].addr & ((1ULL << shift) - 1)))
  664. break;
  665. }
  666. buffer_list[0].size += buffer_list[0].addr & ((1ULL << shift) - 1);
  667. buffer_list[0].addr &= ~0ull << shift;
  668. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  669. if (!mr)
  670. return ERR_PTR(-ENOMEM);
  671. npages = 0;
  672. for (i = 0; i < num_phys_buf; ++i)
  673. npages += (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  674. if (!npages)
  675. return &mr->ibmr;
  676. page_list = kmalloc(npages * sizeof *page_list, GFP_KERNEL);
  677. if (!page_list) {
  678. kfree(mr);
  679. return ERR_PTR(-ENOMEM);
  680. }
  681. n = 0;
  682. for (i = 0; i < num_phys_buf; ++i)
  683. for (j = 0;
  684. j < (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
  685. ++j)
  686. page_list[n++] = buffer_list[i].addr + ((u64) j << shift);
  687. mthca_dbg(to_mdev(pd->device), "Registering memory at %llx (iova %llx) "
  688. "in PD %x; shift %d, npages %d.\n",
  689. (unsigned long long) buffer_list[0].addr,
  690. (unsigned long long) *iova_start,
  691. to_mpd(pd)->pd_num,
  692. shift, npages);
  693. err = mthca_mr_alloc_phys(to_mdev(pd->device),
  694. to_mpd(pd)->pd_num,
  695. page_list, shift, npages,
  696. *iova_start, total_size,
  697. convert_access(acc), mr);
  698. if (err) {
  699. kfree(page_list);
  700. kfree(mr);
  701. return ERR_PTR(err);
  702. }
  703. kfree(page_list);
  704. return &mr->ibmr;
  705. }
  706. static struct ib_mr *mthca_reg_user_mr(struct ib_pd *pd, struct ib_umem *region,
  707. int acc, struct ib_udata *udata)
  708. {
  709. struct mthca_dev *dev = to_mdev(pd->device);
  710. struct ib_umem_chunk *chunk;
  711. struct mthca_mr *mr;
  712. u64 *pages;
  713. int shift, n, len;
  714. int i, j, k;
  715. int err = 0;
  716. shift = ffs(region->page_size) - 1;
  717. mr = kmalloc(sizeof *mr, GFP_KERNEL);
  718. if (!mr)
  719. return ERR_PTR(-ENOMEM);
  720. n = 0;
  721. list_for_each_entry(chunk, &region->chunk_list, list)
  722. n += chunk->nents;
  723. mr->mtt = mthca_alloc_mtt(dev, n);
  724. if (IS_ERR(mr->mtt)) {
  725. err = PTR_ERR(mr->mtt);
  726. goto err;
  727. }
  728. pages = (u64 *) __get_free_page(GFP_KERNEL);
  729. if (!pages) {
  730. err = -ENOMEM;
  731. goto err_mtt;
  732. }
  733. i = n = 0;
  734. list_for_each_entry(chunk, &region->chunk_list, list)
  735. for (j = 0; j < chunk->nmap; ++j) {
  736. len = sg_dma_len(&chunk->page_list[j]) >> shift;
  737. for (k = 0; k < len; ++k) {
  738. pages[i++] = sg_dma_address(&chunk->page_list[j]) +
  739. region->page_size * k;
  740. /*
  741. * Be friendly to WRITE_MTT command
  742. * and leave two empty slots for the
  743. * index and reserved fields of the
  744. * mailbox.
  745. */
  746. if (i == PAGE_SIZE / sizeof (u64) - 2) {
  747. err = mthca_write_mtt(dev, mr->mtt,
  748. n, pages, i);
  749. if (err)
  750. goto mtt_done;
  751. n += i;
  752. i = 0;
  753. }
  754. }
  755. }
  756. if (i)
  757. err = mthca_write_mtt(dev, mr->mtt, n, pages, i);
  758. mtt_done:
  759. free_page((unsigned long) pages);
  760. if (err)
  761. goto err_mtt;
  762. err = mthca_mr_alloc(dev, to_mpd(pd)->pd_num, shift, region->virt_base,
  763. region->length, convert_access(acc), mr);
  764. if (err)
  765. goto err_mtt;
  766. return &mr->ibmr;
  767. err_mtt:
  768. mthca_free_mtt(dev, mr->mtt);
  769. err:
  770. kfree(mr);
  771. return ERR_PTR(err);
  772. }
  773. static int mthca_dereg_mr(struct ib_mr *mr)
  774. {
  775. struct mthca_mr *mmr = to_mmr(mr);
  776. mthca_free_mr(to_mdev(mr->device), mmr);
  777. kfree(mmr);
  778. return 0;
  779. }
  780. static struct ib_fmr *mthca_alloc_fmr(struct ib_pd *pd, int mr_access_flags,
  781. struct ib_fmr_attr *fmr_attr)
  782. {
  783. struct mthca_fmr *fmr;
  784. int err;
  785. fmr = kmalloc(sizeof *fmr, GFP_KERNEL);
  786. if (!fmr)
  787. return ERR_PTR(-ENOMEM);
  788. memcpy(&fmr->attr, fmr_attr, sizeof *fmr_attr);
  789. err = mthca_fmr_alloc(to_mdev(pd->device), to_mpd(pd)->pd_num,
  790. convert_access(mr_access_flags), fmr);
  791. if (err) {
  792. kfree(fmr);
  793. return ERR_PTR(err);
  794. }
  795. return &fmr->ibmr;
  796. }
  797. static int mthca_dealloc_fmr(struct ib_fmr *fmr)
  798. {
  799. struct mthca_fmr *mfmr = to_mfmr(fmr);
  800. int err;
  801. err = mthca_free_fmr(to_mdev(fmr->device), mfmr);
  802. if (err)
  803. return err;
  804. kfree(mfmr);
  805. return 0;
  806. }
  807. static int mthca_unmap_fmr(struct list_head *fmr_list)
  808. {
  809. struct ib_fmr *fmr;
  810. int err;
  811. u8 status;
  812. struct mthca_dev *mdev = NULL;
  813. list_for_each_entry(fmr, fmr_list, list) {
  814. if (mdev && to_mdev(fmr->device) != mdev)
  815. return -EINVAL;
  816. mdev = to_mdev(fmr->device);
  817. }
  818. if (!mdev)
  819. return 0;
  820. if (mthca_is_memfree(mdev)) {
  821. list_for_each_entry(fmr, fmr_list, list)
  822. mthca_arbel_fmr_unmap(mdev, to_mfmr(fmr));
  823. wmb();
  824. } else
  825. list_for_each_entry(fmr, fmr_list, list)
  826. mthca_tavor_fmr_unmap(mdev, to_mfmr(fmr));
  827. err = mthca_SYNC_TPT(mdev, &status);
  828. if (err)
  829. return err;
  830. if (status)
  831. return -EINVAL;
  832. return 0;
  833. }
  834. static ssize_t show_rev(struct class_device *cdev, char *buf)
  835. {
  836. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  837. return sprintf(buf, "%x\n", dev->rev_id);
  838. }
  839. static ssize_t show_fw_ver(struct class_device *cdev, char *buf)
  840. {
  841. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  842. return sprintf(buf, "%d.%d.%d\n", (int) (dev->fw_ver >> 32),
  843. (int) (dev->fw_ver >> 16) & 0xffff,
  844. (int) dev->fw_ver & 0xffff);
  845. }
  846. static ssize_t show_hca(struct class_device *cdev, char *buf)
  847. {
  848. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  849. switch (dev->pdev->device) {
  850. case PCI_DEVICE_ID_MELLANOX_TAVOR:
  851. return sprintf(buf, "MT23108\n");
  852. case PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT:
  853. return sprintf(buf, "MT25208 (MT23108 compat mode)\n");
  854. case PCI_DEVICE_ID_MELLANOX_ARBEL:
  855. return sprintf(buf, "MT25208\n");
  856. case PCI_DEVICE_ID_MELLANOX_SINAI:
  857. case PCI_DEVICE_ID_MELLANOX_SINAI_OLD:
  858. return sprintf(buf, "MT25204\n");
  859. default:
  860. return sprintf(buf, "unknown\n");
  861. }
  862. }
  863. static ssize_t show_board(struct class_device *cdev, char *buf)
  864. {
  865. struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
  866. return sprintf(buf, "%.*s\n", MTHCA_BOARD_ID_LEN, dev->board_id);
  867. }
  868. static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  869. static CLASS_DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
  870. static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  871. static CLASS_DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
  872. static struct class_device_attribute *mthca_class_attributes[] = {
  873. &class_device_attr_hw_rev,
  874. &class_device_attr_fw_ver,
  875. &class_device_attr_hca_type,
  876. &class_device_attr_board_id
  877. };
  878. static int mthca_init_node_data(struct mthca_dev *dev)
  879. {
  880. struct ib_smp *in_mad = NULL;
  881. struct ib_smp *out_mad = NULL;
  882. int err = -ENOMEM;
  883. u8 status;
  884. in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
  885. out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
  886. if (!in_mad || !out_mad)
  887. goto out;
  888. init_query_mad(in_mad);
  889. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  890. err = mthca_MAD_IFC(dev, 1, 1,
  891. 1, NULL, NULL, in_mad, out_mad,
  892. &status);
  893. if (err)
  894. goto out;
  895. if (status) {
  896. err = -EINVAL;
  897. goto out;
  898. }
  899. memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
  900. out:
  901. kfree(in_mad);
  902. kfree(out_mad);
  903. return err;
  904. }
  905. int mthca_register_device(struct mthca_dev *dev)
  906. {
  907. int ret;
  908. int i;
  909. ret = mthca_init_node_data(dev);
  910. if (ret)
  911. return ret;
  912. strlcpy(dev->ib_dev.name, "mthca%d", IB_DEVICE_NAME_MAX);
  913. dev->ib_dev.owner = THIS_MODULE;
  914. dev->ib_dev.uverbs_abi_ver = MTHCA_UVERBS_ABI_VERSION;
  915. dev->ib_dev.uverbs_cmd_mask =
  916. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  917. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  918. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  919. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  920. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  921. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  922. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  923. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  924. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  925. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  926. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  927. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  928. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  929. (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
  930. (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
  931. (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
  932. (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
  933. (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ);
  934. dev->ib_dev.node_type = IB_NODE_CA;
  935. dev->ib_dev.phys_port_cnt = dev->limits.num_ports;
  936. dev->ib_dev.dma_device = &dev->pdev->dev;
  937. dev->ib_dev.class_dev.dev = &dev->pdev->dev;
  938. dev->ib_dev.query_device = mthca_query_device;
  939. dev->ib_dev.query_port = mthca_query_port;
  940. dev->ib_dev.modify_port = mthca_modify_port;
  941. dev->ib_dev.query_pkey = mthca_query_pkey;
  942. dev->ib_dev.query_gid = mthca_query_gid;
  943. dev->ib_dev.alloc_ucontext = mthca_alloc_ucontext;
  944. dev->ib_dev.dealloc_ucontext = mthca_dealloc_ucontext;
  945. dev->ib_dev.mmap = mthca_mmap_uar;
  946. dev->ib_dev.alloc_pd = mthca_alloc_pd;
  947. dev->ib_dev.dealloc_pd = mthca_dealloc_pd;
  948. dev->ib_dev.create_ah = mthca_ah_create;
  949. dev->ib_dev.destroy_ah = mthca_ah_destroy;
  950. if (dev->mthca_flags & MTHCA_FLAG_SRQ) {
  951. dev->ib_dev.create_srq = mthca_create_srq;
  952. dev->ib_dev.modify_srq = mthca_modify_srq;
  953. dev->ib_dev.destroy_srq = mthca_destroy_srq;
  954. if (mthca_is_memfree(dev))
  955. dev->ib_dev.post_srq_recv = mthca_arbel_post_srq_recv;
  956. else
  957. dev->ib_dev.post_srq_recv = mthca_tavor_post_srq_recv;
  958. }
  959. dev->ib_dev.create_qp = mthca_create_qp;
  960. dev->ib_dev.modify_qp = mthca_modify_qp;
  961. dev->ib_dev.destroy_qp = mthca_destroy_qp;
  962. dev->ib_dev.create_cq = mthca_create_cq;
  963. dev->ib_dev.destroy_cq = mthca_destroy_cq;
  964. dev->ib_dev.poll_cq = mthca_poll_cq;
  965. dev->ib_dev.get_dma_mr = mthca_get_dma_mr;
  966. dev->ib_dev.reg_phys_mr = mthca_reg_phys_mr;
  967. dev->ib_dev.reg_user_mr = mthca_reg_user_mr;
  968. dev->ib_dev.dereg_mr = mthca_dereg_mr;
  969. if (dev->mthca_flags & MTHCA_FLAG_FMR) {
  970. dev->ib_dev.alloc_fmr = mthca_alloc_fmr;
  971. dev->ib_dev.unmap_fmr = mthca_unmap_fmr;
  972. dev->ib_dev.dealloc_fmr = mthca_dealloc_fmr;
  973. if (mthca_is_memfree(dev))
  974. dev->ib_dev.map_phys_fmr = mthca_arbel_map_phys_fmr;
  975. else
  976. dev->ib_dev.map_phys_fmr = mthca_tavor_map_phys_fmr;
  977. }
  978. dev->ib_dev.attach_mcast = mthca_multicast_attach;
  979. dev->ib_dev.detach_mcast = mthca_multicast_detach;
  980. dev->ib_dev.process_mad = mthca_process_mad;
  981. if (mthca_is_memfree(dev)) {
  982. dev->ib_dev.req_notify_cq = mthca_arbel_arm_cq;
  983. dev->ib_dev.post_send = mthca_arbel_post_send;
  984. dev->ib_dev.post_recv = mthca_arbel_post_receive;
  985. } else {
  986. dev->ib_dev.req_notify_cq = mthca_tavor_arm_cq;
  987. dev->ib_dev.post_send = mthca_tavor_post_send;
  988. dev->ib_dev.post_recv = mthca_tavor_post_receive;
  989. }
  990. mutex_init(&dev->cap_mask_mutex);
  991. ret = ib_register_device(&dev->ib_dev);
  992. if (ret)
  993. return ret;
  994. for (i = 0; i < ARRAY_SIZE(mthca_class_attributes); ++i) {
  995. ret = class_device_create_file(&dev->ib_dev.class_dev,
  996. mthca_class_attributes[i]);
  997. if (ret) {
  998. ib_unregister_device(&dev->ib_dev);
  999. return ret;
  1000. }
  1001. }
  1002. mthca_start_catas_poll(dev);
  1003. return 0;
  1004. }
  1005. void mthca_unregister_device(struct mthca_dev *dev)
  1006. {
  1007. mthca_stop_catas_poll(dev);
  1008. ib_unregister_device(&dev->ib_dev);
  1009. }