mthca_av.c 6.4 KB

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  1. /*
  2. * Copyright (c) 2004 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. *
  33. * $Id: mthca_av.c 1349 2004-12-16 21:09:43Z roland $
  34. */
  35. #include <linux/init.h>
  36. #include <linux/string.h>
  37. #include <linux/slab.h>
  38. #include <rdma/ib_verbs.h>
  39. #include <rdma/ib_cache.h>
  40. #include "mthca_dev.h"
  41. struct mthca_av {
  42. __be32 port_pd;
  43. u8 reserved1;
  44. u8 g_slid;
  45. __be16 dlid;
  46. u8 reserved2;
  47. u8 gid_index;
  48. u8 msg_sr;
  49. u8 hop_limit;
  50. __be32 sl_tclass_flowlabel;
  51. __be32 dgid[4];
  52. };
  53. int mthca_create_ah(struct mthca_dev *dev,
  54. struct mthca_pd *pd,
  55. struct ib_ah_attr *ah_attr,
  56. struct mthca_ah *ah)
  57. {
  58. u32 index = -1;
  59. struct mthca_av *av = NULL;
  60. ah->type = MTHCA_AH_PCI_POOL;
  61. if (mthca_is_memfree(dev)) {
  62. ah->av = kmalloc(sizeof *ah->av, GFP_ATOMIC);
  63. if (!ah->av)
  64. return -ENOMEM;
  65. ah->type = MTHCA_AH_KMALLOC;
  66. av = ah->av;
  67. } else if (!atomic_read(&pd->sqp_count) &&
  68. !(dev->mthca_flags & MTHCA_FLAG_DDR_HIDDEN)) {
  69. index = mthca_alloc(&dev->av_table.alloc);
  70. /* fall back to allocate in host memory */
  71. if (index == -1)
  72. goto on_hca_fail;
  73. av = kmalloc(sizeof *av, GFP_ATOMIC);
  74. if (!av)
  75. goto on_hca_fail;
  76. ah->type = MTHCA_AH_ON_HCA;
  77. ah->avdma = dev->av_table.ddr_av_base +
  78. index * MTHCA_AV_SIZE;
  79. }
  80. on_hca_fail:
  81. if (ah->type == MTHCA_AH_PCI_POOL) {
  82. ah->av = pci_pool_alloc(dev->av_table.pool,
  83. SLAB_ATOMIC, &ah->avdma);
  84. if (!ah->av)
  85. return -ENOMEM;
  86. av = ah->av;
  87. }
  88. ah->key = pd->ntmr.ibmr.lkey;
  89. memset(av, 0, MTHCA_AV_SIZE);
  90. av->port_pd = cpu_to_be32(pd->pd_num | (ah_attr->port_num << 24));
  91. av->g_slid = ah_attr->src_path_bits;
  92. av->dlid = cpu_to_be16(ah_attr->dlid);
  93. av->msg_sr = (3 << 4) | /* 2K message */
  94. ah_attr->static_rate;
  95. av->sl_tclass_flowlabel = cpu_to_be32(ah_attr->sl << 28);
  96. if (ah_attr->ah_flags & IB_AH_GRH) {
  97. av->g_slid |= 0x80;
  98. av->gid_index = (ah_attr->port_num - 1) * dev->limits.gid_table_len +
  99. ah_attr->grh.sgid_index;
  100. av->hop_limit = ah_attr->grh.hop_limit;
  101. av->sl_tclass_flowlabel |=
  102. cpu_to_be32((ah_attr->grh.traffic_class << 20) |
  103. ah_attr->grh.flow_label);
  104. memcpy(av->dgid, ah_attr->grh.dgid.raw, 16);
  105. } else {
  106. /* Arbel workaround -- low byte of GID must be 2 */
  107. av->dgid[3] = cpu_to_be32(2);
  108. }
  109. if (0) {
  110. int j;
  111. mthca_dbg(dev, "Created UDAV at %p/%08lx:\n",
  112. av, (unsigned long) ah->avdma);
  113. for (j = 0; j < 8; ++j)
  114. printk(KERN_DEBUG " [%2x] %08x\n",
  115. j * 4, be32_to_cpu(((__be32 *) av)[j]));
  116. }
  117. if (ah->type == MTHCA_AH_ON_HCA) {
  118. memcpy_toio(dev->av_table.av_map + index * MTHCA_AV_SIZE,
  119. av, MTHCA_AV_SIZE);
  120. kfree(av);
  121. }
  122. return 0;
  123. }
  124. int mthca_destroy_ah(struct mthca_dev *dev, struct mthca_ah *ah)
  125. {
  126. switch (ah->type) {
  127. case MTHCA_AH_ON_HCA:
  128. mthca_free(&dev->av_table.alloc,
  129. (ah->avdma - dev->av_table.ddr_av_base) /
  130. MTHCA_AV_SIZE);
  131. break;
  132. case MTHCA_AH_PCI_POOL:
  133. pci_pool_free(dev->av_table.pool, ah->av, ah->avdma);
  134. break;
  135. case MTHCA_AH_KMALLOC:
  136. kfree(ah->av);
  137. break;
  138. }
  139. return 0;
  140. }
  141. int mthca_ah_grh_present(struct mthca_ah *ah)
  142. {
  143. return !!(ah->av->g_slid & 0x80);
  144. }
  145. int mthca_read_ah(struct mthca_dev *dev, struct mthca_ah *ah,
  146. struct ib_ud_header *header)
  147. {
  148. if (ah->type == MTHCA_AH_ON_HCA)
  149. return -EINVAL;
  150. header->lrh.service_level = be32_to_cpu(ah->av->sl_tclass_flowlabel) >> 28;
  151. header->lrh.destination_lid = ah->av->dlid;
  152. header->lrh.source_lid = cpu_to_be16(ah->av->g_slid & 0x7f);
  153. if (mthca_ah_grh_present(ah)) {
  154. header->grh.traffic_class =
  155. (be32_to_cpu(ah->av->sl_tclass_flowlabel) >> 20) & 0xff;
  156. header->grh.flow_label =
  157. ah->av->sl_tclass_flowlabel & cpu_to_be32(0xfffff);
  158. ib_get_cached_gid(&dev->ib_dev,
  159. be32_to_cpu(ah->av->port_pd) >> 24,
  160. ah->av->gid_index % dev->limits.gid_table_len,
  161. &header->grh.source_gid);
  162. memcpy(header->grh.destination_gid.raw,
  163. ah->av->dgid, 16);
  164. }
  165. return 0;
  166. }
  167. int __devinit mthca_init_av_table(struct mthca_dev *dev)
  168. {
  169. int err;
  170. if (mthca_is_memfree(dev))
  171. return 0;
  172. err = mthca_alloc_init(&dev->av_table.alloc,
  173. dev->av_table.num_ddr_avs,
  174. dev->av_table.num_ddr_avs - 1,
  175. 0);
  176. if (err)
  177. return err;
  178. dev->av_table.pool = pci_pool_create("mthca_av", dev->pdev,
  179. MTHCA_AV_SIZE,
  180. MTHCA_AV_SIZE, 0);
  181. if (!dev->av_table.pool)
  182. goto out_free_alloc;
  183. if (!(dev->mthca_flags & MTHCA_FLAG_DDR_HIDDEN)) {
  184. dev->av_table.av_map = ioremap(pci_resource_start(dev->pdev, 4) +
  185. dev->av_table.ddr_av_base -
  186. dev->ddr_start,
  187. dev->av_table.num_ddr_avs *
  188. MTHCA_AV_SIZE);
  189. if (!dev->av_table.av_map)
  190. goto out_free_pool;
  191. } else
  192. dev->av_table.av_map = NULL;
  193. return 0;
  194. out_free_pool:
  195. pci_pool_destroy(dev->av_table.pool);
  196. out_free_alloc:
  197. mthca_alloc_cleanup(&dev->av_table.alloc);
  198. return -ENOMEM;
  199. }
  200. void __devexit mthca_cleanup_av_table(struct mthca_dev *dev)
  201. {
  202. if (mthca_is_memfree(dev))
  203. return;
  204. if (dev->av_table.av_map)
  205. iounmap(dev->av_table.av_map);
  206. pci_pool_destroy(dev->av_table.pool);
  207. mthca_alloc_cleanup(&dev->av_table.alloc);
  208. }