scx200_acb.c 12 KB

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  1. /* linux/drivers/i2c/scx200_acb.c
  2. Copyright (c) 2001,2002 Christer Weinigel <wingel@nano-system.com>
  3. National Semiconductor SCx200 ACCESS.bus support
  4. Based on i2c-keywest.c which is:
  5. Copyright (c) 2001 Benjamin Herrenschmidt <benh@kernel.crashing.org>
  6. Copyright (c) 2000 Philip Edelbrock <phil@stimpy.netroedge.com>
  7. This program is free software; you can redistribute it and/or
  8. modify it under the terms of the GNU General Public License as
  9. published by the Free Software Foundation; either version 2 of the
  10. License, or (at your option) any later version.
  11. This program is distributed in the hope that it will be useful,
  12. but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. General Public License for more details.
  15. You should have received a copy of the GNU General Public License
  16. along with this program; if not, write to the Free Software
  17. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/errno.h>
  21. #include <linux/kernel.h>
  22. #include <linux/init.h>
  23. #include <linux/i2c.h>
  24. #include <linux/smp_lock.h>
  25. #include <linux/pci.h>
  26. #include <linux/delay.h>
  27. #include <asm/io.h>
  28. #include <linux/scx200.h>
  29. #define NAME "scx200_acb"
  30. MODULE_AUTHOR("Christer Weinigel <wingel@nano-system.com>");
  31. MODULE_DESCRIPTION("NatSemi SCx200 ACCESS.bus Driver");
  32. MODULE_LICENSE("GPL");
  33. #define MAX_DEVICES 4
  34. static int base[MAX_DEVICES] = { 0x820, 0x840 };
  35. module_param_array(base, int, NULL, 0);
  36. MODULE_PARM_DESC(base, "Base addresses for the ACCESS.bus controllers");
  37. #ifdef DEBUG
  38. #define DBG(x...) printk(KERN_DEBUG NAME ": " x)
  39. #else
  40. #define DBG(x...)
  41. #endif
  42. /* The hardware supports interrupt driven mode too, but I haven't
  43. implemented that. */
  44. #define POLLED_MODE 1
  45. #define POLL_TIMEOUT (HZ)
  46. enum scx200_acb_state {
  47. state_idle,
  48. state_address,
  49. state_command,
  50. state_repeat_start,
  51. state_quick,
  52. state_read,
  53. state_write,
  54. };
  55. static const char *scx200_acb_state_name[] = {
  56. "idle",
  57. "address",
  58. "command",
  59. "repeat_start",
  60. "quick",
  61. "read",
  62. "write",
  63. };
  64. /* Physical interface */
  65. struct scx200_acb_iface
  66. {
  67. struct scx200_acb_iface *next;
  68. struct i2c_adapter adapter;
  69. unsigned base;
  70. struct semaphore sem;
  71. /* State machine data */
  72. enum scx200_acb_state state;
  73. int result;
  74. u8 address_byte;
  75. u8 command;
  76. u8 *ptr;
  77. char needs_reset;
  78. unsigned len;
  79. };
  80. /* Register Definitions */
  81. #define ACBSDA (iface->base + 0)
  82. #define ACBST (iface->base + 1)
  83. #define ACBST_SDAST 0x40 /* SDA Status */
  84. #define ACBST_BER 0x20
  85. #define ACBST_NEGACK 0x10 /* Negative Acknowledge */
  86. #define ACBST_STASTR 0x08 /* Stall After Start */
  87. #define ACBST_MASTER 0x02
  88. #define ACBCST (iface->base + 2)
  89. #define ACBCST_BB 0x02
  90. #define ACBCTL1 (iface->base + 3)
  91. #define ACBCTL1_STASTRE 0x80
  92. #define ACBCTL1_NMINTE 0x40
  93. #define ACBCTL1_ACK 0x10
  94. #define ACBCTL1_STOP 0x02
  95. #define ACBCTL1_START 0x01
  96. #define ACBADDR (iface->base + 4)
  97. #define ACBCTL2 (iface->base + 5)
  98. #define ACBCTL2_ENABLE 0x01
  99. /************************************************************************/
  100. static void scx200_acb_machine(struct scx200_acb_iface *iface, u8 status)
  101. {
  102. const char *errmsg;
  103. DBG("state %s, status = 0x%02x\n",
  104. scx200_acb_state_name[iface->state], status);
  105. if (status & ACBST_BER) {
  106. errmsg = "bus error";
  107. goto error;
  108. }
  109. if (!(status & ACBST_MASTER)) {
  110. errmsg = "not master";
  111. goto error;
  112. }
  113. if (status & ACBST_NEGACK)
  114. goto negack;
  115. switch (iface->state) {
  116. case state_idle:
  117. dev_warn(&iface->adapter.dev, "interrupt in idle state\n");
  118. break;
  119. case state_address:
  120. /* Do a pointer write first */
  121. outb(iface->address_byte & ~1, ACBSDA);
  122. iface->state = state_command;
  123. break;
  124. case state_command:
  125. outb(iface->command, ACBSDA);
  126. if (iface->address_byte & 1)
  127. iface->state = state_repeat_start;
  128. else
  129. iface->state = state_write;
  130. break;
  131. case state_repeat_start:
  132. outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1);
  133. /* fallthrough */
  134. case state_quick:
  135. if (iface->address_byte & 1) {
  136. if (iface->len == 1)
  137. outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1);
  138. else
  139. outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
  140. outb(iface->address_byte, ACBSDA);
  141. iface->state = state_read;
  142. } else {
  143. outb(iface->address_byte, ACBSDA);
  144. iface->state = state_write;
  145. }
  146. break;
  147. case state_read:
  148. /* Set ACK if receiving the last byte */
  149. if (iface->len == 1)
  150. outb(inb(ACBCTL1) | ACBCTL1_ACK, ACBCTL1);
  151. else
  152. outb(inb(ACBCTL1) & ~ACBCTL1_ACK, ACBCTL1);
  153. *iface->ptr++ = inb(ACBSDA);
  154. --iface->len;
  155. if (iface->len == 0) {
  156. iface->result = 0;
  157. iface->state = state_idle;
  158. outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
  159. }
  160. break;
  161. case state_write:
  162. if (iface->len == 0) {
  163. iface->result = 0;
  164. iface->state = state_idle;
  165. outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
  166. break;
  167. }
  168. outb(*iface->ptr++, ACBSDA);
  169. --iface->len;
  170. break;
  171. }
  172. return;
  173. negack:
  174. DBG("negative acknowledge in state %s\n",
  175. scx200_acb_state_name[iface->state]);
  176. iface->state = state_idle;
  177. iface->result = -ENXIO;
  178. outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
  179. outb(ACBST_STASTR | ACBST_NEGACK, ACBST);
  180. return;
  181. error:
  182. dev_err(&iface->adapter.dev, "%s in state %s\n", errmsg,
  183. scx200_acb_state_name[iface->state]);
  184. iface->state = state_idle;
  185. iface->result = -EIO;
  186. iface->needs_reset = 1;
  187. }
  188. static void scx200_acb_timeout(struct scx200_acb_iface *iface)
  189. {
  190. dev_err(&iface->adapter.dev, "timeout in state %s\n",
  191. scx200_acb_state_name[iface->state]);
  192. iface->state = state_idle;
  193. iface->result = -EIO;
  194. iface->needs_reset = 1;
  195. }
  196. #ifdef POLLED_MODE
  197. static void scx200_acb_poll(struct scx200_acb_iface *iface)
  198. {
  199. u8 status = 0;
  200. unsigned long timeout;
  201. timeout = jiffies + POLL_TIMEOUT;
  202. while (time_before(jiffies, timeout)) {
  203. status = inb(ACBST);
  204. if ((status & (ACBST_SDAST|ACBST_BER|ACBST_NEGACK)) != 0) {
  205. scx200_acb_machine(iface, status);
  206. return;
  207. }
  208. msleep(10);
  209. }
  210. scx200_acb_timeout(iface);
  211. }
  212. #endif /* POLLED_MODE */
  213. static void scx200_acb_reset(struct scx200_acb_iface *iface)
  214. {
  215. /* Disable the ACCESS.bus device and Configure the SCL
  216. frequency: 16 clock cycles */
  217. outb(0x70, ACBCTL2);
  218. /* Polling mode */
  219. outb(0, ACBCTL1);
  220. /* Disable slave address */
  221. outb(0, ACBADDR);
  222. /* Enable the ACCESS.bus device */
  223. outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2);
  224. /* Free STALL after START */
  225. outb(inb(ACBCTL1) & ~(ACBCTL1_STASTRE | ACBCTL1_NMINTE), ACBCTL1);
  226. /* Send a STOP */
  227. outb(inb(ACBCTL1) | ACBCTL1_STOP, ACBCTL1);
  228. /* Clear BER, NEGACK and STASTR bits */
  229. outb(ACBST_BER | ACBST_NEGACK | ACBST_STASTR, ACBST);
  230. /* Clear BB bit */
  231. outb(inb(ACBCST) | ACBCST_BB, ACBCST);
  232. }
  233. static s32 scx200_acb_smbus_xfer(struct i2c_adapter *adapter,
  234. u16 address, unsigned short flags,
  235. char rw, u8 command, int size,
  236. union i2c_smbus_data *data)
  237. {
  238. struct scx200_acb_iface *iface = i2c_get_adapdata(adapter);
  239. int len;
  240. u8 *buffer;
  241. u16 cur_word;
  242. int rc;
  243. switch (size) {
  244. case I2C_SMBUS_QUICK:
  245. len = 0;
  246. buffer = NULL;
  247. break;
  248. case I2C_SMBUS_BYTE:
  249. if (rw == I2C_SMBUS_READ) {
  250. len = 1;
  251. buffer = &data->byte;
  252. } else {
  253. len = 1;
  254. buffer = &command;
  255. }
  256. break;
  257. case I2C_SMBUS_BYTE_DATA:
  258. len = 1;
  259. buffer = &data->byte;
  260. break;
  261. case I2C_SMBUS_WORD_DATA:
  262. len = 2;
  263. cur_word = cpu_to_le16(data->word);
  264. buffer = (u8 *)&cur_word;
  265. break;
  266. case I2C_SMBUS_BLOCK_DATA:
  267. len = data->block[0];
  268. buffer = &data->block[1];
  269. break;
  270. default:
  271. return -EINVAL;
  272. }
  273. DBG("size=%d, address=0x%x, command=0x%x, len=%d, read=%d\n",
  274. size, address, command, len, rw == I2C_SMBUS_READ);
  275. if (!len && rw == I2C_SMBUS_READ) {
  276. dev_warn(&adapter->dev, "zero length read\n");
  277. return -EINVAL;
  278. }
  279. if (len && !buffer) {
  280. dev_warn(&adapter->dev, "nonzero length but no buffer\n");
  281. return -EFAULT;
  282. }
  283. down(&iface->sem);
  284. iface->address_byte = address<<1;
  285. if (rw == I2C_SMBUS_READ)
  286. iface->address_byte |= 1;
  287. iface->command = command;
  288. iface->ptr = buffer;
  289. iface->len = len;
  290. iface->result = -EINVAL;
  291. iface->needs_reset = 0;
  292. outb(inb(ACBCTL1) | ACBCTL1_START, ACBCTL1);
  293. if (size == I2C_SMBUS_QUICK || size == I2C_SMBUS_BYTE)
  294. iface->state = state_quick;
  295. else
  296. iface->state = state_address;
  297. #ifdef POLLED_MODE
  298. while (iface->state != state_idle)
  299. scx200_acb_poll(iface);
  300. #else /* POLLED_MODE */
  301. #error Interrupt driven mode not implemented
  302. #endif /* POLLED_MODE */
  303. if (iface->needs_reset)
  304. scx200_acb_reset(iface);
  305. rc = iface->result;
  306. up(&iface->sem);
  307. if (rc == 0 && size == I2C_SMBUS_WORD_DATA && rw == I2C_SMBUS_READ)
  308. data->word = le16_to_cpu(cur_word);
  309. #ifdef DEBUG
  310. DBG(": transfer done, result: %d", rc);
  311. if (buffer) {
  312. int i;
  313. printk(" data:");
  314. for (i = 0; i < len; ++i)
  315. printk(" %02x", buffer[i]);
  316. }
  317. printk("\n");
  318. #endif
  319. return rc;
  320. }
  321. static u32 scx200_acb_func(struct i2c_adapter *adapter)
  322. {
  323. return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
  324. I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
  325. I2C_FUNC_SMBUS_BLOCK_DATA;
  326. }
  327. /* For now, we only handle combined mode (smbus) */
  328. static struct i2c_algorithm scx200_acb_algorithm = {
  329. .smbus_xfer = scx200_acb_smbus_xfer,
  330. .functionality = scx200_acb_func,
  331. };
  332. static struct scx200_acb_iface *scx200_acb_list;
  333. static int scx200_acb_probe(struct scx200_acb_iface *iface)
  334. {
  335. u8 val;
  336. /* Disable the ACCESS.bus device and Configure the SCL
  337. frequency: 16 clock cycles */
  338. outb(0x70, ACBCTL2);
  339. if (inb(ACBCTL2) != 0x70) {
  340. DBG("ACBCTL2 readback failed\n");
  341. return -ENXIO;
  342. }
  343. outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1);
  344. val = inb(ACBCTL1);
  345. if (val) {
  346. DBG("disabled, but ACBCTL1=0x%02x\n", val);
  347. return -ENXIO;
  348. }
  349. outb(inb(ACBCTL2) | ACBCTL2_ENABLE, ACBCTL2);
  350. outb(inb(ACBCTL1) | ACBCTL1_NMINTE, ACBCTL1);
  351. val = inb(ACBCTL1);
  352. if ((val & ACBCTL1_NMINTE) != ACBCTL1_NMINTE) {
  353. DBG("enabled, but NMINTE won't be set, ACBCTL1=0x%02x\n", val);
  354. return -ENXIO;
  355. }
  356. return 0;
  357. }
  358. static int __init scx200_acb_create(int base, int index)
  359. {
  360. struct scx200_acb_iface *iface;
  361. struct i2c_adapter *adapter;
  362. int rc = 0;
  363. char description[64];
  364. iface = kzalloc(sizeof(*iface), GFP_KERNEL);
  365. if (!iface) {
  366. printk(KERN_ERR NAME ": can't allocate memory\n");
  367. rc = -ENOMEM;
  368. goto errout;
  369. }
  370. adapter = &iface->adapter;
  371. i2c_set_adapdata(adapter, iface);
  372. snprintf(adapter->name, I2C_NAME_SIZE, "SCx200 ACB%d", index);
  373. adapter->owner = THIS_MODULE;
  374. adapter->id = I2C_HW_SMBUS_SCX200;
  375. adapter->algo = &scx200_acb_algorithm;
  376. adapter->class = I2C_CLASS_HWMON;
  377. init_MUTEX(&iface->sem);
  378. snprintf(description, sizeof(description), "NatSemi SCx200 ACCESS.bus [%s]", adapter->name);
  379. if (request_region(base, 8, description) == 0) {
  380. dev_err(&adapter->dev, "can't allocate io 0x%x-0x%x\n",
  381. base, base + 8-1);
  382. rc = -EBUSY;
  383. goto errout;
  384. }
  385. iface->base = base;
  386. rc = scx200_acb_probe(iface);
  387. if (rc) {
  388. dev_warn(&adapter->dev, "probe failed\n");
  389. goto errout;
  390. }
  391. scx200_acb_reset(iface);
  392. if (i2c_add_adapter(adapter) < 0) {
  393. dev_err(&adapter->dev, "failed to register\n");
  394. rc = -ENODEV;
  395. goto errout;
  396. }
  397. lock_kernel();
  398. iface->next = scx200_acb_list;
  399. scx200_acb_list = iface;
  400. unlock_kernel();
  401. return 0;
  402. errout:
  403. if (iface) {
  404. if (iface->base)
  405. release_region(iface->base, 8);
  406. kfree(iface);
  407. }
  408. return rc;
  409. }
  410. static struct pci_device_id scx200[] = {
  411. { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SCx200_BRIDGE) },
  412. { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_SC1100_BRIDGE) },
  413. { },
  414. };
  415. static int __init scx200_acb_init(void)
  416. {
  417. int i;
  418. int rc;
  419. pr_debug(NAME ": NatSemi SCx200 ACCESS.bus Driver\n");
  420. /* Verify that this really is a SCx200 processor */
  421. if (pci_dev_present(scx200) == 0)
  422. return -ENODEV;
  423. rc = -ENXIO;
  424. for (i = 0; i < MAX_DEVICES; ++i) {
  425. if (base[i] > 0)
  426. rc = scx200_acb_create(base[i], i);
  427. }
  428. if (scx200_acb_list)
  429. return 0;
  430. return rc;
  431. }
  432. static void __exit scx200_acb_cleanup(void)
  433. {
  434. struct scx200_acb_iface *iface;
  435. lock_kernel();
  436. while ((iface = scx200_acb_list) != NULL) {
  437. scx200_acb_list = iface->next;
  438. unlock_kernel();
  439. i2c_del_adapter(&iface->adapter);
  440. release_region(iface->base, 8);
  441. kfree(iface);
  442. lock_kernel();
  443. }
  444. unlock_kernel();
  445. }
  446. module_init(scx200_acb_init);
  447. module_exit(scx200_acb_cleanup);
  448. /*
  449. Local variables:
  450. compile-command: "make -k -C ../.. SUBDIRS=drivers/i2c modules"
  451. c-basic-offset: 8
  452. End:
  453. */