vr41xx_rtc.c 15 KB

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  1. /*
  2. * Driver for NEC VR4100 series Real Time Clock unit.
  3. *
  4. * Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #include <linux/platform_device.h>
  21. #include <linux/fs.h>
  22. #include <linux/init.h>
  23. #include <linux/ioport.h>
  24. #include <linux/irq.h>
  25. #include <linux/mc146818rtc.h>
  26. #include <linux/miscdevice.h>
  27. #include <linux/module.h>
  28. #include <linux/poll.h>
  29. #include <linux/rtc.h>
  30. #include <linux/spinlock.h>
  31. #include <linux/types.h>
  32. #include <linux/wait.h>
  33. #include <asm/div64.h>
  34. #include <asm/io.h>
  35. #include <asm/time.h>
  36. #include <asm/uaccess.h>
  37. #include <asm/vr41xx/vr41xx.h>
  38. MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>");
  39. MODULE_DESCRIPTION("NEC VR4100 series RTC driver");
  40. MODULE_LICENSE("GPL");
  41. #define RTC1_TYPE1_START 0x0b0000c0UL
  42. #define RTC1_TYPE1_END 0x0b0000dfUL
  43. #define RTC2_TYPE1_START 0x0b0001c0UL
  44. #define RTC2_TYPE1_END 0x0b0001dfUL
  45. #define RTC1_TYPE2_START 0x0f000100UL
  46. #define RTC1_TYPE2_END 0x0f00011fUL
  47. #define RTC2_TYPE2_START 0x0f000120UL
  48. #define RTC2_TYPE2_END 0x0f00013fUL
  49. #define RTC1_SIZE 0x20
  50. #define RTC2_SIZE 0x20
  51. /* RTC 1 registers */
  52. #define ETIMELREG 0x00
  53. #define ETIMEMREG 0x02
  54. #define ETIMEHREG 0x04
  55. /* RFU */
  56. #define ECMPLREG 0x08
  57. #define ECMPMREG 0x0a
  58. #define ECMPHREG 0x0c
  59. /* RFU */
  60. #define RTCL1LREG 0x10
  61. #define RTCL1HREG 0x12
  62. #define RTCL1CNTLREG 0x14
  63. #define RTCL1CNTHREG 0x16
  64. #define RTCL2LREG 0x18
  65. #define RTCL2HREG 0x1a
  66. #define RTCL2CNTLREG 0x1c
  67. #define RTCL2CNTHREG 0x1e
  68. /* RTC 2 registers */
  69. #define TCLKLREG 0x00
  70. #define TCLKHREG 0x02
  71. #define TCLKCNTLREG 0x04
  72. #define TCLKCNTHREG 0x06
  73. /* RFU */
  74. #define RTCINTREG 0x1e
  75. #define TCLOCK_INT 0x08
  76. #define RTCLONG2_INT 0x04
  77. #define RTCLONG1_INT 0x02
  78. #define ELAPSEDTIME_INT 0x01
  79. #define RTC_FREQUENCY 32768
  80. #define MAX_PERIODIC_RATE 6553
  81. #define MAX_USER_PERIODIC_RATE 64
  82. static void __iomem *rtc1_base;
  83. static void __iomem *rtc2_base;
  84. #define rtc1_read(offset) readw(rtc1_base + (offset))
  85. #define rtc1_write(offset, value) writew((value), rtc1_base + (offset))
  86. #define rtc2_read(offset) readw(rtc2_base + (offset))
  87. #define rtc2_write(offset, value) writew((value), rtc2_base + (offset))
  88. static unsigned long epoch = 1970; /* Jan 1 1970 00:00:00 */
  89. static spinlock_t rtc_task_lock;
  90. static wait_queue_head_t rtc_wait;
  91. static unsigned long rtc_irq_data;
  92. static struct fasync_struct *rtc_async_queue;
  93. static rtc_task_t *rtc_callback;
  94. static char rtc_name[] = "RTC";
  95. static unsigned long periodic_frequency;
  96. static unsigned long periodic_count;
  97. typedef enum {
  98. RTC_RELEASE,
  99. RTC_OPEN,
  100. } rtc_status_t;
  101. static rtc_status_t rtc_status;
  102. typedef enum {
  103. FUNCTION_RTC_IOCTL,
  104. FUNCTION_RTC_CONTROL,
  105. } rtc_callfrom_t;
  106. struct resource rtc_resource[2] = {
  107. { .name = rtc_name,
  108. .flags = IORESOURCE_MEM, },
  109. { .name = rtc_name,
  110. .flags = IORESOURCE_MEM, },
  111. };
  112. static inline unsigned long read_elapsed_second(void)
  113. {
  114. unsigned long first_low, first_mid, first_high;
  115. unsigned long second_low, second_mid, second_high;
  116. do {
  117. first_low = rtc1_read(ETIMELREG);
  118. first_mid = rtc1_read(ETIMEMREG);
  119. first_high = rtc1_read(ETIMEHREG);
  120. second_low = rtc1_read(ETIMELREG);
  121. second_mid = rtc1_read(ETIMEMREG);
  122. second_high = rtc1_read(ETIMEHREG);
  123. } while (first_low != second_low || first_mid != second_mid ||
  124. first_high != second_high);
  125. return (first_high << 17) | (first_mid << 1) | (first_low >> 15);
  126. }
  127. static inline void write_elapsed_second(unsigned long sec)
  128. {
  129. spin_lock_irq(&rtc_lock);
  130. rtc1_write(ETIMELREG, (uint16_t)(sec << 15));
  131. rtc1_write(ETIMEMREG, (uint16_t)(sec >> 1));
  132. rtc1_write(ETIMEHREG, (uint16_t)(sec >> 17));
  133. spin_unlock_irq(&rtc_lock);
  134. }
  135. static void set_alarm(struct rtc_time *time)
  136. {
  137. unsigned long alarm_sec;
  138. alarm_sec = mktime(time->tm_year + 1900, time->tm_mon + 1, time->tm_mday,
  139. time->tm_hour, time->tm_min, time->tm_sec);
  140. spin_lock_irq(&rtc_lock);
  141. rtc1_write(ECMPLREG, (uint16_t)(alarm_sec << 15));
  142. rtc1_write(ECMPMREG, (uint16_t)(alarm_sec >> 1));
  143. rtc1_write(ECMPHREG, (uint16_t)(alarm_sec >> 17));
  144. spin_unlock_irq(&rtc_lock);
  145. }
  146. static void read_alarm(struct rtc_time *time)
  147. {
  148. unsigned long low, mid, high;
  149. spin_lock_irq(&rtc_lock);
  150. low = rtc1_read(ECMPLREG);
  151. mid = rtc1_read(ECMPMREG);
  152. high = rtc1_read(ECMPHREG);
  153. spin_unlock_irq(&rtc_lock);
  154. to_tm((high << 17) | (mid << 1) | (low >> 15), time);
  155. time->tm_year -= 1900;
  156. }
  157. static void read_time(struct rtc_time *time)
  158. {
  159. unsigned long epoch_sec, elapsed_sec;
  160. epoch_sec = mktime(epoch, 1, 1, 0, 0, 0);
  161. elapsed_sec = read_elapsed_second();
  162. to_tm(epoch_sec + elapsed_sec, time);
  163. time->tm_year -= 1900;
  164. }
  165. static void set_time(struct rtc_time *time)
  166. {
  167. unsigned long epoch_sec, current_sec;
  168. epoch_sec = mktime(epoch, 1, 1, 0, 0, 0);
  169. current_sec = mktime(time->tm_year + 1900, time->tm_mon + 1, time->tm_mday,
  170. time->tm_hour, time->tm_min, time->tm_sec);
  171. write_elapsed_second(current_sec - epoch_sec);
  172. }
  173. static ssize_t rtc_read(struct file *file, char __user *buf, size_t count, loff_t *ppos)
  174. {
  175. DECLARE_WAITQUEUE(wait, current);
  176. unsigned long irq_data;
  177. int retval = 0;
  178. if (count != sizeof(unsigned int) && count != sizeof(unsigned long))
  179. return -EINVAL;
  180. add_wait_queue(&rtc_wait, &wait);
  181. do {
  182. __set_current_state(TASK_INTERRUPTIBLE);
  183. spin_lock_irq(&rtc_lock);
  184. irq_data = rtc_irq_data;
  185. rtc_irq_data = 0;
  186. spin_unlock_irq(&rtc_lock);
  187. if (irq_data != 0)
  188. break;
  189. if (file->f_flags & O_NONBLOCK) {
  190. retval = -EAGAIN;
  191. break;
  192. }
  193. if (signal_pending(current)) {
  194. retval = -ERESTARTSYS;
  195. break;
  196. }
  197. } while (1);
  198. if (retval == 0) {
  199. if (count == sizeof(unsigned int)) {
  200. retval = put_user(irq_data, (unsigned int __user *)buf);
  201. if (retval == 0)
  202. retval = sizeof(unsigned int);
  203. } else {
  204. retval = put_user(irq_data, (unsigned long __user *)buf);
  205. if (retval == 0)
  206. retval = sizeof(unsigned long);
  207. }
  208. }
  209. __set_current_state(TASK_RUNNING);
  210. remove_wait_queue(&rtc_wait, &wait);
  211. return retval;
  212. }
  213. static unsigned int rtc_poll(struct file *file, struct poll_table_struct *table)
  214. {
  215. poll_wait(file, &rtc_wait, table);
  216. if (rtc_irq_data != 0)
  217. return POLLIN | POLLRDNORM;
  218. return 0;
  219. }
  220. static int rtc_do_ioctl(unsigned int cmd, unsigned long arg, rtc_callfrom_t from)
  221. {
  222. struct rtc_time time;
  223. unsigned long count;
  224. switch (cmd) {
  225. case RTC_AIE_ON:
  226. enable_irq(ELAPSEDTIME_IRQ);
  227. break;
  228. case RTC_AIE_OFF:
  229. disable_irq(ELAPSEDTIME_IRQ);
  230. break;
  231. case RTC_PIE_ON:
  232. enable_irq(RTCLONG1_IRQ);
  233. break;
  234. case RTC_PIE_OFF:
  235. disable_irq(RTCLONG1_IRQ);
  236. break;
  237. case RTC_ALM_SET:
  238. if (copy_from_user(&time, (struct rtc_time __user *)arg,
  239. sizeof(struct rtc_time)))
  240. return -EFAULT;
  241. set_alarm(&time);
  242. break;
  243. case RTC_ALM_READ:
  244. memset(&time, 0, sizeof(struct rtc_time));
  245. read_alarm(&time);
  246. break;
  247. case RTC_RD_TIME:
  248. memset(&time, 0, sizeof(struct rtc_time));
  249. read_time(&time);
  250. if (copy_to_user((void __user *)arg, &time, sizeof(struct rtc_time)))
  251. return -EFAULT;
  252. break;
  253. case RTC_SET_TIME:
  254. if (capable(CAP_SYS_TIME) == 0)
  255. return -EACCES;
  256. if (copy_from_user(&time, (struct rtc_time __user *)arg,
  257. sizeof(struct rtc_time)))
  258. return -EFAULT;
  259. set_time(&time);
  260. break;
  261. case RTC_IRQP_READ:
  262. return put_user(periodic_frequency, (unsigned long __user *)arg);
  263. break;
  264. case RTC_IRQP_SET:
  265. if (arg > MAX_PERIODIC_RATE)
  266. return -EINVAL;
  267. if (from == FUNCTION_RTC_IOCTL && arg > MAX_USER_PERIODIC_RATE &&
  268. capable(CAP_SYS_RESOURCE) == 0)
  269. return -EACCES;
  270. periodic_frequency = arg;
  271. count = RTC_FREQUENCY;
  272. do_div(count, arg);
  273. periodic_count = count;
  274. spin_lock_irq(&rtc_lock);
  275. rtc1_write(RTCL1LREG, count);
  276. rtc1_write(RTCL1HREG, count >> 16);
  277. spin_unlock_irq(&rtc_lock);
  278. break;
  279. case RTC_EPOCH_READ:
  280. return put_user(epoch, (unsigned long __user *)arg);
  281. case RTC_EPOCH_SET:
  282. /* Doesn't support before 1900 */
  283. if (arg < 1900)
  284. return -EINVAL;
  285. if (capable(CAP_SYS_TIME) == 0)
  286. return -EACCES;
  287. epoch = arg;
  288. break;
  289. default:
  290. return -EINVAL;
  291. }
  292. return 0;
  293. }
  294. static int rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
  295. unsigned long arg)
  296. {
  297. return rtc_do_ioctl(cmd, arg, FUNCTION_RTC_IOCTL);
  298. }
  299. static int rtc_open(struct inode *inode, struct file *file)
  300. {
  301. spin_lock_irq(&rtc_lock);
  302. if (rtc_status == RTC_OPEN) {
  303. spin_unlock_irq(&rtc_lock);
  304. return -EBUSY;
  305. }
  306. rtc_status = RTC_OPEN;
  307. rtc_irq_data = 0;
  308. spin_unlock_irq(&rtc_lock);
  309. return 0;
  310. }
  311. static int rtc_release(struct inode *inode, struct file *file)
  312. {
  313. if (file->f_flags & FASYNC)
  314. (void)fasync_helper(-1, file, 0, &rtc_async_queue);
  315. spin_lock_irq(&rtc_lock);
  316. rtc1_write(ECMPLREG, 0);
  317. rtc1_write(ECMPMREG, 0);
  318. rtc1_write(ECMPHREG, 0);
  319. rtc1_write(RTCL1LREG, 0);
  320. rtc1_write(RTCL1HREG, 0);
  321. rtc_status = RTC_RELEASE;
  322. spin_unlock_irq(&rtc_lock);
  323. disable_irq(ELAPSEDTIME_IRQ);
  324. disable_irq(RTCLONG1_IRQ);
  325. return 0;
  326. }
  327. static int rtc_fasync(int fd, struct file *file, int on)
  328. {
  329. return fasync_helper(fd, file, on, &rtc_async_queue);
  330. }
  331. static struct file_operations rtc_fops = {
  332. .owner = THIS_MODULE,
  333. .llseek = no_llseek,
  334. .read = rtc_read,
  335. .poll = rtc_poll,
  336. .ioctl = rtc_ioctl,
  337. .open = rtc_open,
  338. .release = rtc_release,
  339. .fasync = rtc_fasync,
  340. };
  341. static irqreturn_t elapsedtime_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  342. {
  343. spin_lock(&rtc_lock);
  344. rtc2_write(RTCINTREG, ELAPSEDTIME_INT);
  345. rtc_irq_data += 0x100;
  346. rtc_irq_data &= ~0xff;
  347. rtc_irq_data |= RTC_AF;
  348. spin_unlock(&rtc_lock);
  349. spin_lock(&rtc_lock);
  350. if (rtc_callback)
  351. rtc_callback->func(rtc_callback->private_data);
  352. spin_unlock(&rtc_lock);
  353. wake_up_interruptible(&rtc_wait);
  354. kill_fasync(&rtc_async_queue, SIGIO, POLL_IN);
  355. return IRQ_HANDLED;
  356. }
  357. static irqreturn_t rtclong1_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  358. {
  359. unsigned long count = periodic_count;
  360. spin_lock(&rtc_lock);
  361. rtc2_write(RTCINTREG, RTCLONG1_INT);
  362. rtc1_write(RTCL1LREG, count);
  363. rtc1_write(RTCL1HREG, count >> 16);
  364. rtc_irq_data += 0x100;
  365. rtc_irq_data &= ~0xff;
  366. rtc_irq_data |= RTC_PF;
  367. spin_unlock(&rtc_lock);
  368. spin_lock(&rtc_task_lock);
  369. if (rtc_callback)
  370. rtc_callback->func(rtc_callback->private_data);
  371. spin_unlock(&rtc_task_lock);
  372. wake_up_interruptible(&rtc_wait);
  373. kill_fasync(&rtc_async_queue, SIGIO, POLL_IN);
  374. return IRQ_HANDLED;
  375. }
  376. int rtc_register(rtc_task_t *task)
  377. {
  378. if (task == NULL || task->func == NULL)
  379. return -EINVAL;
  380. spin_lock_irq(&rtc_lock);
  381. if (rtc_status == RTC_OPEN) {
  382. spin_unlock_irq(&rtc_lock);
  383. return -EBUSY;
  384. }
  385. spin_lock(&rtc_task_lock);
  386. if (rtc_callback != NULL) {
  387. spin_unlock(&rtc_task_lock);
  388. spin_unlock_irq(&rtc_task_lock);
  389. return -EBUSY;
  390. }
  391. rtc_callback = task;
  392. spin_unlock(&rtc_task_lock);
  393. rtc_status = RTC_OPEN;
  394. spin_unlock_irq(&rtc_lock);
  395. return 0;
  396. }
  397. EXPORT_SYMBOL_GPL(rtc_register);
  398. int rtc_unregister(rtc_task_t *task)
  399. {
  400. spin_lock_irq(&rtc_task_lock);
  401. if (task == NULL || rtc_callback != task) {
  402. spin_unlock_irq(&rtc_task_lock);
  403. return -ENXIO;
  404. }
  405. spin_lock(&rtc_lock);
  406. rtc1_write(ECMPLREG, 0);
  407. rtc1_write(ECMPMREG, 0);
  408. rtc1_write(ECMPHREG, 0);
  409. rtc1_write(RTCL1LREG, 0);
  410. rtc1_write(RTCL1HREG, 0);
  411. rtc_status = RTC_RELEASE;
  412. spin_unlock(&rtc_lock);
  413. rtc_callback = NULL;
  414. spin_unlock_irq(&rtc_task_lock);
  415. disable_irq(ELAPSEDTIME_IRQ);
  416. disable_irq(RTCLONG1_IRQ);
  417. return 0;
  418. }
  419. EXPORT_SYMBOL_GPL(rtc_unregister);
  420. int rtc_control(rtc_task_t *task, unsigned int cmd, unsigned long arg)
  421. {
  422. int retval = 0;
  423. spin_lock_irq(&rtc_task_lock);
  424. if (rtc_callback != task)
  425. retval = -ENXIO;
  426. else
  427. rtc_do_ioctl(cmd, arg, FUNCTION_RTC_CONTROL);
  428. spin_unlock_irq(&rtc_task_lock);
  429. return retval;
  430. }
  431. EXPORT_SYMBOL_GPL(rtc_control);
  432. static struct miscdevice rtc_miscdevice = {
  433. .minor = RTC_MINOR,
  434. .name = rtc_name,
  435. .fops = &rtc_fops,
  436. };
  437. static int rtc_probe(struct platform_device *pdev)
  438. {
  439. unsigned int irq;
  440. int retval;
  441. if (pdev->num_resources != 2)
  442. return -EBUSY;
  443. rtc1_base = ioremap(pdev->resource[0].start, RTC1_SIZE);
  444. if (rtc1_base == NULL)
  445. return -EBUSY;
  446. rtc2_base = ioremap(pdev->resource[1].start, RTC2_SIZE);
  447. if (rtc2_base == NULL) {
  448. iounmap(rtc1_base);
  449. rtc1_base = NULL;
  450. return -EBUSY;
  451. }
  452. retval = misc_register(&rtc_miscdevice);
  453. if (retval < 0) {
  454. iounmap(rtc1_base);
  455. iounmap(rtc2_base);
  456. rtc1_base = NULL;
  457. rtc2_base = NULL;
  458. return retval;
  459. }
  460. spin_lock_irq(&rtc_lock);
  461. rtc1_write(ECMPLREG, 0);
  462. rtc1_write(ECMPMREG, 0);
  463. rtc1_write(ECMPHREG, 0);
  464. rtc1_write(RTCL1LREG, 0);
  465. rtc1_write(RTCL1HREG, 0);
  466. rtc_status = RTC_RELEASE;
  467. rtc_irq_data = 0;
  468. spin_unlock_irq(&rtc_lock);
  469. init_waitqueue_head(&rtc_wait);
  470. irq = ELAPSEDTIME_IRQ;
  471. retval = request_irq(irq, elapsedtime_interrupt, SA_INTERRUPT,
  472. "elapsed_time", NULL);
  473. if (retval == 0) {
  474. irq = RTCLONG1_IRQ;
  475. retval = request_irq(irq, rtclong1_interrupt, SA_INTERRUPT,
  476. "rtclong1", NULL);
  477. }
  478. if (retval < 0) {
  479. printk(KERN_ERR "rtc: IRQ%d is busy\n", irq);
  480. if (irq == RTCLONG1_IRQ)
  481. free_irq(ELAPSEDTIME_IRQ, NULL);
  482. iounmap(rtc1_base);
  483. iounmap(rtc2_base);
  484. rtc1_base = NULL;
  485. rtc2_base = NULL;
  486. return retval;
  487. }
  488. disable_irq(ELAPSEDTIME_IRQ);
  489. disable_irq(RTCLONG1_IRQ);
  490. spin_lock_init(&rtc_task_lock);
  491. printk(KERN_INFO "rtc: Real Time Clock of NEC VR4100 series\n");
  492. return 0;
  493. }
  494. static int rtc_remove(struct platform_device *dev)
  495. {
  496. int retval;
  497. retval = misc_deregister(&rtc_miscdevice);
  498. if (retval < 0)
  499. return retval;
  500. free_irq(ELAPSEDTIME_IRQ, NULL);
  501. free_irq(RTCLONG1_IRQ, NULL);
  502. if (rtc1_base != NULL)
  503. iounmap(rtc1_base);
  504. if (rtc2_base != NULL)
  505. iounmap(rtc2_base);
  506. return 0;
  507. }
  508. static struct platform_device *rtc_platform_device;
  509. static struct platform_driver rtc_device_driver = {
  510. .probe = rtc_probe,
  511. .remove = rtc_remove,
  512. .driver = {
  513. .name = rtc_name,
  514. },
  515. };
  516. static int __devinit vr41xx_rtc_init(void)
  517. {
  518. int retval;
  519. switch (current_cpu_data.cputype) {
  520. case CPU_VR4111:
  521. case CPU_VR4121:
  522. rtc_resource[0].start = RTC1_TYPE1_START;
  523. rtc_resource[0].end = RTC1_TYPE1_END;
  524. rtc_resource[1].start = RTC2_TYPE1_START;
  525. rtc_resource[1].end = RTC2_TYPE1_END;
  526. break;
  527. case CPU_VR4122:
  528. case CPU_VR4131:
  529. case CPU_VR4133:
  530. rtc_resource[0].start = RTC1_TYPE2_START;
  531. rtc_resource[0].end = RTC1_TYPE2_END;
  532. rtc_resource[1].start = RTC2_TYPE2_START;
  533. rtc_resource[1].end = RTC2_TYPE2_END;
  534. break;
  535. default:
  536. return -ENODEV;
  537. break;
  538. }
  539. rtc_platform_device = platform_device_register_simple("RTC", -1,
  540. rtc_resource, ARRAY_SIZE(rtc_resource));
  541. if (IS_ERR(rtc_platform_device))
  542. return PTR_ERR(rtc_platform_device);
  543. retval = platform_driver_register(&rtc_device_driver);
  544. if (retval < 0)
  545. platform_device_unregister(rtc_platform_device);
  546. return retval;
  547. }
  548. static void __devexit vr41xx_rtc_exit(void)
  549. {
  550. platform_driver_unregister(&rtc_device_driver);
  551. platform_device_unregister(rtc_platform_device);
  552. }
  553. module_init(vr41xx_rtc_init);
  554. module_exit(vr41xx_rtc_exit);