synclink_cs.c 117 KB

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  1. /*
  2. * linux/drivers/char/pcmcia/synclink_cs.c
  3. *
  4. * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
  5. *
  6. * Device driver for Microgate SyncLink PC Card
  7. * multiprotocol serial adapter.
  8. *
  9. * written by Paul Fulghum for Microgate Corporation
  10. * paulkf@microgate.com
  11. *
  12. * Microgate and SyncLink are trademarks of Microgate Corporation
  13. *
  14. * This code is released under the GNU General Public License (GPL)
  15. *
  16. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19. * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20. * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26. * OF THE POSSIBILITY OF SUCH DAMAGE.
  27. */
  28. #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  29. #if defined(__i386__)
  30. # define BREAKPOINT() asm(" int $3");
  31. #else
  32. # define BREAKPOINT() { }
  33. #endif
  34. #define MAX_DEVICE_COUNT 4
  35. #include <linux/config.h>
  36. #include <linux/module.h>
  37. #include <linux/errno.h>
  38. #include <linux/signal.h>
  39. #include <linux/sched.h>
  40. #include <linux/timer.h>
  41. #include <linux/time.h>
  42. #include <linux/interrupt.h>
  43. #include <linux/pci.h>
  44. #include <linux/tty.h>
  45. #include <linux/tty_flip.h>
  46. #include <linux/serial.h>
  47. #include <linux/major.h>
  48. #include <linux/string.h>
  49. #include <linux/fcntl.h>
  50. #include <linux/ptrace.h>
  51. #include <linux/ioport.h>
  52. #include <linux/mm.h>
  53. #include <linux/slab.h>
  54. #include <linux/netdevice.h>
  55. #include <linux/vmalloc.h>
  56. #include <linux/init.h>
  57. #include <asm/serial.h>
  58. #include <linux/delay.h>
  59. #include <linux/ioctl.h>
  60. #include <asm/system.h>
  61. #include <asm/io.h>
  62. #include <asm/irq.h>
  63. #include <asm/dma.h>
  64. #include <linux/bitops.h>
  65. #include <asm/types.h>
  66. #include <linux/termios.h>
  67. #include <linux/workqueue.h>
  68. #include <linux/hdlc.h>
  69. #include <pcmcia/cs_types.h>
  70. #include <pcmcia/cs.h>
  71. #include <pcmcia/cistpl.h>
  72. #include <pcmcia/cisreg.h>
  73. #include <pcmcia/ds.h>
  74. #ifdef CONFIG_HDLC_MODULE
  75. #define CONFIG_HDLC 1
  76. #endif
  77. #define GET_USER(error,value,addr) error = get_user(value,addr)
  78. #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  79. #define PUT_USER(error,value,addr) error = put_user(value,addr)
  80. #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  81. #include <asm/uaccess.h>
  82. #include "linux/synclink.h"
  83. static MGSL_PARAMS default_params = {
  84. MGSL_MODE_HDLC, /* unsigned long mode */
  85. 0, /* unsigned char loopback; */
  86. HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
  87. HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
  88. 0, /* unsigned long clock_speed; */
  89. 0xff, /* unsigned char addr_filter; */
  90. HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
  91. HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
  92. HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
  93. 9600, /* unsigned long data_rate; */
  94. 8, /* unsigned char data_bits; */
  95. 1, /* unsigned char stop_bits; */
  96. ASYNC_PARITY_NONE /* unsigned char parity; */
  97. };
  98. typedef struct
  99. {
  100. int count;
  101. unsigned char status;
  102. char data[1];
  103. } RXBUF;
  104. /* The queue of BH actions to be performed */
  105. #define BH_RECEIVE 1
  106. #define BH_TRANSMIT 2
  107. #define BH_STATUS 4
  108. #define IO_PIN_SHUTDOWN_LIMIT 100
  109. #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
  110. struct _input_signal_events {
  111. int ri_up;
  112. int ri_down;
  113. int dsr_up;
  114. int dsr_down;
  115. int dcd_up;
  116. int dcd_down;
  117. int cts_up;
  118. int cts_down;
  119. };
  120. /*
  121. * Device instance data structure
  122. */
  123. typedef struct _mgslpc_info {
  124. void *if_ptr; /* General purpose pointer (used by SPPP) */
  125. int magic;
  126. int flags;
  127. int count; /* count of opens */
  128. int line;
  129. unsigned short close_delay;
  130. unsigned short closing_wait; /* time to wait before closing */
  131. struct mgsl_icount icount;
  132. struct tty_struct *tty;
  133. int timeout;
  134. int x_char; /* xon/xoff character */
  135. int blocked_open; /* # of blocked opens */
  136. unsigned char read_status_mask;
  137. unsigned char ignore_status_mask;
  138. unsigned char *tx_buf;
  139. int tx_put;
  140. int tx_get;
  141. int tx_count;
  142. /* circular list of fixed length rx buffers */
  143. unsigned char *rx_buf; /* memory allocated for all rx buffers */
  144. int rx_buf_total_size; /* size of memory allocated for rx buffers */
  145. int rx_put; /* index of next empty rx buffer */
  146. int rx_get; /* index of next full rx buffer */
  147. int rx_buf_size; /* size in bytes of single rx buffer */
  148. int rx_buf_count; /* total number of rx buffers */
  149. int rx_frame_count; /* number of full rx buffers */
  150. wait_queue_head_t open_wait;
  151. wait_queue_head_t close_wait;
  152. wait_queue_head_t status_event_wait_q;
  153. wait_queue_head_t event_wait_q;
  154. struct timer_list tx_timer; /* HDLC transmit timeout timer */
  155. struct _mgslpc_info *next_device; /* device list link */
  156. unsigned short imra_value;
  157. unsigned short imrb_value;
  158. unsigned char pim_value;
  159. spinlock_t lock;
  160. struct work_struct task; /* task structure for scheduling bh */
  161. u32 max_frame_size;
  162. u32 pending_bh;
  163. int bh_running;
  164. int bh_requested;
  165. int dcd_chkcount; /* check counts to prevent */
  166. int cts_chkcount; /* too many IRQs if a signal */
  167. int dsr_chkcount; /* is floating */
  168. int ri_chkcount;
  169. int rx_enabled;
  170. int rx_overflow;
  171. int tx_enabled;
  172. int tx_active;
  173. int tx_aborting;
  174. u32 idle_mode;
  175. int if_mode; /* serial interface selection (RS-232, v.35 etc) */
  176. char device_name[25]; /* device instance name */
  177. unsigned int io_base; /* base I/O address of adapter */
  178. unsigned int irq_level;
  179. MGSL_PARAMS params; /* communications parameters */
  180. unsigned char serial_signals; /* current serial signal states */
  181. char irq_occurred; /* for diagnostics use */
  182. char testing_irq;
  183. unsigned int init_error; /* startup error (DIAGS) */
  184. char flag_buf[MAX_ASYNC_BUFFER_SIZE];
  185. BOOLEAN drop_rts_on_tx_done;
  186. struct _input_signal_events input_signal_events;
  187. /* PCMCIA support */
  188. dev_link_t link;
  189. dev_node_t node;
  190. int stop;
  191. /* SPPP/Cisco HDLC device parts */
  192. int netcount;
  193. int dosyncppp;
  194. spinlock_t netlock;
  195. #ifdef CONFIG_HDLC
  196. struct net_device *netdev;
  197. #endif
  198. } MGSLPC_INFO;
  199. #define MGSLPC_MAGIC 0x5402
  200. /*
  201. * The size of the serial xmit buffer is 1 page, or 4096 bytes
  202. */
  203. #define TXBUFSIZE 4096
  204. #define CHA 0x00 /* channel A offset */
  205. #define CHB 0x40 /* channel B offset */
  206. /*
  207. * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
  208. */
  209. #undef PVR
  210. #define RXFIFO 0
  211. #define TXFIFO 0
  212. #define STAR 0x20
  213. #define CMDR 0x20
  214. #define RSTA 0x21
  215. #define PRE 0x21
  216. #define MODE 0x22
  217. #define TIMR 0x23
  218. #define XAD1 0x24
  219. #define XAD2 0x25
  220. #define RAH1 0x26
  221. #define RAH2 0x27
  222. #define DAFO 0x27
  223. #define RAL1 0x28
  224. #define RFC 0x28
  225. #define RHCR 0x29
  226. #define RAL2 0x29
  227. #define RBCL 0x2a
  228. #define XBCL 0x2a
  229. #define RBCH 0x2b
  230. #define XBCH 0x2b
  231. #define CCR0 0x2c
  232. #define CCR1 0x2d
  233. #define CCR2 0x2e
  234. #define CCR3 0x2f
  235. #define VSTR 0x34
  236. #define BGR 0x34
  237. #define RLCR 0x35
  238. #define AML 0x36
  239. #define AMH 0x37
  240. #define GIS 0x38
  241. #define IVA 0x38
  242. #define IPC 0x39
  243. #define ISR 0x3a
  244. #define IMR 0x3a
  245. #define PVR 0x3c
  246. #define PIS 0x3d
  247. #define PIM 0x3d
  248. #define PCR 0x3e
  249. #define CCR4 0x3f
  250. // IMR/ISR
  251. #define IRQ_BREAK_ON BIT15 // rx break detected
  252. #define IRQ_DATAOVERRUN BIT14 // receive data overflow
  253. #define IRQ_ALLSENT BIT13 // all sent
  254. #define IRQ_UNDERRUN BIT12 // transmit data underrun
  255. #define IRQ_TIMER BIT11 // timer interrupt
  256. #define IRQ_CTS BIT10 // CTS status change
  257. #define IRQ_TXREPEAT BIT9 // tx message repeat
  258. #define IRQ_TXFIFO BIT8 // transmit pool ready
  259. #define IRQ_RXEOM BIT7 // receive message end
  260. #define IRQ_EXITHUNT BIT6 // receive frame start
  261. #define IRQ_RXTIME BIT6 // rx char timeout
  262. #define IRQ_DCD BIT2 // carrier detect status change
  263. #define IRQ_OVERRUN BIT1 // receive frame overflow
  264. #define IRQ_RXFIFO BIT0 // receive pool full
  265. // STAR
  266. #define XFW BIT6 // transmit FIFO write enable
  267. #define CEC BIT2 // command executing
  268. #define CTS BIT1 // CTS state
  269. #define PVR_DTR BIT0
  270. #define PVR_DSR BIT1
  271. #define PVR_RI BIT2
  272. #define PVR_AUTOCTS BIT3
  273. #define PVR_RS232 0x20 /* 0010b */
  274. #define PVR_V35 0xe0 /* 1110b */
  275. #define PVR_RS422 0x40 /* 0100b */
  276. /* Register access functions */
  277. #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
  278. #define read_reg(info, reg) inb((info)->io_base + (reg))
  279. #define read_reg16(info, reg) inw((info)->io_base + (reg))
  280. #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
  281. #define set_reg_bits(info, reg, mask) \
  282. write_reg(info, (reg), \
  283. (unsigned char) (read_reg(info, (reg)) | (mask)))
  284. #define clear_reg_bits(info, reg, mask) \
  285. write_reg(info, (reg), \
  286. (unsigned char) (read_reg(info, (reg)) & ~(mask)))
  287. /*
  288. * interrupt enable/disable routines
  289. */
  290. static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  291. {
  292. if (channel == CHA) {
  293. info->imra_value |= mask;
  294. write_reg16(info, CHA + IMR, info->imra_value);
  295. } else {
  296. info->imrb_value |= mask;
  297. write_reg16(info, CHB + IMR, info->imrb_value);
  298. }
  299. }
  300. static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  301. {
  302. if (channel == CHA) {
  303. info->imra_value &= ~mask;
  304. write_reg16(info, CHA + IMR, info->imra_value);
  305. } else {
  306. info->imrb_value &= ~mask;
  307. write_reg16(info, CHB + IMR, info->imrb_value);
  308. }
  309. }
  310. #define port_irq_disable(info, mask) \
  311. { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
  312. #define port_irq_enable(info, mask) \
  313. { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
  314. static void rx_start(MGSLPC_INFO *info);
  315. static void rx_stop(MGSLPC_INFO *info);
  316. static void tx_start(MGSLPC_INFO *info);
  317. static void tx_stop(MGSLPC_INFO *info);
  318. static void tx_set_idle(MGSLPC_INFO *info);
  319. static void get_signals(MGSLPC_INFO *info);
  320. static void set_signals(MGSLPC_INFO *info);
  321. static void reset_device(MGSLPC_INFO *info);
  322. static void hdlc_mode(MGSLPC_INFO *info);
  323. static void async_mode(MGSLPC_INFO *info);
  324. static void tx_timeout(unsigned long context);
  325. static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
  326. #ifdef CONFIG_HDLC
  327. #define dev_to_port(D) (dev_to_hdlc(D)->priv)
  328. static void hdlcdev_tx_done(MGSLPC_INFO *info);
  329. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
  330. static int hdlcdev_init(MGSLPC_INFO *info);
  331. static void hdlcdev_exit(MGSLPC_INFO *info);
  332. #endif
  333. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
  334. static BOOLEAN register_test(MGSLPC_INFO *info);
  335. static BOOLEAN irq_test(MGSLPC_INFO *info);
  336. static int adapter_test(MGSLPC_INFO *info);
  337. static int claim_resources(MGSLPC_INFO *info);
  338. static void release_resources(MGSLPC_INFO *info);
  339. static void mgslpc_add_device(MGSLPC_INFO *info);
  340. static void mgslpc_remove_device(MGSLPC_INFO *info);
  341. static int rx_get_frame(MGSLPC_INFO *info);
  342. static void rx_reset_buffers(MGSLPC_INFO *info);
  343. static int rx_alloc_buffers(MGSLPC_INFO *info);
  344. static void rx_free_buffers(MGSLPC_INFO *info);
  345. static irqreturn_t mgslpc_isr(int irq, void *dev_id, struct pt_regs * regs);
  346. /*
  347. * Bottom half interrupt handlers
  348. */
  349. static void bh_handler(void* Context);
  350. static void bh_transmit(MGSLPC_INFO *info);
  351. static void bh_status(MGSLPC_INFO *info);
  352. /*
  353. * ioctl handlers
  354. */
  355. static int tiocmget(struct tty_struct *tty, struct file *file);
  356. static int tiocmset(struct tty_struct *tty, struct file *file,
  357. unsigned int set, unsigned int clear);
  358. static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
  359. static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
  360. static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
  361. static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
  362. static int set_txidle(MGSLPC_INFO *info, int idle_mode);
  363. static int set_txenable(MGSLPC_INFO *info, int enable);
  364. static int tx_abort(MGSLPC_INFO *info);
  365. static int set_rxenable(MGSLPC_INFO *info, int enable);
  366. static int wait_events(MGSLPC_INFO *info, int __user *mask);
  367. static MGSLPC_INFO *mgslpc_device_list = NULL;
  368. static int mgslpc_device_count = 0;
  369. /*
  370. * Set this param to non-zero to load eax with the
  371. * .text section address and breakpoint on module load.
  372. * This is useful for use with gdb and add-symbol-file command.
  373. */
  374. static int break_on_load=0;
  375. /*
  376. * Driver major number, defaults to zero to get auto
  377. * assigned major number. May be forced as module parameter.
  378. */
  379. static int ttymajor=0;
  380. static int debug_level = 0;
  381. static int maxframe[MAX_DEVICE_COUNT] = {0,};
  382. static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
  383. module_param(break_on_load, bool, 0);
  384. module_param(ttymajor, int, 0);
  385. module_param(debug_level, int, 0);
  386. module_param_array(maxframe, int, NULL, 0);
  387. module_param_array(dosyncppp, int, NULL, 0);
  388. MODULE_LICENSE("GPL");
  389. static char *driver_name = "SyncLink PC Card driver";
  390. static char *driver_version = "$Revision: 4.34 $";
  391. static struct tty_driver *serial_driver;
  392. /* number of characters left in xmit buffer before we ask for more */
  393. #define WAKEUP_CHARS 256
  394. static void mgslpc_change_params(MGSLPC_INFO *info);
  395. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
  396. /* PCMCIA prototypes */
  397. static void mgslpc_config(dev_link_t *link);
  398. static void mgslpc_release(u_long arg);
  399. static void mgslpc_detach(struct pcmcia_device *p_dev);
  400. /*
  401. * 1st function defined in .text section. Calling this function in
  402. * init_module() followed by a breakpoint allows a remote debugger
  403. * (gdb) to get the .text address for the add-symbol-file command.
  404. * This allows remote debugging of dynamically loadable modules.
  405. */
  406. static void* mgslpc_get_text_ptr(void)
  407. {
  408. return mgslpc_get_text_ptr;
  409. }
  410. /**
  411. * line discipline callback wrappers
  412. *
  413. * The wrappers maintain line discipline references
  414. * while calling into the line discipline.
  415. *
  416. * ldisc_flush_buffer - flush line discipline receive buffers
  417. * ldisc_receive_buf - pass receive data to line discipline
  418. */
  419. static void ldisc_flush_buffer(struct tty_struct *tty)
  420. {
  421. struct tty_ldisc *ld = tty_ldisc_ref(tty);
  422. if (ld) {
  423. if (ld->flush_buffer)
  424. ld->flush_buffer(tty);
  425. tty_ldisc_deref(ld);
  426. }
  427. }
  428. static void ldisc_receive_buf(struct tty_struct *tty,
  429. const __u8 *data, char *flags, int count)
  430. {
  431. struct tty_ldisc *ld;
  432. if (!tty)
  433. return;
  434. ld = tty_ldisc_ref(tty);
  435. if (ld) {
  436. if (ld->receive_buf)
  437. ld->receive_buf(tty, data, flags, count);
  438. tty_ldisc_deref(ld);
  439. }
  440. }
  441. static int mgslpc_attach(struct pcmcia_device *p_dev)
  442. {
  443. MGSLPC_INFO *info;
  444. dev_link_t *link;
  445. if (debug_level >= DEBUG_LEVEL_INFO)
  446. printk("mgslpc_attach\n");
  447. info = (MGSLPC_INFO *)kmalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
  448. if (!info) {
  449. printk("Error can't allocate device instance data\n");
  450. return -ENOMEM;
  451. }
  452. memset(info, 0, sizeof(MGSLPC_INFO));
  453. info->magic = MGSLPC_MAGIC;
  454. INIT_WORK(&info->task, bh_handler, info);
  455. info->max_frame_size = 4096;
  456. info->close_delay = 5*HZ/10;
  457. info->closing_wait = 30*HZ;
  458. init_waitqueue_head(&info->open_wait);
  459. init_waitqueue_head(&info->close_wait);
  460. init_waitqueue_head(&info->status_event_wait_q);
  461. init_waitqueue_head(&info->event_wait_q);
  462. spin_lock_init(&info->lock);
  463. spin_lock_init(&info->netlock);
  464. memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
  465. info->idle_mode = HDLC_TXIDLE_FLAGS;
  466. info->imra_value = 0xffff;
  467. info->imrb_value = 0xffff;
  468. info->pim_value = 0xff;
  469. link = &info->link;
  470. link->priv = info;
  471. /* Initialize the dev_link_t structure */
  472. /* Interrupt setup */
  473. link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
  474. link->irq.IRQInfo1 = IRQ_LEVEL_ID;
  475. link->irq.Handler = NULL;
  476. link->conf.Attributes = 0;
  477. link->conf.Vcc = 50;
  478. link->conf.IntType = INT_MEMORY_AND_IO;
  479. link->handle = p_dev;
  480. p_dev->instance = link;
  481. link->state |= DEV_PRESENT | DEV_CONFIG_PENDING;
  482. mgslpc_config(link);
  483. mgslpc_add_device(info);
  484. return 0;
  485. }
  486. /* Card has been inserted.
  487. */
  488. #define CS_CHECK(fn, ret) \
  489. do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
  490. static void mgslpc_config(dev_link_t *link)
  491. {
  492. client_handle_t handle = link->handle;
  493. MGSLPC_INFO *info = link->priv;
  494. tuple_t tuple;
  495. cisparse_t parse;
  496. int last_fn, last_ret;
  497. u_char buf[64];
  498. config_info_t conf;
  499. cistpl_cftable_entry_t dflt = { 0 };
  500. cistpl_cftable_entry_t *cfg;
  501. if (debug_level >= DEBUG_LEVEL_INFO)
  502. printk("mgslpc_config(0x%p)\n", link);
  503. /* read CONFIG tuple to find its configuration registers */
  504. tuple.DesiredTuple = CISTPL_CONFIG;
  505. tuple.Attributes = 0;
  506. tuple.TupleData = buf;
  507. tuple.TupleDataMax = sizeof(buf);
  508. tuple.TupleOffset = 0;
  509. CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
  510. CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
  511. CS_CHECK(ParseTuple, pcmcia_parse_tuple(handle, &tuple, &parse));
  512. link->conf.ConfigBase = parse.config.base;
  513. link->conf.Present = parse.config.rmask[0];
  514. /* Configure card */
  515. link->state |= DEV_CONFIG;
  516. /* Look up the current Vcc */
  517. CS_CHECK(GetConfigurationInfo, pcmcia_get_configuration_info(handle, &conf));
  518. link->conf.Vcc = conf.Vcc;
  519. /* get CIS configuration entry */
  520. tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
  521. CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
  522. cfg = &(parse.cftable_entry);
  523. CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
  524. CS_CHECK(ParseTuple, pcmcia_parse_tuple(handle, &tuple, &parse));
  525. if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
  526. if (cfg->index == 0)
  527. goto cs_failed;
  528. link->conf.ConfigIndex = cfg->index;
  529. link->conf.Attributes |= CONF_ENABLE_IRQ;
  530. /* IO window settings */
  531. link->io.NumPorts1 = 0;
  532. if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
  533. cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
  534. link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
  535. if (!(io->flags & CISTPL_IO_8BIT))
  536. link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
  537. if (!(io->flags & CISTPL_IO_16BIT))
  538. link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
  539. link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
  540. link->io.BasePort1 = io->win[0].base;
  541. link->io.NumPorts1 = io->win[0].len;
  542. CS_CHECK(RequestIO, pcmcia_request_io(link->handle, &link->io));
  543. }
  544. link->conf.Attributes = CONF_ENABLE_IRQ;
  545. link->conf.Vcc = 50;
  546. link->conf.IntType = INT_MEMORY_AND_IO;
  547. link->conf.ConfigIndex = 8;
  548. link->conf.Present = PRESENT_OPTION;
  549. link->irq.Attributes |= IRQ_HANDLE_PRESENT;
  550. link->irq.Handler = mgslpc_isr;
  551. link->irq.Instance = info;
  552. CS_CHECK(RequestIRQ, pcmcia_request_irq(link->handle, &link->irq));
  553. CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link->handle, &link->conf));
  554. info->io_base = link->io.BasePort1;
  555. info->irq_level = link->irq.AssignedIRQ;
  556. /* add to linked list of devices */
  557. sprintf(info->node.dev_name, "mgslpc0");
  558. info->node.major = info->node.minor = 0;
  559. link->dev = &info->node;
  560. printk(KERN_INFO "%s: index 0x%02x:",
  561. info->node.dev_name, link->conf.ConfigIndex);
  562. if (link->conf.Attributes & CONF_ENABLE_IRQ)
  563. printk(", irq %d", link->irq.AssignedIRQ);
  564. if (link->io.NumPorts1)
  565. printk(", io 0x%04x-0x%04x", link->io.BasePort1,
  566. link->io.BasePort1+link->io.NumPorts1-1);
  567. printk("\n");
  568. link->state &= ~DEV_CONFIG_PENDING;
  569. return;
  570. cs_failed:
  571. cs_error(link->handle, last_fn, last_ret);
  572. mgslpc_release((u_long)link);
  573. }
  574. /* Card has been removed.
  575. * Unregister device and release PCMCIA configuration.
  576. * If device is open, postpone until it is closed.
  577. */
  578. static void mgslpc_release(u_long arg)
  579. {
  580. dev_link_t *link = (dev_link_t *)arg;
  581. if (debug_level >= DEBUG_LEVEL_INFO)
  582. printk("mgslpc_release(0x%p)\n", link);
  583. /* Unlink the device chain */
  584. link->dev = NULL;
  585. link->state &= ~DEV_CONFIG;
  586. pcmcia_release_configuration(link->handle);
  587. if (link->io.NumPorts1)
  588. pcmcia_release_io(link->handle, &link->io);
  589. if (link->irq.AssignedIRQ)
  590. pcmcia_release_irq(link->handle, &link->irq);
  591. }
  592. static void mgslpc_detach(struct pcmcia_device *p_dev)
  593. {
  594. dev_link_t *link = dev_to_instance(p_dev);
  595. if (debug_level >= DEBUG_LEVEL_INFO)
  596. printk("mgslpc_detach(0x%p)\n", link);
  597. if (link->state & DEV_CONFIG) {
  598. ((MGSLPC_INFO *)link->priv)->stop = 1;
  599. mgslpc_release((u_long)link);
  600. }
  601. mgslpc_remove_device((MGSLPC_INFO *)link->priv);
  602. }
  603. static int mgslpc_suspend(struct pcmcia_device *dev)
  604. {
  605. dev_link_t *link = dev_to_instance(dev);
  606. MGSLPC_INFO *info = link->priv;
  607. link->state |= DEV_SUSPEND;
  608. info->stop = 1;
  609. if (link->state & DEV_CONFIG)
  610. pcmcia_release_configuration(link->handle);
  611. return 0;
  612. }
  613. static int mgslpc_resume(struct pcmcia_device *dev)
  614. {
  615. dev_link_t *link = dev_to_instance(dev);
  616. MGSLPC_INFO *info = link->priv;
  617. link->state &= ~DEV_SUSPEND;
  618. if (link->state & DEV_CONFIG)
  619. pcmcia_request_configuration(link->handle, &link->conf);
  620. info->stop = 0;
  621. return 0;
  622. }
  623. static inline int mgslpc_paranoia_check(MGSLPC_INFO *info,
  624. char *name, const char *routine)
  625. {
  626. #ifdef MGSLPC_PARANOIA_CHECK
  627. static const char *badmagic =
  628. "Warning: bad magic number for mgsl struct (%s) in %s\n";
  629. static const char *badinfo =
  630. "Warning: null mgslpc_info for (%s) in %s\n";
  631. if (!info) {
  632. printk(badinfo, name, routine);
  633. return 1;
  634. }
  635. if (info->magic != MGSLPC_MAGIC) {
  636. printk(badmagic, name, routine);
  637. return 1;
  638. }
  639. #else
  640. if (!info)
  641. return 1;
  642. #endif
  643. return 0;
  644. }
  645. #define CMD_RXFIFO BIT7 // release current rx FIFO
  646. #define CMD_RXRESET BIT6 // receiver reset
  647. #define CMD_RXFIFO_READ BIT5
  648. #define CMD_START_TIMER BIT4
  649. #define CMD_TXFIFO BIT3 // release current tx FIFO
  650. #define CMD_TXEOM BIT1 // transmit end message
  651. #define CMD_TXRESET BIT0 // transmit reset
  652. static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
  653. {
  654. int i = 0;
  655. /* wait for command completion */
  656. while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
  657. udelay(1);
  658. if (i++ == 1000)
  659. return FALSE;
  660. }
  661. return TRUE;
  662. }
  663. static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
  664. {
  665. wait_command_complete(info, channel);
  666. write_reg(info, (unsigned char) (channel + CMDR), cmd);
  667. }
  668. static void tx_pause(struct tty_struct *tty)
  669. {
  670. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  671. unsigned long flags;
  672. if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
  673. return;
  674. if (debug_level >= DEBUG_LEVEL_INFO)
  675. printk("tx_pause(%s)\n",info->device_name);
  676. spin_lock_irqsave(&info->lock,flags);
  677. if (info->tx_enabled)
  678. tx_stop(info);
  679. spin_unlock_irqrestore(&info->lock,flags);
  680. }
  681. static void tx_release(struct tty_struct *tty)
  682. {
  683. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  684. unsigned long flags;
  685. if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
  686. return;
  687. if (debug_level >= DEBUG_LEVEL_INFO)
  688. printk("tx_release(%s)\n",info->device_name);
  689. spin_lock_irqsave(&info->lock,flags);
  690. if (!info->tx_enabled)
  691. tx_start(info);
  692. spin_unlock_irqrestore(&info->lock,flags);
  693. }
  694. /* Return next bottom half action to perform.
  695. * or 0 if nothing to do.
  696. */
  697. static int bh_action(MGSLPC_INFO *info)
  698. {
  699. unsigned long flags;
  700. int rc = 0;
  701. spin_lock_irqsave(&info->lock,flags);
  702. if (info->pending_bh & BH_RECEIVE) {
  703. info->pending_bh &= ~BH_RECEIVE;
  704. rc = BH_RECEIVE;
  705. } else if (info->pending_bh & BH_TRANSMIT) {
  706. info->pending_bh &= ~BH_TRANSMIT;
  707. rc = BH_TRANSMIT;
  708. } else if (info->pending_bh & BH_STATUS) {
  709. info->pending_bh &= ~BH_STATUS;
  710. rc = BH_STATUS;
  711. }
  712. if (!rc) {
  713. /* Mark BH routine as complete */
  714. info->bh_running = 0;
  715. info->bh_requested = 0;
  716. }
  717. spin_unlock_irqrestore(&info->lock,flags);
  718. return rc;
  719. }
  720. void bh_handler(void* Context)
  721. {
  722. MGSLPC_INFO *info = (MGSLPC_INFO*)Context;
  723. int action;
  724. if (!info)
  725. return;
  726. if (debug_level >= DEBUG_LEVEL_BH)
  727. printk( "%s(%d):bh_handler(%s) entry\n",
  728. __FILE__,__LINE__,info->device_name);
  729. info->bh_running = 1;
  730. while((action = bh_action(info)) != 0) {
  731. /* Process work item */
  732. if ( debug_level >= DEBUG_LEVEL_BH )
  733. printk( "%s(%d):bh_handler() work item action=%d\n",
  734. __FILE__,__LINE__,action);
  735. switch (action) {
  736. case BH_RECEIVE:
  737. while(rx_get_frame(info));
  738. break;
  739. case BH_TRANSMIT:
  740. bh_transmit(info);
  741. break;
  742. case BH_STATUS:
  743. bh_status(info);
  744. break;
  745. default:
  746. /* unknown work item ID */
  747. printk("Unknown work item ID=%08X!\n", action);
  748. break;
  749. }
  750. }
  751. if (debug_level >= DEBUG_LEVEL_BH)
  752. printk( "%s(%d):bh_handler(%s) exit\n",
  753. __FILE__,__LINE__,info->device_name);
  754. }
  755. void bh_transmit(MGSLPC_INFO *info)
  756. {
  757. struct tty_struct *tty = info->tty;
  758. if (debug_level >= DEBUG_LEVEL_BH)
  759. printk("bh_transmit() entry on %s\n", info->device_name);
  760. if (tty) {
  761. tty_wakeup(tty);
  762. wake_up_interruptible(&tty->write_wait);
  763. }
  764. }
  765. void bh_status(MGSLPC_INFO *info)
  766. {
  767. info->ri_chkcount = 0;
  768. info->dsr_chkcount = 0;
  769. info->dcd_chkcount = 0;
  770. info->cts_chkcount = 0;
  771. }
  772. /* eom: non-zero = end of frame */
  773. static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
  774. {
  775. unsigned char data[2];
  776. unsigned char fifo_count, read_count, i;
  777. RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
  778. if (debug_level >= DEBUG_LEVEL_ISR)
  779. printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
  780. if (!info->rx_enabled)
  781. return;
  782. if (info->rx_frame_count >= info->rx_buf_count) {
  783. /* no more free buffers */
  784. issue_command(info, CHA, CMD_RXRESET);
  785. info->pending_bh |= BH_RECEIVE;
  786. info->rx_overflow = 1;
  787. info->icount.buf_overrun++;
  788. return;
  789. }
  790. if (eom) {
  791. /* end of frame, get FIFO count from RBCL register */
  792. if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
  793. fifo_count = 32;
  794. } else
  795. fifo_count = 32;
  796. do {
  797. if (fifo_count == 1) {
  798. read_count = 1;
  799. data[0] = read_reg(info, CHA + RXFIFO);
  800. } else {
  801. read_count = 2;
  802. *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
  803. }
  804. fifo_count -= read_count;
  805. if (!fifo_count && eom)
  806. buf->status = data[--read_count];
  807. for (i = 0; i < read_count; i++) {
  808. if (buf->count >= info->max_frame_size) {
  809. /* frame too large, reset receiver and reset current buffer */
  810. issue_command(info, CHA, CMD_RXRESET);
  811. buf->count = 0;
  812. return;
  813. }
  814. *(buf->data + buf->count) = data[i];
  815. buf->count++;
  816. }
  817. } while (fifo_count);
  818. if (eom) {
  819. info->pending_bh |= BH_RECEIVE;
  820. info->rx_frame_count++;
  821. info->rx_put++;
  822. if (info->rx_put >= info->rx_buf_count)
  823. info->rx_put = 0;
  824. }
  825. issue_command(info, CHA, CMD_RXFIFO);
  826. }
  827. static void rx_ready_async(MGSLPC_INFO *info, int tcd)
  828. {
  829. unsigned char data, status, flag;
  830. int fifo_count;
  831. int work = 0;
  832. struct tty_struct *tty = info->tty;
  833. struct mgsl_icount *icount = &info->icount;
  834. if (tcd) {
  835. /* early termination, get FIFO count from RBCL register */
  836. fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
  837. /* Zero fifo count could mean 0 or 32 bytes available.
  838. * If BIT5 of STAR is set then at least 1 byte is available.
  839. */
  840. if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
  841. fifo_count = 32;
  842. } else
  843. fifo_count = 32;
  844. tty_buffer_request_room(tty, fifo_count);
  845. /* Flush received async data to receive data buffer. */
  846. while (fifo_count) {
  847. data = read_reg(info, CHA + RXFIFO);
  848. status = read_reg(info, CHA + RXFIFO);
  849. fifo_count -= 2;
  850. icount->rx++;
  851. flag = TTY_NORMAL;
  852. // if no frameing/crc error then save data
  853. // BIT7:parity error
  854. // BIT6:framing error
  855. if (status & (BIT7 + BIT6)) {
  856. if (status & BIT7)
  857. icount->parity++;
  858. else
  859. icount->frame++;
  860. /* discard char if tty control flags say so */
  861. if (status & info->ignore_status_mask)
  862. continue;
  863. status &= info->read_status_mask;
  864. if (status & BIT7)
  865. flag = TTY_PARITY;
  866. else if (status & BIT6)
  867. flag = TTY_FRAME;
  868. }
  869. work += tty_insert_flip_char(tty, data, flag);
  870. }
  871. issue_command(info, CHA, CMD_RXFIFO);
  872. if (debug_level >= DEBUG_LEVEL_ISR) {
  873. printk("%s(%d):rx_ready_async",
  874. __FILE__,__LINE__);
  875. printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
  876. __FILE__,__LINE__,icount->rx,icount->brk,
  877. icount->parity,icount->frame,icount->overrun);
  878. }
  879. if (work)
  880. tty_flip_buffer_push(tty);
  881. }
  882. static void tx_done(MGSLPC_INFO *info)
  883. {
  884. if (!info->tx_active)
  885. return;
  886. info->tx_active = 0;
  887. info->tx_aborting = 0;
  888. if (info->params.mode == MGSL_MODE_ASYNC)
  889. return;
  890. info->tx_count = info->tx_put = info->tx_get = 0;
  891. del_timer(&info->tx_timer);
  892. if (info->drop_rts_on_tx_done) {
  893. get_signals(info);
  894. if (info->serial_signals & SerialSignal_RTS) {
  895. info->serial_signals &= ~SerialSignal_RTS;
  896. set_signals(info);
  897. }
  898. info->drop_rts_on_tx_done = 0;
  899. }
  900. #ifdef CONFIG_HDLC
  901. if (info->netcount)
  902. hdlcdev_tx_done(info);
  903. else
  904. #endif
  905. {
  906. if (info->tty->stopped || info->tty->hw_stopped) {
  907. tx_stop(info);
  908. return;
  909. }
  910. info->pending_bh |= BH_TRANSMIT;
  911. }
  912. }
  913. static void tx_ready(MGSLPC_INFO *info)
  914. {
  915. unsigned char fifo_count = 32;
  916. int c;
  917. if (debug_level >= DEBUG_LEVEL_ISR)
  918. printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
  919. if (info->params.mode == MGSL_MODE_HDLC) {
  920. if (!info->tx_active)
  921. return;
  922. } else {
  923. if (info->tty->stopped || info->tty->hw_stopped) {
  924. tx_stop(info);
  925. return;
  926. }
  927. if (!info->tx_count)
  928. info->tx_active = 0;
  929. }
  930. if (!info->tx_count)
  931. return;
  932. while (info->tx_count && fifo_count) {
  933. c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
  934. if (c == 1) {
  935. write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
  936. } else {
  937. write_reg16(info, CHA + TXFIFO,
  938. *((unsigned short*)(info->tx_buf + info->tx_get)));
  939. }
  940. info->tx_count -= c;
  941. info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
  942. fifo_count -= c;
  943. }
  944. if (info->params.mode == MGSL_MODE_ASYNC) {
  945. if (info->tx_count < WAKEUP_CHARS)
  946. info->pending_bh |= BH_TRANSMIT;
  947. issue_command(info, CHA, CMD_TXFIFO);
  948. } else {
  949. if (info->tx_count)
  950. issue_command(info, CHA, CMD_TXFIFO);
  951. else
  952. issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
  953. }
  954. }
  955. static void cts_change(MGSLPC_INFO *info)
  956. {
  957. get_signals(info);
  958. if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  959. irq_disable(info, CHB, IRQ_CTS);
  960. info->icount.cts++;
  961. if (info->serial_signals & SerialSignal_CTS)
  962. info->input_signal_events.cts_up++;
  963. else
  964. info->input_signal_events.cts_down++;
  965. wake_up_interruptible(&info->status_event_wait_q);
  966. wake_up_interruptible(&info->event_wait_q);
  967. if (info->flags & ASYNC_CTS_FLOW) {
  968. if (info->tty->hw_stopped) {
  969. if (info->serial_signals & SerialSignal_CTS) {
  970. if (debug_level >= DEBUG_LEVEL_ISR)
  971. printk("CTS tx start...");
  972. if (info->tty)
  973. info->tty->hw_stopped = 0;
  974. tx_start(info);
  975. info->pending_bh |= BH_TRANSMIT;
  976. return;
  977. }
  978. } else {
  979. if (!(info->serial_signals & SerialSignal_CTS)) {
  980. if (debug_level >= DEBUG_LEVEL_ISR)
  981. printk("CTS tx stop...");
  982. if (info->tty)
  983. info->tty->hw_stopped = 1;
  984. tx_stop(info);
  985. }
  986. }
  987. }
  988. info->pending_bh |= BH_STATUS;
  989. }
  990. static void dcd_change(MGSLPC_INFO *info)
  991. {
  992. get_signals(info);
  993. if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  994. irq_disable(info, CHB, IRQ_DCD);
  995. info->icount.dcd++;
  996. if (info->serial_signals & SerialSignal_DCD) {
  997. info->input_signal_events.dcd_up++;
  998. }
  999. else
  1000. info->input_signal_events.dcd_down++;
  1001. #ifdef CONFIG_HDLC
  1002. if (info->netcount)
  1003. hdlc_set_carrier(info->serial_signals & SerialSignal_DCD, info->netdev);
  1004. #endif
  1005. wake_up_interruptible(&info->status_event_wait_q);
  1006. wake_up_interruptible(&info->event_wait_q);
  1007. if (info->flags & ASYNC_CHECK_CD) {
  1008. if (debug_level >= DEBUG_LEVEL_ISR)
  1009. printk("%s CD now %s...", info->device_name,
  1010. (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
  1011. if (info->serial_signals & SerialSignal_DCD)
  1012. wake_up_interruptible(&info->open_wait);
  1013. else {
  1014. if (debug_level >= DEBUG_LEVEL_ISR)
  1015. printk("doing serial hangup...");
  1016. if (info->tty)
  1017. tty_hangup(info->tty);
  1018. }
  1019. }
  1020. info->pending_bh |= BH_STATUS;
  1021. }
  1022. static void dsr_change(MGSLPC_INFO *info)
  1023. {
  1024. get_signals(info);
  1025. if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  1026. port_irq_disable(info, PVR_DSR);
  1027. info->icount.dsr++;
  1028. if (info->serial_signals & SerialSignal_DSR)
  1029. info->input_signal_events.dsr_up++;
  1030. else
  1031. info->input_signal_events.dsr_down++;
  1032. wake_up_interruptible(&info->status_event_wait_q);
  1033. wake_up_interruptible(&info->event_wait_q);
  1034. info->pending_bh |= BH_STATUS;
  1035. }
  1036. static void ri_change(MGSLPC_INFO *info)
  1037. {
  1038. get_signals(info);
  1039. if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  1040. port_irq_disable(info, PVR_RI);
  1041. info->icount.rng++;
  1042. if (info->serial_signals & SerialSignal_RI)
  1043. info->input_signal_events.ri_up++;
  1044. else
  1045. info->input_signal_events.ri_down++;
  1046. wake_up_interruptible(&info->status_event_wait_q);
  1047. wake_up_interruptible(&info->event_wait_q);
  1048. info->pending_bh |= BH_STATUS;
  1049. }
  1050. /* Interrupt service routine entry point.
  1051. *
  1052. * Arguments:
  1053. *
  1054. * irq interrupt number that caused interrupt
  1055. * dev_id device ID supplied during interrupt registration
  1056. * regs interrupted processor context
  1057. */
  1058. static irqreturn_t mgslpc_isr(int irq, void *dev_id, struct pt_regs * regs)
  1059. {
  1060. MGSLPC_INFO * info = (MGSLPC_INFO *)dev_id;
  1061. unsigned short isr;
  1062. unsigned char gis, pis;
  1063. int count=0;
  1064. if (debug_level >= DEBUG_LEVEL_ISR)
  1065. printk("mgslpc_isr(%d) entry.\n", irq);
  1066. if (!info)
  1067. return IRQ_NONE;
  1068. if (!(info->link.state & DEV_CONFIG))
  1069. return IRQ_HANDLED;
  1070. spin_lock(&info->lock);
  1071. while ((gis = read_reg(info, CHA + GIS))) {
  1072. if (debug_level >= DEBUG_LEVEL_ISR)
  1073. printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
  1074. if ((gis & 0x70) || count > 1000) {
  1075. printk("synclink_cs:hardware failed or ejected\n");
  1076. break;
  1077. }
  1078. count++;
  1079. if (gis & (BIT1 + BIT0)) {
  1080. isr = read_reg16(info, CHB + ISR);
  1081. if (isr & IRQ_DCD)
  1082. dcd_change(info);
  1083. if (isr & IRQ_CTS)
  1084. cts_change(info);
  1085. }
  1086. if (gis & (BIT3 + BIT2))
  1087. {
  1088. isr = read_reg16(info, CHA + ISR);
  1089. if (isr & IRQ_TIMER) {
  1090. info->irq_occurred = 1;
  1091. irq_disable(info, CHA, IRQ_TIMER);
  1092. }
  1093. /* receive IRQs */
  1094. if (isr & IRQ_EXITHUNT) {
  1095. info->icount.exithunt++;
  1096. wake_up_interruptible(&info->event_wait_q);
  1097. }
  1098. if (isr & IRQ_BREAK_ON) {
  1099. info->icount.brk++;
  1100. if (info->flags & ASYNC_SAK)
  1101. do_SAK(info->tty);
  1102. }
  1103. if (isr & IRQ_RXTIME) {
  1104. issue_command(info, CHA, CMD_RXFIFO_READ);
  1105. }
  1106. if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
  1107. if (info->params.mode == MGSL_MODE_HDLC)
  1108. rx_ready_hdlc(info, isr & IRQ_RXEOM);
  1109. else
  1110. rx_ready_async(info, isr & IRQ_RXEOM);
  1111. }
  1112. /* transmit IRQs */
  1113. if (isr & IRQ_UNDERRUN) {
  1114. if (info->tx_aborting)
  1115. info->icount.txabort++;
  1116. else
  1117. info->icount.txunder++;
  1118. tx_done(info);
  1119. }
  1120. else if (isr & IRQ_ALLSENT) {
  1121. info->icount.txok++;
  1122. tx_done(info);
  1123. }
  1124. else if (isr & IRQ_TXFIFO)
  1125. tx_ready(info);
  1126. }
  1127. if (gis & BIT7) {
  1128. pis = read_reg(info, CHA + PIS);
  1129. if (pis & BIT1)
  1130. dsr_change(info);
  1131. if (pis & BIT2)
  1132. ri_change(info);
  1133. }
  1134. }
  1135. /* Request bottom half processing if there's something
  1136. * for it to do and the bh is not already running
  1137. */
  1138. if (info->pending_bh && !info->bh_running && !info->bh_requested) {
  1139. if ( debug_level >= DEBUG_LEVEL_ISR )
  1140. printk("%s(%d):%s queueing bh task.\n",
  1141. __FILE__,__LINE__,info->device_name);
  1142. schedule_work(&info->task);
  1143. info->bh_requested = 1;
  1144. }
  1145. spin_unlock(&info->lock);
  1146. if (debug_level >= DEBUG_LEVEL_ISR)
  1147. printk("%s(%d):mgslpc_isr(%d)exit.\n",
  1148. __FILE__,__LINE__,irq);
  1149. return IRQ_HANDLED;
  1150. }
  1151. /* Initialize and start device.
  1152. */
  1153. static int startup(MGSLPC_INFO * info)
  1154. {
  1155. int retval = 0;
  1156. if (debug_level >= DEBUG_LEVEL_INFO)
  1157. printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
  1158. if (info->flags & ASYNC_INITIALIZED)
  1159. return 0;
  1160. if (!info->tx_buf) {
  1161. /* allocate a page of memory for a transmit buffer */
  1162. info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
  1163. if (!info->tx_buf) {
  1164. printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
  1165. __FILE__,__LINE__,info->device_name);
  1166. return -ENOMEM;
  1167. }
  1168. }
  1169. info->pending_bh = 0;
  1170. memset(&info->icount, 0, sizeof(info->icount));
  1171. init_timer(&info->tx_timer);
  1172. info->tx_timer.data = (unsigned long)info;
  1173. info->tx_timer.function = tx_timeout;
  1174. /* Allocate and claim adapter resources */
  1175. retval = claim_resources(info);
  1176. /* perform existance check and diagnostics */
  1177. if ( !retval )
  1178. retval = adapter_test(info);
  1179. if ( retval ) {
  1180. if (capable(CAP_SYS_ADMIN) && info->tty)
  1181. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1182. release_resources(info);
  1183. return retval;
  1184. }
  1185. /* program hardware for current parameters */
  1186. mgslpc_change_params(info);
  1187. if (info->tty)
  1188. clear_bit(TTY_IO_ERROR, &info->tty->flags);
  1189. info->flags |= ASYNC_INITIALIZED;
  1190. return 0;
  1191. }
  1192. /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
  1193. */
  1194. static void shutdown(MGSLPC_INFO * info)
  1195. {
  1196. unsigned long flags;
  1197. if (!(info->flags & ASYNC_INITIALIZED))
  1198. return;
  1199. if (debug_level >= DEBUG_LEVEL_INFO)
  1200. printk("%s(%d):mgslpc_shutdown(%s)\n",
  1201. __FILE__,__LINE__, info->device_name );
  1202. /* clear status wait queue because status changes */
  1203. /* can't happen after shutting down the hardware */
  1204. wake_up_interruptible(&info->status_event_wait_q);
  1205. wake_up_interruptible(&info->event_wait_q);
  1206. del_timer(&info->tx_timer);
  1207. if (info->tx_buf) {
  1208. free_page((unsigned long) info->tx_buf);
  1209. info->tx_buf = NULL;
  1210. }
  1211. spin_lock_irqsave(&info->lock,flags);
  1212. rx_stop(info);
  1213. tx_stop(info);
  1214. /* TODO:disable interrupts instead of reset to preserve signal states */
  1215. reset_device(info);
  1216. if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
  1217. info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
  1218. set_signals(info);
  1219. }
  1220. spin_unlock_irqrestore(&info->lock,flags);
  1221. release_resources(info);
  1222. if (info->tty)
  1223. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1224. info->flags &= ~ASYNC_INITIALIZED;
  1225. }
  1226. static void mgslpc_program_hw(MGSLPC_INFO *info)
  1227. {
  1228. unsigned long flags;
  1229. spin_lock_irqsave(&info->lock,flags);
  1230. rx_stop(info);
  1231. tx_stop(info);
  1232. info->tx_count = info->tx_put = info->tx_get = 0;
  1233. if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
  1234. hdlc_mode(info);
  1235. else
  1236. async_mode(info);
  1237. set_signals(info);
  1238. info->dcd_chkcount = 0;
  1239. info->cts_chkcount = 0;
  1240. info->ri_chkcount = 0;
  1241. info->dsr_chkcount = 0;
  1242. irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
  1243. port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
  1244. get_signals(info);
  1245. if (info->netcount || info->tty->termios->c_cflag & CREAD)
  1246. rx_start(info);
  1247. spin_unlock_irqrestore(&info->lock,flags);
  1248. }
  1249. /* Reconfigure adapter based on new parameters
  1250. */
  1251. static void mgslpc_change_params(MGSLPC_INFO *info)
  1252. {
  1253. unsigned cflag;
  1254. int bits_per_char;
  1255. if (!info->tty || !info->tty->termios)
  1256. return;
  1257. if (debug_level >= DEBUG_LEVEL_INFO)
  1258. printk("%s(%d):mgslpc_change_params(%s)\n",
  1259. __FILE__,__LINE__, info->device_name );
  1260. cflag = info->tty->termios->c_cflag;
  1261. /* if B0 rate (hangup) specified then negate DTR and RTS */
  1262. /* otherwise assert DTR and RTS */
  1263. if (cflag & CBAUD)
  1264. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  1265. else
  1266. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1267. /* byte size and parity */
  1268. switch (cflag & CSIZE) {
  1269. case CS5: info->params.data_bits = 5; break;
  1270. case CS6: info->params.data_bits = 6; break;
  1271. case CS7: info->params.data_bits = 7; break;
  1272. case CS8: info->params.data_bits = 8; break;
  1273. default: info->params.data_bits = 7; break;
  1274. }
  1275. if (cflag & CSTOPB)
  1276. info->params.stop_bits = 2;
  1277. else
  1278. info->params.stop_bits = 1;
  1279. info->params.parity = ASYNC_PARITY_NONE;
  1280. if (cflag & PARENB) {
  1281. if (cflag & PARODD)
  1282. info->params.parity = ASYNC_PARITY_ODD;
  1283. else
  1284. info->params.parity = ASYNC_PARITY_EVEN;
  1285. #ifdef CMSPAR
  1286. if (cflag & CMSPAR)
  1287. info->params.parity = ASYNC_PARITY_SPACE;
  1288. #endif
  1289. }
  1290. /* calculate number of jiffies to transmit a full
  1291. * FIFO (32 bytes) at specified data rate
  1292. */
  1293. bits_per_char = info->params.data_bits +
  1294. info->params.stop_bits + 1;
  1295. /* if port data rate is set to 460800 or less then
  1296. * allow tty settings to override, otherwise keep the
  1297. * current data rate.
  1298. */
  1299. if (info->params.data_rate <= 460800) {
  1300. info->params.data_rate = tty_get_baud_rate(info->tty);
  1301. }
  1302. if ( info->params.data_rate ) {
  1303. info->timeout = (32*HZ*bits_per_char) /
  1304. info->params.data_rate;
  1305. }
  1306. info->timeout += HZ/50; /* Add .02 seconds of slop */
  1307. if (cflag & CRTSCTS)
  1308. info->flags |= ASYNC_CTS_FLOW;
  1309. else
  1310. info->flags &= ~ASYNC_CTS_FLOW;
  1311. if (cflag & CLOCAL)
  1312. info->flags &= ~ASYNC_CHECK_CD;
  1313. else
  1314. info->flags |= ASYNC_CHECK_CD;
  1315. /* process tty input control flags */
  1316. info->read_status_mask = 0;
  1317. if (I_INPCK(info->tty))
  1318. info->read_status_mask |= BIT7 | BIT6;
  1319. if (I_IGNPAR(info->tty))
  1320. info->ignore_status_mask |= BIT7 | BIT6;
  1321. mgslpc_program_hw(info);
  1322. }
  1323. /* Add a character to the transmit buffer
  1324. */
  1325. static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
  1326. {
  1327. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1328. unsigned long flags;
  1329. if (debug_level >= DEBUG_LEVEL_INFO) {
  1330. printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
  1331. __FILE__,__LINE__,ch,info->device_name);
  1332. }
  1333. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
  1334. return;
  1335. if (!tty || !info->tx_buf)
  1336. return;
  1337. spin_lock_irqsave(&info->lock,flags);
  1338. if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
  1339. if (info->tx_count < TXBUFSIZE - 1) {
  1340. info->tx_buf[info->tx_put++] = ch;
  1341. info->tx_put &= TXBUFSIZE-1;
  1342. info->tx_count++;
  1343. }
  1344. }
  1345. spin_unlock_irqrestore(&info->lock,flags);
  1346. }
  1347. /* Enable transmitter so remaining characters in the
  1348. * transmit buffer are sent.
  1349. */
  1350. static void mgslpc_flush_chars(struct tty_struct *tty)
  1351. {
  1352. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1353. unsigned long flags;
  1354. if (debug_level >= DEBUG_LEVEL_INFO)
  1355. printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
  1356. __FILE__,__LINE__,info->device_name,info->tx_count);
  1357. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
  1358. return;
  1359. if (info->tx_count <= 0 || tty->stopped ||
  1360. tty->hw_stopped || !info->tx_buf)
  1361. return;
  1362. if (debug_level >= DEBUG_LEVEL_INFO)
  1363. printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
  1364. __FILE__,__LINE__,info->device_name);
  1365. spin_lock_irqsave(&info->lock,flags);
  1366. if (!info->tx_active)
  1367. tx_start(info);
  1368. spin_unlock_irqrestore(&info->lock,flags);
  1369. }
  1370. /* Send a block of data
  1371. *
  1372. * Arguments:
  1373. *
  1374. * tty pointer to tty information structure
  1375. * buf pointer to buffer containing send data
  1376. * count size of send data in bytes
  1377. *
  1378. * Returns: number of characters written
  1379. */
  1380. static int mgslpc_write(struct tty_struct * tty,
  1381. const unsigned char *buf, int count)
  1382. {
  1383. int c, ret = 0;
  1384. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1385. unsigned long flags;
  1386. if (debug_level >= DEBUG_LEVEL_INFO)
  1387. printk( "%s(%d):mgslpc_write(%s) count=%d\n",
  1388. __FILE__,__LINE__,info->device_name,count);
  1389. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
  1390. !tty || !info->tx_buf)
  1391. goto cleanup;
  1392. if (info->params.mode == MGSL_MODE_HDLC) {
  1393. if (count > TXBUFSIZE) {
  1394. ret = -EIO;
  1395. goto cleanup;
  1396. }
  1397. if (info->tx_active)
  1398. goto cleanup;
  1399. else if (info->tx_count)
  1400. goto start;
  1401. }
  1402. for (;;) {
  1403. c = min(count,
  1404. min(TXBUFSIZE - info->tx_count - 1,
  1405. TXBUFSIZE - info->tx_put));
  1406. if (c <= 0)
  1407. break;
  1408. memcpy(info->tx_buf + info->tx_put, buf, c);
  1409. spin_lock_irqsave(&info->lock,flags);
  1410. info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
  1411. info->tx_count += c;
  1412. spin_unlock_irqrestore(&info->lock,flags);
  1413. buf += c;
  1414. count -= c;
  1415. ret += c;
  1416. }
  1417. start:
  1418. if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
  1419. spin_lock_irqsave(&info->lock,flags);
  1420. if (!info->tx_active)
  1421. tx_start(info);
  1422. spin_unlock_irqrestore(&info->lock,flags);
  1423. }
  1424. cleanup:
  1425. if (debug_level >= DEBUG_LEVEL_INFO)
  1426. printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
  1427. __FILE__,__LINE__,info->device_name,ret);
  1428. return ret;
  1429. }
  1430. /* Return the count of free bytes in transmit buffer
  1431. */
  1432. static int mgslpc_write_room(struct tty_struct *tty)
  1433. {
  1434. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1435. int ret;
  1436. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
  1437. return 0;
  1438. if (info->params.mode == MGSL_MODE_HDLC) {
  1439. /* HDLC (frame oriented) mode */
  1440. if (info->tx_active)
  1441. return 0;
  1442. else
  1443. return HDLC_MAX_FRAME_SIZE;
  1444. } else {
  1445. ret = TXBUFSIZE - info->tx_count - 1;
  1446. if (ret < 0)
  1447. ret = 0;
  1448. }
  1449. if (debug_level >= DEBUG_LEVEL_INFO)
  1450. printk("%s(%d):mgslpc_write_room(%s)=%d\n",
  1451. __FILE__,__LINE__, info->device_name, ret);
  1452. return ret;
  1453. }
  1454. /* Return the count of bytes in transmit buffer
  1455. */
  1456. static int mgslpc_chars_in_buffer(struct tty_struct *tty)
  1457. {
  1458. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1459. int rc;
  1460. if (debug_level >= DEBUG_LEVEL_INFO)
  1461. printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
  1462. __FILE__,__LINE__, info->device_name );
  1463. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
  1464. return 0;
  1465. if (info->params.mode == MGSL_MODE_HDLC)
  1466. rc = info->tx_active ? info->max_frame_size : 0;
  1467. else
  1468. rc = info->tx_count;
  1469. if (debug_level >= DEBUG_LEVEL_INFO)
  1470. printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
  1471. __FILE__,__LINE__, info->device_name, rc);
  1472. return rc;
  1473. }
  1474. /* Discard all data in the send buffer
  1475. */
  1476. static void mgslpc_flush_buffer(struct tty_struct *tty)
  1477. {
  1478. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1479. unsigned long flags;
  1480. if (debug_level >= DEBUG_LEVEL_INFO)
  1481. printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
  1482. __FILE__,__LINE__, info->device_name );
  1483. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
  1484. return;
  1485. spin_lock_irqsave(&info->lock,flags);
  1486. info->tx_count = info->tx_put = info->tx_get = 0;
  1487. del_timer(&info->tx_timer);
  1488. spin_unlock_irqrestore(&info->lock,flags);
  1489. wake_up_interruptible(&tty->write_wait);
  1490. tty_wakeup(tty);
  1491. }
  1492. /* Send a high-priority XON/XOFF character
  1493. */
  1494. static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
  1495. {
  1496. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1497. unsigned long flags;
  1498. if (debug_level >= DEBUG_LEVEL_INFO)
  1499. printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
  1500. __FILE__,__LINE__, info->device_name, ch );
  1501. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
  1502. return;
  1503. info->x_char = ch;
  1504. if (ch) {
  1505. spin_lock_irqsave(&info->lock,flags);
  1506. if (!info->tx_enabled)
  1507. tx_start(info);
  1508. spin_unlock_irqrestore(&info->lock,flags);
  1509. }
  1510. }
  1511. /* Signal remote device to throttle send data (our receive data)
  1512. */
  1513. static void mgslpc_throttle(struct tty_struct * tty)
  1514. {
  1515. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1516. unsigned long flags;
  1517. if (debug_level >= DEBUG_LEVEL_INFO)
  1518. printk("%s(%d):mgslpc_throttle(%s) entry\n",
  1519. __FILE__,__LINE__, info->device_name );
  1520. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
  1521. return;
  1522. if (I_IXOFF(tty))
  1523. mgslpc_send_xchar(tty, STOP_CHAR(tty));
  1524. if (tty->termios->c_cflag & CRTSCTS) {
  1525. spin_lock_irqsave(&info->lock,flags);
  1526. info->serial_signals &= ~SerialSignal_RTS;
  1527. set_signals(info);
  1528. spin_unlock_irqrestore(&info->lock,flags);
  1529. }
  1530. }
  1531. /* Signal remote device to stop throttling send data (our receive data)
  1532. */
  1533. static void mgslpc_unthrottle(struct tty_struct * tty)
  1534. {
  1535. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1536. unsigned long flags;
  1537. if (debug_level >= DEBUG_LEVEL_INFO)
  1538. printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
  1539. __FILE__,__LINE__, info->device_name );
  1540. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
  1541. return;
  1542. if (I_IXOFF(tty)) {
  1543. if (info->x_char)
  1544. info->x_char = 0;
  1545. else
  1546. mgslpc_send_xchar(tty, START_CHAR(tty));
  1547. }
  1548. if (tty->termios->c_cflag & CRTSCTS) {
  1549. spin_lock_irqsave(&info->lock,flags);
  1550. info->serial_signals |= SerialSignal_RTS;
  1551. set_signals(info);
  1552. spin_unlock_irqrestore(&info->lock,flags);
  1553. }
  1554. }
  1555. /* get the current serial statistics
  1556. */
  1557. static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
  1558. {
  1559. int err;
  1560. if (debug_level >= DEBUG_LEVEL_INFO)
  1561. printk("get_params(%s)\n", info->device_name);
  1562. if (!user_icount) {
  1563. memset(&info->icount, 0, sizeof(info->icount));
  1564. } else {
  1565. COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
  1566. if (err)
  1567. return -EFAULT;
  1568. }
  1569. return 0;
  1570. }
  1571. /* get the current serial parameters
  1572. */
  1573. static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
  1574. {
  1575. int err;
  1576. if (debug_level >= DEBUG_LEVEL_INFO)
  1577. printk("get_params(%s)\n", info->device_name);
  1578. COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
  1579. if (err)
  1580. return -EFAULT;
  1581. return 0;
  1582. }
  1583. /* set the serial parameters
  1584. *
  1585. * Arguments:
  1586. *
  1587. * info pointer to device instance data
  1588. * new_params user buffer containing new serial params
  1589. *
  1590. * Returns: 0 if success, otherwise error code
  1591. */
  1592. static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
  1593. {
  1594. unsigned long flags;
  1595. MGSL_PARAMS tmp_params;
  1596. int err;
  1597. if (debug_level >= DEBUG_LEVEL_INFO)
  1598. printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
  1599. info->device_name );
  1600. COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
  1601. if (err) {
  1602. if ( debug_level >= DEBUG_LEVEL_INFO )
  1603. printk( "%s(%d):set_params(%s) user buffer copy failed\n",
  1604. __FILE__,__LINE__,info->device_name);
  1605. return -EFAULT;
  1606. }
  1607. spin_lock_irqsave(&info->lock,flags);
  1608. memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
  1609. spin_unlock_irqrestore(&info->lock,flags);
  1610. mgslpc_change_params(info);
  1611. return 0;
  1612. }
  1613. static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
  1614. {
  1615. int err;
  1616. if (debug_level >= DEBUG_LEVEL_INFO)
  1617. printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
  1618. COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
  1619. if (err)
  1620. return -EFAULT;
  1621. return 0;
  1622. }
  1623. static int set_txidle(MGSLPC_INFO * info, int idle_mode)
  1624. {
  1625. unsigned long flags;
  1626. if (debug_level >= DEBUG_LEVEL_INFO)
  1627. printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
  1628. spin_lock_irqsave(&info->lock,flags);
  1629. info->idle_mode = idle_mode;
  1630. tx_set_idle(info);
  1631. spin_unlock_irqrestore(&info->lock,flags);
  1632. return 0;
  1633. }
  1634. static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
  1635. {
  1636. int err;
  1637. if (debug_level >= DEBUG_LEVEL_INFO)
  1638. printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
  1639. COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
  1640. if (err)
  1641. return -EFAULT;
  1642. return 0;
  1643. }
  1644. static int set_interface(MGSLPC_INFO * info, int if_mode)
  1645. {
  1646. unsigned long flags;
  1647. unsigned char val;
  1648. if (debug_level >= DEBUG_LEVEL_INFO)
  1649. printk("set_interface(%s,%d)\n", info->device_name, if_mode);
  1650. spin_lock_irqsave(&info->lock,flags);
  1651. info->if_mode = if_mode;
  1652. val = read_reg(info, PVR) & 0x0f;
  1653. switch (info->if_mode)
  1654. {
  1655. case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
  1656. case MGSL_INTERFACE_V35: val |= PVR_V35; break;
  1657. case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
  1658. }
  1659. write_reg(info, PVR, val);
  1660. spin_unlock_irqrestore(&info->lock,flags);
  1661. return 0;
  1662. }
  1663. static int set_txenable(MGSLPC_INFO * info, int enable)
  1664. {
  1665. unsigned long flags;
  1666. if (debug_level >= DEBUG_LEVEL_INFO)
  1667. printk("set_txenable(%s,%d)\n", info->device_name, enable);
  1668. spin_lock_irqsave(&info->lock,flags);
  1669. if (enable) {
  1670. if (!info->tx_enabled)
  1671. tx_start(info);
  1672. } else {
  1673. if (info->tx_enabled)
  1674. tx_stop(info);
  1675. }
  1676. spin_unlock_irqrestore(&info->lock,flags);
  1677. return 0;
  1678. }
  1679. static int tx_abort(MGSLPC_INFO * info)
  1680. {
  1681. unsigned long flags;
  1682. if (debug_level >= DEBUG_LEVEL_INFO)
  1683. printk("tx_abort(%s)\n", info->device_name);
  1684. spin_lock_irqsave(&info->lock,flags);
  1685. if (info->tx_active && info->tx_count &&
  1686. info->params.mode == MGSL_MODE_HDLC) {
  1687. /* clear data count so FIFO is not filled on next IRQ.
  1688. * This results in underrun and abort transmission.
  1689. */
  1690. info->tx_count = info->tx_put = info->tx_get = 0;
  1691. info->tx_aborting = TRUE;
  1692. }
  1693. spin_unlock_irqrestore(&info->lock,flags);
  1694. return 0;
  1695. }
  1696. static int set_rxenable(MGSLPC_INFO * info, int enable)
  1697. {
  1698. unsigned long flags;
  1699. if (debug_level >= DEBUG_LEVEL_INFO)
  1700. printk("set_rxenable(%s,%d)\n", info->device_name, enable);
  1701. spin_lock_irqsave(&info->lock,flags);
  1702. if (enable) {
  1703. if (!info->rx_enabled)
  1704. rx_start(info);
  1705. } else {
  1706. if (info->rx_enabled)
  1707. rx_stop(info);
  1708. }
  1709. spin_unlock_irqrestore(&info->lock,flags);
  1710. return 0;
  1711. }
  1712. /* wait for specified event to occur
  1713. *
  1714. * Arguments: info pointer to device instance data
  1715. * mask pointer to bitmask of events to wait for
  1716. * Return Value: 0 if successful and bit mask updated with
  1717. * of events triggerred,
  1718. * otherwise error code
  1719. */
  1720. static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
  1721. {
  1722. unsigned long flags;
  1723. int s;
  1724. int rc=0;
  1725. struct mgsl_icount cprev, cnow;
  1726. int events;
  1727. int mask;
  1728. struct _input_signal_events oldsigs, newsigs;
  1729. DECLARE_WAITQUEUE(wait, current);
  1730. COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
  1731. if (rc)
  1732. return -EFAULT;
  1733. if (debug_level >= DEBUG_LEVEL_INFO)
  1734. printk("wait_events(%s,%d)\n", info->device_name, mask);
  1735. spin_lock_irqsave(&info->lock,flags);
  1736. /* return immediately if state matches requested events */
  1737. get_signals(info);
  1738. s = info->serial_signals;
  1739. events = mask &
  1740. ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
  1741. ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
  1742. ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
  1743. ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
  1744. if (events) {
  1745. spin_unlock_irqrestore(&info->lock,flags);
  1746. goto exit;
  1747. }
  1748. /* save current irq counts */
  1749. cprev = info->icount;
  1750. oldsigs = info->input_signal_events;
  1751. if ((info->params.mode == MGSL_MODE_HDLC) &&
  1752. (mask & MgslEvent_ExitHuntMode))
  1753. irq_enable(info, CHA, IRQ_EXITHUNT);
  1754. set_current_state(TASK_INTERRUPTIBLE);
  1755. add_wait_queue(&info->event_wait_q, &wait);
  1756. spin_unlock_irqrestore(&info->lock,flags);
  1757. for(;;) {
  1758. schedule();
  1759. if (signal_pending(current)) {
  1760. rc = -ERESTARTSYS;
  1761. break;
  1762. }
  1763. /* get current irq counts */
  1764. spin_lock_irqsave(&info->lock,flags);
  1765. cnow = info->icount;
  1766. newsigs = info->input_signal_events;
  1767. set_current_state(TASK_INTERRUPTIBLE);
  1768. spin_unlock_irqrestore(&info->lock,flags);
  1769. /* if no change, wait aborted for some reason */
  1770. if (newsigs.dsr_up == oldsigs.dsr_up &&
  1771. newsigs.dsr_down == oldsigs.dsr_down &&
  1772. newsigs.dcd_up == oldsigs.dcd_up &&
  1773. newsigs.dcd_down == oldsigs.dcd_down &&
  1774. newsigs.cts_up == oldsigs.cts_up &&
  1775. newsigs.cts_down == oldsigs.cts_down &&
  1776. newsigs.ri_up == oldsigs.ri_up &&
  1777. newsigs.ri_down == oldsigs.ri_down &&
  1778. cnow.exithunt == cprev.exithunt &&
  1779. cnow.rxidle == cprev.rxidle) {
  1780. rc = -EIO;
  1781. break;
  1782. }
  1783. events = mask &
  1784. ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
  1785. (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
  1786. (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
  1787. (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
  1788. (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
  1789. (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
  1790. (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
  1791. (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
  1792. (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
  1793. (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
  1794. if (events)
  1795. break;
  1796. cprev = cnow;
  1797. oldsigs = newsigs;
  1798. }
  1799. remove_wait_queue(&info->event_wait_q, &wait);
  1800. set_current_state(TASK_RUNNING);
  1801. if (mask & MgslEvent_ExitHuntMode) {
  1802. spin_lock_irqsave(&info->lock,flags);
  1803. if (!waitqueue_active(&info->event_wait_q))
  1804. irq_disable(info, CHA, IRQ_EXITHUNT);
  1805. spin_unlock_irqrestore(&info->lock,flags);
  1806. }
  1807. exit:
  1808. if (rc == 0)
  1809. PUT_USER(rc, events, mask_ptr);
  1810. return rc;
  1811. }
  1812. static int modem_input_wait(MGSLPC_INFO *info,int arg)
  1813. {
  1814. unsigned long flags;
  1815. int rc;
  1816. struct mgsl_icount cprev, cnow;
  1817. DECLARE_WAITQUEUE(wait, current);
  1818. /* save current irq counts */
  1819. spin_lock_irqsave(&info->lock,flags);
  1820. cprev = info->icount;
  1821. add_wait_queue(&info->status_event_wait_q, &wait);
  1822. set_current_state(TASK_INTERRUPTIBLE);
  1823. spin_unlock_irqrestore(&info->lock,flags);
  1824. for(;;) {
  1825. schedule();
  1826. if (signal_pending(current)) {
  1827. rc = -ERESTARTSYS;
  1828. break;
  1829. }
  1830. /* get new irq counts */
  1831. spin_lock_irqsave(&info->lock,flags);
  1832. cnow = info->icount;
  1833. set_current_state(TASK_INTERRUPTIBLE);
  1834. spin_unlock_irqrestore(&info->lock,flags);
  1835. /* if no change, wait aborted for some reason */
  1836. if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
  1837. cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
  1838. rc = -EIO;
  1839. break;
  1840. }
  1841. /* check for change in caller specified modem input */
  1842. if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
  1843. (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
  1844. (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
  1845. (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
  1846. rc = 0;
  1847. break;
  1848. }
  1849. cprev = cnow;
  1850. }
  1851. remove_wait_queue(&info->status_event_wait_q, &wait);
  1852. set_current_state(TASK_RUNNING);
  1853. return rc;
  1854. }
  1855. /* return the state of the serial control and status signals
  1856. */
  1857. static int tiocmget(struct tty_struct *tty, struct file *file)
  1858. {
  1859. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1860. unsigned int result;
  1861. unsigned long flags;
  1862. spin_lock_irqsave(&info->lock,flags);
  1863. get_signals(info);
  1864. spin_unlock_irqrestore(&info->lock,flags);
  1865. result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
  1866. ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
  1867. ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
  1868. ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
  1869. ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
  1870. ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
  1871. if (debug_level >= DEBUG_LEVEL_INFO)
  1872. printk("%s(%d):%s tiocmget() value=%08X\n",
  1873. __FILE__,__LINE__, info->device_name, result );
  1874. return result;
  1875. }
  1876. /* set modem control signals (DTR/RTS)
  1877. */
  1878. static int tiocmset(struct tty_struct *tty, struct file *file,
  1879. unsigned int set, unsigned int clear)
  1880. {
  1881. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1882. unsigned long flags;
  1883. if (debug_level >= DEBUG_LEVEL_INFO)
  1884. printk("%s(%d):%s tiocmset(%x,%x)\n",
  1885. __FILE__,__LINE__,info->device_name, set, clear);
  1886. if (set & TIOCM_RTS)
  1887. info->serial_signals |= SerialSignal_RTS;
  1888. if (set & TIOCM_DTR)
  1889. info->serial_signals |= SerialSignal_DTR;
  1890. if (clear & TIOCM_RTS)
  1891. info->serial_signals &= ~SerialSignal_RTS;
  1892. if (clear & TIOCM_DTR)
  1893. info->serial_signals &= ~SerialSignal_DTR;
  1894. spin_lock_irqsave(&info->lock,flags);
  1895. set_signals(info);
  1896. spin_unlock_irqrestore(&info->lock,flags);
  1897. return 0;
  1898. }
  1899. /* Set or clear transmit break condition
  1900. *
  1901. * Arguments: tty pointer to tty instance data
  1902. * break_state -1=set break condition, 0=clear
  1903. */
  1904. static void mgslpc_break(struct tty_struct *tty, int break_state)
  1905. {
  1906. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1907. unsigned long flags;
  1908. if (debug_level >= DEBUG_LEVEL_INFO)
  1909. printk("%s(%d):mgslpc_break(%s,%d)\n",
  1910. __FILE__,__LINE__, info->device_name, break_state);
  1911. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
  1912. return;
  1913. spin_lock_irqsave(&info->lock,flags);
  1914. if (break_state == -1)
  1915. set_reg_bits(info, CHA+DAFO, BIT6);
  1916. else
  1917. clear_reg_bits(info, CHA+DAFO, BIT6);
  1918. spin_unlock_irqrestore(&info->lock,flags);
  1919. }
  1920. /* Service an IOCTL request
  1921. *
  1922. * Arguments:
  1923. *
  1924. * tty pointer to tty instance data
  1925. * file pointer to associated file object for device
  1926. * cmd IOCTL command code
  1927. * arg command argument/context
  1928. *
  1929. * Return Value: 0 if success, otherwise error code
  1930. */
  1931. static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
  1932. unsigned int cmd, unsigned long arg)
  1933. {
  1934. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1935. if (debug_level >= DEBUG_LEVEL_INFO)
  1936. printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
  1937. info->device_name, cmd );
  1938. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
  1939. return -ENODEV;
  1940. if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
  1941. (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
  1942. if (tty->flags & (1 << TTY_IO_ERROR))
  1943. return -EIO;
  1944. }
  1945. return ioctl_common(info, cmd, arg);
  1946. }
  1947. int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
  1948. {
  1949. int error;
  1950. struct mgsl_icount cnow; /* kernel counter temps */
  1951. struct serial_icounter_struct __user *p_cuser; /* user space */
  1952. void __user *argp = (void __user *)arg;
  1953. unsigned long flags;
  1954. switch (cmd) {
  1955. case MGSL_IOCGPARAMS:
  1956. return get_params(info, argp);
  1957. case MGSL_IOCSPARAMS:
  1958. return set_params(info, argp);
  1959. case MGSL_IOCGTXIDLE:
  1960. return get_txidle(info, argp);
  1961. case MGSL_IOCSTXIDLE:
  1962. return set_txidle(info, (int)arg);
  1963. case MGSL_IOCGIF:
  1964. return get_interface(info, argp);
  1965. case MGSL_IOCSIF:
  1966. return set_interface(info,(int)arg);
  1967. case MGSL_IOCTXENABLE:
  1968. return set_txenable(info,(int)arg);
  1969. case MGSL_IOCRXENABLE:
  1970. return set_rxenable(info,(int)arg);
  1971. case MGSL_IOCTXABORT:
  1972. return tx_abort(info);
  1973. case MGSL_IOCGSTATS:
  1974. return get_stats(info, argp);
  1975. case MGSL_IOCWAITEVENT:
  1976. return wait_events(info, argp);
  1977. case TIOCMIWAIT:
  1978. return modem_input_wait(info,(int)arg);
  1979. case TIOCGICOUNT:
  1980. spin_lock_irqsave(&info->lock,flags);
  1981. cnow = info->icount;
  1982. spin_unlock_irqrestore(&info->lock,flags);
  1983. p_cuser = argp;
  1984. PUT_USER(error,cnow.cts, &p_cuser->cts);
  1985. if (error) return error;
  1986. PUT_USER(error,cnow.dsr, &p_cuser->dsr);
  1987. if (error) return error;
  1988. PUT_USER(error,cnow.rng, &p_cuser->rng);
  1989. if (error) return error;
  1990. PUT_USER(error,cnow.dcd, &p_cuser->dcd);
  1991. if (error) return error;
  1992. PUT_USER(error,cnow.rx, &p_cuser->rx);
  1993. if (error) return error;
  1994. PUT_USER(error,cnow.tx, &p_cuser->tx);
  1995. if (error) return error;
  1996. PUT_USER(error,cnow.frame, &p_cuser->frame);
  1997. if (error) return error;
  1998. PUT_USER(error,cnow.overrun, &p_cuser->overrun);
  1999. if (error) return error;
  2000. PUT_USER(error,cnow.parity, &p_cuser->parity);
  2001. if (error) return error;
  2002. PUT_USER(error,cnow.brk, &p_cuser->brk);
  2003. if (error) return error;
  2004. PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
  2005. if (error) return error;
  2006. return 0;
  2007. default:
  2008. return -ENOIOCTLCMD;
  2009. }
  2010. return 0;
  2011. }
  2012. /* Set new termios settings
  2013. *
  2014. * Arguments:
  2015. *
  2016. * tty pointer to tty structure
  2017. * termios pointer to buffer to hold returned old termios
  2018. */
  2019. static void mgslpc_set_termios(struct tty_struct *tty, struct termios *old_termios)
  2020. {
  2021. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  2022. unsigned long flags;
  2023. if (debug_level >= DEBUG_LEVEL_INFO)
  2024. printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
  2025. tty->driver->name );
  2026. /* just return if nothing has changed */
  2027. if ((tty->termios->c_cflag == old_termios->c_cflag)
  2028. && (RELEVANT_IFLAG(tty->termios->c_iflag)
  2029. == RELEVANT_IFLAG(old_termios->c_iflag)))
  2030. return;
  2031. mgslpc_change_params(info);
  2032. /* Handle transition to B0 status */
  2033. if (old_termios->c_cflag & CBAUD &&
  2034. !(tty->termios->c_cflag & CBAUD)) {
  2035. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  2036. spin_lock_irqsave(&info->lock,flags);
  2037. set_signals(info);
  2038. spin_unlock_irqrestore(&info->lock,flags);
  2039. }
  2040. /* Handle transition away from B0 status */
  2041. if (!(old_termios->c_cflag & CBAUD) &&
  2042. tty->termios->c_cflag & CBAUD) {
  2043. info->serial_signals |= SerialSignal_DTR;
  2044. if (!(tty->termios->c_cflag & CRTSCTS) ||
  2045. !test_bit(TTY_THROTTLED, &tty->flags)) {
  2046. info->serial_signals |= SerialSignal_RTS;
  2047. }
  2048. spin_lock_irqsave(&info->lock,flags);
  2049. set_signals(info);
  2050. spin_unlock_irqrestore(&info->lock,flags);
  2051. }
  2052. /* Handle turning off CRTSCTS */
  2053. if (old_termios->c_cflag & CRTSCTS &&
  2054. !(tty->termios->c_cflag & CRTSCTS)) {
  2055. tty->hw_stopped = 0;
  2056. tx_release(tty);
  2057. }
  2058. }
  2059. static void mgslpc_close(struct tty_struct *tty, struct file * filp)
  2060. {
  2061. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2062. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
  2063. return;
  2064. if (debug_level >= DEBUG_LEVEL_INFO)
  2065. printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
  2066. __FILE__,__LINE__, info->device_name, info->count);
  2067. if (!info->count)
  2068. return;
  2069. if (tty_hung_up_p(filp))
  2070. goto cleanup;
  2071. if ((tty->count == 1) && (info->count != 1)) {
  2072. /*
  2073. * tty->count is 1 and the tty structure will be freed.
  2074. * info->count should be one in this case.
  2075. * if it's not, correct it so that the port is shutdown.
  2076. */
  2077. printk("mgslpc_close: bad refcount; tty->count is 1, "
  2078. "info->count is %d\n", info->count);
  2079. info->count = 1;
  2080. }
  2081. info->count--;
  2082. /* if at least one open remaining, leave hardware active */
  2083. if (info->count)
  2084. goto cleanup;
  2085. info->flags |= ASYNC_CLOSING;
  2086. /* set tty->closing to notify line discipline to
  2087. * only process XON/XOFF characters. Only the N_TTY
  2088. * discipline appears to use this (ppp does not).
  2089. */
  2090. tty->closing = 1;
  2091. /* wait for transmit data to clear all layers */
  2092. if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
  2093. if (debug_level >= DEBUG_LEVEL_INFO)
  2094. printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
  2095. __FILE__,__LINE__, info->device_name );
  2096. tty_wait_until_sent(tty, info->closing_wait);
  2097. }
  2098. if (info->flags & ASYNC_INITIALIZED)
  2099. mgslpc_wait_until_sent(tty, info->timeout);
  2100. if (tty->driver->flush_buffer)
  2101. tty->driver->flush_buffer(tty);
  2102. ldisc_flush_buffer(tty);
  2103. shutdown(info);
  2104. tty->closing = 0;
  2105. info->tty = NULL;
  2106. if (info->blocked_open) {
  2107. if (info->close_delay) {
  2108. msleep_interruptible(jiffies_to_msecs(info->close_delay));
  2109. }
  2110. wake_up_interruptible(&info->open_wait);
  2111. }
  2112. info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
  2113. wake_up_interruptible(&info->close_wait);
  2114. cleanup:
  2115. if (debug_level >= DEBUG_LEVEL_INFO)
  2116. printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
  2117. tty->driver->name, info->count);
  2118. }
  2119. /* Wait until the transmitter is empty.
  2120. */
  2121. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
  2122. {
  2123. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2124. unsigned long orig_jiffies, char_time;
  2125. if (!info )
  2126. return;
  2127. if (debug_level >= DEBUG_LEVEL_INFO)
  2128. printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
  2129. __FILE__,__LINE__, info->device_name );
  2130. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
  2131. return;
  2132. if (!(info->flags & ASYNC_INITIALIZED))
  2133. goto exit;
  2134. orig_jiffies = jiffies;
  2135. /* Set check interval to 1/5 of estimated time to
  2136. * send a character, and make it at least 1. The check
  2137. * interval should also be less than the timeout.
  2138. * Note: use tight timings here to satisfy the NIST-PCTS.
  2139. */
  2140. if ( info->params.data_rate ) {
  2141. char_time = info->timeout/(32 * 5);
  2142. if (!char_time)
  2143. char_time++;
  2144. } else
  2145. char_time = 1;
  2146. if (timeout)
  2147. char_time = min_t(unsigned long, char_time, timeout);
  2148. if (info->params.mode == MGSL_MODE_HDLC) {
  2149. while (info->tx_active) {
  2150. msleep_interruptible(jiffies_to_msecs(char_time));
  2151. if (signal_pending(current))
  2152. break;
  2153. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2154. break;
  2155. }
  2156. } else {
  2157. while ((info->tx_count || info->tx_active) &&
  2158. info->tx_enabled) {
  2159. msleep_interruptible(jiffies_to_msecs(char_time));
  2160. if (signal_pending(current))
  2161. break;
  2162. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2163. break;
  2164. }
  2165. }
  2166. exit:
  2167. if (debug_level >= DEBUG_LEVEL_INFO)
  2168. printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
  2169. __FILE__,__LINE__, info->device_name );
  2170. }
  2171. /* Called by tty_hangup() when a hangup is signaled.
  2172. * This is the same as closing all open files for the port.
  2173. */
  2174. static void mgslpc_hangup(struct tty_struct *tty)
  2175. {
  2176. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2177. if (debug_level >= DEBUG_LEVEL_INFO)
  2178. printk("%s(%d):mgslpc_hangup(%s)\n",
  2179. __FILE__,__LINE__, info->device_name );
  2180. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
  2181. return;
  2182. mgslpc_flush_buffer(tty);
  2183. shutdown(info);
  2184. info->count = 0;
  2185. info->flags &= ~ASYNC_NORMAL_ACTIVE;
  2186. info->tty = NULL;
  2187. wake_up_interruptible(&info->open_wait);
  2188. }
  2189. /* Block the current process until the specified port
  2190. * is ready to be opened.
  2191. */
  2192. static int block_til_ready(struct tty_struct *tty, struct file *filp,
  2193. MGSLPC_INFO *info)
  2194. {
  2195. DECLARE_WAITQUEUE(wait, current);
  2196. int retval;
  2197. int do_clocal = 0, extra_count = 0;
  2198. unsigned long flags;
  2199. if (debug_level >= DEBUG_LEVEL_INFO)
  2200. printk("%s(%d):block_til_ready on %s\n",
  2201. __FILE__,__LINE__, tty->driver->name );
  2202. if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
  2203. /* nonblock mode is set or port is not enabled */
  2204. /* just verify that callout device is not active */
  2205. info->flags |= ASYNC_NORMAL_ACTIVE;
  2206. return 0;
  2207. }
  2208. if (tty->termios->c_cflag & CLOCAL)
  2209. do_clocal = 1;
  2210. /* Wait for carrier detect and the line to become
  2211. * free (i.e., not in use by the callout). While we are in
  2212. * this loop, info->count is dropped by one, so that
  2213. * mgslpc_close() knows when to free things. We restore it upon
  2214. * exit, either normal or abnormal.
  2215. */
  2216. retval = 0;
  2217. add_wait_queue(&info->open_wait, &wait);
  2218. if (debug_level >= DEBUG_LEVEL_INFO)
  2219. printk("%s(%d):block_til_ready before block on %s count=%d\n",
  2220. __FILE__,__LINE__, tty->driver->name, info->count );
  2221. spin_lock_irqsave(&info->lock, flags);
  2222. if (!tty_hung_up_p(filp)) {
  2223. extra_count = 1;
  2224. info->count--;
  2225. }
  2226. spin_unlock_irqrestore(&info->lock, flags);
  2227. info->blocked_open++;
  2228. while (1) {
  2229. if ((tty->termios->c_cflag & CBAUD)) {
  2230. spin_lock_irqsave(&info->lock,flags);
  2231. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  2232. set_signals(info);
  2233. spin_unlock_irqrestore(&info->lock,flags);
  2234. }
  2235. set_current_state(TASK_INTERRUPTIBLE);
  2236. if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
  2237. retval = (info->flags & ASYNC_HUP_NOTIFY) ?
  2238. -EAGAIN : -ERESTARTSYS;
  2239. break;
  2240. }
  2241. spin_lock_irqsave(&info->lock,flags);
  2242. get_signals(info);
  2243. spin_unlock_irqrestore(&info->lock,flags);
  2244. if (!(info->flags & ASYNC_CLOSING) &&
  2245. (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
  2246. break;
  2247. }
  2248. if (signal_pending(current)) {
  2249. retval = -ERESTARTSYS;
  2250. break;
  2251. }
  2252. if (debug_level >= DEBUG_LEVEL_INFO)
  2253. printk("%s(%d):block_til_ready blocking on %s count=%d\n",
  2254. __FILE__,__LINE__, tty->driver->name, info->count );
  2255. schedule();
  2256. }
  2257. set_current_state(TASK_RUNNING);
  2258. remove_wait_queue(&info->open_wait, &wait);
  2259. if (extra_count)
  2260. info->count++;
  2261. info->blocked_open--;
  2262. if (debug_level >= DEBUG_LEVEL_INFO)
  2263. printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
  2264. __FILE__,__LINE__, tty->driver->name, info->count );
  2265. if (!retval)
  2266. info->flags |= ASYNC_NORMAL_ACTIVE;
  2267. return retval;
  2268. }
  2269. static int mgslpc_open(struct tty_struct *tty, struct file * filp)
  2270. {
  2271. MGSLPC_INFO *info;
  2272. int retval, line;
  2273. unsigned long flags;
  2274. /* verify range of specified line number */
  2275. line = tty->index;
  2276. if ((line < 0) || (line >= mgslpc_device_count)) {
  2277. printk("%s(%d):mgslpc_open with invalid line #%d.\n",
  2278. __FILE__,__LINE__,line);
  2279. return -ENODEV;
  2280. }
  2281. /* find the info structure for the specified line */
  2282. info = mgslpc_device_list;
  2283. while(info && info->line != line)
  2284. info = info->next_device;
  2285. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
  2286. return -ENODEV;
  2287. tty->driver_data = info;
  2288. info->tty = tty;
  2289. if (debug_level >= DEBUG_LEVEL_INFO)
  2290. printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
  2291. __FILE__,__LINE__,tty->driver->name, info->count);
  2292. /* If port is closing, signal caller to try again */
  2293. if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
  2294. if (info->flags & ASYNC_CLOSING)
  2295. interruptible_sleep_on(&info->close_wait);
  2296. retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
  2297. -EAGAIN : -ERESTARTSYS);
  2298. goto cleanup;
  2299. }
  2300. info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  2301. spin_lock_irqsave(&info->netlock, flags);
  2302. if (info->netcount) {
  2303. retval = -EBUSY;
  2304. spin_unlock_irqrestore(&info->netlock, flags);
  2305. goto cleanup;
  2306. }
  2307. info->count++;
  2308. spin_unlock_irqrestore(&info->netlock, flags);
  2309. if (info->count == 1) {
  2310. /* 1st open on this device, init hardware */
  2311. retval = startup(info);
  2312. if (retval < 0)
  2313. goto cleanup;
  2314. }
  2315. retval = block_til_ready(tty, filp, info);
  2316. if (retval) {
  2317. if (debug_level >= DEBUG_LEVEL_INFO)
  2318. printk("%s(%d):block_til_ready(%s) returned %d\n",
  2319. __FILE__,__LINE__, info->device_name, retval);
  2320. goto cleanup;
  2321. }
  2322. if (debug_level >= DEBUG_LEVEL_INFO)
  2323. printk("%s(%d):mgslpc_open(%s) success\n",
  2324. __FILE__,__LINE__, info->device_name);
  2325. retval = 0;
  2326. cleanup:
  2327. if (retval) {
  2328. if (tty->count == 1)
  2329. info->tty = NULL; /* tty layer will release tty struct */
  2330. if(info->count)
  2331. info->count--;
  2332. }
  2333. return retval;
  2334. }
  2335. /*
  2336. * /proc fs routines....
  2337. */
  2338. static inline int line_info(char *buf, MGSLPC_INFO *info)
  2339. {
  2340. char stat_buf[30];
  2341. int ret;
  2342. unsigned long flags;
  2343. ret = sprintf(buf, "%s:io:%04X irq:%d",
  2344. info->device_name, info->io_base, info->irq_level);
  2345. /* output current serial signal states */
  2346. spin_lock_irqsave(&info->lock,flags);
  2347. get_signals(info);
  2348. spin_unlock_irqrestore(&info->lock,flags);
  2349. stat_buf[0] = 0;
  2350. stat_buf[1] = 0;
  2351. if (info->serial_signals & SerialSignal_RTS)
  2352. strcat(stat_buf, "|RTS");
  2353. if (info->serial_signals & SerialSignal_CTS)
  2354. strcat(stat_buf, "|CTS");
  2355. if (info->serial_signals & SerialSignal_DTR)
  2356. strcat(stat_buf, "|DTR");
  2357. if (info->serial_signals & SerialSignal_DSR)
  2358. strcat(stat_buf, "|DSR");
  2359. if (info->serial_signals & SerialSignal_DCD)
  2360. strcat(stat_buf, "|CD");
  2361. if (info->serial_signals & SerialSignal_RI)
  2362. strcat(stat_buf, "|RI");
  2363. if (info->params.mode == MGSL_MODE_HDLC) {
  2364. ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
  2365. info->icount.txok, info->icount.rxok);
  2366. if (info->icount.txunder)
  2367. ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
  2368. if (info->icount.txabort)
  2369. ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
  2370. if (info->icount.rxshort)
  2371. ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
  2372. if (info->icount.rxlong)
  2373. ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
  2374. if (info->icount.rxover)
  2375. ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
  2376. if (info->icount.rxcrc)
  2377. ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
  2378. } else {
  2379. ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
  2380. info->icount.tx, info->icount.rx);
  2381. if (info->icount.frame)
  2382. ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
  2383. if (info->icount.parity)
  2384. ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
  2385. if (info->icount.brk)
  2386. ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
  2387. if (info->icount.overrun)
  2388. ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
  2389. }
  2390. /* Append serial signal status to end */
  2391. ret += sprintf(buf+ret, " %s\n", stat_buf+1);
  2392. ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
  2393. info->tx_active,info->bh_requested,info->bh_running,
  2394. info->pending_bh);
  2395. return ret;
  2396. }
  2397. /* Called to print information about devices
  2398. */
  2399. static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
  2400. int *eof, void *data)
  2401. {
  2402. int len = 0, l;
  2403. off_t begin = 0;
  2404. MGSLPC_INFO *info;
  2405. len += sprintf(page, "synclink driver:%s\n", driver_version);
  2406. info = mgslpc_device_list;
  2407. while( info ) {
  2408. l = line_info(page + len, info);
  2409. len += l;
  2410. if (len+begin > off+count)
  2411. goto done;
  2412. if (len+begin < off) {
  2413. begin += len;
  2414. len = 0;
  2415. }
  2416. info = info->next_device;
  2417. }
  2418. *eof = 1;
  2419. done:
  2420. if (off >= len+begin)
  2421. return 0;
  2422. *start = page + (off-begin);
  2423. return ((count < begin+len-off) ? count : begin+len-off);
  2424. }
  2425. int rx_alloc_buffers(MGSLPC_INFO *info)
  2426. {
  2427. /* each buffer has header and data */
  2428. info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
  2429. /* calculate total allocation size for 8 buffers */
  2430. info->rx_buf_total_size = info->rx_buf_size * 8;
  2431. /* limit total allocated memory */
  2432. if (info->rx_buf_total_size > 0x10000)
  2433. info->rx_buf_total_size = 0x10000;
  2434. /* calculate number of buffers */
  2435. info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
  2436. info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
  2437. if (info->rx_buf == NULL)
  2438. return -ENOMEM;
  2439. rx_reset_buffers(info);
  2440. return 0;
  2441. }
  2442. void rx_free_buffers(MGSLPC_INFO *info)
  2443. {
  2444. kfree(info->rx_buf);
  2445. info->rx_buf = NULL;
  2446. }
  2447. int claim_resources(MGSLPC_INFO *info)
  2448. {
  2449. if (rx_alloc_buffers(info) < 0 ) {
  2450. printk( "Cant allocate rx buffer %s\n", info->device_name);
  2451. release_resources(info);
  2452. return -ENODEV;
  2453. }
  2454. return 0;
  2455. }
  2456. void release_resources(MGSLPC_INFO *info)
  2457. {
  2458. if (debug_level >= DEBUG_LEVEL_INFO)
  2459. printk("release_resources(%s)\n", info->device_name);
  2460. rx_free_buffers(info);
  2461. }
  2462. /* Add the specified device instance data structure to the
  2463. * global linked list of devices and increment the device count.
  2464. *
  2465. * Arguments: info pointer to device instance data
  2466. */
  2467. void mgslpc_add_device(MGSLPC_INFO *info)
  2468. {
  2469. info->next_device = NULL;
  2470. info->line = mgslpc_device_count;
  2471. sprintf(info->device_name,"ttySLP%d",info->line);
  2472. if (info->line < MAX_DEVICE_COUNT) {
  2473. if (maxframe[info->line])
  2474. info->max_frame_size = maxframe[info->line];
  2475. info->dosyncppp = dosyncppp[info->line];
  2476. }
  2477. mgslpc_device_count++;
  2478. if (!mgslpc_device_list)
  2479. mgslpc_device_list = info;
  2480. else {
  2481. MGSLPC_INFO *current_dev = mgslpc_device_list;
  2482. while( current_dev->next_device )
  2483. current_dev = current_dev->next_device;
  2484. current_dev->next_device = info;
  2485. }
  2486. if (info->max_frame_size < 4096)
  2487. info->max_frame_size = 4096;
  2488. else if (info->max_frame_size > 65535)
  2489. info->max_frame_size = 65535;
  2490. printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
  2491. info->device_name, info->io_base, info->irq_level);
  2492. #ifdef CONFIG_HDLC
  2493. hdlcdev_init(info);
  2494. #endif
  2495. }
  2496. void mgslpc_remove_device(MGSLPC_INFO *remove_info)
  2497. {
  2498. MGSLPC_INFO *info = mgslpc_device_list;
  2499. MGSLPC_INFO *last = NULL;
  2500. while(info) {
  2501. if (info == remove_info) {
  2502. if (last)
  2503. last->next_device = info->next_device;
  2504. else
  2505. mgslpc_device_list = info->next_device;
  2506. #ifdef CONFIG_HDLC
  2507. hdlcdev_exit(info);
  2508. #endif
  2509. release_resources(info);
  2510. kfree(info);
  2511. mgslpc_device_count--;
  2512. return;
  2513. }
  2514. last = info;
  2515. info = info->next_device;
  2516. }
  2517. }
  2518. static struct pcmcia_device_id mgslpc_ids[] = {
  2519. PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
  2520. PCMCIA_DEVICE_NULL
  2521. };
  2522. MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
  2523. static struct pcmcia_driver mgslpc_driver = {
  2524. .owner = THIS_MODULE,
  2525. .drv = {
  2526. .name = "synclink_cs",
  2527. },
  2528. .probe = mgslpc_attach,
  2529. .remove = mgslpc_detach,
  2530. .id_table = mgslpc_ids,
  2531. .suspend = mgslpc_suspend,
  2532. .resume = mgslpc_resume,
  2533. };
  2534. static struct tty_operations mgslpc_ops = {
  2535. .open = mgslpc_open,
  2536. .close = mgslpc_close,
  2537. .write = mgslpc_write,
  2538. .put_char = mgslpc_put_char,
  2539. .flush_chars = mgslpc_flush_chars,
  2540. .write_room = mgslpc_write_room,
  2541. .chars_in_buffer = mgslpc_chars_in_buffer,
  2542. .flush_buffer = mgslpc_flush_buffer,
  2543. .ioctl = mgslpc_ioctl,
  2544. .throttle = mgslpc_throttle,
  2545. .unthrottle = mgslpc_unthrottle,
  2546. .send_xchar = mgslpc_send_xchar,
  2547. .break_ctl = mgslpc_break,
  2548. .wait_until_sent = mgslpc_wait_until_sent,
  2549. .read_proc = mgslpc_read_proc,
  2550. .set_termios = mgslpc_set_termios,
  2551. .stop = tx_pause,
  2552. .start = tx_release,
  2553. .hangup = mgslpc_hangup,
  2554. .tiocmget = tiocmget,
  2555. .tiocmset = tiocmset,
  2556. };
  2557. static void synclink_cs_cleanup(void)
  2558. {
  2559. int rc;
  2560. printk("Unloading %s: version %s\n", driver_name, driver_version);
  2561. while(mgslpc_device_list)
  2562. mgslpc_remove_device(mgslpc_device_list);
  2563. if (serial_driver) {
  2564. if ((rc = tty_unregister_driver(serial_driver)))
  2565. printk("%s(%d) failed to unregister tty driver err=%d\n",
  2566. __FILE__,__LINE__,rc);
  2567. put_tty_driver(serial_driver);
  2568. }
  2569. pcmcia_unregister_driver(&mgslpc_driver);
  2570. }
  2571. static int __init synclink_cs_init(void)
  2572. {
  2573. int rc;
  2574. if (break_on_load) {
  2575. mgslpc_get_text_ptr();
  2576. BREAKPOINT();
  2577. }
  2578. printk("%s %s\n", driver_name, driver_version);
  2579. if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
  2580. return rc;
  2581. serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
  2582. if (!serial_driver) {
  2583. rc = -ENOMEM;
  2584. goto error;
  2585. }
  2586. /* Initialize the tty_driver structure */
  2587. serial_driver->owner = THIS_MODULE;
  2588. serial_driver->driver_name = "synclink_cs";
  2589. serial_driver->name = "ttySLP";
  2590. serial_driver->major = ttymajor;
  2591. serial_driver->minor_start = 64;
  2592. serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
  2593. serial_driver->subtype = SERIAL_TYPE_NORMAL;
  2594. serial_driver->init_termios = tty_std_termios;
  2595. serial_driver->init_termios.c_cflag =
  2596. B9600 | CS8 | CREAD | HUPCL | CLOCAL;
  2597. serial_driver->flags = TTY_DRIVER_REAL_RAW;
  2598. tty_set_operations(serial_driver, &mgslpc_ops);
  2599. if ((rc = tty_register_driver(serial_driver)) < 0) {
  2600. printk("%s(%d):Couldn't register serial driver\n",
  2601. __FILE__,__LINE__);
  2602. put_tty_driver(serial_driver);
  2603. serial_driver = NULL;
  2604. goto error;
  2605. }
  2606. printk("%s %s, tty major#%d\n",
  2607. driver_name, driver_version,
  2608. serial_driver->major);
  2609. return 0;
  2610. error:
  2611. synclink_cs_cleanup();
  2612. return rc;
  2613. }
  2614. static void __exit synclink_cs_exit(void)
  2615. {
  2616. synclink_cs_cleanup();
  2617. }
  2618. module_init(synclink_cs_init);
  2619. module_exit(synclink_cs_exit);
  2620. static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
  2621. {
  2622. unsigned int M, N;
  2623. unsigned char val;
  2624. /* note:standard BRG mode is broken in V3.2 chip
  2625. * so enhanced mode is always used
  2626. */
  2627. if (rate) {
  2628. N = 3686400 / rate;
  2629. if (!N)
  2630. N = 1;
  2631. N >>= 1;
  2632. for (M = 1; N > 64 && M < 16; M++)
  2633. N >>= 1;
  2634. N--;
  2635. /* BGR[5..0] = N
  2636. * BGR[9..6] = M
  2637. * BGR[7..0] contained in BGR register
  2638. * BGR[9..8] contained in CCR2[7..6]
  2639. * divisor = (N+1)*2^M
  2640. *
  2641. * Note: M *must* not be zero (causes asymetric duty cycle)
  2642. */
  2643. write_reg(info, (unsigned char) (channel + BGR),
  2644. (unsigned char) ((M << 6) + N));
  2645. val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
  2646. val |= ((M << 4) & 0xc0);
  2647. write_reg(info, (unsigned char) (channel + CCR2), val);
  2648. }
  2649. }
  2650. /* Enabled the AUX clock output at the specified frequency.
  2651. */
  2652. static void enable_auxclk(MGSLPC_INFO *info)
  2653. {
  2654. unsigned char val;
  2655. /* MODE
  2656. *
  2657. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2658. * 05 ADM Address Mode, 0 = no addr recognition
  2659. * 04 TMD Timer Mode, 0 = external
  2660. * 03 RAC Receiver Active, 0 = inactive
  2661. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2662. * 01 TRS Timer Resolution, 1=512
  2663. * 00 TLP Test Loop, 0 = no loop
  2664. *
  2665. * 1000 0010
  2666. */
  2667. val = 0x82;
  2668. /* channel B RTS is used to enable AUXCLK driver on SP505 */
  2669. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2670. val |= BIT2;
  2671. write_reg(info, CHB + MODE, val);
  2672. /* CCR0
  2673. *
  2674. * 07 PU Power Up, 1=active, 0=power down
  2675. * 06 MCE Master Clock Enable, 1=enabled
  2676. * 05 Reserved, 0
  2677. * 04..02 SC[2..0] Encoding
  2678. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2679. *
  2680. * 11000000
  2681. */
  2682. write_reg(info, CHB + CCR0, 0xc0);
  2683. /* CCR1
  2684. *
  2685. * 07 SFLG Shared Flag, 0 = disable shared flags
  2686. * 06 GALP Go Active On Loop, 0 = not used
  2687. * 05 GLP Go On Loop, 0 = not used
  2688. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2689. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2690. * 02..00 CM[2..0] Clock Mode
  2691. *
  2692. * 0001 0111
  2693. */
  2694. write_reg(info, CHB + CCR1, 0x17);
  2695. /* CCR2 (Channel B)
  2696. *
  2697. * 07..06 BGR[9..8] Baud rate bits 9..8
  2698. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2699. * 04 SSEL Clock source select, 1=submode b
  2700. * 03 TOE 0=TxCLK is input, 1=TxCLK is output
  2701. * 02 RWX Read/Write Exchange 0=disabled
  2702. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2703. * 00 DIV, data inversion 0=disabled, 1=enabled
  2704. *
  2705. * 0011 1000
  2706. */
  2707. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2708. write_reg(info, CHB + CCR2, 0x38);
  2709. else
  2710. write_reg(info, CHB + CCR2, 0x30);
  2711. /* CCR4
  2712. *
  2713. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2714. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2715. * 05 TST1 Test Pin, 0=normal operation
  2716. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2717. * 03..02 Reserved, must be 0
  2718. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2719. *
  2720. * 0101 0000
  2721. */
  2722. write_reg(info, CHB + CCR4, 0x50);
  2723. /* if auxclk not enabled, set internal BRG so
  2724. * CTS transitions can be detected (requires TxC)
  2725. */
  2726. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2727. mgslpc_set_rate(info, CHB, info->params.clock_speed);
  2728. else
  2729. mgslpc_set_rate(info, CHB, 921600);
  2730. }
  2731. static void loopback_enable(MGSLPC_INFO *info)
  2732. {
  2733. unsigned char val;
  2734. /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
  2735. val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
  2736. write_reg(info, CHA + CCR1, val);
  2737. /* CCR2:04 SSEL Clock source select, 1=submode b */
  2738. val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
  2739. write_reg(info, CHA + CCR2, val);
  2740. /* set LinkSpeed if available, otherwise default to 2Mbps */
  2741. if (info->params.clock_speed)
  2742. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2743. else
  2744. mgslpc_set_rate(info, CHA, 1843200);
  2745. /* MODE:00 TLP Test Loop, 1=loopback enabled */
  2746. val = read_reg(info, CHA + MODE) | BIT0;
  2747. write_reg(info, CHA + MODE, val);
  2748. }
  2749. void hdlc_mode(MGSLPC_INFO *info)
  2750. {
  2751. unsigned char val;
  2752. unsigned char clkmode, clksubmode;
  2753. /* disable all interrupts */
  2754. irq_disable(info, CHA, 0xffff);
  2755. irq_disable(info, CHB, 0xffff);
  2756. port_irq_disable(info, 0xff);
  2757. /* assume clock mode 0a, rcv=RxC xmt=TxC */
  2758. clkmode = clksubmode = 0;
  2759. if (info->params.flags & HDLC_FLAG_RXC_DPLL
  2760. && info->params.flags & HDLC_FLAG_TXC_DPLL) {
  2761. /* clock mode 7a, rcv = DPLL, xmt = DPLL */
  2762. clkmode = 7;
  2763. } else if (info->params.flags & HDLC_FLAG_RXC_BRG
  2764. && info->params.flags & HDLC_FLAG_TXC_BRG) {
  2765. /* clock mode 7b, rcv = BRG, xmt = BRG */
  2766. clkmode = 7;
  2767. clksubmode = 1;
  2768. } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
  2769. if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2770. /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
  2771. clkmode = 6;
  2772. clksubmode = 1;
  2773. } else {
  2774. /* clock mode 6a, rcv = DPLL, xmt = TxC */
  2775. clkmode = 6;
  2776. }
  2777. } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2778. /* clock mode 0b, rcv = RxC, xmt = BRG */
  2779. clksubmode = 1;
  2780. }
  2781. /* MODE
  2782. *
  2783. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2784. * 05 ADM Address Mode, 0 = no addr recognition
  2785. * 04 TMD Timer Mode, 0 = external
  2786. * 03 RAC Receiver Active, 0 = inactive
  2787. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2788. * 01 TRS Timer Resolution, 1=512
  2789. * 00 TLP Test Loop, 0 = no loop
  2790. *
  2791. * 1000 0010
  2792. */
  2793. val = 0x82;
  2794. if (info->params.loopback)
  2795. val |= BIT0;
  2796. /* preserve RTS state */
  2797. if (info->serial_signals & SerialSignal_RTS)
  2798. val |= BIT2;
  2799. write_reg(info, CHA + MODE, val);
  2800. /* CCR0
  2801. *
  2802. * 07 PU Power Up, 1=active, 0=power down
  2803. * 06 MCE Master Clock Enable, 1=enabled
  2804. * 05 Reserved, 0
  2805. * 04..02 SC[2..0] Encoding
  2806. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2807. *
  2808. * 11000000
  2809. */
  2810. val = 0xc0;
  2811. switch (info->params.encoding)
  2812. {
  2813. case HDLC_ENCODING_NRZI:
  2814. val |= BIT3;
  2815. break;
  2816. case HDLC_ENCODING_BIPHASE_SPACE:
  2817. val |= BIT4;
  2818. break; // FM0
  2819. case HDLC_ENCODING_BIPHASE_MARK:
  2820. val |= BIT4 + BIT2;
  2821. break; // FM1
  2822. case HDLC_ENCODING_BIPHASE_LEVEL:
  2823. val |= BIT4 + BIT3;
  2824. break; // Manchester
  2825. }
  2826. write_reg(info, CHA + CCR0, val);
  2827. /* CCR1
  2828. *
  2829. * 07 SFLG Shared Flag, 0 = disable shared flags
  2830. * 06 GALP Go Active On Loop, 0 = not used
  2831. * 05 GLP Go On Loop, 0 = not used
  2832. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2833. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2834. * 02..00 CM[2..0] Clock Mode
  2835. *
  2836. * 0001 0000
  2837. */
  2838. val = 0x10 + clkmode;
  2839. write_reg(info, CHA + CCR1, val);
  2840. /* CCR2
  2841. *
  2842. * 07..06 BGR[9..8] Baud rate bits 9..8
  2843. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2844. * 04 SSEL Clock source select, 1=submode b
  2845. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  2846. * 02 RWX Read/Write Exchange 0=disabled
  2847. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2848. * 00 DIV, data inversion 0=disabled, 1=enabled
  2849. *
  2850. * 0000 0000
  2851. */
  2852. val = 0x00;
  2853. if (clkmode == 2 || clkmode == 3 || clkmode == 6
  2854. || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
  2855. val |= BIT5;
  2856. if (clksubmode)
  2857. val |= BIT4;
  2858. if (info->params.crc_type == HDLC_CRC_32_CCITT)
  2859. val |= BIT1;
  2860. if (info->params.encoding == HDLC_ENCODING_NRZB)
  2861. val |= BIT0;
  2862. write_reg(info, CHA + CCR2, val);
  2863. /* CCR3
  2864. *
  2865. * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
  2866. * 05 EPT Enable preamble transmission, 1=enabled
  2867. * 04 RADD Receive address pushed to FIFO, 0=disabled
  2868. * 03 CRL CRC Reset Level, 0=FFFF
  2869. * 02 RCRC Rx CRC 0=On 1=Off
  2870. * 01 TCRC Tx CRC 0=On 1=Off
  2871. * 00 PSD DPLL Phase Shift Disable
  2872. *
  2873. * 0000 0000
  2874. */
  2875. val = 0x00;
  2876. if (info->params.crc_type == HDLC_CRC_NONE)
  2877. val |= BIT2 + BIT1;
  2878. if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
  2879. val |= BIT5;
  2880. switch (info->params.preamble_length)
  2881. {
  2882. case HDLC_PREAMBLE_LENGTH_16BITS:
  2883. val |= BIT6;
  2884. break;
  2885. case HDLC_PREAMBLE_LENGTH_32BITS:
  2886. val |= BIT6;
  2887. break;
  2888. case HDLC_PREAMBLE_LENGTH_64BITS:
  2889. val |= BIT7 + BIT6;
  2890. break;
  2891. }
  2892. write_reg(info, CHA + CCR3, val);
  2893. /* PRE - Preamble pattern */
  2894. val = 0;
  2895. switch (info->params.preamble)
  2896. {
  2897. case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
  2898. case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
  2899. case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
  2900. case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
  2901. }
  2902. write_reg(info, CHA + PRE, val);
  2903. /* CCR4
  2904. *
  2905. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2906. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2907. * 05 TST1 Test Pin, 0=normal operation
  2908. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2909. * 03..02 Reserved, must be 0
  2910. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2911. *
  2912. * 0101 0000
  2913. */
  2914. val = 0x50;
  2915. write_reg(info, CHA + CCR4, val);
  2916. if (info->params.flags & HDLC_FLAG_RXC_DPLL)
  2917. mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
  2918. else
  2919. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2920. /* RLCR Receive length check register
  2921. *
  2922. * 7 1=enable receive length check
  2923. * 6..0 Max frame length = (RL + 1) * 32
  2924. */
  2925. write_reg(info, CHA + RLCR, 0);
  2926. /* XBCH Transmit Byte Count High
  2927. *
  2928. * 07 DMA mode, 0 = interrupt driven
  2929. * 06 NRM, 0=ABM (ignored)
  2930. * 05 CAS Carrier Auto Start
  2931. * 04 XC Transmit Continuously (ignored)
  2932. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  2933. *
  2934. * 0000 0000
  2935. */
  2936. val = 0x00;
  2937. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  2938. val |= BIT5;
  2939. write_reg(info, CHA + XBCH, val);
  2940. enable_auxclk(info);
  2941. if (info->params.loopback || info->testing_irq)
  2942. loopback_enable(info);
  2943. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  2944. {
  2945. irq_enable(info, CHB, IRQ_CTS);
  2946. /* PVR[3] 1=AUTO CTS active */
  2947. set_reg_bits(info, CHA + PVR, BIT3);
  2948. } else
  2949. clear_reg_bits(info, CHA + PVR, BIT3);
  2950. irq_enable(info, CHA,
  2951. IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
  2952. IRQ_UNDERRUN + IRQ_TXFIFO);
  2953. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  2954. wait_command_complete(info, CHA);
  2955. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  2956. /* Master clock mode enabled above to allow reset commands
  2957. * to complete even if no data clocks are present.
  2958. *
  2959. * Disable master clock mode for normal communications because
  2960. * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
  2961. * IRQ when in master clock mode.
  2962. *
  2963. * Leave master clock mode enabled for IRQ test because the
  2964. * timer IRQ used by the test can only happen in master clock mode.
  2965. */
  2966. if (!info->testing_irq)
  2967. clear_reg_bits(info, CHA + CCR0, BIT6);
  2968. tx_set_idle(info);
  2969. tx_stop(info);
  2970. rx_stop(info);
  2971. }
  2972. void rx_stop(MGSLPC_INFO *info)
  2973. {
  2974. if (debug_level >= DEBUG_LEVEL_ISR)
  2975. printk("%s(%d):rx_stop(%s)\n",
  2976. __FILE__,__LINE__, info->device_name );
  2977. /* MODE:03 RAC Receiver Active, 0=inactive */
  2978. clear_reg_bits(info, CHA + MODE, BIT3);
  2979. info->rx_enabled = 0;
  2980. info->rx_overflow = 0;
  2981. }
  2982. void rx_start(MGSLPC_INFO *info)
  2983. {
  2984. if (debug_level >= DEBUG_LEVEL_ISR)
  2985. printk("%s(%d):rx_start(%s)\n",
  2986. __FILE__,__LINE__, info->device_name );
  2987. rx_reset_buffers(info);
  2988. info->rx_enabled = 0;
  2989. info->rx_overflow = 0;
  2990. /* MODE:03 RAC Receiver Active, 1=active */
  2991. set_reg_bits(info, CHA + MODE, BIT3);
  2992. info->rx_enabled = 1;
  2993. }
  2994. void tx_start(MGSLPC_INFO *info)
  2995. {
  2996. if (debug_level >= DEBUG_LEVEL_ISR)
  2997. printk("%s(%d):tx_start(%s)\n",
  2998. __FILE__,__LINE__, info->device_name );
  2999. if (info->tx_count) {
  3000. /* If auto RTS enabled and RTS is inactive, then assert */
  3001. /* RTS and set a flag indicating that the driver should */
  3002. /* negate RTS when the transmission completes. */
  3003. info->drop_rts_on_tx_done = 0;
  3004. if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
  3005. get_signals(info);
  3006. if (!(info->serial_signals & SerialSignal_RTS)) {
  3007. info->serial_signals |= SerialSignal_RTS;
  3008. set_signals(info);
  3009. info->drop_rts_on_tx_done = 1;
  3010. }
  3011. }
  3012. if (info->params.mode == MGSL_MODE_ASYNC) {
  3013. if (!info->tx_active) {
  3014. info->tx_active = 1;
  3015. tx_ready(info);
  3016. }
  3017. } else {
  3018. info->tx_active = 1;
  3019. tx_ready(info);
  3020. info->tx_timer.expires = jiffies + msecs_to_jiffies(5000);
  3021. add_timer(&info->tx_timer);
  3022. }
  3023. }
  3024. if (!info->tx_enabled)
  3025. info->tx_enabled = 1;
  3026. }
  3027. void tx_stop(MGSLPC_INFO *info)
  3028. {
  3029. if (debug_level >= DEBUG_LEVEL_ISR)
  3030. printk("%s(%d):tx_stop(%s)\n",
  3031. __FILE__,__LINE__, info->device_name );
  3032. del_timer(&info->tx_timer);
  3033. info->tx_enabled = 0;
  3034. info->tx_active = 0;
  3035. }
  3036. /* Reset the adapter to a known state and prepare it for further use.
  3037. */
  3038. void reset_device(MGSLPC_INFO *info)
  3039. {
  3040. /* power up both channels (set BIT7) */
  3041. write_reg(info, CHA + CCR0, 0x80);
  3042. write_reg(info, CHB + CCR0, 0x80);
  3043. write_reg(info, CHA + MODE, 0);
  3044. write_reg(info, CHB + MODE, 0);
  3045. /* disable all interrupts */
  3046. irq_disable(info, CHA, 0xffff);
  3047. irq_disable(info, CHB, 0xffff);
  3048. port_irq_disable(info, 0xff);
  3049. /* PCR Port Configuration Register
  3050. *
  3051. * 07..04 DEC[3..0] Serial I/F select outputs
  3052. * 03 output, 1=AUTO CTS control enabled
  3053. * 02 RI Ring Indicator input 0=active
  3054. * 01 DSR input 0=active
  3055. * 00 DTR output 0=active
  3056. *
  3057. * 0000 0110
  3058. */
  3059. write_reg(info, PCR, 0x06);
  3060. /* PVR Port Value Register
  3061. *
  3062. * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
  3063. * 03 AUTO CTS output 1=enabled
  3064. * 02 RI Ring Indicator input
  3065. * 01 DSR input
  3066. * 00 DTR output (1=inactive)
  3067. *
  3068. * 0000 0001
  3069. */
  3070. // write_reg(info, PVR, PVR_DTR);
  3071. /* IPC Interrupt Port Configuration
  3072. *
  3073. * 07 VIS 1=Masked interrupts visible
  3074. * 06..05 Reserved, 0
  3075. * 04..03 SLA Slave address, 00 ignored
  3076. * 02 CASM Cascading Mode, 1=daisy chain
  3077. * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
  3078. *
  3079. * 0000 0101
  3080. */
  3081. write_reg(info, IPC, 0x05);
  3082. }
  3083. void async_mode(MGSLPC_INFO *info)
  3084. {
  3085. unsigned char val;
  3086. /* disable all interrupts */
  3087. irq_disable(info, CHA, 0xffff);
  3088. irq_disable(info, CHB, 0xffff);
  3089. port_irq_disable(info, 0xff);
  3090. /* MODE
  3091. *
  3092. * 07 Reserved, 0
  3093. * 06 FRTS RTS State, 0=active
  3094. * 05 FCTS Flow Control on CTS
  3095. * 04 FLON Flow Control Enable
  3096. * 03 RAC Receiver Active, 0 = inactive
  3097. * 02 RTS 0=Auto RTS, 1=manual RTS
  3098. * 01 TRS Timer Resolution, 1=512
  3099. * 00 TLP Test Loop, 0 = no loop
  3100. *
  3101. * 0000 0110
  3102. */
  3103. val = 0x06;
  3104. if (info->params.loopback)
  3105. val |= BIT0;
  3106. /* preserve RTS state */
  3107. if (!(info->serial_signals & SerialSignal_RTS))
  3108. val |= BIT6;
  3109. write_reg(info, CHA + MODE, val);
  3110. /* CCR0
  3111. *
  3112. * 07 PU Power Up, 1=active, 0=power down
  3113. * 06 MCE Master Clock Enable, 1=enabled
  3114. * 05 Reserved, 0
  3115. * 04..02 SC[2..0] Encoding, 000=NRZ
  3116. * 01..00 SM[1..0] Serial Mode, 11=Async
  3117. *
  3118. * 1000 0011
  3119. */
  3120. write_reg(info, CHA + CCR0, 0x83);
  3121. /* CCR1
  3122. *
  3123. * 07..05 Reserved, 0
  3124. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  3125. * 03 BCR Bit Clock Rate, 1=16x
  3126. * 02..00 CM[2..0] Clock Mode, 111=BRG
  3127. *
  3128. * 0001 1111
  3129. */
  3130. write_reg(info, CHA + CCR1, 0x1f);
  3131. /* CCR2 (channel A)
  3132. *
  3133. * 07..06 BGR[9..8] Baud rate bits 9..8
  3134. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  3135. * 04 SSEL Clock source select, 1=submode b
  3136. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  3137. * 02 RWX Read/Write Exchange 0=disabled
  3138. * 01 Reserved, 0
  3139. * 00 DIV, data inversion 0=disabled, 1=enabled
  3140. *
  3141. * 0001 0000
  3142. */
  3143. write_reg(info, CHA + CCR2, 0x10);
  3144. /* CCR3
  3145. *
  3146. * 07..01 Reserved, 0
  3147. * 00 PSD DPLL Phase Shift Disable
  3148. *
  3149. * 0000 0000
  3150. */
  3151. write_reg(info, CHA + CCR3, 0);
  3152. /* CCR4
  3153. *
  3154. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  3155. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  3156. * 05 TST1 Test Pin, 0=normal operation
  3157. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  3158. * 03..00 Reserved, must be 0
  3159. *
  3160. * 0101 0000
  3161. */
  3162. write_reg(info, CHA + CCR4, 0x50);
  3163. mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
  3164. /* DAFO Data Format
  3165. *
  3166. * 07 Reserved, 0
  3167. * 06 XBRK transmit break, 0=normal operation
  3168. * 05 Stop bits (0=1, 1=2)
  3169. * 04..03 PAR[1..0] Parity (01=odd, 10=even)
  3170. * 02 PAREN Parity Enable
  3171. * 01..00 CHL[1..0] Character Length (00=8, 01=7)
  3172. *
  3173. */
  3174. val = 0x00;
  3175. if (info->params.data_bits != 8)
  3176. val |= BIT0; /* 7 bits */
  3177. if (info->params.stop_bits != 1)
  3178. val |= BIT5;
  3179. if (info->params.parity != ASYNC_PARITY_NONE)
  3180. {
  3181. val |= BIT2; /* Parity enable */
  3182. if (info->params.parity == ASYNC_PARITY_ODD)
  3183. val |= BIT3;
  3184. else
  3185. val |= BIT4;
  3186. }
  3187. write_reg(info, CHA + DAFO, val);
  3188. /* RFC Rx FIFO Control
  3189. *
  3190. * 07 Reserved, 0
  3191. * 06 DPS, 1=parity bit not stored in data byte
  3192. * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
  3193. * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
  3194. * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
  3195. * 01 Reserved, 0
  3196. * 00 TCDE Terminate Char Detect Enable, 0=disabled
  3197. *
  3198. * 0101 1100
  3199. */
  3200. write_reg(info, CHA + RFC, 0x5c);
  3201. /* RLCR Receive length check register
  3202. *
  3203. * Max frame length = (RL + 1) * 32
  3204. */
  3205. write_reg(info, CHA + RLCR, 0);
  3206. /* XBCH Transmit Byte Count High
  3207. *
  3208. * 07 DMA mode, 0 = interrupt driven
  3209. * 06 NRM, 0=ABM (ignored)
  3210. * 05 CAS Carrier Auto Start
  3211. * 04 XC Transmit Continuously (ignored)
  3212. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  3213. *
  3214. * 0000 0000
  3215. */
  3216. val = 0x00;
  3217. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  3218. val |= BIT5;
  3219. write_reg(info, CHA + XBCH, val);
  3220. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  3221. irq_enable(info, CHA, IRQ_CTS);
  3222. /* MODE:03 RAC Receiver Active, 1=active */
  3223. set_reg_bits(info, CHA + MODE, BIT3);
  3224. enable_auxclk(info);
  3225. if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
  3226. irq_enable(info, CHB, IRQ_CTS);
  3227. /* PVR[3] 1=AUTO CTS active */
  3228. set_reg_bits(info, CHA + PVR, BIT3);
  3229. } else
  3230. clear_reg_bits(info, CHA + PVR, BIT3);
  3231. irq_enable(info, CHA,
  3232. IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
  3233. IRQ_ALLSENT + IRQ_TXFIFO);
  3234. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  3235. wait_command_complete(info, CHA);
  3236. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  3237. }
  3238. /* Set the HDLC idle mode for the transmitter.
  3239. */
  3240. void tx_set_idle(MGSLPC_INFO *info)
  3241. {
  3242. /* Note: ESCC2 only supports flags and one idle modes */
  3243. if (info->idle_mode == HDLC_TXIDLE_FLAGS)
  3244. set_reg_bits(info, CHA + CCR1, BIT3);
  3245. else
  3246. clear_reg_bits(info, CHA + CCR1, BIT3);
  3247. }
  3248. /* get state of the V24 status (input) signals.
  3249. */
  3250. void get_signals(MGSLPC_INFO *info)
  3251. {
  3252. unsigned char status = 0;
  3253. /* preserve DTR and RTS */
  3254. info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
  3255. if (read_reg(info, CHB + VSTR) & BIT7)
  3256. info->serial_signals |= SerialSignal_DCD;
  3257. if (read_reg(info, CHB + STAR) & BIT1)
  3258. info->serial_signals |= SerialSignal_CTS;
  3259. status = read_reg(info, CHA + PVR);
  3260. if (!(status & PVR_RI))
  3261. info->serial_signals |= SerialSignal_RI;
  3262. if (!(status & PVR_DSR))
  3263. info->serial_signals |= SerialSignal_DSR;
  3264. }
  3265. /* Set the state of DTR and RTS based on contents of
  3266. * serial_signals member of device extension.
  3267. */
  3268. void set_signals(MGSLPC_INFO *info)
  3269. {
  3270. unsigned char val;
  3271. val = read_reg(info, CHA + MODE);
  3272. if (info->params.mode == MGSL_MODE_ASYNC) {
  3273. if (info->serial_signals & SerialSignal_RTS)
  3274. val &= ~BIT6;
  3275. else
  3276. val |= BIT6;
  3277. } else {
  3278. if (info->serial_signals & SerialSignal_RTS)
  3279. val |= BIT2;
  3280. else
  3281. val &= ~BIT2;
  3282. }
  3283. write_reg(info, CHA + MODE, val);
  3284. if (info->serial_signals & SerialSignal_DTR)
  3285. clear_reg_bits(info, CHA + PVR, PVR_DTR);
  3286. else
  3287. set_reg_bits(info, CHA + PVR, PVR_DTR);
  3288. }
  3289. void rx_reset_buffers(MGSLPC_INFO *info)
  3290. {
  3291. RXBUF *buf;
  3292. int i;
  3293. info->rx_put = 0;
  3294. info->rx_get = 0;
  3295. info->rx_frame_count = 0;
  3296. for (i=0 ; i < info->rx_buf_count ; i++) {
  3297. buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
  3298. buf->status = buf->count = 0;
  3299. }
  3300. }
  3301. /* Attempt to return a received HDLC frame
  3302. * Only frames received without errors are returned.
  3303. *
  3304. * Returns 1 if frame returned, otherwise 0
  3305. */
  3306. int rx_get_frame(MGSLPC_INFO *info)
  3307. {
  3308. unsigned short status;
  3309. RXBUF *buf;
  3310. unsigned int framesize = 0;
  3311. unsigned long flags;
  3312. struct tty_struct *tty = info->tty;
  3313. int return_frame = 0;
  3314. if (info->rx_frame_count == 0)
  3315. return 0;
  3316. buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
  3317. status = buf->status;
  3318. /* 07 VFR 1=valid frame
  3319. * 06 RDO 1=data overrun
  3320. * 05 CRC 1=OK, 0=error
  3321. * 04 RAB 1=frame aborted
  3322. */
  3323. if ((status & 0xf0) != 0xA0) {
  3324. if (!(status & BIT7) || (status & BIT4))
  3325. info->icount.rxabort++;
  3326. else if (status & BIT6)
  3327. info->icount.rxover++;
  3328. else if (!(status & BIT5)) {
  3329. info->icount.rxcrc++;
  3330. if (info->params.crc_type & HDLC_CRC_RETURN_EX)
  3331. return_frame = 1;
  3332. }
  3333. framesize = 0;
  3334. #ifdef CONFIG_HDLC
  3335. {
  3336. struct net_device_stats *stats = hdlc_stats(info->netdev);
  3337. stats->rx_errors++;
  3338. stats->rx_frame_errors++;
  3339. }
  3340. #endif
  3341. } else
  3342. return_frame = 1;
  3343. if (return_frame)
  3344. framesize = buf->count;
  3345. if (debug_level >= DEBUG_LEVEL_BH)
  3346. printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
  3347. __FILE__,__LINE__,info->device_name,status,framesize);
  3348. if (debug_level >= DEBUG_LEVEL_DATA)
  3349. trace_block(info, buf->data, framesize, 0);
  3350. if (framesize) {
  3351. if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
  3352. framesize+1 > info->max_frame_size) ||
  3353. framesize > info->max_frame_size)
  3354. info->icount.rxlong++;
  3355. else {
  3356. if (status & BIT5)
  3357. info->icount.rxok++;
  3358. if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
  3359. *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
  3360. ++framesize;
  3361. }
  3362. #ifdef CONFIG_HDLC
  3363. if (info->netcount)
  3364. hdlcdev_rx(info, buf->data, framesize);
  3365. else
  3366. #endif
  3367. ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
  3368. }
  3369. }
  3370. spin_lock_irqsave(&info->lock,flags);
  3371. buf->status = buf->count = 0;
  3372. info->rx_frame_count--;
  3373. info->rx_get++;
  3374. if (info->rx_get >= info->rx_buf_count)
  3375. info->rx_get = 0;
  3376. spin_unlock_irqrestore(&info->lock,flags);
  3377. return 1;
  3378. }
  3379. BOOLEAN register_test(MGSLPC_INFO *info)
  3380. {
  3381. static unsigned char patterns[] =
  3382. { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
  3383. static unsigned int count = ARRAY_SIZE(patterns);
  3384. unsigned int i;
  3385. BOOLEAN rc = TRUE;
  3386. unsigned long flags;
  3387. spin_lock_irqsave(&info->lock,flags);
  3388. reset_device(info);
  3389. for (i = 0; i < count; i++) {
  3390. write_reg(info, XAD1, patterns[i]);
  3391. write_reg(info, XAD2, patterns[(i + 1) % count]);
  3392. if ((read_reg(info, XAD1) != patterns[i]) ||
  3393. (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
  3394. rc = FALSE;
  3395. break;
  3396. }
  3397. }
  3398. spin_unlock_irqrestore(&info->lock,flags);
  3399. return rc;
  3400. }
  3401. BOOLEAN irq_test(MGSLPC_INFO *info)
  3402. {
  3403. unsigned long end_time;
  3404. unsigned long flags;
  3405. spin_lock_irqsave(&info->lock,flags);
  3406. reset_device(info);
  3407. info->testing_irq = TRUE;
  3408. hdlc_mode(info);
  3409. info->irq_occurred = FALSE;
  3410. /* init hdlc mode */
  3411. irq_enable(info, CHA, IRQ_TIMER);
  3412. write_reg(info, CHA + TIMR, 0); /* 512 cycles */
  3413. issue_command(info, CHA, CMD_START_TIMER);
  3414. spin_unlock_irqrestore(&info->lock,flags);
  3415. end_time=100;
  3416. while(end_time-- && !info->irq_occurred) {
  3417. msleep_interruptible(10);
  3418. }
  3419. info->testing_irq = FALSE;
  3420. spin_lock_irqsave(&info->lock,flags);
  3421. reset_device(info);
  3422. spin_unlock_irqrestore(&info->lock,flags);
  3423. return info->irq_occurred ? TRUE : FALSE;
  3424. }
  3425. int adapter_test(MGSLPC_INFO *info)
  3426. {
  3427. if (!register_test(info)) {
  3428. info->init_error = DiagStatus_AddressFailure;
  3429. printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
  3430. __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
  3431. return -ENODEV;
  3432. }
  3433. if (!irq_test(info)) {
  3434. info->init_error = DiagStatus_IrqFailure;
  3435. printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
  3436. __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
  3437. return -ENODEV;
  3438. }
  3439. if (debug_level >= DEBUG_LEVEL_INFO)
  3440. printk("%s(%d):device %s passed diagnostics\n",
  3441. __FILE__,__LINE__,info->device_name);
  3442. return 0;
  3443. }
  3444. void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
  3445. {
  3446. int i;
  3447. int linecount;
  3448. if (xmit)
  3449. printk("%s tx data:\n",info->device_name);
  3450. else
  3451. printk("%s rx data:\n",info->device_name);
  3452. while(count) {
  3453. if (count > 16)
  3454. linecount = 16;
  3455. else
  3456. linecount = count;
  3457. for(i=0;i<linecount;i++)
  3458. printk("%02X ",(unsigned char)data[i]);
  3459. for(;i<17;i++)
  3460. printk(" ");
  3461. for(i=0;i<linecount;i++) {
  3462. if (data[i]>=040 && data[i]<=0176)
  3463. printk("%c",data[i]);
  3464. else
  3465. printk(".");
  3466. }
  3467. printk("\n");
  3468. data += linecount;
  3469. count -= linecount;
  3470. }
  3471. }
  3472. /* HDLC frame time out
  3473. * update stats and do tx completion processing
  3474. */
  3475. void tx_timeout(unsigned long context)
  3476. {
  3477. MGSLPC_INFO *info = (MGSLPC_INFO*)context;
  3478. unsigned long flags;
  3479. if ( debug_level >= DEBUG_LEVEL_INFO )
  3480. printk( "%s(%d):tx_timeout(%s)\n",
  3481. __FILE__,__LINE__,info->device_name);
  3482. if(info->tx_active &&
  3483. info->params.mode == MGSL_MODE_HDLC) {
  3484. info->icount.txtimeout++;
  3485. }
  3486. spin_lock_irqsave(&info->lock,flags);
  3487. info->tx_active = 0;
  3488. info->tx_count = info->tx_put = info->tx_get = 0;
  3489. spin_unlock_irqrestore(&info->lock,flags);
  3490. #ifdef CONFIG_HDLC
  3491. if (info->netcount)
  3492. hdlcdev_tx_done(info);
  3493. else
  3494. #endif
  3495. bh_transmit(info);
  3496. }
  3497. #ifdef CONFIG_HDLC
  3498. /**
  3499. * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
  3500. * set encoding and frame check sequence (FCS) options
  3501. *
  3502. * dev pointer to network device structure
  3503. * encoding serial encoding setting
  3504. * parity FCS setting
  3505. *
  3506. * returns 0 if success, otherwise error code
  3507. */
  3508. static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
  3509. unsigned short parity)
  3510. {
  3511. MGSLPC_INFO *info = dev_to_port(dev);
  3512. unsigned char new_encoding;
  3513. unsigned short new_crctype;
  3514. /* return error if TTY interface open */
  3515. if (info->count)
  3516. return -EBUSY;
  3517. switch (encoding)
  3518. {
  3519. case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
  3520. case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
  3521. case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
  3522. case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
  3523. case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
  3524. default: return -EINVAL;
  3525. }
  3526. switch (parity)
  3527. {
  3528. case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
  3529. case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
  3530. case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
  3531. default: return -EINVAL;
  3532. }
  3533. info->params.encoding = new_encoding;
  3534. info->params.crc_type = new_crctype;;
  3535. /* if network interface up, reprogram hardware */
  3536. if (info->netcount)
  3537. mgslpc_program_hw(info);
  3538. return 0;
  3539. }
  3540. /**
  3541. * called by generic HDLC layer to send frame
  3542. *
  3543. * skb socket buffer containing HDLC frame
  3544. * dev pointer to network device structure
  3545. *
  3546. * returns 0 if success, otherwise error code
  3547. */
  3548. static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
  3549. {
  3550. MGSLPC_INFO *info = dev_to_port(dev);
  3551. struct net_device_stats *stats = hdlc_stats(dev);
  3552. unsigned long flags;
  3553. if (debug_level >= DEBUG_LEVEL_INFO)
  3554. printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
  3555. /* stop sending until this frame completes */
  3556. netif_stop_queue(dev);
  3557. /* copy data to device buffers */
  3558. memcpy(info->tx_buf, skb->data, skb->len);
  3559. info->tx_get = 0;
  3560. info->tx_put = info->tx_count = skb->len;
  3561. /* update network statistics */
  3562. stats->tx_packets++;
  3563. stats->tx_bytes += skb->len;
  3564. /* done with socket buffer, so free it */
  3565. dev_kfree_skb(skb);
  3566. /* save start time for transmit timeout detection */
  3567. dev->trans_start = jiffies;
  3568. /* start hardware transmitter if necessary */
  3569. spin_lock_irqsave(&info->lock,flags);
  3570. if (!info->tx_active)
  3571. tx_start(info);
  3572. spin_unlock_irqrestore(&info->lock,flags);
  3573. return 0;
  3574. }
  3575. /**
  3576. * called by network layer when interface enabled
  3577. * claim resources and initialize hardware
  3578. *
  3579. * dev pointer to network device structure
  3580. *
  3581. * returns 0 if success, otherwise error code
  3582. */
  3583. static int hdlcdev_open(struct net_device *dev)
  3584. {
  3585. MGSLPC_INFO *info = dev_to_port(dev);
  3586. int rc;
  3587. unsigned long flags;
  3588. if (debug_level >= DEBUG_LEVEL_INFO)
  3589. printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
  3590. /* generic HDLC layer open processing */
  3591. if ((rc = hdlc_open(dev)))
  3592. return rc;
  3593. /* arbitrate between network and tty opens */
  3594. spin_lock_irqsave(&info->netlock, flags);
  3595. if (info->count != 0 || info->netcount != 0) {
  3596. printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
  3597. spin_unlock_irqrestore(&info->netlock, flags);
  3598. return -EBUSY;
  3599. }
  3600. info->netcount=1;
  3601. spin_unlock_irqrestore(&info->netlock, flags);
  3602. /* claim resources and init adapter */
  3603. if ((rc = startup(info)) != 0) {
  3604. spin_lock_irqsave(&info->netlock, flags);
  3605. info->netcount=0;
  3606. spin_unlock_irqrestore(&info->netlock, flags);
  3607. return rc;
  3608. }
  3609. /* assert DTR and RTS, apply hardware settings */
  3610. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  3611. mgslpc_program_hw(info);
  3612. /* enable network layer transmit */
  3613. dev->trans_start = jiffies;
  3614. netif_start_queue(dev);
  3615. /* inform generic HDLC layer of current DCD status */
  3616. spin_lock_irqsave(&info->lock, flags);
  3617. get_signals(info);
  3618. spin_unlock_irqrestore(&info->lock, flags);
  3619. hdlc_set_carrier(info->serial_signals & SerialSignal_DCD, dev);
  3620. return 0;
  3621. }
  3622. /**
  3623. * called by network layer when interface is disabled
  3624. * shutdown hardware and release resources
  3625. *
  3626. * dev pointer to network device structure
  3627. *
  3628. * returns 0 if success, otherwise error code
  3629. */
  3630. static int hdlcdev_close(struct net_device *dev)
  3631. {
  3632. MGSLPC_INFO *info = dev_to_port(dev);
  3633. unsigned long flags;
  3634. if (debug_level >= DEBUG_LEVEL_INFO)
  3635. printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
  3636. netif_stop_queue(dev);
  3637. /* shutdown adapter and release resources */
  3638. shutdown(info);
  3639. hdlc_close(dev);
  3640. spin_lock_irqsave(&info->netlock, flags);
  3641. info->netcount=0;
  3642. spin_unlock_irqrestore(&info->netlock, flags);
  3643. return 0;
  3644. }
  3645. /**
  3646. * called by network layer to process IOCTL call to network device
  3647. *
  3648. * dev pointer to network device structure
  3649. * ifr pointer to network interface request structure
  3650. * cmd IOCTL command code
  3651. *
  3652. * returns 0 if success, otherwise error code
  3653. */
  3654. static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  3655. {
  3656. const size_t size = sizeof(sync_serial_settings);
  3657. sync_serial_settings new_line;
  3658. sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
  3659. MGSLPC_INFO *info = dev_to_port(dev);
  3660. unsigned int flags;
  3661. if (debug_level >= DEBUG_LEVEL_INFO)
  3662. printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
  3663. /* return error if TTY interface open */
  3664. if (info->count)
  3665. return -EBUSY;
  3666. if (cmd != SIOCWANDEV)
  3667. return hdlc_ioctl(dev, ifr, cmd);
  3668. switch(ifr->ifr_settings.type) {
  3669. case IF_GET_IFACE: /* return current sync_serial_settings */
  3670. ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
  3671. if (ifr->ifr_settings.size < size) {
  3672. ifr->ifr_settings.size = size; /* data size wanted */
  3673. return -ENOBUFS;
  3674. }
  3675. flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3676. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3677. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3678. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3679. switch (flags){
  3680. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
  3681. case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
  3682. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
  3683. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
  3684. default: new_line.clock_type = CLOCK_DEFAULT;
  3685. }
  3686. new_line.clock_rate = info->params.clock_speed;
  3687. new_line.loopback = info->params.loopback ? 1:0;
  3688. if (copy_to_user(line, &new_line, size))
  3689. return -EFAULT;
  3690. return 0;
  3691. case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
  3692. if(!capable(CAP_NET_ADMIN))
  3693. return -EPERM;
  3694. if (copy_from_user(&new_line, line, size))
  3695. return -EFAULT;
  3696. switch (new_line.clock_type)
  3697. {
  3698. case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
  3699. case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
  3700. case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
  3701. case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
  3702. case CLOCK_DEFAULT: flags = info->params.flags &
  3703. (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3704. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3705. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3706. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
  3707. default: return -EINVAL;
  3708. }
  3709. if (new_line.loopback != 0 && new_line.loopback != 1)
  3710. return -EINVAL;
  3711. info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3712. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3713. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3714. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3715. info->params.flags |= flags;
  3716. info->params.loopback = new_line.loopback;
  3717. if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
  3718. info->params.clock_speed = new_line.clock_rate;
  3719. else
  3720. info->params.clock_speed = 0;
  3721. /* if network interface up, reprogram hardware */
  3722. if (info->netcount)
  3723. mgslpc_program_hw(info);
  3724. return 0;
  3725. default:
  3726. return hdlc_ioctl(dev, ifr, cmd);
  3727. }
  3728. }
  3729. /**
  3730. * called by network layer when transmit timeout is detected
  3731. *
  3732. * dev pointer to network device structure
  3733. */
  3734. static void hdlcdev_tx_timeout(struct net_device *dev)
  3735. {
  3736. MGSLPC_INFO *info = dev_to_port(dev);
  3737. struct net_device_stats *stats = hdlc_stats(dev);
  3738. unsigned long flags;
  3739. if (debug_level >= DEBUG_LEVEL_INFO)
  3740. printk("hdlcdev_tx_timeout(%s)\n",dev->name);
  3741. stats->tx_errors++;
  3742. stats->tx_aborted_errors++;
  3743. spin_lock_irqsave(&info->lock,flags);
  3744. tx_stop(info);
  3745. spin_unlock_irqrestore(&info->lock,flags);
  3746. netif_wake_queue(dev);
  3747. }
  3748. /**
  3749. * called by device driver when transmit completes
  3750. * reenable network layer transmit if stopped
  3751. *
  3752. * info pointer to device instance information
  3753. */
  3754. static void hdlcdev_tx_done(MGSLPC_INFO *info)
  3755. {
  3756. if (netif_queue_stopped(info->netdev))
  3757. netif_wake_queue(info->netdev);
  3758. }
  3759. /**
  3760. * called by device driver when frame received
  3761. * pass frame to network layer
  3762. *
  3763. * info pointer to device instance information
  3764. * buf pointer to buffer contianing frame data
  3765. * size count of data bytes in buf
  3766. */
  3767. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
  3768. {
  3769. struct sk_buff *skb = dev_alloc_skb(size);
  3770. struct net_device *dev = info->netdev;
  3771. struct net_device_stats *stats = hdlc_stats(dev);
  3772. if (debug_level >= DEBUG_LEVEL_INFO)
  3773. printk("hdlcdev_rx(%s)\n",dev->name);
  3774. if (skb == NULL) {
  3775. printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
  3776. stats->rx_dropped++;
  3777. return;
  3778. }
  3779. memcpy(skb_put(skb, size),buf,size);
  3780. skb->protocol = hdlc_type_trans(skb, info->netdev);
  3781. stats->rx_packets++;
  3782. stats->rx_bytes += size;
  3783. netif_rx(skb);
  3784. info->netdev->last_rx = jiffies;
  3785. }
  3786. /**
  3787. * called by device driver when adding device instance
  3788. * do generic HDLC initialization
  3789. *
  3790. * info pointer to device instance information
  3791. *
  3792. * returns 0 if success, otherwise error code
  3793. */
  3794. static int hdlcdev_init(MGSLPC_INFO *info)
  3795. {
  3796. int rc;
  3797. struct net_device *dev;
  3798. hdlc_device *hdlc;
  3799. /* allocate and initialize network and HDLC layer objects */
  3800. if (!(dev = alloc_hdlcdev(info))) {
  3801. printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
  3802. return -ENOMEM;
  3803. }
  3804. /* for network layer reporting purposes only */
  3805. dev->base_addr = info->io_base;
  3806. dev->irq = info->irq_level;
  3807. /* network layer callbacks and settings */
  3808. dev->do_ioctl = hdlcdev_ioctl;
  3809. dev->open = hdlcdev_open;
  3810. dev->stop = hdlcdev_close;
  3811. dev->tx_timeout = hdlcdev_tx_timeout;
  3812. dev->watchdog_timeo = 10*HZ;
  3813. dev->tx_queue_len = 50;
  3814. /* generic HDLC layer callbacks and settings */
  3815. hdlc = dev_to_hdlc(dev);
  3816. hdlc->attach = hdlcdev_attach;
  3817. hdlc->xmit = hdlcdev_xmit;
  3818. /* register objects with HDLC layer */
  3819. if ((rc = register_hdlc_device(dev))) {
  3820. printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
  3821. free_netdev(dev);
  3822. return rc;
  3823. }
  3824. info->netdev = dev;
  3825. return 0;
  3826. }
  3827. /**
  3828. * called by device driver when removing device instance
  3829. * do generic HDLC cleanup
  3830. *
  3831. * info pointer to device instance information
  3832. */
  3833. static void hdlcdev_exit(MGSLPC_INFO *info)
  3834. {
  3835. unregister_hdlc_device(info->netdev);
  3836. free_netdev(info->netdev);
  3837. info->netdev = NULL;
  3838. }
  3839. #endif /* CONFIG_HDLC */