prep_setup.c 28 KB

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  1. /*
  2. * arch/ppc/platforms/setup.c
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. * Adapted from 'alpha' version by Gary Thomas
  6. * Modified by Cort Dougan (cort@cs.nmt.edu)
  7. *
  8. * Support for PReP (Motorola MTX/MVME)
  9. * by Troy Benjegerdes (hozer@drgw.net)
  10. */
  11. /*
  12. * bootup setup stuff..
  13. */
  14. #include <linux/config.h>
  15. #include <linux/delay.h>
  16. #include <linux/module.h>
  17. #include <linux/errno.h>
  18. #include <linux/sched.h>
  19. #include <linux/kernel.h>
  20. #include <linux/mm.h>
  21. #include <linux/stddef.h>
  22. #include <linux/unistd.h>
  23. #include <linux/ptrace.h>
  24. #include <linux/slab.h>
  25. #include <linux/user.h>
  26. #include <linux/a.out.h>
  27. #include <linux/tty.h>
  28. #include <linux/major.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/reboot.h>
  31. #include <linux/init.h>
  32. #include <linux/initrd.h>
  33. #include <linux/ioport.h>
  34. #include <linux/console.h>
  35. #include <linux/timex.h>
  36. #include <linux/pci.h>
  37. #include <linux/ide.h>
  38. #include <linux/seq_file.h>
  39. #include <linux/root_dev.h>
  40. #include <asm/sections.h>
  41. #include <asm/mmu.h>
  42. #include <asm/processor.h>
  43. #include <asm/residual.h>
  44. #include <asm/io.h>
  45. #include <asm/pgtable.h>
  46. #include <asm/cache.h>
  47. #include <asm/dma.h>
  48. #include <asm/machdep.h>
  49. #include <asm/mc146818rtc.h>
  50. #include <asm/mk48t59.h>
  51. #include <asm/prep_nvram.h>
  52. #include <asm/raven.h>
  53. #include <asm/vga.h>
  54. #include <asm/time.h>
  55. #include <asm/mpc10x.h>
  56. #include <asm/i8259.h>
  57. #include <asm/open_pic.h>
  58. #include <asm/pci-bridge.h>
  59. #include <asm/todc.h>
  60. /* prep registers for L2 */
  61. #define CACHECRBA 0x80000823 /* Cache configuration register address */
  62. #define L2CACHE_MASK 0x03 /* Mask for 2 L2 Cache bits */
  63. #define L2CACHE_512KB 0x00 /* 512KB */
  64. #define L2CACHE_256KB 0x01 /* 256KB */
  65. #define L2CACHE_1MB 0x02 /* 1MB */
  66. #define L2CACHE_NONE 0x03 /* NONE */
  67. #define L2CACHE_PARITY 0x08 /* Mask for L2 Cache Parity Protected bit */
  68. TODC_ALLOC();
  69. unsigned char ucBoardRev;
  70. unsigned char ucBoardRevMaj, ucBoardRevMin;
  71. extern unsigned char prep_nvram_read_val(int addr);
  72. extern void prep_nvram_write_val(int addr,
  73. unsigned char val);
  74. extern unsigned char rs_nvram_read_val(int addr);
  75. extern void rs_nvram_write_val(int addr,
  76. unsigned char val);
  77. extern void ibm_prep_init(void);
  78. extern void prep_find_bridges(void);
  79. int _prep_type;
  80. extern void prep_residual_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
  81. extern void prep_sandalfoot_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
  82. extern void prep_thinkpad_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
  83. extern void prep_carolina_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
  84. extern void prep_tiger1_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi);
  85. #define cached_21 (((char *)(ppc_cached_irq_mask))[3])
  86. #define cached_A1 (((char *)(ppc_cached_irq_mask))[2])
  87. #ifdef CONFIG_SOUND_CS4232
  88. long ppc_cs4232_dma, ppc_cs4232_dma2;
  89. #endif
  90. extern PTE *Hash, *Hash_end;
  91. extern unsigned long Hash_size, Hash_mask;
  92. extern int probingmem;
  93. extern unsigned long loops_per_jiffy;
  94. #ifdef CONFIG_SOUND_CS4232
  95. EXPORT_SYMBOL(ppc_cs4232_dma);
  96. EXPORT_SYMBOL(ppc_cs4232_dma2);
  97. #endif
  98. /* useful ISA ports */
  99. #define PREP_SYSCTL 0x81c
  100. /* present in the IBM reference design; possibly identical in Mot boxes: */
  101. #define PREP_IBM_SIMM_ID 0x803 /* SIMM size: 32 or 8 MiB */
  102. #define PREP_IBM_SIMM_PRESENCE 0x804
  103. #define PREP_IBM_EQUIPMENT 0x80c
  104. #define PREP_IBM_L2INFO 0x80d
  105. #define PREP_IBM_PM1 0x82a /* power management register 1 */
  106. #define PREP_IBM_PLANAR 0x852 /* planar ID - identifies the motherboard */
  107. #define PREP_IBM_DISP 0x8c0 /* 4-digit LED display */
  108. /* Equipment Present Register masks: */
  109. #define PREP_IBM_EQUIPMENT_RESERVED 0x80
  110. #define PREP_IBM_EQUIPMENT_SCSIFUSE 0x40
  111. #define PREP_IBM_EQUIPMENT_L2_COPYBACK 0x08
  112. #define PREP_IBM_EQUIPMENT_L2_256 0x04
  113. #define PREP_IBM_EQUIPMENT_CPU 0x02
  114. #define PREP_IBM_EQUIPMENT_L2 0x01
  115. /* planar ID values: */
  116. /* Sandalfoot/Sandalbow (6015/7020) */
  117. #define PREP_IBM_SANDALFOOT 0xfc
  118. /* Woodfield, Thinkpad 850/860 (6042/7249) */
  119. #define PREP_IBM_THINKPAD 0xff /* planar ID unimplemented */
  120. /* PowerSeries 830/850 (6050/6070) */
  121. #define PREP_IBM_CAROLINA_IDE_0 0xf0
  122. #define PREP_IBM_CAROLINA_IDE_1 0xf1
  123. #define PREP_IBM_CAROLINA_IDE_2 0xf2
  124. #define PREP_IBM_CAROLINA_IDE_3 0xf3
  125. /* 7248-43P */
  126. #define PREP_IBM_CAROLINA_SCSI_0 0xf4
  127. #define PREP_IBM_CAROLINA_SCSI_1 0xf5
  128. #define PREP_IBM_CAROLINA_SCSI_2 0xf6
  129. #define PREP_IBM_CAROLINA_SCSI_3 0xf7 /* missing from Carolina Tech Spec */
  130. /* Tiger1 (7043-140) */
  131. #define PREP_IBM_TIGER1_133 0xd1
  132. #define PREP_IBM_TIGER1_166 0xd2
  133. #define PREP_IBM_TIGER1_180 0xd3
  134. #define PREP_IBM_TIGER1_xxx 0xd4 /* unknown, but probably exists */
  135. #define PREP_IBM_TIGER1_333 0xd5 /* missing from Tiger Tech Spec */
  136. /* setup_ibm_pci:
  137. * set Motherboard_map_name, Motherboard_map, Motherboard_routes.
  138. * return 8259 edge/level masks.
  139. */
  140. void (*setup_ibm_pci)(char *irq_lo, char *irq_hi);
  141. extern char *Motherboard_map_name; /* for use in *_cpuinfo */
  142. /*
  143. * As found in the PReP reference implementation.
  144. * Used by Thinkpad, Sandalfoot (6015/7020), and all Motorola PReP.
  145. */
  146. static void __init
  147. prep_gen_enable_l2(void)
  148. {
  149. outb(inb(PREP_SYSCTL) | 0x3, PREP_SYSCTL);
  150. }
  151. /* Used by Carolina and Tiger1 */
  152. static void __init
  153. prep_carolina_enable_l2(void)
  154. {
  155. outb(inb(PREP_SYSCTL) | 0xc0, PREP_SYSCTL);
  156. }
  157. /* cpuinfo code common to all IBM PReP */
  158. static void
  159. prep_ibm_cpuinfo(struct seq_file *m)
  160. {
  161. unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
  162. seq_printf(m, "machine\t\t: PReP %s\n", Motherboard_map_name);
  163. seq_printf(m, "upgrade cpu\t: ");
  164. if (equip_reg & PREP_IBM_EQUIPMENT_CPU) {
  165. seq_printf(m, "not ");
  166. }
  167. seq_printf(m, "present\n");
  168. /* print info about the SCSI fuse */
  169. seq_printf(m, "scsi fuse\t: ");
  170. if (equip_reg & PREP_IBM_EQUIPMENT_SCSIFUSE)
  171. seq_printf(m, "ok");
  172. else
  173. seq_printf(m, "bad");
  174. seq_printf(m, "\n");
  175. /* print info about SIMMs */
  176. if (have_residual_data) {
  177. int i;
  178. seq_printf(m, "simms\t\t: ");
  179. for (i = 0; (res->ActualNumMemories) && (i < MAX_MEMS); i++) {
  180. if (res->Memories[i].SIMMSize != 0)
  181. seq_printf(m, "%d:%ldMiB ", i,
  182. (res->Memories[i].SIMMSize > 1024) ?
  183. res->Memories[i].SIMMSize>>20 :
  184. res->Memories[i].SIMMSize);
  185. }
  186. seq_printf(m, "\n");
  187. }
  188. }
  189. static int
  190. prep_gen_cpuinfo(struct seq_file *m)
  191. {
  192. prep_ibm_cpuinfo(m);
  193. return 0;
  194. }
  195. static int
  196. prep_sandalfoot_cpuinfo(struct seq_file *m)
  197. {
  198. unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
  199. prep_ibm_cpuinfo(m);
  200. /* report amount and type of L2 cache present */
  201. seq_printf(m, "L2 cache\t: ");
  202. if (equip_reg & PREP_IBM_EQUIPMENT_L2) {
  203. seq_printf(m, "not present");
  204. } else {
  205. if (equip_reg & PREP_IBM_EQUIPMENT_L2_256)
  206. seq_printf(m, "256KiB");
  207. else
  208. seq_printf(m, "unknown size");
  209. if (equip_reg & PREP_IBM_EQUIPMENT_L2_COPYBACK)
  210. seq_printf(m, ", copy-back");
  211. else
  212. seq_printf(m, ", write-through");
  213. }
  214. seq_printf(m, "\n");
  215. return 0;
  216. }
  217. static int
  218. prep_thinkpad_cpuinfo(struct seq_file *m)
  219. {
  220. unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
  221. char *cpubus_speed, *pci_speed;
  222. prep_ibm_cpuinfo(m);
  223. /* report amount and type of L2 cache present */
  224. seq_printf(m, "l2 cache\t: ");
  225. if ((equip_reg & 0x1) == 0) {
  226. switch ((equip_reg & 0xc) >> 2) {
  227. case 0x0:
  228. seq_printf(m, "128KiB look-aside 2-way write-through\n");
  229. break;
  230. case 0x1:
  231. seq_printf(m, "512KiB look-aside direct-mapped write-back\n");
  232. break;
  233. case 0x2:
  234. seq_printf(m, "256KiB look-aside 2-way write-through\n");
  235. break;
  236. case 0x3:
  237. seq_printf(m, "256KiB look-aside direct-mapped write-back\n");
  238. break;
  239. }
  240. } else {
  241. seq_printf(m, "not present\n");
  242. }
  243. /* report bus speeds because we can */
  244. if ((equip_reg & 0x80) == 0) {
  245. switch ((equip_reg & 0x30) >> 4) {
  246. case 0x1:
  247. cpubus_speed = "50";
  248. pci_speed = "25";
  249. break;
  250. case 0x3:
  251. cpubus_speed = "66";
  252. pci_speed = "33";
  253. break;
  254. default:
  255. cpubus_speed = "unknown";
  256. pci_speed = "unknown";
  257. break;
  258. }
  259. } else {
  260. switch ((equip_reg & 0x30) >> 4) {
  261. case 0x1:
  262. cpubus_speed = "25";
  263. pci_speed = "25";
  264. break;
  265. case 0x2:
  266. cpubus_speed = "60";
  267. pci_speed = "30";
  268. break;
  269. case 0x3:
  270. cpubus_speed = "33";
  271. pci_speed = "33";
  272. break;
  273. default:
  274. cpubus_speed = "unknown";
  275. pci_speed = "unknown";
  276. break;
  277. }
  278. }
  279. seq_printf(m, "60x bus\t\t: %sMHz\n", cpubus_speed);
  280. seq_printf(m, "pci bus\t\t: %sMHz\n", pci_speed);
  281. return 0;
  282. }
  283. static int
  284. prep_carolina_cpuinfo(struct seq_file *m)
  285. {
  286. unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
  287. prep_ibm_cpuinfo(m);
  288. /* report amount and type of L2 cache present */
  289. seq_printf(m, "l2 cache\t: ");
  290. if ((equip_reg & 0x1) == 0) {
  291. unsigned int l2_reg = inb(PREP_IBM_L2INFO);
  292. /* L2 size */
  293. if ((l2_reg & 0x60) == 0)
  294. seq_printf(m, "256KiB");
  295. else if ((l2_reg & 0x60) == 0x20)
  296. seq_printf(m, "512KiB");
  297. else
  298. seq_printf(m, "unknown size");
  299. /* L2 type */
  300. if ((l2_reg & 0x3) == 0)
  301. seq_printf(m, ", async");
  302. else if ((l2_reg & 0x3) == 1)
  303. seq_printf(m, ", sync");
  304. else
  305. seq_printf(m, ", unknown type");
  306. seq_printf(m, "\n");
  307. } else {
  308. seq_printf(m, "not present\n");
  309. }
  310. return 0;
  311. }
  312. static int
  313. prep_tiger1_cpuinfo(struct seq_file *m)
  314. {
  315. unsigned int l2_reg = inb(PREP_IBM_L2INFO);
  316. prep_ibm_cpuinfo(m);
  317. /* report amount and type of L2 cache present */
  318. seq_printf(m, "l2 cache\t: ");
  319. if ((l2_reg & 0xf) == 0xf) {
  320. seq_printf(m, "not present\n");
  321. } else {
  322. if (l2_reg & 0x8)
  323. seq_printf(m, "async, ");
  324. else
  325. seq_printf(m, "sync burst, ");
  326. if (l2_reg & 0x4)
  327. seq_printf(m, "parity, ");
  328. else
  329. seq_printf(m, "no parity, ");
  330. switch (l2_reg & 0x3) {
  331. case 0x0:
  332. seq_printf(m, "256KiB\n");
  333. break;
  334. case 0x1:
  335. seq_printf(m, "512KiB\n");
  336. break;
  337. case 0x2:
  338. seq_printf(m, "1MiB\n");
  339. break;
  340. default:
  341. seq_printf(m, "unknown size\n");
  342. break;
  343. }
  344. }
  345. return 0;
  346. }
  347. /* Used by all Motorola PReP */
  348. static int
  349. prep_mot_cpuinfo(struct seq_file *m)
  350. {
  351. unsigned int cachew = *((unsigned char *)CACHECRBA);
  352. seq_printf(m, "machine\t\t: PReP %s\n", Motherboard_map_name);
  353. /* report amount and type of L2 cache present */
  354. seq_printf(m, "l2 cache\t: ");
  355. switch (cachew & L2CACHE_MASK) {
  356. case L2CACHE_512KB:
  357. seq_printf(m, "512KiB");
  358. break;
  359. case L2CACHE_256KB:
  360. seq_printf(m, "256KiB");
  361. break;
  362. case L2CACHE_1MB:
  363. seq_printf(m, "1MiB");
  364. break;
  365. case L2CACHE_NONE:
  366. seq_printf(m, "none\n");
  367. goto no_l2;
  368. break;
  369. default:
  370. seq_printf(m, "%x\n", cachew);
  371. }
  372. seq_printf(m, ", parity %s",
  373. (cachew & L2CACHE_PARITY)? "enabled" : "disabled");
  374. seq_printf(m, " SRAM:");
  375. switch ( ((cachew & 0xf0) >> 4) & ~(0x3) ) {
  376. case 1: seq_printf(m, "synchronous, parity, flow-through\n");
  377. break;
  378. case 2: seq_printf(m, "asynchronous, no parity\n");
  379. break;
  380. case 3: seq_printf(m, "asynchronous, parity\n");
  381. break;
  382. default:seq_printf(m, "synchronous, pipelined, no parity\n");
  383. break;
  384. }
  385. no_l2:
  386. /* print info about SIMMs */
  387. if (have_residual_data) {
  388. int i;
  389. seq_printf(m, "simms\t\t: ");
  390. for (i = 0; (res->ActualNumMemories) && (i < MAX_MEMS); i++) {
  391. if (res->Memories[i].SIMMSize != 0)
  392. seq_printf(m, "%d:%ldM ", i,
  393. (res->Memories[i].SIMMSize > 1024) ?
  394. res->Memories[i].SIMMSize>>20 :
  395. res->Memories[i].SIMMSize);
  396. }
  397. seq_printf(m, "\n");
  398. }
  399. return 0;
  400. }
  401. static void
  402. prep_restart(char *cmd)
  403. {
  404. #define PREP_SP92 0x92 /* Special Port 92 */
  405. local_irq_disable(); /* no interrupts */
  406. /* set exception prefix high - to the prom */
  407. _nmask_and_or_msr(0, MSR_IP);
  408. /* make sure bit 0 (reset) is a 0 */
  409. outb( inb(PREP_SP92) & ~1L , PREP_SP92);
  410. /* signal a reset to system control port A - soft reset */
  411. outb( inb(PREP_SP92) | 1 , PREP_SP92);
  412. while ( 1 ) ;
  413. /* not reached */
  414. #undef PREP_SP92
  415. }
  416. static void
  417. prep_halt(void)
  418. {
  419. local_irq_disable(); /* no interrupts */
  420. /* set exception prefix high - to the prom */
  421. _nmask_and_or_msr(0, MSR_IP);
  422. while ( 1 ) ;
  423. /* not reached */
  424. }
  425. /* Carrera is the power manager in the Thinkpads. Unfortunately not much is
  426. * known about it, so we can't power down.
  427. */
  428. static void
  429. prep_carrera_poweroff(void)
  430. {
  431. prep_halt();
  432. }
  433. /*
  434. * On most IBM PReP's, power management is handled by a Signetics 87c750
  435. * behind the Utah component on the ISA bus. To access the 750 you must write
  436. * a series of nibbles to port 0x82a (decoded by the Utah). This is described
  437. * somewhat in the IBM Carolina Technical Specification.
  438. * -Hollis
  439. */
  440. static void
  441. utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value)
  442. {
  443. /*
  444. * byte1: 0 0 0 1 0 d a5 a4
  445. * byte2: 0 0 0 1 a3 a2 a1 a0
  446. *
  447. * d = the bit's value, enabled or disabled
  448. * (a5 a4 a3) = the byte number, minus 20
  449. * (a2 a1 a0) = the bit number
  450. *
  451. * example: set the 5th bit of byte 21 (21.5)
  452. * a5 a4 a3 = 001 (byte 1)
  453. * a2 a1 a0 = 101 (bit 5)
  454. *
  455. * byte1 = 0001 0100 (0x14)
  456. * byte2 = 0001 1101 (0x1d)
  457. */
  458. unsigned char byte1=0x10, byte2=0x10;
  459. /* the 750's '20.0' is accessed as '0.0' through Utah (which adds 20) */
  460. bytenum -= 20;
  461. byte1 |= (!!value) << 2; /* set d */
  462. byte1 |= (bytenum >> 1) & 0x3; /* set a5, a4 */
  463. byte2 |= (bytenum & 0x1) << 3; /* set a3 */
  464. byte2 |= bitnum & 0x7; /* set a2, a1, a0 */
  465. outb(byte1, PREP_IBM_PM1); /* first nibble */
  466. mb();
  467. udelay(100); /* important: let controller recover */
  468. outb(byte2, PREP_IBM_PM1); /* second nibble */
  469. mb();
  470. udelay(100); /* important: let controller recover */
  471. }
  472. static void
  473. prep_sig750_poweroff(void)
  474. {
  475. /* tweak the power manager found in most IBM PRePs (except Thinkpads) */
  476. local_irq_disable();
  477. /* set exception prefix high - to the prom */
  478. _nmask_and_or_msr(0, MSR_IP);
  479. utah_sig87c750_setbit(21, 5, 1); /* set bit 21.5, "PMEXEC_OFF" */
  480. while (1) ;
  481. /* not reached */
  482. }
  483. static int
  484. prep_show_percpuinfo(struct seq_file *m, int i)
  485. {
  486. /* PREP's without residual data will give incorrect values here */
  487. seq_printf(m, "clock\t\t: ");
  488. if (have_residual_data)
  489. seq_printf(m, "%ldMHz\n",
  490. (res->VitalProductData.ProcessorHz > 1024) ?
  491. res->VitalProductData.ProcessorHz / 1000000 :
  492. res->VitalProductData.ProcessorHz);
  493. else
  494. seq_printf(m, "???\n");
  495. return 0;
  496. }
  497. #ifdef CONFIG_SOUND_CS4232
  498. static long __init masktoint(unsigned int i)
  499. {
  500. int t = -1;
  501. while (i >> ++t)
  502. ;
  503. return (t-1);
  504. }
  505. /*
  506. * ppc_cs4232_dma and ppc_cs4232_dma2 are used in include/asm/dma.h
  507. * to distinguish sound dma-channels from others. This is because
  508. * blocksize on 16 bit dma-channels 5,6,7 is 128k, but
  509. * the cs4232.c uses 64k like on 8 bit dma-channels 0,1,2,3
  510. */
  511. static void __init prep_init_sound(void)
  512. {
  513. PPC_DEVICE *audiodevice = NULL;
  514. /*
  515. * Get the needed resource informations from residual data.
  516. *
  517. */
  518. if (have_residual_data)
  519. audiodevice = residual_find_device(~0, NULL,
  520. MultimediaController, AudioController, -1, 0);
  521. if (audiodevice != NULL) {
  522. PnP_TAG_PACKET *pkt;
  523. pkt = PnP_find_packet((unsigned char *)&res->DevicePnPHeap[audiodevice->AllocatedOffset],
  524. S5_Packet, 0);
  525. if (pkt != NULL)
  526. ppc_cs4232_dma = masktoint(pkt->S5_Pack.DMAMask);
  527. pkt = PnP_find_packet((unsigned char*)&res->DevicePnPHeap[audiodevice->AllocatedOffset],
  528. S5_Packet, 1);
  529. if (pkt != NULL)
  530. ppc_cs4232_dma2 = masktoint(pkt->S5_Pack.DMAMask);
  531. }
  532. /*
  533. * These are the PReP specs' defaults for the cs4231. We use these
  534. * as fallback incase we don't have residual data.
  535. * At least the IBM Thinkpad 850 with IDE DMA Channels at 6 and 7
  536. * will use the other values.
  537. */
  538. if (audiodevice == NULL) {
  539. switch (_prep_type) {
  540. case _PREP_IBM:
  541. ppc_cs4232_dma = 1;
  542. ppc_cs4232_dma2 = -1;
  543. break;
  544. default:
  545. ppc_cs4232_dma = 6;
  546. ppc_cs4232_dma2 = 7;
  547. }
  548. }
  549. /*
  550. * Find a way to push these informations to the cs4232 driver
  551. * Give it out with printk, when not in cmd_line?
  552. * Append it to cmd_line and saved_command_line?
  553. * Format is cs4232=io,irq,dma,dma2
  554. */
  555. }
  556. #endif /* CONFIG_SOUND_CS4232 */
  557. /*
  558. * Fill out screen_info according to the residual data. This allows us to use
  559. * at least vesafb.
  560. */
  561. static void __init
  562. prep_init_vesa(void)
  563. {
  564. #if (defined(CONFIG_FB_VGA16) || defined(CONFIG_FB_VGA16_MODULE) || \
  565. defined(CONFIG_FB_VESA))
  566. PPC_DEVICE *vgadev = NULL;
  567. if (have_residual_data)
  568. vgadev = residual_find_device(~0, NULL, DisplayController,
  569. SVGAController, -1, 0);
  570. if (vgadev != NULL) {
  571. PnP_TAG_PACKET *pkt;
  572. pkt = PnP_find_large_vendor_packet(
  573. (unsigned char *)&res->DevicePnPHeap[vgadev->AllocatedOffset],
  574. 0x04, 0); /* 0x04 = Display Tag */
  575. if (pkt != NULL) {
  576. unsigned char *ptr = (unsigned char *)pkt;
  577. if (ptr[4]) {
  578. /* graphics mode */
  579. screen_info.orig_video_isVGA = VIDEO_TYPE_VLFB;
  580. screen_info.lfb_depth = ptr[4] * 8;
  581. screen_info.lfb_width = swab16(*(short *)(ptr+6));
  582. screen_info.lfb_height = swab16(*(short *)(ptr+8));
  583. screen_info.lfb_linelength = swab16(*(short *)(ptr+10));
  584. screen_info.lfb_base = swab32(*(long *)(ptr+12));
  585. screen_info.lfb_size = swab32(*(long *)(ptr+20)) / 65536;
  586. }
  587. }
  588. }
  589. #endif
  590. }
  591. /*
  592. * Set DBAT 2 to access 0x80000000 so early progress messages will work
  593. */
  594. static __inline__ void
  595. prep_set_bat(void)
  596. {
  597. /* wait for all outstanding memory access to complete */
  598. mb();
  599. /* setup DBATs */
  600. mtspr(SPRN_DBAT2U, 0x80001ffe);
  601. mtspr(SPRN_DBAT2L, 0x8000002a);
  602. /* wait for updates */
  603. mb();
  604. }
  605. /*
  606. * IBM 3-digit status LED
  607. */
  608. static unsigned int ibm_statusled_base;
  609. static void
  610. ibm_statusled_progress(char *s, unsigned short hex);
  611. static int
  612. ibm_statusled_panic(struct notifier_block *dummy1, unsigned long dummy2,
  613. void * dummy3)
  614. {
  615. ibm_statusled_progress(NULL, 0x505); /* SOS */
  616. return NOTIFY_DONE;
  617. }
  618. static struct notifier_block ibm_statusled_block = {
  619. ibm_statusled_panic,
  620. NULL,
  621. INT_MAX /* try to do it first */
  622. };
  623. static void
  624. ibm_statusled_progress(char *s, unsigned short hex)
  625. {
  626. static int notifier_installed;
  627. /*
  628. * Progress uses 4 digits and we have only 3. So, we map 0xffff to
  629. * 0xfff for display switch off. Out of range values are mapped to
  630. * 0xeff, as I'm told 0xf00 and above are reserved for hardware codes.
  631. * Install the panic notifier when the display is first switched off.
  632. */
  633. if (hex == 0xffff) {
  634. hex = 0xfff;
  635. if (!notifier_installed) {
  636. ++notifier_installed;
  637. notifier_chain_register(&panic_notifier_list,
  638. &ibm_statusled_block);
  639. }
  640. }
  641. else
  642. if (hex > 0xfff)
  643. hex = 0xeff;
  644. mb();
  645. outw(hex, ibm_statusled_base);
  646. }
  647. static void __init
  648. ibm_statusled_init(void)
  649. {
  650. /*
  651. * The IBM 3-digit LED display is specified in the residual data
  652. * as an operator panel device, type "System Status LED". Find
  653. * that device and determine its address. We validate all the
  654. * other parameters on the off-chance another, similar device
  655. * exists.
  656. */
  657. if (have_residual_data) {
  658. PPC_DEVICE *led;
  659. PnP_TAG_PACKET *pkt;
  660. led = residual_find_device(~0, NULL, SystemPeripheral,
  661. OperatorPanel, SystemStatusLED, 0);
  662. if (!led)
  663. return;
  664. pkt = PnP_find_packet((unsigned char *)
  665. &res->DevicePnPHeap[led->AllocatedOffset], S8_Packet, 0);
  666. if (!pkt)
  667. return;
  668. if (pkt->S8_Pack.IOInfo != ISAAddr16bit)
  669. return;
  670. if (*(unsigned short *)pkt->S8_Pack.RangeMin !=
  671. *(unsigned short *)pkt->S8_Pack.RangeMax)
  672. return;
  673. if (pkt->S8_Pack.IOAlign != 2)
  674. return;
  675. if (pkt->S8_Pack.IONum != 2)
  676. return;
  677. ibm_statusled_base = ld_le16((unsigned short *)
  678. (pkt->S8_Pack.RangeMin));
  679. ppc_md.progress = ibm_statusled_progress;
  680. }
  681. }
  682. static void __init
  683. prep_setup_arch(void)
  684. {
  685. unsigned char reg;
  686. int is_ide=0;
  687. /* init to some ~sane value until calibrate_delay() runs */
  688. loops_per_jiffy = 50000000;
  689. /* Lookup PCI host bridges */
  690. prep_find_bridges();
  691. /* Set up floppy in PS/2 mode */
  692. outb(0x09, SIO_CONFIG_RA);
  693. reg = inb(SIO_CONFIG_RD);
  694. reg = (reg & 0x3F) | 0x40;
  695. outb(reg, SIO_CONFIG_RD);
  696. outb(reg, SIO_CONFIG_RD); /* Have to write twice to change! */
  697. switch ( _prep_type )
  698. {
  699. case _PREP_IBM:
  700. reg = inb(PREP_IBM_PLANAR);
  701. printk(KERN_INFO "IBM planar ID: %02x", reg);
  702. switch (reg) {
  703. case PREP_IBM_SANDALFOOT:
  704. prep_gen_enable_l2();
  705. setup_ibm_pci = prep_sandalfoot_setup_pci;
  706. ppc_md.power_off = prep_sig750_poweroff;
  707. ppc_md.show_cpuinfo = prep_sandalfoot_cpuinfo;
  708. break;
  709. case PREP_IBM_THINKPAD:
  710. prep_gen_enable_l2();
  711. setup_ibm_pci = prep_thinkpad_setup_pci;
  712. ppc_md.power_off = prep_carrera_poweroff;
  713. ppc_md.show_cpuinfo = prep_thinkpad_cpuinfo;
  714. break;
  715. default:
  716. if (have_residual_data) {
  717. prep_gen_enable_l2();
  718. setup_ibm_pci = prep_residual_setup_pci;
  719. ppc_md.power_off = prep_halt;
  720. ppc_md.show_cpuinfo = prep_gen_cpuinfo;
  721. break;
  722. }
  723. else
  724. printk(" - unknown! Assuming Carolina");
  725. /* fall through */
  726. case PREP_IBM_CAROLINA_IDE_0:
  727. case PREP_IBM_CAROLINA_IDE_1:
  728. case PREP_IBM_CAROLINA_IDE_2:
  729. case PREP_IBM_CAROLINA_IDE_3:
  730. is_ide = 1;
  731. case PREP_IBM_CAROLINA_SCSI_0:
  732. case PREP_IBM_CAROLINA_SCSI_1:
  733. case PREP_IBM_CAROLINA_SCSI_2:
  734. case PREP_IBM_CAROLINA_SCSI_3:
  735. prep_carolina_enable_l2();
  736. setup_ibm_pci = prep_carolina_setup_pci;
  737. ppc_md.power_off = prep_sig750_poweroff;
  738. ppc_md.show_cpuinfo = prep_carolina_cpuinfo;
  739. break;
  740. case PREP_IBM_TIGER1_133:
  741. case PREP_IBM_TIGER1_166:
  742. case PREP_IBM_TIGER1_180:
  743. case PREP_IBM_TIGER1_xxx:
  744. case PREP_IBM_TIGER1_333:
  745. prep_carolina_enable_l2();
  746. setup_ibm_pci = prep_tiger1_setup_pci;
  747. ppc_md.power_off = prep_sig750_poweroff;
  748. ppc_md.show_cpuinfo = prep_tiger1_cpuinfo;
  749. break;
  750. }
  751. printk("\n");
  752. /* default root device */
  753. if (is_ide)
  754. ROOT_DEV = MKDEV(IDE0_MAJOR, 3);
  755. else
  756. ROOT_DEV = MKDEV(SCSI_DISK0_MAJOR, 3);
  757. break;
  758. case _PREP_Motorola:
  759. prep_gen_enable_l2();
  760. ppc_md.power_off = prep_halt;
  761. ppc_md.show_cpuinfo = prep_mot_cpuinfo;
  762. #ifdef CONFIG_BLK_DEV_INITRD
  763. if (initrd_start)
  764. ROOT_DEV = Root_RAM0;
  765. else
  766. #endif
  767. #ifdef CONFIG_ROOT_NFS
  768. ROOT_DEV = Root_NFS;
  769. #else
  770. ROOT_DEV = Root_SDA2;
  771. #endif
  772. break;
  773. }
  774. /* Read in NVRAM data */
  775. init_prep_nvram();
  776. /* if no bootargs, look in NVRAM */
  777. if ( cmd_line[0] == '\0' ) {
  778. char *bootargs;
  779. bootargs = prep_nvram_get_var("bootargs");
  780. if (bootargs != NULL) {
  781. strcpy(cmd_line, bootargs);
  782. /* again.. */
  783. strcpy(saved_command_line, cmd_line);
  784. }
  785. }
  786. #ifdef CONFIG_SOUND_CS4232
  787. prep_init_sound();
  788. #endif /* CONFIG_SOUND_CS4232 */
  789. prep_init_vesa();
  790. switch (_prep_type) {
  791. case _PREP_Motorola:
  792. raven_init();
  793. break;
  794. case _PREP_IBM:
  795. ibm_prep_init();
  796. break;
  797. }
  798. #ifdef CONFIG_VGA_CONSOLE
  799. /* vgacon.c needs to know where we mapped IO memory in io_block_mapping() */
  800. vgacon_remap_base = 0xf0000000;
  801. conswitchp = &vga_con;
  802. #endif
  803. }
  804. /*
  805. * First, see if we can get this information from the residual data.
  806. * This is important on some IBM PReP systems. If we cannot, we let the
  807. * TODC code handle doing this.
  808. */
  809. static void __init
  810. prep_calibrate_decr(void)
  811. {
  812. if (have_residual_data) {
  813. unsigned long freq, divisor = 4;
  814. if ( res->VitalProductData.ProcessorBusHz ) {
  815. freq = res->VitalProductData.ProcessorBusHz;
  816. printk("time_init: decrementer frequency = %lu.%.6lu MHz\n",
  817. (freq/divisor)/1000000,
  818. (freq/divisor)%1000000);
  819. tb_to_us = mulhwu_scale_factor(freq/divisor, 1000000);
  820. tb_ticks_per_jiffy = freq / HZ / divisor;
  821. }
  822. }
  823. else
  824. todc_calibrate_decr();
  825. }
  826. static void __init
  827. prep_init_IRQ(void)
  828. {
  829. unsigned int pci_viddid, pci_did;
  830. if (OpenPIC_Addr != NULL) {
  831. openpic_init(NUM_8259_INTERRUPTS);
  832. /* We have a cascade on OpenPIC IRQ 0, Linux IRQ 16 */
  833. openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
  834. i8259_irq);
  835. }
  836. if (have_residual_data) {
  837. i8259_init(residual_isapic_addr(), 0);
  838. return;
  839. }
  840. /* If we have a Raven PCI bridge or a Hawk PCI bridge / Memory
  841. * controller, we poll (as they have a different int-ack address). */
  842. early_read_config_dword(NULL, 0, 0, PCI_VENDOR_ID, &pci_viddid);
  843. pci_did = (pci_viddid & 0xffff0000) >> 16;
  844. if (((pci_viddid & 0xffff) == PCI_VENDOR_ID_MOTOROLA)
  845. && ((pci_did == PCI_DEVICE_ID_MOTOROLA_RAVEN)
  846. || (pci_did == PCI_DEVICE_ID_MOTOROLA_HAWK)))
  847. i8259_init(0, 0);
  848. else
  849. /* PCI interrupt ack address given in section 6.1.8 of the
  850. * PReP specification. */
  851. i8259_init(MPC10X_MAPA_PCI_INTACK_ADDR, 0);
  852. }
  853. #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
  854. /*
  855. * IDE stuff.
  856. */
  857. static int
  858. prep_ide_default_irq(unsigned long base)
  859. {
  860. switch (base) {
  861. case 0x1f0: return 13;
  862. case 0x170: return 13;
  863. case 0x1e8: return 11;
  864. case 0x168: return 10;
  865. case 0xfff0: return 14; /* MCP(N)750 ide0 */
  866. case 0xffe0: return 15; /* MCP(N)750 ide1 */
  867. default: return 0;
  868. }
  869. }
  870. static unsigned long
  871. prep_ide_default_io_base(int index)
  872. {
  873. switch (index) {
  874. case 0: return 0x1f0;
  875. case 1: return 0x170;
  876. case 2: return 0x1e8;
  877. case 3: return 0x168;
  878. default:
  879. return 0;
  880. }
  881. }
  882. #endif
  883. #ifdef CONFIG_SMP
  884. /* PReP (MTX) support */
  885. static int __init
  886. smp_prep_probe(void)
  887. {
  888. extern int mot_multi;
  889. if (mot_multi) {
  890. openpic_request_IPIs();
  891. smp_hw_index[1] = 1;
  892. return 2;
  893. }
  894. return 1;
  895. }
  896. static void __init
  897. smp_prep_kick_cpu(int nr)
  898. {
  899. *(unsigned long *)KERNELBASE = nr;
  900. asm volatile("dcbf 0,%0"::"r"(KERNELBASE):"memory");
  901. printk("CPU1 released, waiting\n");
  902. }
  903. static void __init
  904. smp_prep_setup_cpu(int cpu_nr)
  905. {
  906. if (OpenPIC_Addr)
  907. do_openpic_setup_cpu();
  908. }
  909. static struct smp_ops_t prep_smp_ops = {
  910. smp_openpic_message_pass,
  911. smp_prep_probe,
  912. smp_prep_kick_cpu,
  913. smp_prep_setup_cpu,
  914. .give_timebase = smp_generic_give_timebase,
  915. .take_timebase = smp_generic_take_timebase,
  916. };
  917. #endif /* CONFIG_SMP */
  918. /*
  919. * Setup the bat mappings we're going to load that cover
  920. * the io areas. RAM was mapped by mapin_ram().
  921. * -- Cort
  922. */
  923. static void __init
  924. prep_map_io(void)
  925. {
  926. io_block_mapping(0x80000000, PREP_ISA_IO_BASE, 0x10000000, _PAGE_IO);
  927. io_block_mapping(0xf0000000, PREP_ISA_MEM_BASE, 0x08000000, _PAGE_IO);
  928. }
  929. static int __init
  930. prep_request_io(void)
  931. {
  932. if (_machine == _MACH_prep) {
  933. #ifdef CONFIG_NVRAM
  934. request_region(PREP_NVRAM_AS0, 0x8, "nvram");
  935. #endif
  936. request_region(0x00,0x20,"dma1");
  937. request_region(0x40,0x20,"timer");
  938. request_region(0x80,0x10,"dma page reg");
  939. request_region(0xc0,0x20,"dma2");
  940. }
  941. return 0;
  942. }
  943. device_initcall(prep_request_io);
  944. void __init
  945. prep_init(unsigned long r3, unsigned long r4, unsigned long r5,
  946. unsigned long r6, unsigned long r7)
  947. {
  948. #ifdef CONFIG_PREP_RESIDUAL
  949. /* make a copy of residual data */
  950. if ( r3 ) {
  951. memcpy((void *)res,(void *)(r3+KERNELBASE),
  952. sizeof(RESIDUAL));
  953. }
  954. #endif
  955. isa_io_base = PREP_ISA_IO_BASE;
  956. isa_mem_base = PREP_ISA_MEM_BASE;
  957. pci_dram_offset = PREP_PCI_DRAM_OFFSET;
  958. ISA_DMA_THRESHOLD = 0x00ffffff;
  959. DMA_MODE_READ = 0x44;
  960. DMA_MODE_WRITE = 0x48;
  961. ppc_do_canonicalize_irqs = 1;
  962. /* figure out what kind of prep workstation we are */
  963. if (have_residual_data) {
  964. if ( !strncmp(res->VitalProductData.PrintableModel,"IBM",3) )
  965. _prep_type = _PREP_IBM;
  966. else
  967. _prep_type = _PREP_Motorola;
  968. }
  969. else {
  970. /* assume motorola if no residual (netboot?) */
  971. _prep_type = _PREP_Motorola;
  972. }
  973. #ifdef CONFIG_PREP_RESIDUAL
  974. /* Switch off all residual data processing if the user requests it */
  975. if (strstr(cmd_line, "noresidual") != NULL)
  976. res = NULL;
  977. #endif
  978. /* Initialise progress early to get maximum benefit */
  979. prep_set_bat();
  980. ibm_statusled_init();
  981. ppc_md.setup_arch = prep_setup_arch;
  982. ppc_md.show_percpuinfo = prep_show_percpuinfo;
  983. ppc_md.show_cpuinfo = NULL; /* set in prep_setup_arch() */
  984. ppc_md.init_IRQ = prep_init_IRQ;
  985. /* this gets changed later on if we have an OpenPIC -- Cort */
  986. ppc_md.get_irq = i8259_irq;
  987. ppc_md.phys_mem_access_prot = pci_phys_mem_access_prot;
  988. ppc_md.restart = prep_restart;
  989. ppc_md.power_off = NULL; /* set in prep_setup_arch() */
  990. ppc_md.halt = prep_halt;
  991. ppc_md.nvram_read_val = prep_nvram_read_val;
  992. ppc_md.nvram_write_val = prep_nvram_write_val;
  993. ppc_md.time_init = todc_time_init;
  994. if (_prep_type == _PREP_IBM) {
  995. ppc_md.rtc_read_val = todc_mc146818_read_val;
  996. ppc_md.rtc_write_val = todc_mc146818_write_val;
  997. TODC_INIT(TODC_TYPE_MC146818, RTC_PORT(0), NULL, RTC_PORT(1),
  998. 8);
  999. } else {
  1000. TODC_INIT(TODC_TYPE_MK48T59, PREP_NVRAM_AS0, PREP_NVRAM_AS1,
  1001. PREP_NVRAM_DATA, 8);
  1002. }
  1003. ppc_md.calibrate_decr = prep_calibrate_decr;
  1004. ppc_md.set_rtc_time = todc_set_rtc_time;
  1005. ppc_md.get_rtc_time = todc_get_rtc_time;
  1006. ppc_md.setup_io_mappings = prep_map_io;
  1007. #if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
  1008. ppc_ide_md.default_irq = prep_ide_default_irq;
  1009. ppc_ide_md.default_io_base = prep_ide_default_io_base;
  1010. #endif
  1011. #ifdef CONFIG_SMP
  1012. smp_ops = &prep_smp_ops;
  1013. #endif /* CONFIG_SMP */
  1014. }