spider-pic.c 5.2 KB

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  1. /*
  2. * External Interrupt Controller on Spider South Bridge
  3. *
  4. * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
  5. *
  6. * Author: Arnd Bergmann <arndb@de.ibm.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2, or (at your option)
  11. * any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <linux/interrupt.h>
  23. #include <linux/irq.h>
  24. #include <asm/pgtable.h>
  25. #include <asm/prom.h>
  26. #include <asm/io.h>
  27. #include "interrupt.h"
  28. /* register layout taken from Spider spec, table 7.4-4 */
  29. enum {
  30. TIR_DEN = 0x004, /* Detection Enable Register */
  31. TIR_MSK = 0x084, /* Mask Level Register */
  32. TIR_EDC = 0x0c0, /* Edge Detection Clear Register */
  33. TIR_PNDA = 0x100, /* Pending Register A */
  34. TIR_PNDB = 0x104, /* Pending Register B */
  35. TIR_CS = 0x144, /* Current Status Register */
  36. TIR_LCSA = 0x150, /* Level Current Status Register A */
  37. TIR_LCSB = 0x154, /* Level Current Status Register B */
  38. TIR_LCSC = 0x158, /* Level Current Status Register C */
  39. TIR_LCSD = 0x15c, /* Level Current Status Register D */
  40. TIR_CFGA = 0x200, /* Setting Register A0 */
  41. TIR_CFGB = 0x204, /* Setting Register B0 */
  42. /* 0x208 ... 0x3ff Setting Register An/Bn */
  43. TIR_PPNDA = 0x400, /* Packet Pending Register A */
  44. TIR_PPNDB = 0x404, /* Packet Pending Register B */
  45. TIR_PIERA = 0x408, /* Packet Output Error Register A */
  46. TIR_PIERB = 0x40c, /* Packet Output Error Register B */
  47. TIR_PIEN = 0x444, /* Packet Output Enable Register */
  48. TIR_PIPND = 0x454, /* Packet Output Pending Register */
  49. TIRDID = 0x484, /* Spider Device ID Register */
  50. REISTIM = 0x500, /* Reissue Command Timeout Time Setting */
  51. REISTIMEN = 0x504, /* Reissue Command Timeout Setting */
  52. REISWAITEN = 0x508, /* Reissue Wait Control*/
  53. };
  54. static void __iomem *spider_pics[4];
  55. static void __iomem *spider_get_pic(int irq)
  56. {
  57. int node = irq / IIC_NODE_STRIDE;
  58. irq %= IIC_NODE_STRIDE;
  59. if (irq >= IIC_EXT_OFFSET &&
  60. irq < IIC_EXT_OFFSET + IIC_NUM_EXT &&
  61. spider_pics)
  62. return spider_pics[node];
  63. return NULL;
  64. }
  65. static int spider_get_nr(unsigned int irq)
  66. {
  67. return (irq % IIC_NODE_STRIDE) - IIC_EXT_OFFSET;
  68. }
  69. static void __iomem *spider_get_irq_config(int irq)
  70. {
  71. void __iomem *pic;
  72. pic = spider_get_pic(irq);
  73. return pic + TIR_CFGA + 8 * spider_get_nr(irq);
  74. }
  75. static void spider_enable_irq(unsigned int irq)
  76. {
  77. void __iomem *cfg = spider_get_irq_config(irq);
  78. irq = spider_get_nr(irq);
  79. out_be32(cfg, in_be32(cfg) | 0x3107000eu);
  80. out_be32(cfg + 4, in_be32(cfg + 4) | 0x00020000u | irq);
  81. }
  82. static void spider_disable_irq(unsigned int irq)
  83. {
  84. void __iomem *cfg = spider_get_irq_config(irq);
  85. irq = spider_get_nr(irq);
  86. out_be32(cfg, in_be32(cfg) & ~0x30000000u);
  87. }
  88. static unsigned int spider_startup_irq(unsigned int irq)
  89. {
  90. spider_enable_irq(irq);
  91. return 0;
  92. }
  93. static void spider_shutdown_irq(unsigned int irq)
  94. {
  95. spider_disable_irq(irq);
  96. }
  97. static void spider_end_irq(unsigned int irq)
  98. {
  99. spider_enable_irq(irq);
  100. }
  101. static void spider_ack_irq(unsigned int irq)
  102. {
  103. spider_disable_irq(irq);
  104. iic_local_enable();
  105. }
  106. static struct hw_interrupt_type spider_pic = {
  107. .typename = " SPIDER ",
  108. .startup = spider_startup_irq,
  109. .shutdown = spider_shutdown_irq,
  110. .enable = spider_enable_irq,
  111. .disable = spider_disable_irq,
  112. .ack = spider_ack_irq,
  113. .end = spider_end_irq,
  114. };
  115. int spider_get_irq(unsigned long int_pending)
  116. {
  117. void __iomem *regs = spider_get_pic(int_pending);
  118. unsigned long cs;
  119. int irq;
  120. cs = in_be32(regs + TIR_CS);
  121. irq = cs >> 24;
  122. if (irq != 63)
  123. return irq;
  124. return -1;
  125. }
  126. void spider_init_IRQ(void)
  127. {
  128. int node;
  129. struct device_node *dn;
  130. unsigned int *property;
  131. long spiderpic;
  132. int n;
  133. /* FIXME: detect multiple PICs as soon as the device tree has them */
  134. for (node = 0; node < 1; node++) {
  135. dn = of_find_node_by_path("/");
  136. n = prom_n_addr_cells(dn);
  137. property = (unsigned int *) get_property(dn,
  138. "platform-spider-pic", NULL);
  139. if (!property)
  140. continue;
  141. for (spiderpic = 0; n > 0; --n)
  142. spiderpic = (spiderpic << 32) + *property++;
  143. printk(KERN_DEBUG "SPIDER addr: %lx\n", spiderpic);
  144. spider_pics[node] = __ioremap(spiderpic, 0x800, _PAGE_NO_CACHE);
  145. for (n = 0; n < IIC_NUM_EXT; n++) {
  146. int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE;
  147. get_irq_desc(irq)->handler = &spider_pic;
  148. /* do not mask any interrupts because of level */
  149. out_be32(spider_pics[node] + TIR_MSK, 0x0);
  150. /* disable edge detection clear */
  151. /* out_be32(spider_pics[node] + TIR_EDC, 0x0); */
  152. /* enable interrupt packets to be output */
  153. out_be32(spider_pics[node] + TIR_PIEN,
  154. in_be32(spider_pics[node] + TIR_PIEN) | 0x1);
  155. /* Enable the interrupt detection enable bit. Do this last! */
  156. out_be32(spider_pics[node] + TIR_DEN,
  157. in_be32(spider_pics[node] +TIR_DEN) | 0x1);
  158. }
  159. }
  160. }