mpc834x_sys.c 5.4 KB

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  1. /*
  2. * arch/powerpc/platforms/83xx/mpc834x_sys.c
  3. *
  4. * MPC834x SYS board specific routines
  5. *
  6. * Maintainer: Kumar Gala <galak@kernel.crashing.org>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/config.h>
  14. #include <linux/stddef.h>
  15. #include <linux/kernel.h>
  16. #include <linux/init.h>
  17. #include <linux/errno.h>
  18. #include <linux/reboot.h>
  19. #include <linux/pci.h>
  20. #include <linux/kdev_t.h>
  21. #include <linux/major.h>
  22. #include <linux/console.h>
  23. #include <linux/delay.h>
  24. #include <linux/seq_file.h>
  25. #include <linux/root_dev.h>
  26. #include <linux/module.h>
  27. #include <linux/fsl_devices.h>
  28. #include <asm/system.h>
  29. #include <asm/pgtable.h>
  30. #include <asm/page.h>
  31. #include <asm/atomic.h>
  32. #include <asm/time.h>
  33. #include <asm/io.h>
  34. #include <asm/machdep.h>
  35. #include <asm/ipic.h>
  36. #include <asm/bootinfo.h>
  37. #include <asm/pci-bridge.h>
  38. #include <asm/mpc83xx.h>
  39. #include <asm/irq.h>
  40. #include <mm/mmu_decl.h>
  41. #include <asm/prom.h>
  42. #include <asm/udbg.h>
  43. #include <sysdev/fsl_soc.h>
  44. #include "mpc83xx.h"
  45. #ifndef CONFIG_PCI
  46. unsigned long isa_io_base = 0;
  47. unsigned long isa_mem_base = 0;
  48. #endif
  49. #ifdef CONFIG_PCI
  50. extern int mpc83xx_pci2_busno;
  51. static int
  52. mpc83xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
  53. {
  54. static char pci_irq_table[][4] =
  55. /*
  56. * PCI IDSEL/INTPIN->INTLINE
  57. * A B C D
  58. */
  59. {
  60. {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x11 */
  61. {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x12 */
  62. {PIRQD, PIRQA, PIRQB, PIRQC}, /* idsel 0x13 */
  63. {0, 0, 0, 0},
  64. {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x15 */
  65. {PIRQD, PIRQA, PIRQB, PIRQC}, /* idsel 0x16 */
  66. {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x17 */
  67. {PIRQB, PIRQC, PIRQD, PIRQA}, /* idsel 0x18 */
  68. {0, 0, 0, 0}, /* idsel 0x19 */
  69. {0, 0, 0, 0}, /* idsel 0x20 */
  70. };
  71. const long min_idsel = 0x11, max_idsel = 0x20, irqs_per_slot = 4;
  72. return PCI_IRQ_TABLE_LOOKUP;
  73. }
  74. static int
  75. mpc83xx_exclude_device(u_char bus, u_char devfn)
  76. {
  77. if (bus == 0 && PCI_SLOT(devfn) == 0)
  78. return PCIBIOS_DEVICE_NOT_FOUND;
  79. if (mpc83xx_pci2_busno)
  80. if (bus == (mpc83xx_pci2_busno) && PCI_SLOT(devfn) == 0)
  81. return PCIBIOS_DEVICE_NOT_FOUND;
  82. return PCIBIOS_SUCCESSFUL;
  83. }
  84. #endif /* CONFIG_PCI */
  85. /* ************************************************************************
  86. *
  87. * Setup the architecture
  88. *
  89. */
  90. static void __init
  91. mpc834x_sys_setup_arch(void)
  92. {
  93. struct device_node *np;
  94. if (ppc_md.progress)
  95. ppc_md.progress("mpc834x_sys_setup_arch()", 0);
  96. np = of_find_node_by_type(NULL, "cpu");
  97. if (np != 0) {
  98. unsigned int *fp = (int *) get_property(np, "clock-frequency", NULL);
  99. if (fp != 0)
  100. loops_per_jiffy = *fp / HZ;
  101. else
  102. loops_per_jiffy = 50000000 / HZ;
  103. of_node_put(np);
  104. }
  105. #ifdef CONFIG_PCI
  106. for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
  107. add_bridge(np);
  108. ppc_md.pci_swizzle = common_swizzle;
  109. ppc_md.pci_map_irq = mpc83xx_map_irq;
  110. ppc_md.pci_exclude_device = mpc83xx_exclude_device;
  111. #endif
  112. #ifdef CONFIG_ROOT_NFS
  113. ROOT_DEV = Root_NFS;
  114. #else
  115. ROOT_DEV = Root_HDA1;
  116. #endif
  117. }
  118. void __init
  119. mpc834x_sys_init_IRQ(void)
  120. {
  121. u8 senses[8] = {
  122. 0, /* EXT 0 */
  123. IRQ_SENSE_LEVEL, /* EXT 1 */
  124. IRQ_SENSE_LEVEL, /* EXT 2 */
  125. 0, /* EXT 3 */
  126. #ifdef CONFIG_PCI
  127. IRQ_SENSE_LEVEL, /* EXT 4 */
  128. IRQ_SENSE_LEVEL, /* EXT 5 */
  129. IRQ_SENSE_LEVEL, /* EXT 6 */
  130. IRQ_SENSE_LEVEL, /* EXT 7 */
  131. #else
  132. 0, /* EXT 4 */
  133. 0, /* EXT 5 */
  134. 0, /* EXT 6 */
  135. 0, /* EXT 7 */
  136. #endif
  137. };
  138. ipic_init(get_immrbase() + 0x00700, 0, 0, senses, 8);
  139. /* Initialize the default interrupt mapping priorities,
  140. * in case the boot rom changed something on us.
  141. */
  142. ipic_set_default_priority();
  143. }
  144. #if defined(CONFIG_I2C_MPC) && defined(CONFIG_SENSORS_DS1374)
  145. extern ulong ds1374_get_rtc_time(void);
  146. extern int ds1374_set_rtc_time(ulong);
  147. static int __init
  148. mpc834x_rtc_hookup(void)
  149. {
  150. struct timespec tv;
  151. ppc_md.get_rtc_time = ds1374_get_rtc_time;
  152. ppc_md.set_rtc_time = ds1374_set_rtc_time;
  153. tv.tv_nsec = 0;
  154. tv.tv_sec = (ppc_md.get_rtc_time)();
  155. do_settimeofday(&tv);
  156. return 0;
  157. }
  158. late_initcall(mpc834x_rtc_hookup);
  159. #endif
  160. static void
  161. mpc83xx_restart(char *cmd)
  162. {
  163. #define RST_OFFSET 0x00000900
  164. #define RST_PROT_REG 0x00000018
  165. #define RST_CTRL_REG 0x0000001c
  166. __be32 __iomem *reg;
  167. // map reset register space
  168. reg = ioremap(get_immrbase() + 0x900, 0xff);
  169. local_irq_disable();
  170. /* enable software reset "RSTE" */
  171. out_be32(reg + (RST_PROT_REG >> 2), 0x52535445);
  172. /* set software hard reset */
  173. out_be32(reg + (RST_CTRL_REG >> 2), 0x52535445);
  174. for(;;);
  175. }
  176. static long __init
  177. mpc83xx_time_init(void)
  178. {
  179. #define SPCR_OFFSET 0x00000110
  180. #define SPCR_TBEN 0x00400000
  181. __be32 __iomem *spcr = ioremap(get_immrbase() + SPCR_OFFSET, 4);
  182. __be32 tmp;
  183. tmp = in_be32(spcr);
  184. out_be32(spcr, tmp|SPCR_TBEN);
  185. iounmap(spcr);
  186. return 0;
  187. }
  188. void __init
  189. platform_init(void)
  190. {
  191. /* setup the PowerPC module struct */
  192. ppc_md.setup_arch = mpc834x_sys_setup_arch;
  193. ppc_md.init_IRQ = mpc834x_sys_init_IRQ;
  194. ppc_md.get_irq = ipic_get_irq;
  195. ppc_md.restart = mpc83xx_restart;
  196. ppc_md.time_init = mpc83xx_time_init;
  197. ppc_md.set_rtc_time = NULL;
  198. ppc_md.get_rtc_time = NULL;
  199. ppc_md.calibrate_decr = generic_calibrate_decr;
  200. ppc_md.progress = udbg_progress;
  201. if (ppc_md.progress)
  202. ppc_md.progress("mpc834x_sys_init(): exit", 0);
  203. return;
  204. }