tlb_64.c 5.5 KB

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  1. /*
  2. * This file contains the routines for flushing entries from the
  3. * TLB and MMU hash table.
  4. *
  5. * Derived from arch/ppc64/mm/init.c:
  6. * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
  7. *
  8. * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
  9. * and Cort Dougan (PReP) (cort@cs.nmt.edu)
  10. * Copyright (C) 1996 Paul Mackerras
  11. * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
  12. *
  13. * Derived from "arch/i386/mm/init.c"
  14. * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
  15. *
  16. * Dave Engebretsen <engebret@us.ibm.com>
  17. * Rework for PPC64 port.
  18. *
  19. * This program is free software; you can redistribute it and/or
  20. * modify it under the terms of the GNU General Public License
  21. * as published by the Free Software Foundation; either version
  22. * 2 of the License, or (at your option) any later version.
  23. */
  24. #include <linux/config.h>
  25. #include <linux/kernel.h>
  26. #include <linux/mm.h>
  27. #include <linux/init.h>
  28. #include <linux/percpu.h>
  29. #include <linux/hardirq.h>
  30. #include <asm/pgalloc.h>
  31. #include <asm/tlbflush.h>
  32. #include <asm/tlb.h>
  33. #include <asm/bug.h>
  34. DEFINE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
  35. /* This is declared as we are using the more or less generic
  36. * include/asm-ppc64/tlb.h file -- tgall
  37. */
  38. DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
  39. DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur);
  40. unsigned long pte_freelist_forced_free;
  41. struct pte_freelist_batch
  42. {
  43. struct rcu_head rcu;
  44. unsigned int index;
  45. pgtable_free_t tables[0];
  46. };
  47. DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur);
  48. unsigned long pte_freelist_forced_free;
  49. #define PTE_FREELIST_SIZE \
  50. ((PAGE_SIZE - sizeof(struct pte_freelist_batch)) \
  51. / sizeof(pgtable_free_t))
  52. #ifdef CONFIG_SMP
  53. static void pte_free_smp_sync(void *arg)
  54. {
  55. /* Do nothing, just ensure we sync with all CPUs */
  56. }
  57. #endif
  58. /* This is only called when we are critically out of memory
  59. * (and fail to get a page in pte_free_tlb).
  60. */
  61. static void pgtable_free_now(pgtable_free_t pgf)
  62. {
  63. pte_freelist_forced_free++;
  64. smp_call_function(pte_free_smp_sync, NULL, 0, 1);
  65. pgtable_free(pgf);
  66. }
  67. static void pte_free_rcu_callback(struct rcu_head *head)
  68. {
  69. struct pte_freelist_batch *batch =
  70. container_of(head, struct pte_freelist_batch, rcu);
  71. unsigned int i;
  72. for (i = 0; i < batch->index; i++)
  73. pgtable_free(batch->tables[i]);
  74. free_page((unsigned long)batch);
  75. }
  76. static void pte_free_submit(struct pte_freelist_batch *batch)
  77. {
  78. INIT_RCU_HEAD(&batch->rcu);
  79. call_rcu(&batch->rcu, pte_free_rcu_callback);
  80. }
  81. void pgtable_free_tlb(struct mmu_gather *tlb, pgtable_free_t pgf)
  82. {
  83. /* This is safe since tlb_gather_mmu has disabled preemption */
  84. cpumask_t local_cpumask = cpumask_of_cpu(smp_processor_id());
  85. struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur);
  86. if (atomic_read(&tlb->mm->mm_users) < 2 ||
  87. cpus_equal(tlb->mm->cpu_vm_mask, local_cpumask)) {
  88. pgtable_free(pgf);
  89. return;
  90. }
  91. if (*batchp == NULL) {
  92. *batchp = (struct pte_freelist_batch *)__get_free_page(GFP_ATOMIC);
  93. if (*batchp == NULL) {
  94. pgtable_free_now(pgf);
  95. return;
  96. }
  97. (*batchp)->index = 0;
  98. }
  99. (*batchp)->tables[(*batchp)->index++] = pgf;
  100. if ((*batchp)->index == PTE_FREELIST_SIZE) {
  101. pte_free_submit(*batchp);
  102. *batchp = NULL;
  103. }
  104. }
  105. /*
  106. * Update the MMU hash table to correspond with a change to
  107. * a Linux PTE. If wrprot is true, it is permissible to
  108. * change the existing HPTE to read-only rather than removing it
  109. * (if we remove it we should clear the _PTE_HPTEFLAGS bits).
  110. */
  111. void hpte_update(struct mm_struct *mm, unsigned long addr,
  112. pte_t *ptep, unsigned long pte, int huge)
  113. {
  114. struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
  115. unsigned long vsid;
  116. unsigned int psize = mmu_virtual_psize;
  117. int i;
  118. i = batch->index;
  119. /* We mask the address for the base page size. Huge pages will
  120. * have applied their own masking already
  121. */
  122. addr &= PAGE_MASK;
  123. /* Get page size (maybe move back to caller) */
  124. if (huge) {
  125. #ifdef CONFIG_HUGETLB_PAGE
  126. psize = mmu_huge_psize;
  127. #else
  128. BUG();
  129. #endif
  130. }
  131. /*
  132. * This can happen when we are in the middle of a TLB batch and
  133. * we encounter memory pressure (eg copy_page_range when it tries
  134. * to allocate a new pte). If we have to reclaim memory and end
  135. * up scanning and resetting referenced bits then our batch context
  136. * will change mid stream.
  137. *
  138. * We also need to ensure only one page size is present in a given
  139. * batch
  140. */
  141. if (i != 0 && (mm != batch->mm || batch->psize != psize)) {
  142. flush_tlb_pending();
  143. i = 0;
  144. }
  145. if (i == 0) {
  146. batch->mm = mm;
  147. batch->psize = psize;
  148. }
  149. if (!is_kernel_addr(addr)) {
  150. vsid = get_vsid(mm->context.id, addr);
  151. WARN_ON(vsid == 0);
  152. } else
  153. vsid = get_kernel_vsid(addr);
  154. batch->vaddr[i] = (vsid << 28 ) | (addr & 0x0fffffff);
  155. batch->pte[i] = __real_pte(__pte(pte), ptep);
  156. batch->index = ++i;
  157. if (i >= PPC64_TLB_BATCH_NR)
  158. flush_tlb_pending();
  159. }
  160. void __flush_tlb_pending(struct ppc64_tlb_batch *batch)
  161. {
  162. int i;
  163. int cpu;
  164. cpumask_t tmp;
  165. int local = 0;
  166. BUG_ON(in_interrupt());
  167. cpu = get_cpu();
  168. i = batch->index;
  169. tmp = cpumask_of_cpu(cpu);
  170. if (cpus_equal(batch->mm->cpu_vm_mask, tmp))
  171. local = 1;
  172. if (i == 1)
  173. flush_hash_page(batch->vaddr[0], batch->pte[0],
  174. batch->psize, local);
  175. else
  176. flush_hash_range(i, local);
  177. batch->index = 0;
  178. put_cpu();
  179. }
  180. void pte_free_finish(void)
  181. {
  182. /* This is safe since tlb_gather_mmu has disabled preemption */
  183. struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur);
  184. if (*batchp == NULL)
  185. return;
  186. pte_free_submit(*batchp);
  187. *batchp = NULL;
  188. }