sstep.c 3.9 KB

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  1. /*
  2. * Single-step support.
  3. *
  4. * Copyright (C) 2004 Paul Mackerras <paulus@au.ibm.com>, IBM
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/ptrace.h>
  13. #include <linux/config.h>
  14. #include <asm/sstep.h>
  15. #include <asm/processor.h>
  16. extern char system_call_common[];
  17. #ifdef CONFIG_PPC64
  18. /* Bits in SRR1 that are copied from MSR */
  19. #define MSR_MASK 0xffffffff87c0ffff
  20. #else
  21. #define MSR_MASK 0x87c0ffff
  22. #endif
  23. /*
  24. * Determine whether a conditional branch instruction would branch.
  25. */
  26. static int branch_taken(unsigned int instr, struct pt_regs *regs)
  27. {
  28. unsigned int bo = (instr >> 21) & 0x1f;
  29. unsigned int bi;
  30. if ((bo & 4) == 0) {
  31. /* decrement counter */
  32. --regs->ctr;
  33. if (((bo >> 1) & 1) ^ (regs->ctr == 0))
  34. return 0;
  35. }
  36. if ((bo & 0x10) == 0) {
  37. /* check bit from CR */
  38. bi = (instr >> 16) & 0x1f;
  39. if (((regs->ccr >> (31 - bi)) & 1) != ((bo >> 3) & 1))
  40. return 0;
  41. }
  42. return 1;
  43. }
  44. /*
  45. * Emulate instructions that cause a transfer of control.
  46. * Returns 1 if the step was emulated, 0 if not,
  47. * or -1 if the instruction is one that should not be stepped,
  48. * such as an rfid, or a mtmsrd that would clear MSR_RI.
  49. */
  50. int emulate_step(struct pt_regs *regs, unsigned int instr)
  51. {
  52. unsigned int opcode, rd;
  53. unsigned long int imm;
  54. opcode = instr >> 26;
  55. switch (opcode) {
  56. case 16: /* bc */
  57. imm = (signed short)(instr & 0xfffc);
  58. if ((instr & 2) == 0)
  59. imm += regs->nip;
  60. regs->nip += 4;
  61. if ((regs->msr & MSR_SF) == 0)
  62. regs->nip &= 0xffffffffUL;
  63. if (instr & 1)
  64. regs->link = regs->nip;
  65. if (branch_taken(instr, regs))
  66. regs->nip = imm;
  67. return 1;
  68. #ifdef CONFIG_PPC64
  69. case 17: /* sc */
  70. /*
  71. * N.B. this uses knowledge about how the syscall
  72. * entry code works. If that is changed, this will
  73. * need to be changed also.
  74. */
  75. regs->gpr[9] = regs->gpr[13];
  76. regs->gpr[11] = regs->nip + 4;
  77. regs->gpr[12] = regs->msr & MSR_MASK;
  78. regs->gpr[13] = (unsigned long) get_paca();
  79. regs->nip = (unsigned long) &system_call_common;
  80. regs->msr = MSR_KERNEL;
  81. return 1;
  82. #endif
  83. case 18: /* b */
  84. imm = instr & 0x03fffffc;
  85. if (imm & 0x02000000)
  86. imm -= 0x04000000;
  87. if ((instr & 2) == 0)
  88. imm += regs->nip;
  89. if (instr & 1) {
  90. regs->link = regs->nip + 4;
  91. if ((regs->msr & MSR_SF) == 0)
  92. regs->link &= 0xffffffffUL;
  93. }
  94. if ((regs->msr & MSR_SF) == 0)
  95. imm &= 0xffffffffUL;
  96. regs->nip = imm;
  97. return 1;
  98. case 19:
  99. switch (instr & 0x7fe) {
  100. case 0x20: /* bclr */
  101. case 0x420: /* bcctr */
  102. imm = (instr & 0x400)? regs->ctr: regs->link;
  103. regs->nip += 4;
  104. if ((regs->msr & MSR_SF) == 0) {
  105. regs->nip &= 0xffffffffUL;
  106. imm &= 0xffffffffUL;
  107. }
  108. if (instr & 1)
  109. regs->link = regs->nip;
  110. if (branch_taken(instr, regs))
  111. regs->nip = imm;
  112. return 1;
  113. case 0x24: /* rfid, scary */
  114. return -1;
  115. }
  116. case 31:
  117. rd = (instr >> 21) & 0x1f;
  118. switch (instr & 0x7fe) {
  119. case 0xa6: /* mfmsr */
  120. regs->gpr[rd] = regs->msr & MSR_MASK;
  121. regs->nip += 4;
  122. if ((regs->msr & MSR_SF) == 0)
  123. regs->nip &= 0xffffffffUL;
  124. return 1;
  125. case 0x124: /* mtmsr */
  126. imm = regs->gpr[rd];
  127. if ((imm & MSR_RI) == 0)
  128. /* can't step mtmsr that would clear MSR_RI */
  129. return -1;
  130. regs->msr = imm;
  131. regs->nip += 4;
  132. return 1;
  133. #ifdef CONFIG_PPC64
  134. case 0x164: /* mtmsrd */
  135. /* only MSR_EE and MSR_RI get changed if bit 15 set */
  136. /* mtmsrd doesn't change MSR_HV and MSR_ME */
  137. imm = (instr & 0x10000)? 0x8002: 0xefffffffffffefffUL;
  138. imm = (regs->msr & MSR_MASK & ~imm)
  139. | (regs->gpr[rd] & imm);
  140. if ((imm & MSR_RI) == 0)
  141. /* can't step mtmsrd that would clear MSR_RI */
  142. return -1;
  143. regs->msr = imm;
  144. regs->nip += 4;
  145. if ((imm & MSR_SF) == 0)
  146. regs->nip &= 0xffffffffUL;
  147. return 1;
  148. #endif
  149. }
  150. }
  151. return 0;
  152. }