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  1. /* This file is subject to the terms and conditions of the GNU General Public
  2. * License. See the file "COPYING" in the main directory of this archive
  3. * for more details.
  4. *
  5. * Copyright (C) 1999 by Helge Deller
  6. * Copyright 1999 SuSE GmbH (Philipp Rumpf)
  7. * Copyright 1999 Philipp Rumpf (prumpf@tux.org)
  8. * Copyright 2000 Hewlett Packard (Paul Bame, bame@puffin.external.hp.com)
  9. * Copyright (C) 2001 Grant Grundler (Hewlett Packard)
  10. * Copyright (C) 2004 Kyle McMartin <kyle@debian.org>
  11. *
  12. * Initial Version 04-23-1999 by Helge Deller <deller@gmx.de>
  13. */
  14. #include <linux/config.h> /* for CONFIG_SMP */
  15. #include <asm/asm-offsets.h>
  16. #include <asm/psw.h>
  17. #include <asm/pdc.h>
  18. #include <asm/assembly.h>
  19. #include <asm/pgtable.h>
  20. .level LEVEL
  21. .data
  22. .export boot_args
  23. boot_args:
  24. .word 0 /* arg0 */
  25. .word 0 /* arg1 */
  26. .word 0 /* arg2 */
  27. .word 0 /* arg3 */
  28. .text
  29. .align 4
  30. .import init_thread_union,data
  31. .import fault_vector_20,code /* IVA parisc 2.0 32 bit */
  32. #ifndef CONFIG_64BIT
  33. .import fault_vector_11,code /* IVA parisc 1.1 32 bit */
  34. .import $global$ /* forward declaration */
  35. #endif /*!CONFIG_64BIT*/
  36. .export stext
  37. .export _stext,data /* Kernel want it this way! */
  38. _stext:
  39. stext:
  40. .proc
  41. .callinfo
  42. /* Make sure sr4-sr7 are set to zero for the kernel address space */
  43. mtsp %r0,%sr4
  44. mtsp %r0,%sr5
  45. mtsp %r0,%sr6
  46. mtsp %r0,%sr7
  47. /* Clear BSS (shouldn't the boot loader do this?) */
  48. .import __bss_start,data
  49. .import __bss_stop,data
  50. load32 PA(__bss_start),%r3
  51. load32 PA(__bss_stop),%r4
  52. $bss_loop:
  53. cmpb,<<,n %r3,%r4,$bss_loop
  54. stw,ma %r0,4(%r3)
  55. /* Save away the arguments the boot loader passed in (32 bit args) */
  56. load32 PA(boot_args),%r1
  57. stw,ma %arg0,4(%r1)
  58. stw,ma %arg1,4(%r1)
  59. stw,ma %arg2,4(%r1)
  60. stw,ma %arg3,4(%r1)
  61. /* Initialize startup VM. Just map first 8/16 MB of memory */
  62. load32 PA(swapper_pg_dir),%r4
  63. mtctl %r4,%cr24 /* Initialize kernel root pointer */
  64. mtctl %r4,%cr25 /* Initialize user root pointer */
  65. #ifdef CONFIG_64BIT
  66. /* Set pmd in pgd */
  67. load32 PA(pmd0),%r5
  68. shrd %r5,PxD_VALUE_SHIFT,%r3
  69. ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3
  70. stw %r3,ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4)
  71. ldo ASM_PMD_ENTRY*ASM_PMD_ENTRY_SIZE(%r5),%r4
  72. #else
  73. /* 2-level page table, so pmd == pgd */
  74. ldo ASM_PGD_ENTRY*ASM_PGD_ENTRY_SIZE(%r4),%r4
  75. #endif
  76. /* Fill in pmd with enough pte directories */
  77. load32 PA(pg0),%r1
  78. SHRREG %r1,PxD_VALUE_SHIFT,%r3
  79. ldo (PxD_FLAG_PRESENT+PxD_FLAG_VALID)(%r3),%r3
  80. ldi ASM_PT_INITIAL,%r1
  81. 1:
  82. stw %r3,0(%r4)
  83. ldo (ASM_PAGE_SIZE >> PxD_VALUE_SHIFT)(%r3),%r3
  84. addib,> -1,%r1,1b
  85. #ifdef CONFIG_64BIT
  86. ldo ASM_PMD_ENTRY_SIZE(%r4),%r4
  87. #else
  88. ldo ASM_PGD_ENTRY_SIZE(%r4),%r4
  89. #endif
  90. /* Now initialize the PTEs themselves */
  91. ldo _PAGE_KERNEL(%r0),%r3 /* Hardwired 0 phys addr start */
  92. load32 PA(pg0),%r1
  93. $pgt_fill_loop:
  94. STREGM %r3,ASM_PTE_ENTRY_SIZE(%r1)
  95. ldo ASM_PAGE_SIZE(%r3),%r3
  96. bb,>= %r3,31-KERNEL_INITIAL_ORDER,$pgt_fill_loop
  97. nop
  98. /* Load the return address...er...crash 'n burn */
  99. copy %r0,%r2
  100. /* And the RFI Target address too */
  101. load32 start_kernel,%r11
  102. /* And the initial task pointer */
  103. load32 init_thread_union,%r6
  104. mtctl %r6,%cr30
  105. /* And the stack pointer too */
  106. ldo THREAD_SZ_ALGN(%r6),%sp
  107. /* And the interrupt stack */
  108. load32 interrupt_stack,%r6
  109. mtctl %r6,%cr31
  110. #ifdef CONFIG_SMP
  111. /* Set the smp rendevous address into page zero.
  112. ** It would be safer to do this in init_smp_config() but
  113. ** it's just way easier to deal with here because
  114. ** of 64-bit function ptrs and the address is local to this file.
  115. */
  116. load32 PA(smp_slave_stext),%r10
  117. stw %r10,0x10(%r0) /* MEM_RENDEZ */
  118. stw %r0,0x28(%r0) /* MEM_RENDEZ_HI - assume addr < 4GB */
  119. /* FALLTHROUGH */
  120. .procend
  121. /*
  122. ** Code Common to both Monarch and Slave processors.
  123. ** Entry:
  124. **
  125. ** 1.1:
  126. ** %r11 must contain RFI target address.
  127. ** %r25/%r26 args to pass to target function
  128. ** %r2 in case rfi target decides it didn't like something
  129. **
  130. ** 2.0w:
  131. ** %r3 PDCE_PROC address
  132. ** %r11 RFI target address
  133. **
  134. ** Caller must init: SR4-7, %sp, %r10, %cr24/25,
  135. */
  136. common_stext:
  137. .proc
  138. .callinfo
  139. #else
  140. /* Clear PDC entry point - we won't use it */
  141. stw %r0,0x10(%r0) /* MEM_RENDEZ */
  142. stw %r0,0x28(%r0) /* MEM_RENDEZ_HI */
  143. #endif /*CONFIG_SMP*/
  144. #ifdef CONFIG_64BIT
  145. tophys_r1 %sp
  146. /* Save the rfi target address */
  147. ldd TI_TASK-THREAD_SZ_ALGN(%sp), %r10
  148. tophys_r1 %r10
  149. std %r11, TASK_PT_GR11(%r10)
  150. /* Switch to wide mode Superdome doesn't support narrow PDC
  151. ** calls.
  152. */
  153. 1: mfia %rp /* clear upper part of pcoq */
  154. ldo 2f-1b(%rp),%rp
  155. depdi 0,31,32,%rp
  156. bv (%rp)
  157. ssm PSW_SM_W,%r0
  158. /* Set Wide mode as the "Default" (eg for traps)
  159. ** First trap occurs *right* after (or part of) rfi for slave CPUs.
  160. ** Someday, palo might not do this for the Monarch either.
  161. */
  162. 2:
  163. #define MEM_PDC_LO 0x388
  164. #define MEM_PDC_HI 0x35C
  165. ldw MEM_PDC_LO(%r0),%r3
  166. ldw MEM_PDC_HI(%r0),%r6
  167. depd %r6, 31, 32, %r3 /* move to upper word */
  168. ldo PDC_PSW(%r0),%arg0 /* 21 */
  169. ldo PDC_PSW_SET_DEFAULTS(%r0),%arg1 /* 2 */
  170. ldo PDC_PSW_WIDE_BIT(%r0),%arg2 /* 2 */
  171. load32 PA(stext_pdc_ret), %rp
  172. bv (%r3)
  173. copy %r0,%arg3
  174. stext_pdc_ret:
  175. /* restore rfi target address*/
  176. ldd TI_TASK-THREAD_SZ_ALGN(%sp), %r10
  177. tophys_r1 %r10
  178. ldd TASK_PT_GR11(%r10), %r11
  179. tovirt_r1 %sp
  180. #endif
  181. /* PARANOID: clear user scratch/user space SR's */
  182. mtsp %r0,%sr0
  183. mtsp %r0,%sr1
  184. mtsp %r0,%sr2
  185. mtsp %r0,%sr3
  186. /* Initialize Protection Registers */
  187. mtctl %r0,%cr8
  188. mtctl %r0,%cr9
  189. mtctl %r0,%cr12
  190. mtctl %r0,%cr13
  191. /* Initialize the global data pointer */
  192. loadgp
  193. /* Set up our interrupt table. HPMCs might not work after this!
  194. *
  195. * We need to install the correct iva for PA1.1 or PA2.0. The
  196. * following short sequence of instructions can determine this
  197. * (without being illegal on a PA1.1 machine).
  198. */
  199. #ifndef CONFIG_64BIT
  200. ldi 32,%r10
  201. mtctl %r10,%cr11
  202. .level 2.0
  203. mfctl,w %cr11,%r10
  204. .level 1.1
  205. comib,<>,n 0,%r10,$is_pa20
  206. ldil L%PA(fault_vector_11),%r10
  207. b $install_iva
  208. ldo R%PA(fault_vector_11)(%r10),%r10
  209. $is_pa20:
  210. .level LEVEL /* restore 1.1 || 2.0w */
  211. #endif /*!CONFIG_64BIT*/
  212. load32 PA(fault_vector_20),%r10
  213. $install_iva:
  214. mtctl %r10,%cr14
  215. b aligned_rfi /* Prepare to RFI! Man all the cannons! */
  216. nop
  217. .align 128
  218. aligned_rfi:
  219. pcxt_ssm_bug
  220. rsm PSW_SM_QUIET,%r0 /* off troublesome PSW bits */
  221. /* Don't need NOPs, have 8 compliant insn before rfi */
  222. mtctl %r0,%cr17 /* Clear IIASQ tail */
  223. mtctl %r0,%cr17 /* Clear IIASQ head */
  224. /* Load RFI target into PC queue */
  225. mtctl %r11,%cr18 /* IIAOQ head */
  226. ldo 4(%r11),%r11
  227. mtctl %r11,%cr18 /* IIAOQ tail */
  228. load32 KERNEL_PSW,%r10
  229. mtctl %r10,%ipsw
  230. /* Jump through hyperspace to Virt Mode */
  231. rfi
  232. nop
  233. .procend
  234. #ifdef CONFIG_SMP
  235. .import smp_init_current_idle_task,data
  236. .import smp_callin,code
  237. #ifndef CONFIG_64BIT
  238. smp_callin_rtn:
  239. .proc
  240. .callinfo
  241. break 1,1 /* Break if returned from start_secondary */
  242. nop
  243. nop
  244. .procend
  245. #endif /*!CONFIG_64BIT*/
  246. /***************************************************************************
  247. * smp_slave_stext is executed by all non-monarch Processors when the Monarch
  248. * pokes the slave CPUs in smp.c:smp_boot_cpus().
  249. *
  250. * Once here, registers values are initialized in order to branch to virtual
  251. * mode. Once all available/eligible CPUs are in virtual mode, all are
  252. * released and start out by executing their own idle task.
  253. *****************************************************************************/
  254. smp_slave_stext:
  255. .proc
  256. .callinfo
  257. /*
  258. ** Initialize Space registers
  259. */
  260. mtsp %r0,%sr4
  261. mtsp %r0,%sr5
  262. mtsp %r0,%sr6
  263. mtsp %r0,%sr7
  264. /* Initialize the SP - monarch sets up smp_init_current_idle_task */
  265. load32 PA(smp_init_current_idle_task),%sp
  266. LDREG 0(%sp),%sp /* load task address */
  267. tophys_r1 %sp
  268. LDREG TASK_THREAD_INFO(%sp),%sp
  269. mtctl %sp,%cr30 /* store in cr30 */
  270. ldo THREAD_SZ_ALGN(%sp),%sp
  271. /* point CPU to kernel page tables */
  272. load32 PA(swapper_pg_dir),%r4
  273. mtctl %r4,%cr24 /* Initialize kernel root pointer */
  274. mtctl %r4,%cr25 /* Initialize user root pointer */
  275. #ifdef CONFIG_64BIT
  276. /* Setup PDCE_PROC entry */
  277. copy %arg0,%r3
  278. #else
  279. /* Load RFI *return* address in case smp_callin bails */
  280. load32 smp_callin_rtn,%r2
  281. #endif
  282. /* Load RFI target address. */
  283. load32 smp_callin,%r11
  284. /* ok...common code can handle the rest */
  285. b common_stext
  286. nop
  287. .procend
  288. #endif /* CONFIG_SMP */
  289. #ifndef CONFIG_64BIT
  290. .data
  291. .align 4
  292. .export $global$,data
  293. .type $global$,@object
  294. .size $global$,4
  295. $global$:
  296. .word 0
  297. #endif /*!CONFIG_64BIT*/