ops-titan.c 2.7 KB

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  1. /*
  2. * Copyright 2003 PMC-Sierra
  3. * Author: Manish Lachwani (lachwani@pmc-sierra.com)
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License as published by the
  7. * Free Software Foundation; either version 2 of the License, or (at your
  8. * option) any later version.
  9. *
  10. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  11. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  12. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  13. * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  14. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  15. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  16. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  17. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  18. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  19. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  20. *
  21. * You should have received a copy of the GNU General Public License along
  22. * with this program; if not, write to the Free Software Foundation, Inc.,
  23. * 675 Mass Ave, Cambridge, MA 02139, USA.
  24. */
  25. #include <linux/types.h>
  26. #include <linux/pci.h>
  27. #include <linux/kernel.h>
  28. #include <asm/titan_dep.h>
  29. static int titan_read_config(struct pci_bus *bus, unsigned int devfn, int reg,
  30. int size, u32 * val)
  31. {
  32. uint32_t address, tmp;
  33. int dev, busno, func;
  34. busno = bus->number;
  35. dev = PCI_SLOT(devfn);
  36. func = PCI_FUNC(devfn);
  37. address = (busno << 16) | (dev << 11) | (func << 8) |
  38. (reg & 0xfc) | 0x80000000;
  39. /* start the configuration cycle */
  40. TITAN_WRITE(TITAN_PCI_0_CONFIG_ADDRESS, address);
  41. tmp = TITAN_READ(TITAN_PCI_0_CONFIG_DATA) >> ((reg & 3) << 3);
  42. switch (size) {
  43. case 1:
  44. tmp &= 0xff;
  45. case 2:
  46. tmp &= 0xffff;
  47. }
  48. *val = tmp;
  49. return PCIBIOS_SUCCESSFUL;
  50. }
  51. static int titan_write_config(struct pci_bus *bus, unsigned int devfn, int reg,
  52. int size, u32 val)
  53. {
  54. uint32_t address;
  55. int dev, busno, func;
  56. busno = bus->number;
  57. dev = PCI_SLOT(devfn);
  58. func = PCI_FUNC(devfn);
  59. address = (busno << 16) | (dev << 11) | (func << 8) |
  60. (reg & 0xfc) | 0x80000000;
  61. /* start the configuration cycle */
  62. TITAN_WRITE(TITAN_PCI_0_CONFIG_ADDRESS, address);
  63. /* write the data */
  64. switch (size) {
  65. case 1:
  66. TITAN_WRITE_8(TITAN_PCI_0_CONFIG_DATA + (~reg & 0x3), val);
  67. break;
  68. case 2:
  69. TITAN_WRITE_16(TITAN_PCI_0_CONFIG_DATA + (~reg & 0x2), val);
  70. break;
  71. case 4:
  72. TITAN_WRITE(TITAN_PCI_0_CONFIG_DATA, val);
  73. break;
  74. }
  75. return PCIBIOS_SUCCESSFUL;
  76. }
  77. /*
  78. * Titan PCI structure
  79. */
  80. struct pci_ops titan_pci_ops = {
  81. titan_read_config,
  82. titan_write_config,
  83. };