i8259.c 8.1 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Code to handle x86 style IRQs plus some generic interrupt stuff.
  7. *
  8. * Copyright (C) 1992 Linus Torvalds
  9. * Copyright (C) 1994 - 2000 Ralf Baechle
  10. */
  11. #include <linux/delay.h>
  12. #include <linux/init.h>
  13. #include <linux/ioport.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/kernel.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/sysdev.h>
  18. #include <asm/i8259.h>
  19. #include <asm/io.h>
  20. void enable_8259A_irq(unsigned int irq);
  21. void disable_8259A_irq(unsigned int irq);
  22. /*
  23. * This is the 'legacy' 8259A Programmable Interrupt Controller,
  24. * present in the majority of PC/AT boxes.
  25. * plus some generic x86 specific things if generic specifics makes
  26. * any sense at all.
  27. * this file should become arch/i386/kernel/irq.c when the old irq.c
  28. * moves to arch independent land
  29. */
  30. DEFINE_SPINLOCK(i8259A_lock);
  31. static void end_8259A_irq (unsigned int irq)
  32. {
  33. if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)) &&
  34. irq_desc[irq].action)
  35. enable_8259A_irq(irq);
  36. }
  37. #define shutdown_8259A_irq disable_8259A_irq
  38. void mask_and_ack_8259A(unsigned int);
  39. static unsigned int startup_8259A_irq(unsigned int irq)
  40. {
  41. enable_8259A_irq(irq);
  42. return 0; /* never anything pending */
  43. }
  44. static struct hw_interrupt_type i8259A_irq_type = {
  45. .typename = "XT-PIC",
  46. .startup = startup_8259A_irq,
  47. .shutdown = shutdown_8259A_irq,
  48. .enable = enable_8259A_irq,
  49. .disable = disable_8259A_irq,
  50. .ack = mask_and_ack_8259A,
  51. .end = end_8259A_irq,
  52. };
  53. /*
  54. * 8259A PIC functions to handle ISA devices:
  55. */
  56. /*
  57. * This contains the irq mask for both 8259A irq controllers,
  58. */
  59. static unsigned int cached_irq_mask = 0xffff;
  60. #define cached_21 (cached_irq_mask)
  61. #define cached_A1 (cached_irq_mask >> 8)
  62. void disable_8259A_irq(unsigned int irq)
  63. {
  64. unsigned int mask = 1 << irq;
  65. unsigned long flags;
  66. spin_lock_irqsave(&i8259A_lock, flags);
  67. cached_irq_mask |= mask;
  68. if (irq & 8)
  69. outb(cached_A1,0xA1);
  70. else
  71. outb(cached_21,0x21);
  72. spin_unlock_irqrestore(&i8259A_lock, flags);
  73. }
  74. void enable_8259A_irq(unsigned int irq)
  75. {
  76. unsigned int mask = ~(1 << irq);
  77. unsigned long flags;
  78. spin_lock_irqsave(&i8259A_lock, flags);
  79. cached_irq_mask &= mask;
  80. if (irq & 8)
  81. outb(cached_A1,0xA1);
  82. else
  83. outb(cached_21,0x21);
  84. spin_unlock_irqrestore(&i8259A_lock, flags);
  85. }
  86. int i8259A_irq_pending(unsigned int irq)
  87. {
  88. unsigned int mask = 1 << irq;
  89. unsigned long flags;
  90. int ret;
  91. spin_lock_irqsave(&i8259A_lock, flags);
  92. if (irq < 8)
  93. ret = inb(0x20) & mask;
  94. else
  95. ret = inb(0xA0) & (mask >> 8);
  96. spin_unlock_irqrestore(&i8259A_lock, flags);
  97. return ret;
  98. }
  99. void make_8259A_irq(unsigned int irq)
  100. {
  101. disable_irq_nosync(irq);
  102. irq_desc[irq].handler = &i8259A_irq_type;
  103. enable_irq(irq);
  104. }
  105. /*
  106. * This function assumes to be called rarely. Switching between
  107. * 8259A registers is slow.
  108. * This has to be protected by the irq controller spinlock
  109. * before being called.
  110. */
  111. static inline int i8259A_irq_real(unsigned int irq)
  112. {
  113. int value;
  114. int irqmask = 1 << irq;
  115. if (irq < 8) {
  116. outb(0x0B,0x20); /* ISR register */
  117. value = inb(0x20) & irqmask;
  118. outb(0x0A,0x20); /* back to the IRR register */
  119. return value;
  120. }
  121. outb(0x0B,0xA0); /* ISR register */
  122. value = inb(0xA0) & (irqmask >> 8);
  123. outb(0x0A,0xA0); /* back to the IRR register */
  124. return value;
  125. }
  126. /*
  127. * Careful! The 8259A is a fragile beast, it pretty
  128. * much _has_ to be done exactly like this (mask it
  129. * first, _then_ send the EOI, and the order of EOI
  130. * to the two 8259s is important!
  131. */
  132. void mask_and_ack_8259A(unsigned int irq)
  133. {
  134. unsigned int irqmask = 1 << irq;
  135. unsigned long flags;
  136. spin_lock_irqsave(&i8259A_lock, flags);
  137. /*
  138. * Lightweight spurious IRQ detection. We do not want to overdo
  139. * spurious IRQ handling - it's usually a sign of hardware problems, so
  140. * we only do the checks we can do without slowing down good hardware
  141. * nnecesserily.
  142. *
  143. * Note that IRQ7 and IRQ15 (the two spurious IRQs usually resulting
  144. * rom the 8259A-1|2 PICs) occur even if the IRQ is masked in the 8259A.
  145. * Thus we can check spurious 8259A IRQs without doing the quite slow
  146. * i8259A_irq_real() call for every IRQ. This does not cover 100% of
  147. * spurious interrupts, but should be enough to warn the user that
  148. * there is something bad going on ...
  149. */
  150. if (cached_irq_mask & irqmask)
  151. goto spurious_8259A_irq;
  152. cached_irq_mask |= irqmask;
  153. handle_real_irq:
  154. if (irq & 8) {
  155. inb(0xA1); /* DUMMY - (do we need this?) */
  156. outb(cached_A1,0xA1);
  157. outb(0x60+(irq&7),0xA0);/* 'Specific EOI' to slave */
  158. outb(0x62,0x20); /* 'Specific EOI' to master-IRQ2 */
  159. } else {
  160. inb(0x21); /* DUMMY - (do we need this?) */
  161. outb(cached_21,0x21);
  162. outb(0x60+irq,0x20); /* 'Specific EOI' to master */
  163. }
  164. spin_unlock_irqrestore(&i8259A_lock, flags);
  165. return;
  166. spurious_8259A_irq:
  167. /*
  168. * this is the slow path - should happen rarely.
  169. */
  170. if (i8259A_irq_real(irq))
  171. /*
  172. * oops, the IRQ _is_ in service according to the
  173. * 8259A - not spurious, go handle it.
  174. */
  175. goto handle_real_irq;
  176. {
  177. static int spurious_irq_mask = 0;
  178. /*
  179. * At this point we can be sure the IRQ is spurious,
  180. * lets ACK and report it. [once per IRQ]
  181. */
  182. if (!(spurious_irq_mask & irqmask)) {
  183. printk(KERN_DEBUG "spurious 8259A interrupt: IRQ%d.\n", irq);
  184. spurious_irq_mask |= irqmask;
  185. }
  186. atomic_inc(&irq_err_count);
  187. /*
  188. * Theoretically we do not have to handle this IRQ,
  189. * but in Linux this does not cause problems and is
  190. * simpler for us.
  191. */
  192. goto handle_real_irq;
  193. }
  194. }
  195. static int i8259A_resume(struct sys_device *dev)
  196. {
  197. init_8259A(0);
  198. return 0;
  199. }
  200. static struct sysdev_class i8259_sysdev_class = {
  201. set_kset_name("i8259"),
  202. .resume = i8259A_resume,
  203. };
  204. static struct sys_device device_i8259A = {
  205. .id = 0,
  206. .cls = &i8259_sysdev_class,
  207. };
  208. static int __init i8259A_init_sysfs(void)
  209. {
  210. int error = sysdev_class_register(&i8259_sysdev_class);
  211. if (!error)
  212. error = sysdev_register(&device_i8259A);
  213. return error;
  214. }
  215. device_initcall(i8259A_init_sysfs);
  216. void __init init_8259A(int auto_eoi)
  217. {
  218. unsigned long flags;
  219. spin_lock_irqsave(&i8259A_lock, flags);
  220. outb(0xff, 0x21); /* mask all of 8259A-1 */
  221. outb(0xff, 0xA1); /* mask all of 8259A-2 */
  222. /*
  223. * outb_p - this has to work on a wide range of PC hardware.
  224. */
  225. outb_p(0x11, 0x20); /* ICW1: select 8259A-1 init */
  226. outb_p(0x00, 0x21); /* ICW2: 8259A-1 IR0-7 mapped to 0x00-0x07 */
  227. outb_p(0x04, 0x21); /* 8259A-1 (the master) has a slave on IR2 */
  228. if (auto_eoi)
  229. outb_p(0x03, 0x21); /* master does Auto EOI */
  230. else
  231. outb_p(0x01, 0x21); /* master expects normal EOI */
  232. outb_p(0x11, 0xA0); /* ICW1: select 8259A-2 init */
  233. outb_p(0x08, 0xA1); /* ICW2: 8259A-2 IR0-7 mapped to 0x08-0x0f */
  234. outb_p(0x02, 0xA1); /* 8259A-2 is a slave on master's IR2 */
  235. outb_p(0x01, 0xA1); /* (slave's support for AEOI in flat mode
  236. is to be investigated) */
  237. if (auto_eoi)
  238. /*
  239. * in AEOI mode we just have to mask the interrupt
  240. * when acking.
  241. */
  242. i8259A_irq_type.ack = disable_8259A_irq;
  243. else
  244. i8259A_irq_type.ack = mask_and_ack_8259A;
  245. udelay(100); /* wait for 8259A to initialize */
  246. outb(cached_21, 0x21); /* restore master IRQ mask */
  247. outb(cached_A1, 0xA1); /* restore slave IRQ mask */
  248. spin_unlock_irqrestore(&i8259A_lock, flags);
  249. }
  250. /*
  251. * IRQ2 is cascade interrupt to second interrupt controller
  252. */
  253. static struct irqaction irq2 = {
  254. no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL
  255. };
  256. static struct resource pic1_io_resource = {
  257. "pic1", 0x20, 0x3f, IORESOURCE_BUSY
  258. };
  259. static struct resource pic2_io_resource = {
  260. "pic2", 0xa0, 0xbf, IORESOURCE_BUSY
  261. };
  262. /*
  263. * On systems with i8259-style interrupt controllers we assume for
  264. * driver compatibility reasons interrupts 0 - 15 to be the i8259
  265. * interrupts even if the hardware uses a different interrupt numbering.
  266. */
  267. void __init init_i8259_irqs (void)
  268. {
  269. int i;
  270. request_resource(&ioport_resource, &pic1_io_resource);
  271. request_resource(&ioport_resource, &pic2_io_resource);
  272. init_8259A(0);
  273. for (i = 0; i < 16; i++) {
  274. irq_desc[i].status = IRQ_DISABLED;
  275. irq_desc[i].action = NULL;
  276. irq_desc[i].depth = 1;
  277. irq_desc[i].handler = &i8259A_irq_type;
  278. }
  279. setup_irq(2, &irq2);
  280. }