smpboot.c 21 KB

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  1. /*
  2. * SMP boot-related support
  3. *
  4. * Copyright (C) 1998-2003, 2005 Hewlett-Packard Co
  5. * David Mosberger-Tang <davidm@hpl.hp.com>
  6. * Copyright (C) 2001, 2004-2005 Intel Corp
  7. * Rohit Seth <rohit.seth@intel.com>
  8. * Suresh Siddha <suresh.b.siddha@intel.com>
  9. * Gordon Jin <gordon.jin@intel.com>
  10. * Ashok Raj <ashok.raj@intel.com>
  11. *
  12. * 01/05/16 Rohit Seth <rohit.seth@intel.com> Moved SMP booting functions from smp.c to here.
  13. * 01/04/27 David Mosberger <davidm@hpl.hp.com> Added ITC synching code.
  14. * 02/07/31 David Mosberger <davidm@hpl.hp.com> Switch over to hotplug-CPU boot-sequence.
  15. * smp_boot_cpus()/smp_commence() is replaced by
  16. * smp_prepare_cpus()/__cpu_up()/smp_cpus_done().
  17. * 04/06/21 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support
  18. * 04/12/26 Jin Gordon <gordon.jin@intel.com>
  19. * 04/12/26 Rohit Seth <rohit.seth@intel.com>
  20. * Add multi-threading and multi-core detection
  21. * 05/01/30 Suresh Siddha <suresh.b.siddha@intel.com>
  22. * Setup cpu_sibling_map and cpu_core_map
  23. */
  24. #include <linux/config.h>
  25. #include <linux/module.h>
  26. #include <linux/acpi.h>
  27. #include <linux/bootmem.h>
  28. #include <linux/cpu.h>
  29. #include <linux/delay.h>
  30. #include <linux/init.h>
  31. #include <linux/interrupt.h>
  32. #include <linux/irq.h>
  33. #include <linux/kernel.h>
  34. #include <linux/kernel_stat.h>
  35. #include <linux/mm.h>
  36. #include <linux/notifier.h>
  37. #include <linux/smp.h>
  38. #include <linux/smp_lock.h>
  39. #include <linux/spinlock.h>
  40. #include <linux/efi.h>
  41. #include <linux/percpu.h>
  42. #include <linux/bitops.h>
  43. #include <asm/atomic.h>
  44. #include <asm/cache.h>
  45. #include <asm/current.h>
  46. #include <asm/delay.h>
  47. #include <asm/ia32.h>
  48. #include <asm/io.h>
  49. #include <asm/irq.h>
  50. #include <asm/machvec.h>
  51. #include <asm/mca.h>
  52. #include <asm/page.h>
  53. #include <asm/pgalloc.h>
  54. #include <asm/pgtable.h>
  55. #include <asm/processor.h>
  56. #include <asm/ptrace.h>
  57. #include <asm/sal.h>
  58. #include <asm/system.h>
  59. #include <asm/tlbflush.h>
  60. #include <asm/unistd.h>
  61. #define SMP_DEBUG 0
  62. #if SMP_DEBUG
  63. #define Dprintk(x...) printk(x)
  64. #else
  65. #define Dprintk(x...)
  66. #endif
  67. #ifdef CONFIG_HOTPLUG_CPU
  68. /*
  69. * Store all idle threads, this can be reused instead of creating
  70. * a new thread. Also avoids complicated thread destroy functionality
  71. * for idle threads.
  72. */
  73. struct task_struct *idle_thread_array[NR_CPUS];
  74. /*
  75. * Global array allocated for NR_CPUS at boot time
  76. */
  77. struct sal_to_os_boot sal_boot_rendez_state[NR_CPUS];
  78. /*
  79. * start_ap in head.S uses this to store current booting cpu
  80. * info.
  81. */
  82. struct sal_to_os_boot *sal_state_for_booting_cpu = &sal_boot_rendez_state[0];
  83. #define set_brendez_area(x) (sal_state_for_booting_cpu = &sal_boot_rendez_state[(x)]);
  84. #define get_idle_for_cpu(x) (idle_thread_array[(x)])
  85. #define set_idle_for_cpu(x,p) (idle_thread_array[(x)] = (p))
  86. #else
  87. #define get_idle_for_cpu(x) (NULL)
  88. #define set_idle_for_cpu(x,p)
  89. #define set_brendez_area(x)
  90. #endif
  91. /*
  92. * ITC synchronization related stuff:
  93. */
  94. #define MASTER 0
  95. #define SLAVE (SMP_CACHE_BYTES/8)
  96. #define NUM_ROUNDS 64 /* magic value */
  97. #define NUM_ITERS 5 /* likewise */
  98. static DEFINE_SPINLOCK(itc_sync_lock);
  99. static volatile unsigned long go[SLAVE + 1];
  100. #define DEBUG_ITC_SYNC 0
  101. extern void __devinit calibrate_delay (void);
  102. extern void start_ap (void);
  103. extern unsigned long ia64_iobase;
  104. task_t *task_for_booting_cpu;
  105. /*
  106. * State for each CPU
  107. */
  108. DEFINE_PER_CPU(int, cpu_state);
  109. /* Bitmasks of currently online, and possible CPUs */
  110. cpumask_t cpu_online_map;
  111. EXPORT_SYMBOL(cpu_online_map);
  112. cpumask_t cpu_possible_map;
  113. EXPORT_SYMBOL(cpu_possible_map);
  114. cpumask_t cpu_core_map[NR_CPUS] __cacheline_aligned;
  115. cpumask_t cpu_sibling_map[NR_CPUS] __cacheline_aligned;
  116. int smp_num_siblings = 1;
  117. int smp_num_cpucores = 1;
  118. /* which logical CPU number maps to which CPU (physical APIC ID) */
  119. volatile int ia64_cpu_to_sapicid[NR_CPUS];
  120. EXPORT_SYMBOL(ia64_cpu_to_sapicid);
  121. static volatile cpumask_t cpu_callin_map;
  122. struct smp_boot_data smp_boot_data __initdata;
  123. unsigned long ap_wakeup_vector = -1; /* External Int use to wakeup APs */
  124. char __initdata no_int_routing;
  125. unsigned char smp_int_redirect; /* are INT and IPI redirectable by the chipset? */
  126. static int __init
  127. nointroute (char *str)
  128. {
  129. no_int_routing = 1;
  130. printk ("no_int_routing on\n");
  131. return 1;
  132. }
  133. __setup("nointroute", nointroute);
  134. void
  135. sync_master (void *arg)
  136. {
  137. unsigned long flags, i;
  138. go[MASTER] = 0;
  139. local_irq_save(flags);
  140. {
  141. for (i = 0; i < NUM_ROUNDS*NUM_ITERS; ++i) {
  142. while (!go[MASTER])
  143. cpu_relax();
  144. go[MASTER] = 0;
  145. go[SLAVE] = ia64_get_itc();
  146. }
  147. }
  148. local_irq_restore(flags);
  149. }
  150. /*
  151. * Return the number of cycles by which our itc differs from the itc on the master
  152. * (time-keeper) CPU. A positive number indicates our itc is ahead of the master,
  153. * negative that it is behind.
  154. */
  155. static inline long
  156. get_delta (long *rt, long *master)
  157. {
  158. unsigned long best_t0 = 0, best_t1 = ~0UL, best_tm = 0;
  159. unsigned long tcenter, t0, t1, tm;
  160. long i;
  161. for (i = 0; i < NUM_ITERS; ++i) {
  162. t0 = ia64_get_itc();
  163. go[MASTER] = 1;
  164. while (!(tm = go[SLAVE]))
  165. cpu_relax();
  166. go[SLAVE] = 0;
  167. t1 = ia64_get_itc();
  168. if (t1 - t0 < best_t1 - best_t0)
  169. best_t0 = t0, best_t1 = t1, best_tm = tm;
  170. }
  171. *rt = best_t1 - best_t0;
  172. *master = best_tm - best_t0;
  173. /* average best_t0 and best_t1 without overflow: */
  174. tcenter = (best_t0/2 + best_t1/2);
  175. if (best_t0 % 2 + best_t1 % 2 == 2)
  176. ++tcenter;
  177. return tcenter - best_tm;
  178. }
  179. /*
  180. * Synchronize ar.itc of the current (slave) CPU with the ar.itc of the MASTER CPU
  181. * (normally the time-keeper CPU). We use a closed loop to eliminate the possibility of
  182. * unaccounted-for errors (such as getting a machine check in the middle of a calibration
  183. * step). The basic idea is for the slave to ask the master what itc value it has and to
  184. * read its own itc before and after the master responds. Each iteration gives us three
  185. * timestamps:
  186. *
  187. * slave master
  188. *
  189. * t0 ---\
  190. * ---\
  191. * --->
  192. * tm
  193. * /---
  194. * /---
  195. * t1 <---
  196. *
  197. *
  198. * The goal is to adjust the slave's ar.itc such that tm falls exactly half-way between t0
  199. * and t1. If we achieve this, the clocks are synchronized provided the interconnect
  200. * between the slave and the master is symmetric. Even if the interconnect were
  201. * asymmetric, we would still know that the synchronization error is smaller than the
  202. * roundtrip latency (t0 - t1).
  203. *
  204. * When the interconnect is quiet and symmetric, this lets us synchronize the itc to
  205. * within one or two cycles. However, we can only *guarantee* that the synchronization is
  206. * accurate to within a round-trip time, which is typically in the range of several
  207. * hundred cycles (e.g., ~500 cycles). In practice, this means that the itc's are usually
  208. * almost perfectly synchronized, but we shouldn't assume that the accuracy is much better
  209. * than half a micro second or so.
  210. */
  211. void
  212. ia64_sync_itc (unsigned int master)
  213. {
  214. long i, delta, adj, adjust_latency = 0, done = 0;
  215. unsigned long flags, rt, master_time_stamp, bound;
  216. #if DEBUG_ITC_SYNC
  217. struct {
  218. long rt; /* roundtrip time */
  219. long master; /* master's timestamp */
  220. long diff; /* difference between midpoint and master's timestamp */
  221. long lat; /* estimate of itc adjustment latency */
  222. } t[NUM_ROUNDS];
  223. #endif
  224. /*
  225. * Make sure local timer ticks are disabled while we sync. If
  226. * they were enabled, we'd have to worry about nasty issues
  227. * like setting the ITC ahead of (or a long time before) the
  228. * next scheduled tick.
  229. */
  230. BUG_ON((ia64_get_itv() & (1 << 16)) == 0);
  231. go[MASTER] = 1;
  232. if (smp_call_function_single(master, sync_master, NULL, 1, 0) < 0) {
  233. printk(KERN_ERR "sync_itc: failed to get attention of CPU %u!\n", master);
  234. return;
  235. }
  236. while (go[MASTER])
  237. cpu_relax(); /* wait for master to be ready */
  238. spin_lock_irqsave(&itc_sync_lock, flags);
  239. {
  240. for (i = 0; i < NUM_ROUNDS; ++i) {
  241. delta = get_delta(&rt, &master_time_stamp);
  242. if (delta == 0) {
  243. done = 1; /* let's lock on to this... */
  244. bound = rt;
  245. }
  246. if (!done) {
  247. if (i > 0) {
  248. adjust_latency += -delta;
  249. adj = -delta + adjust_latency/4;
  250. } else
  251. adj = -delta;
  252. ia64_set_itc(ia64_get_itc() + adj);
  253. }
  254. #if DEBUG_ITC_SYNC
  255. t[i].rt = rt;
  256. t[i].master = master_time_stamp;
  257. t[i].diff = delta;
  258. t[i].lat = adjust_latency/4;
  259. #endif
  260. }
  261. }
  262. spin_unlock_irqrestore(&itc_sync_lock, flags);
  263. #if DEBUG_ITC_SYNC
  264. for (i = 0; i < NUM_ROUNDS; ++i)
  265. printk("rt=%5ld master=%5ld diff=%5ld adjlat=%5ld\n",
  266. t[i].rt, t[i].master, t[i].diff, t[i].lat);
  267. #endif
  268. printk(KERN_INFO "CPU %d: synchronized ITC with CPU %u (last diff %ld cycles, "
  269. "maxerr %lu cycles)\n", smp_processor_id(), master, delta, rt);
  270. }
  271. /*
  272. * Ideally sets up per-cpu profiling hooks. Doesn't do much now...
  273. */
  274. static inline void __devinit
  275. smp_setup_percpu_timer (void)
  276. {
  277. }
  278. static void __devinit
  279. smp_callin (void)
  280. {
  281. int cpuid, phys_id;
  282. extern void ia64_init_itm(void);
  283. #ifdef CONFIG_PERFMON
  284. extern void pfm_init_percpu(void);
  285. #endif
  286. cpuid = smp_processor_id();
  287. phys_id = hard_smp_processor_id();
  288. if (cpu_online(cpuid)) {
  289. printk(KERN_ERR "huh, phys CPU#0x%x, CPU#0x%x already present??\n",
  290. phys_id, cpuid);
  291. BUG();
  292. }
  293. lock_ipi_calllock();
  294. cpu_set(cpuid, cpu_online_map);
  295. unlock_ipi_calllock();
  296. per_cpu(cpu_state, cpuid) = CPU_ONLINE;
  297. smp_setup_percpu_timer();
  298. ia64_mca_cmc_vector_setup(); /* Setup vector on AP */
  299. #ifdef CONFIG_PERFMON
  300. pfm_init_percpu();
  301. #endif
  302. local_irq_enable();
  303. if (!(sal_platform_features & IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT)) {
  304. /*
  305. * Synchronize the ITC with the BP. Need to do this after irqs are
  306. * enabled because ia64_sync_itc() calls smp_call_function_single(), which
  307. * calls spin_unlock_bh(), which calls spin_unlock_bh(), which calls
  308. * local_bh_enable(), which bugs out if irqs are not enabled...
  309. */
  310. Dprintk("Going to syncup ITC with BP.\n");
  311. ia64_sync_itc(0);
  312. }
  313. /*
  314. * Get our bogomips.
  315. */
  316. ia64_init_itm();
  317. calibrate_delay();
  318. local_cpu_data->loops_per_jiffy = loops_per_jiffy;
  319. #ifdef CONFIG_IA32_SUPPORT
  320. ia32_gdt_init();
  321. #endif
  322. /*
  323. * Allow the master to continue.
  324. */
  325. cpu_set(cpuid, cpu_callin_map);
  326. Dprintk("Stack on CPU %d at about %p\n",cpuid, &cpuid);
  327. }
  328. /*
  329. * Activate a secondary processor. head.S calls this.
  330. */
  331. int __devinit
  332. start_secondary (void *unused)
  333. {
  334. /* Early console may use I/O ports */
  335. ia64_set_kr(IA64_KR_IO_BASE, __pa(ia64_iobase));
  336. Dprintk("start_secondary: starting CPU 0x%x\n", hard_smp_processor_id());
  337. efi_map_pal_code();
  338. cpu_init();
  339. preempt_disable();
  340. smp_callin();
  341. cpu_idle();
  342. return 0;
  343. }
  344. struct pt_regs * __devinit idle_regs(struct pt_regs *regs)
  345. {
  346. return NULL;
  347. }
  348. struct create_idle {
  349. struct task_struct *idle;
  350. struct completion done;
  351. int cpu;
  352. };
  353. void
  354. do_fork_idle(void *_c_idle)
  355. {
  356. struct create_idle *c_idle = _c_idle;
  357. c_idle->idle = fork_idle(c_idle->cpu);
  358. complete(&c_idle->done);
  359. }
  360. static int __devinit
  361. do_boot_cpu (int sapicid, int cpu)
  362. {
  363. int timeout;
  364. struct create_idle c_idle = {
  365. .cpu = cpu,
  366. .done = COMPLETION_INITIALIZER(c_idle.done),
  367. };
  368. DECLARE_WORK(work, do_fork_idle, &c_idle);
  369. c_idle.idle = get_idle_for_cpu(cpu);
  370. if (c_idle.idle) {
  371. init_idle(c_idle.idle, cpu);
  372. goto do_rest;
  373. }
  374. /*
  375. * We can't use kernel_thread since we must avoid to reschedule the child.
  376. */
  377. if (!keventd_up() || current_is_keventd())
  378. work.func(work.data);
  379. else {
  380. schedule_work(&work);
  381. wait_for_completion(&c_idle.done);
  382. }
  383. if (IS_ERR(c_idle.idle))
  384. panic("failed fork for CPU %d", cpu);
  385. set_idle_for_cpu(cpu, c_idle.idle);
  386. do_rest:
  387. task_for_booting_cpu = c_idle.idle;
  388. Dprintk("Sending wakeup vector %lu to AP 0x%x/0x%x.\n", ap_wakeup_vector, cpu, sapicid);
  389. set_brendez_area(cpu);
  390. platform_send_ipi(cpu, ap_wakeup_vector, IA64_IPI_DM_INT, 0);
  391. /*
  392. * Wait 10s total for the AP to start
  393. */
  394. Dprintk("Waiting on callin_map ...");
  395. for (timeout = 0; timeout < 100000; timeout++) {
  396. if (cpu_isset(cpu, cpu_callin_map))
  397. break; /* It has booted */
  398. udelay(100);
  399. }
  400. Dprintk("\n");
  401. if (!cpu_isset(cpu, cpu_callin_map)) {
  402. printk(KERN_ERR "Processor 0x%x/0x%x is stuck.\n", cpu, sapicid);
  403. ia64_cpu_to_sapicid[cpu] = -1;
  404. cpu_clear(cpu, cpu_online_map); /* was set in smp_callin() */
  405. return -EINVAL;
  406. }
  407. return 0;
  408. }
  409. static int __init
  410. decay (char *str)
  411. {
  412. int ticks;
  413. get_option (&str, &ticks);
  414. return 1;
  415. }
  416. __setup("decay=", decay);
  417. /*
  418. * Initialize the logical CPU number to SAPICID mapping
  419. */
  420. void __init
  421. smp_build_cpu_map (void)
  422. {
  423. int sapicid, cpu, i;
  424. int boot_cpu_id = hard_smp_processor_id();
  425. for (cpu = 0; cpu < NR_CPUS; cpu++) {
  426. ia64_cpu_to_sapicid[cpu] = -1;
  427. #ifdef CONFIG_HOTPLUG_CPU
  428. cpu_set(cpu, cpu_possible_map);
  429. #endif
  430. }
  431. ia64_cpu_to_sapicid[0] = boot_cpu_id;
  432. cpus_clear(cpu_present_map);
  433. cpu_set(0, cpu_present_map);
  434. cpu_set(0, cpu_possible_map);
  435. for (cpu = 1, i = 0; i < smp_boot_data.cpu_count; i++) {
  436. sapicid = smp_boot_data.cpu_phys_id[i];
  437. if (sapicid == boot_cpu_id)
  438. continue;
  439. cpu_set(cpu, cpu_present_map);
  440. cpu_set(cpu, cpu_possible_map);
  441. ia64_cpu_to_sapicid[cpu] = sapicid;
  442. cpu++;
  443. }
  444. }
  445. /*
  446. * Cycle through the APs sending Wakeup IPIs to boot each.
  447. */
  448. void __init
  449. smp_prepare_cpus (unsigned int max_cpus)
  450. {
  451. int boot_cpu_id = hard_smp_processor_id();
  452. /*
  453. * Initialize the per-CPU profiling counter/multiplier
  454. */
  455. smp_setup_percpu_timer();
  456. /*
  457. * We have the boot CPU online for sure.
  458. */
  459. cpu_set(0, cpu_online_map);
  460. cpu_set(0, cpu_callin_map);
  461. local_cpu_data->loops_per_jiffy = loops_per_jiffy;
  462. ia64_cpu_to_sapicid[0] = boot_cpu_id;
  463. printk(KERN_INFO "Boot processor id 0x%x/0x%x\n", 0, boot_cpu_id);
  464. current_thread_info()->cpu = 0;
  465. /*
  466. * If SMP should be disabled, then really disable it!
  467. */
  468. if (!max_cpus) {
  469. printk(KERN_INFO "SMP mode deactivated.\n");
  470. cpus_clear(cpu_online_map);
  471. cpus_clear(cpu_present_map);
  472. cpus_clear(cpu_possible_map);
  473. cpu_set(0, cpu_online_map);
  474. cpu_set(0, cpu_present_map);
  475. cpu_set(0, cpu_possible_map);
  476. return;
  477. }
  478. }
  479. void __devinit smp_prepare_boot_cpu(void)
  480. {
  481. cpu_set(smp_processor_id(), cpu_online_map);
  482. cpu_set(smp_processor_id(), cpu_callin_map);
  483. per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
  484. }
  485. /*
  486. * mt_info[] is a temporary store for all info returned by
  487. * PAL_LOGICAL_TO_PHYSICAL, to be copied into cpuinfo_ia64 when the
  488. * specific cpu comes.
  489. */
  490. static struct {
  491. __u32 socket_id;
  492. __u16 core_id;
  493. __u16 thread_id;
  494. __u16 proc_fixed_addr;
  495. __u8 valid;
  496. } mt_info[NR_CPUS] __devinitdata;
  497. #ifdef CONFIG_HOTPLUG_CPU
  498. static inline void
  499. remove_from_mtinfo(int cpu)
  500. {
  501. int i;
  502. for_each_cpu(i)
  503. if (mt_info[i].valid && mt_info[i].socket_id ==
  504. cpu_data(cpu)->socket_id)
  505. mt_info[i].valid = 0;
  506. }
  507. static inline void
  508. clear_cpu_sibling_map(int cpu)
  509. {
  510. int i;
  511. for_each_cpu_mask(i, cpu_sibling_map[cpu])
  512. cpu_clear(cpu, cpu_sibling_map[i]);
  513. for_each_cpu_mask(i, cpu_core_map[cpu])
  514. cpu_clear(cpu, cpu_core_map[i]);
  515. cpu_sibling_map[cpu] = cpu_core_map[cpu] = CPU_MASK_NONE;
  516. }
  517. static void
  518. remove_siblinginfo(int cpu)
  519. {
  520. int last = 0;
  521. if (cpu_data(cpu)->threads_per_core == 1 &&
  522. cpu_data(cpu)->cores_per_socket == 1) {
  523. cpu_clear(cpu, cpu_core_map[cpu]);
  524. cpu_clear(cpu, cpu_sibling_map[cpu]);
  525. return;
  526. }
  527. last = (cpus_weight(cpu_core_map[cpu]) == 1 ? 1 : 0);
  528. /* remove it from all sibling map's */
  529. clear_cpu_sibling_map(cpu);
  530. /* if this cpu is the last in the core group, remove all its info
  531. * from mt_info structure
  532. */
  533. if (last)
  534. remove_from_mtinfo(cpu);
  535. }
  536. extern void fixup_irqs(void);
  537. /* must be called with cpucontrol mutex held */
  538. int __cpu_disable(void)
  539. {
  540. int cpu = smp_processor_id();
  541. /*
  542. * dont permit boot processor for now
  543. */
  544. if (cpu == 0)
  545. return -EBUSY;
  546. remove_siblinginfo(cpu);
  547. cpu_clear(cpu, cpu_online_map);
  548. fixup_irqs();
  549. local_flush_tlb_all();
  550. cpu_clear(cpu, cpu_callin_map);
  551. return 0;
  552. }
  553. void __cpu_die(unsigned int cpu)
  554. {
  555. unsigned int i;
  556. for (i = 0; i < 100; i++) {
  557. /* They ack this in play_dead by setting CPU_DEAD */
  558. if (per_cpu(cpu_state, cpu) == CPU_DEAD)
  559. {
  560. printk ("CPU %d is now offline\n", cpu);
  561. return;
  562. }
  563. msleep(100);
  564. }
  565. printk(KERN_ERR "CPU %u didn't die...\n", cpu);
  566. }
  567. #else /* !CONFIG_HOTPLUG_CPU */
  568. int __cpu_disable(void)
  569. {
  570. return -ENOSYS;
  571. }
  572. void __cpu_die(unsigned int cpu)
  573. {
  574. /* We said "no" in __cpu_disable */
  575. BUG();
  576. }
  577. #endif /* CONFIG_HOTPLUG_CPU */
  578. void
  579. smp_cpus_done (unsigned int dummy)
  580. {
  581. int cpu;
  582. unsigned long bogosum = 0;
  583. /*
  584. * Allow the user to impress friends.
  585. */
  586. for_each_online_cpu(cpu) {
  587. bogosum += cpu_data(cpu)->loops_per_jiffy;
  588. }
  589. printk(KERN_INFO "Total of %d processors activated (%lu.%02lu BogoMIPS).\n",
  590. (int)num_online_cpus(), bogosum/(500000/HZ), (bogosum/(5000/HZ))%100);
  591. }
  592. static inline void __devinit
  593. set_cpu_sibling_map(int cpu)
  594. {
  595. int i;
  596. for_each_online_cpu(i) {
  597. if ((cpu_data(cpu)->socket_id == cpu_data(i)->socket_id)) {
  598. cpu_set(i, cpu_core_map[cpu]);
  599. cpu_set(cpu, cpu_core_map[i]);
  600. if (cpu_data(cpu)->core_id == cpu_data(i)->core_id) {
  601. cpu_set(i, cpu_sibling_map[cpu]);
  602. cpu_set(cpu, cpu_sibling_map[i]);
  603. }
  604. }
  605. }
  606. }
  607. int __devinit
  608. __cpu_up (unsigned int cpu)
  609. {
  610. int ret;
  611. int sapicid;
  612. sapicid = ia64_cpu_to_sapicid[cpu];
  613. if (sapicid == -1)
  614. return -EINVAL;
  615. /*
  616. * Already booted cpu? not valid anymore since we dont
  617. * do idle loop tightspin anymore.
  618. */
  619. if (cpu_isset(cpu, cpu_callin_map))
  620. return -EINVAL;
  621. per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
  622. /* Processor goes to start_secondary(), sets online flag */
  623. ret = do_boot_cpu(sapicid, cpu);
  624. if (ret < 0)
  625. return ret;
  626. if (cpu_data(cpu)->threads_per_core == 1 &&
  627. cpu_data(cpu)->cores_per_socket == 1) {
  628. cpu_set(cpu, cpu_sibling_map[cpu]);
  629. cpu_set(cpu, cpu_core_map[cpu]);
  630. return 0;
  631. }
  632. set_cpu_sibling_map(cpu);
  633. return 0;
  634. }
  635. /*
  636. * Assume that CPU's have been discovered by some platform-dependent interface. For
  637. * SoftSDV/Lion, that would be ACPI.
  638. *
  639. * Setup of the IPI irq handler is done in irq.c:init_IRQ_SMP().
  640. */
  641. void __init
  642. init_smp_config(void)
  643. {
  644. struct fptr {
  645. unsigned long fp;
  646. unsigned long gp;
  647. } *ap_startup;
  648. long sal_ret;
  649. /* Tell SAL where to drop the AP's. */
  650. ap_startup = (struct fptr *) start_ap;
  651. sal_ret = ia64_sal_set_vectors(SAL_VECTOR_OS_BOOT_RENDEZ,
  652. ia64_tpa(ap_startup->fp), ia64_tpa(ap_startup->gp), 0, 0, 0, 0);
  653. if (sal_ret < 0)
  654. printk(KERN_ERR "SMP: Can't set SAL AP Boot Rendezvous: %s\n",
  655. ia64_sal_strerror(sal_ret));
  656. }
  657. static inline int __devinit
  658. check_for_mtinfo_index(void)
  659. {
  660. int i;
  661. for_each_cpu(i)
  662. if (!mt_info[i].valid)
  663. return i;
  664. return -1;
  665. }
  666. /*
  667. * Search the mt_info to find out if this socket's cid/tid information is
  668. * cached or not. If the socket exists, fill in the core_id and thread_id
  669. * in cpuinfo
  670. */
  671. static int __devinit
  672. check_for_new_socket(__u16 logical_address, struct cpuinfo_ia64 *c)
  673. {
  674. int i;
  675. __u32 sid = c->socket_id;
  676. for_each_cpu(i) {
  677. if (mt_info[i].valid && mt_info[i].proc_fixed_addr == logical_address
  678. && mt_info[i].socket_id == sid) {
  679. c->core_id = mt_info[i].core_id;
  680. c->thread_id = mt_info[i].thread_id;
  681. return 1; /* not a new socket */
  682. }
  683. }
  684. return 0;
  685. }
  686. /*
  687. * identify_siblings(cpu) gets called from identify_cpu. This populates the
  688. * information related to logical execution units in per_cpu_data structure.
  689. */
  690. void __devinit
  691. identify_siblings(struct cpuinfo_ia64 *c)
  692. {
  693. s64 status;
  694. u16 pltid;
  695. u64 proc_fixed_addr;
  696. int count, i;
  697. pal_logical_to_physical_t info;
  698. if (smp_num_cpucores == 1 && smp_num_siblings == 1)
  699. return;
  700. if ((status = ia64_pal_logical_to_phys(0, &info)) != PAL_STATUS_SUCCESS) {
  701. printk(KERN_ERR "ia64_pal_logical_to_phys failed with %ld\n",
  702. status);
  703. return;
  704. }
  705. if ((status = ia64_sal_physical_id_info(&pltid)) != PAL_STATUS_SUCCESS) {
  706. printk(KERN_ERR "ia64_sal_pltid failed with %ld\n", status);
  707. return;
  708. }
  709. if ((status = ia64_pal_fixed_addr(&proc_fixed_addr)) != PAL_STATUS_SUCCESS) {
  710. printk(KERN_ERR "ia64_pal_fixed_addr failed with %ld\n", status);
  711. return;
  712. }
  713. c->socket_id = (pltid << 8) | info.overview_ppid;
  714. c->cores_per_socket = info.overview_cpp;
  715. c->threads_per_core = info.overview_tpc;
  716. count = c->num_log = info.overview_num_log;
  717. /* If the thread and core id information is already cached, then
  718. * we will simply update cpu_info and return. Otherwise, we will
  719. * do the PAL calls and cache core and thread id's of all the siblings.
  720. */
  721. if (check_for_new_socket(proc_fixed_addr, c))
  722. return;
  723. for (i = 0; i < count; i++) {
  724. int index;
  725. if (i && (status = ia64_pal_logical_to_phys(i, &info))
  726. != PAL_STATUS_SUCCESS) {
  727. printk(KERN_ERR "ia64_pal_logical_to_phys failed"
  728. " with %ld\n", status);
  729. return;
  730. }
  731. if (info.log2_la == proc_fixed_addr) {
  732. c->core_id = info.log1_cid;
  733. c->thread_id = info.log1_tid;
  734. }
  735. index = check_for_mtinfo_index();
  736. /* We will not do the mt_info caching optimization in this case.
  737. */
  738. if (index < 0)
  739. continue;
  740. mt_info[index].valid = 1;
  741. mt_info[index].socket_id = c->socket_id;
  742. mt_info[index].core_id = info.log1_cid;
  743. mt_info[index].thread_id = info.log1_tid;
  744. mt_info[index].proc_fixed_addr = info.log2_la;
  745. }
  746. }