mux.c 14 KB

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  1. /*
  2. * linux/arch/arm/mach-omap1/mux.c
  3. *
  4. * OMAP1 pin multiplexing configurations
  5. *
  6. * Copyright (C) 2003 - 2005 Nokia Corporation
  7. *
  8. * Written by Tony Lindgren <tony.lindgren@nokia.com>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23. *
  24. */
  25. #include <linux/config.h>
  26. #include <linux/module.h>
  27. #include <linux/init.h>
  28. #include <asm/system.h>
  29. #include <asm/io.h>
  30. #include <linux/spinlock.h>
  31. #include <asm/arch/mux.h>
  32. #ifdef CONFIG_OMAP_MUX
  33. #ifdef CONFIG_ARCH_OMAP730
  34. struct pin_config __initdata_or_module omap730_pins[] = {
  35. MUX_CFG_730("E2_730_KBR0", 12, 21, 0, 0, 20, 1, NA, 0, 0)
  36. MUX_CFG_730("J7_730_KBR1", 12, 25, 0, 0, 24, 1, NA, 0, 0)
  37. MUX_CFG_730("E1_730_KBR2", 12, 29, 0, 0, 28, 1, NA, 0, 0)
  38. MUX_CFG_730("F3_730_KBR3", 13, 1, 0, 0, 0, 1, NA, 0, 0)
  39. MUX_CFG_730("D2_730_KBR4", 13, 5, 0, 0, 4, 1, NA, 0, 0)
  40. MUX_CFG_730("C2_730_KBC0", 13, 9, 0, 0, 8, 1, NA, 0, 0)
  41. MUX_CFG_730("D3_730_KBC1", 13, 13, 0, 0, 12, 1, NA, 0, 0)
  42. MUX_CFG_730("E4_730_KBC2", 13, 17, 0, 0, 16, 1, NA, 0, 0)
  43. MUX_CFG_730("F4_730_KBC3", 13, 21, 0, 0, 20, 1, NA, 0, 0)
  44. MUX_CFG_730("E3_730_KBC4", 13, 25, 0, 0, 24, 1, NA, 0, 0)
  45. };
  46. #endif
  47. #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
  48. struct pin_config __initdata_or_module omap1xxx_pins[] = {
  49. /*
  50. * description mux mode mux pull pull pull pu_pd pu dbg
  51. * reg offset mode reg bit ena reg
  52. */
  53. MUX_CFG("UART1_TX", 9, 21, 1, 2, 3, 0, NA, 0, 0)
  54. MUX_CFG("UART1_RTS", 9, 12, 1, 2, 0, 0, NA, 0, 0)
  55. /* UART2 (COM_UART_GATING), conflicts with USB2 */
  56. MUX_CFG("UART2_TX", C, 27, 1, 3, 3, 0, NA, 0, 0)
  57. MUX_CFG("UART2_RX", C, 18, 0, 3, 1, 1, NA, 0, 0)
  58. MUX_CFG("UART2_CTS", C, 21, 0, 3, 1, 1, NA, 0, 0)
  59. MUX_CFG("UART2_RTS", C, 24, 1, 3, 2, 0, NA, 0, 0)
  60. /* UART3 (GIGA_UART_GATING) */
  61. MUX_CFG("UART3_TX", 6, 0, 1, 0, 30, 0, NA, 0, 0)
  62. MUX_CFG("UART3_RX", 6, 3, 0, 0, 31, 1, NA, 0, 0)
  63. MUX_CFG("UART3_CTS", 5, 12, 2, 0, 24, 0, NA, 0, 0)
  64. MUX_CFG("UART3_RTS", 5, 15, 2, 0, 25, 0, NA, 0, 0)
  65. MUX_CFG("UART3_CLKREQ", 9, 27, 0, 2, 5, 0, NA, 0, 0)
  66. MUX_CFG("UART3_BCLK", A, 0, 0, 2, 6, 0, NA, 0, 0)
  67. MUX_CFG("Y15_1610_UART3_RTS", A, 0, 1, 2, 6, 0, NA, 0, 0)
  68. /* PWT & PWL, conflicts with UART3 */
  69. MUX_CFG("PWT", 6, 0, 2, 0, 30, 0, NA, 0, 0)
  70. MUX_CFG("PWL", 6, 3, 1, 0, 31, 1, NA, 0, 0)
  71. /* USB internal master generic */
  72. MUX_CFG("R18_USB_VBUS", 7, 9, 2, 1, 11, 0, NA, 0, 1)
  73. MUX_CFG("R18_1510_USB_GPIO0", 7, 9, 0, 1, 11, 1, NA, 0, 1)
  74. /* works around erratum: W4_USB_PUEN and W4_USB_PUDIS are switched! */
  75. MUX_CFG("W4_USB_PUEN", D, 3, 3, 3, 5, 1, NA, 0, 1)
  76. MUX_CFG("W4_USB_CLKO", D, 3, 1, 3, 5, 0, NA, 0, 1)
  77. MUX_CFG("W4_USB_HIGHZ", D, 3, 4, 3, 5, 0, 3, 0, 1)
  78. MUX_CFG("W4_GPIO58", D, 3, 7, 3, 5, 0, 3, 0, 1)
  79. /* USB1 master */
  80. MUX_CFG("USB1_SUSP", 8, 27, 2, 1, 27, 0, NA, 0, 1)
  81. MUX_CFG("USB1_SE0", 9, 0, 2, 1, 28, 0, NA, 0, 1)
  82. MUX_CFG("W13_1610_USB1_SE0", 9, 0, 4, 1, 28, 0, NA, 0, 1)
  83. MUX_CFG("USB1_TXEN", 9, 3, 2, 1, 29, 0, NA, 0, 1)
  84. MUX_CFG("USB1_TXD", 9, 24, 1, 2, 4, 0, NA, 0, 1)
  85. MUX_CFG("USB1_VP", A, 3, 1, 2, 7, 0, NA, 0, 1)
  86. MUX_CFG("USB1_VM", A, 6, 1, 2, 8, 0, NA, 0, 1)
  87. MUX_CFG("USB1_RCV", A, 9, 1, 2, 9, 0, NA, 0, 1)
  88. MUX_CFG("USB1_SPEED", A, 12, 2, 2, 10, 0, NA, 0, 1)
  89. MUX_CFG("R13_1610_USB1_SPEED", A, 12, 5, 2, 10, 0, NA, 0, 1)
  90. MUX_CFG("R13_1710_USB1_SEO", A, 12, 5, 2, 10, 0, NA, 0, 1)
  91. /* USB2 master */
  92. MUX_CFG("USB2_SUSP", B, 3, 1, 2, 17, 0, NA, 0, 1)
  93. MUX_CFG("USB2_VP", B, 6, 1, 2, 18, 0, NA, 0, 1)
  94. MUX_CFG("USB2_TXEN", B, 9, 1, 2, 19, 0, NA, 0, 1)
  95. MUX_CFG("USB2_VM", C, 18, 1, 3, 0, 0, NA, 0, 1)
  96. MUX_CFG("USB2_RCV", C, 21, 1, 3, 1, 0, NA, 0, 1)
  97. MUX_CFG("USB2_SE0", C, 24, 2, 3, 2, 0, NA, 0, 1)
  98. MUX_CFG("USB2_TXD", C, 27, 2, 3, 3, 0, NA, 0, 1)
  99. /* OMAP-1510 GPIO */
  100. MUX_CFG("R18_1510_GPIO0", 7, 9, 0, 1, 11, 1, 0, 0, 1)
  101. MUX_CFG("R19_1510_GPIO1", 7, 6, 0, 1, 10, 1, 0, 0, 1)
  102. MUX_CFG("M14_1510_GPIO2", 7, 3, 0, 1, 9, 1, 0, 0, 1)
  103. /* OMAP1610 GPIO */
  104. MUX_CFG("P18_1610_GPIO3", 7, 0, 0, 1, 8, 0, NA, 0, 1)
  105. MUX_CFG("Y15_1610_GPIO17", A, 0, 7, 2, 6, 0, NA, 0, 1)
  106. /* OMAP-1710 GPIO */
  107. MUX_CFG("R18_1710_GPIO0", 7, 9, 0, 1, 11, 1, 1, 1, 1)
  108. MUX_CFG("V2_1710_GPIO10", F, 27, 1, 4, 3, 1, 4, 1, 1)
  109. MUX_CFG("N21_1710_GPIO14", 6, 9, 0, 1, 1, 1, 1, 1, 1)
  110. MUX_CFG("W15_1710_GPIO40", 9, 27, 7, 2, 5, 1, 2, 1, 1)
  111. /* MPUIO */
  112. MUX_CFG("MPUIO2", 7, 18, 0, 1, 14, 1, NA, 0, 1)
  113. MUX_CFG("N15_1610_MPUIO2", 7, 18, 0, 1, 14, 1, 1, 0, 1)
  114. MUX_CFG("MPUIO4", 7, 15, 0, 1, 13, 1, NA, 0, 1)
  115. MUX_CFG("MPUIO5", 7, 12, 0, 1, 12, 1, NA, 0, 1)
  116. MUX_CFG("T20_1610_MPUIO5", 7, 12, 0, 1, 12, 0, 3, 0, 1)
  117. MUX_CFG("W11_1610_MPUIO6", 10, 15, 2, 3, 8, 0, 3, 0, 1)
  118. MUX_CFG("V10_1610_MPUIO7", A, 24, 2, 2, 14, 0, 2, 0, 1)
  119. MUX_CFG("W11_1610_MPUIO9", 10, 15, 1, 3, 8, 0, 3, 0, 1)
  120. MUX_CFG("V10_1610_MPUIO10", A, 24, 1, 2, 14, 0, 2, 0, 1)
  121. MUX_CFG("W10_1610_MPUIO11", A, 18, 2, 2, 11, 0, 2, 0, 1)
  122. MUX_CFG("E20_1610_MPUIO13", 3, 21, 1, 0, 7, 0, 0, 0, 1)
  123. MUX_CFG("U20_1610_MPUIO14", 9, 6, 6, 0, 30, 0, 0, 0, 1)
  124. MUX_CFG("E19_1610_MPUIO15", 3, 18, 1, 0, 6, 0, 0, 0, 1)
  125. /* MCBSP2 */
  126. MUX_CFG("MCBSP2_CLKR", C, 6, 0, 2, 27, 1, NA, 0, 1)
  127. MUX_CFG("MCBSP2_CLKX", C, 9, 0, 2, 29, 1, NA, 0, 1)
  128. MUX_CFG("MCBSP2_DR", C, 0, 0, 2, 26, 1, NA, 0, 1)
  129. MUX_CFG("MCBSP2_DX", C, 15, 0, 2, 31, 1, NA, 0, 1)
  130. MUX_CFG("MCBSP2_FSR", C, 12, 0, 2, 30, 1, NA, 0, 1)
  131. MUX_CFG("MCBSP2_FSX", C, 3, 0, 2, 27, 1, NA, 0, 1)
  132. /* MCBSP3 NOTE: Mode must 1 for clock */
  133. MUX_CFG("MCBSP3_CLKX", 9, 3, 1, 1, 29, 0, NA, 0, 1)
  134. /* Misc ballouts */
  135. MUX_CFG("BALLOUT_V8_ARMIO3", B, 18, 0, 2, 25, 1, NA, 0, 1)
  136. MUX_CFG("N20_HDQ", 6, 18, 1, 1, 4, 0, 1, 4, 0)
  137. /* OMAP-1610 MMC2 */
  138. MUX_CFG("W8_1610_MMC2_DAT0", B, 21, 6, 2, 23, 1, 2, 1, 1)
  139. MUX_CFG("V8_1610_MMC2_DAT1", B, 27, 6, 2, 25, 1, 2, 1, 1)
  140. MUX_CFG("W15_1610_MMC2_DAT2", 9, 12, 6, 2, 5, 1, 2, 1, 1)
  141. MUX_CFG("R10_1610_MMC2_DAT3", B, 18, 6, 2, 22, 1, 2, 1, 1)
  142. MUX_CFG("Y10_1610_MMC2_CLK", B, 3, 6, 2, 17, 0, 2, 0, 1)
  143. MUX_CFG("Y8_1610_MMC2_CMD", B, 24, 6, 2, 24, 1, 2, 1, 1)
  144. MUX_CFG("V9_1610_MMC2_CMDDIR", B, 12, 6, 2, 20, 0, 2, 1, 1)
  145. MUX_CFG("V5_1610_MMC2_DATDIR0", B, 15, 6, 2, 21, 0, 2, 1, 1)
  146. MUX_CFG("W19_1610_MMC2_DATDIR1", 8, 15, 6, 1, 23, 0, 1, 1, 1)
  147. MUX_CFG("R18_1610_MMC2_CLKIN", 7, 9, 6, 1, 11, 0, 1, 11, 1)
  148. /* OMAP-1610 External Trace Interface */
  149. MUX_CFG("M19_1610_ETM_PSTAT0", 5, 27, 1, 0, 29, 0, 0, 0, 1)
  150. MUX_CFG("L15_1610_ETM_PSTAT1", 5, 24, 1, 0, 28, 0, 0, 0, 1)
  151. MUX_CFG("L18_1610_ETM_PSTAT2", 5, 21, 1, 0, 27, 0, 0, 0, 1)
  152. MUX_CFG("L19_1610_ETM_D0", 5, 18, 1, 0, 26, 0, 0, 0, 1)
  153. MUX_CFG("J19_1610_ETM_D6", 5, 0, 1, 0, 20, 0, 0, 0, 1)
  154. MUX_CFG("J18_1610_ETM_D7", 5, 27, 1, 0, 19, 0, 0, 0, 1)
  155. /* OMAP16XX GPIO */
  156. MUX_CFG("P20_1610_GPIO4", 6, 27, 0, 1, 7, 0, 1, 1, 1)
  157. MUX_CFG("V9_1610_GPIO7", B, 12, 1, 2, 20, 0, 2, 1, 1)
  158. MUX_CFG("W8_1610_GPIO9", B, 21, 0, 2, 23, 0, 2, 1, 1)
  159. MUX_CFG("N20_1610_GPIO11", 6, 18, 0, 1, 4, 0, 1, 1, 1)
  160. MUX_CFG("N19_1610_GPIO13", 6, 12, 0, 1, 2, 0, 1, 1, 1)
  161. MUX_CFG("P10_1610_GPIO22", C, 0, 7, 2, 26, 0, 2, 1, 1)
  162. MUX_CFG("V5_1610_GPIO24", B, 15, 7, 2, 21, 0, 2, 1, 1)
  163. MUX_CFG("AA20_1610_GPIO_41", 9, 9, 7, 1, 31, 0, 1, 1, 1)
  164. MUX_CFG("W19_1610_GPIO48", 8, 15, 7, 1, 23, 1, 1, 0, 1)
  165. MUX_CFG("M7_1610_GPIO62", 10, 0, 0, 4, 24, 0, 4, 0, 1)
  166. MUX_CFG("V14_16XX_GPIO37", 9, 18, 7, 2, 2, 0, 2, 2, 0)
  167. MUX_CFG("R9_16XX_GPIO18", C, 18, 7, 3, 0, 0, 3, 0, 0)
  168. MUX_CFG("L14_16XX_GPIO49", 6, 3, 7, 0, 31, 0, 0, 31, 0)
  169. /* OMAP-1610 uWire */
  170. MUX_CFG("V19_1610_UWIRE_SCLK", 8, 6, 0, 1, 20, 0, 1, 1, 1)
  171. MUX_CFG("U18_1610_UWIRE_SDI", 8, 0, 0, 1, 18, 0, 1, 1, 1)
  172. MUX_CFG("W21_1610_UWIRE_SDO", 8, 3, 0, 1, 19, 0, 1, 1, 1)
  173. MUX_CFG("N14_1610_UWIRE_CS0", 8, 9, 1, 1, 21, 0, 1, 1, 1)
  174. MUX_CFG("P15_1610_UWIRE_CS3", 8, 12, 1, 1, 22, 0, 1, 1, 1)
  175. MUX_CFG("N15_1610_UWIRE_CS1", 7, 18, 2, 1, 14, 0, NA, 0, 1)
  176. /* OMAP-1610 Flash */
  177. MUX_CFG("L3_1610_FLASH_CS2B_OE",10, 6, 1, NA, 0, 0, NA, 0, 1)
  178. MUX_CFG("M8_1610_FLASH_CS2B_WE",10, 3, 1, NA, 0, 0, NA, 0, 1)
  179. /* First MMC interface, same on 1510, 1610 and 1710 */
  180. MUX_CFG("MMC_CMD", A, 27, 0, 2, 15, 1, 2, 1, 1)
  181. MUX_CFG("MMC_DAT1", A, 24, 0, 2, 14, 1, 2, 1, 1)
  182. MUX_CFG("MMC_DAT2", A, 18, 0, 2, 12, 1, 2, 1, 1)
  183. MUX_CFG("MMC_DAT0", B, 0, 0, 2, 16, 1, 2, 1, 1)
  184. MUX_CFG("MMC_CLK", A, 21, 0, NA, 0, 0, NA, 0, 1)
  185. MUX_CFG("MMC_DAT3", 10, 15, 0, 3, 8, 1, 3, 1, 1)
  186. MUX_CFG("M15_1710_MMC_CLKI", 6, 21, 2, 0, 0, 0, NA, 0, 1)
  187. MUX_CFG("P19_1710_MMC_CMDDIR", 6, 24, 6, 0, 0, 0, NA, 0, 1)
  188. MUX_CFG("P20_1710_MMC_DATDIR0", 6, 27, 5, 0, 0, 0, NA, 0, 1)
  189. /* OMAP-1610 USB0 alternate configuration */
  190. MUX_CFG("W9_USB0_TXEN", B, 9, 5, 2, 19, 0, 2, 0, 1)
  191. MUX_CFG("AA9_USB0_VP", B, 6, 5, 2, 18, 0, 2, 0, 1)
  192. MUX_CFG("Y5_USB0_RCV", C, 21, 5, 3, 1, 0, 1, 0, 1)
  193. MUX_CFG("R9_USB0_VM", C, 18, 5, 3, 0, 0, 3, 0, 1)
  194. MUX_CFG("V6_USB0_TXD", C, 27, 5, 3, 3, 0, 3, 0, 1)
  195. MUX_CFG("W5_USB0_SE0", C, 24, 5, 3, 2, 0, 3, 0, 1)
  196. MUX_CFG("V9_USB0_SPEED", B, 12, 5, 2, 20, 0, 2, 0, 1)
  197. MUX_CFG("Y10_USB0_SUSP", B, 3, 5, 2, 17, 0, 2, 0, 1)
  198. /* USB2 interface */
  199. MUX_CFG("W9_USB2_TXEN", B, 9, 1, NA, 0, 0, NA, 0, 1)
  200. MUX_CFG("AA9_USB2_VP", B, 6, 1, NA, 0, 0, NA, 0, 1)
  201. MUX_CFG("Y5_USB2_RCV", C, 21, 1, NA, 0, 0, NA, 0, 1)
  202. MUX_CFG("R9_USB2_VM", C, 18, 1, NA, 0, 0, NA, 0, 1)
  203. MUX_CFG("V6_USB2_TXD", C, 27, 2, NA, 0, 0, NA, 0, 1)
  204. MUX_CFG("W5_USB2_SE0", C, 24, 2, NA, 0, 0, NA, 0, 1)
  205. /* 16XX UART */
  206. MUX_CFG("R13_1610_UART1_TX", A, 12, 6, 2, 10, 0, 2, 10, 1)
  207. MUX_CFG("V14_16XX_UART1_RX", 9, 18, 0, 2, 2, 0, 2, 2, 1)
  208. MUX_CFG("R14_1610_UART1_CTS", 9, 15, 0, 2, 1, 0, 2, 1, 1)
  209. MUX_CFG("AA15_1610_UART1_RTS", 9, 12, 1, 2, 0, 0, 2, 0, 1)
  210. MUX_CFG("R9_16XX_UART2_RX", C, 18, 0, 3, 0, 0, 3, 0, 1)
  211. MUX_CFG("L14_16XX_UART3_RX", 6, 3, 0, 0, 31, 0, 0, 31, 1)
  212. /* I2C interface */
  213. MUX_CFG("I2C_SCL", 7, 24, 0, NA, 0, 0, NA, 0, 0)
  214. MUX_CFG("I2C_SDA", 7, 27, 0, NA, 0, 0, NA, 0, 0)
  215. /* Keypad */
  216. MUX_CFG("F18_1610_KBC0", 3, 15, 0, 0, 5, 1, 0, 0, 0)
  217. MUX_CFG("D20_1610_KBC1", 3, 12, 0, 0, 4, 1, 0, 0, 0)
  218. MUX_CFG("D19_1610_KBC2", 3, 9, 0, 0, 3, 1, 0, 0, 0)
  219. MUX_CFG("E18_1610_KBC3", 3, 6, 0, 0, 2, 1, 0, 0, 0)
  220. MUX_CFG("C21_1610_KBC4", 3, 3, 0, 0, 1, 1, 0, 0, 0)
  221. MUX_CFG("G18_1610_KBR0", 4, 0, 0, 0, 10, 1, 0, 1, 0)
  222. MUX_CFG("F19_1610_KBR1", 3, 27, 0, 0, 9, 1, 0, 1, 0)
  223. MUX_CFG("H14_1610_KBR2", 3, 24, 0, 0, 8, 1, 0, 1, 0)
  224. MUX_CFG("E20_1610_KBR3", 3, 21, 0, 0, 7, 1, 0, 1, 0)
  225. MUX_CFG("E19_1610_KBR4", 3, 18, 0, 0, 6, 1, 0, 1, 0)
  226. MUX_CFG("N19_1610_KBR5", 6, 12, 1, 1, 2, 1, 1, 1, 0)
  227. /* Power management */
  228. MUX_CFG("T20_1610_LOW_PWR", 7, 12, 1, NA, 0, 0, NA, 0, 0)
  229. /* MCLK Settings */
  230. MUX_CFG("V5_1710_MCLK_ON", B, 15, 0, NA, 0, 0, NA, 0, 0)
  231. MUX_CFG("V5_1710_MCLK_OFF", B, 15, 6, NA, 0, 0, NA, 0, 0)
  232. MUX_CFG("R10_1610_MCLK_ON", B, 18, 0, NA, 22, 0, NA, 1, 0)
  233. MUX_CFG("R10_1610_MCLK_OFF", B, 18, 6, 2, 22, 1, 2, 1, 1)
  234. /* CompactFlash controller, conflicts with MMC1 */
  235. MUX_CFG("P11_1610_CF_CD2", A, 27, 3, 2, 15, 1, 2, 1, 1)
  236. MUX_CFG("R11_1610_CF_IOIS16", B, 0, 3, 2, 16, 1, 2, 1, 1)
  237. MUX_CFG("V10_1610_CF_IREQ", A, 24, 3, 2, 14, 0, 2, 0, 1)
  238. MUX_CFG("W10_1610_CF_RESET", A, 18, 3, 2, 12, 1, 2, 1, 1)
  239. MUX_CFG("W11_1610_CF_CD1", 10, 15, 3, 3, 8, 1, 3, 1, 1)
  240. };
  241. #endif /* CONFIG_ARCH_OMAP15XX || CONFIG_ARCH_OMAP16XX */
  242. int __init omap1_mux_init(void)
  243. {
  244. #ifdef CONFIG_ARCH_OMAP730
  245. omap_mux_register(omap730_pins, ARRAY_SIZE(omap730_pins));
  246. #endif
  247. #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
  248. omap_mux_register(omap1xxx_pins, ARRAY_SIZE(omap1xxx_pins));
  249. #endif
  250. return 0;
  251. }
  252. #endif