ptrace.c 18 KB

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  1. /*
  2. * linux/arch/arm/kernel/ptrace.c
  3. *
  4. * By Ross Biro 1/23/92
  5. * edited by Linus Torvalds
  6. * ARM modifications Copyright (C) 2000 Russell King
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/config.h>
  13. #include <linux/kernel.h>
  14. #include <linux/sched.h>
  15. #include <linux/mm.h>
  16. #include <linux/smp.h>
  17. #include <linux/smp_lock.h>
  18. #include <linux/ptrace.h>
  19. #include <linux/user.h>
  20. #include <linux/security.h>
  21. #include <linux/init.h>
  22. #include <linux/signal.h>
  23. #include <asm/uaccess.h>
  24. #include <asm/pgtable.h>
  25. #include <asm/system.h>
  26. #include <asm/traps.h>
  27. #include "ptrace.h"
  28. #define REG_PC 15
  29. #define REG_PSR 16
  30. /*
  31. * does not yet catch signals sent when the child dies.
  32. * in exit.c or in signal.c.
  33. */
  34. #if 0
  35. /*
  36. * Breakpoint SWI instruction: SWI &9F0001
  37. */
  38. #define BREAKINST_ARM 0xef9f0001
  39. #define BREAKINST_THUMB 0xdf00 /* fill this in later */
  40. #else
  41. /*
  42. * New breakpoints - use an undefined instruction. The ARM architecture
  43. * reference manual guarantees that the following instruction space
  44. * will produce an undefined instruction exception on all CPUs:
  45. *
  46. * ARM: xxxx 0111 1111 xxxx xxxx xxxx 1111 xxxx
  47. * Thumb: 1101 1110 xxxx xxxx
  48. */
  49. #define BREAKINST_ARM 0xe7f001f0
  50. #define BREAKINST_THUMB 0xde01
  51. #endif
  52. /*
  53. * this routine will get a word off of the processes privileged stack.
  54. * the offset is how far from the base addr as stored in the THREAD.
  55. * this routine assumes that all the privileged stacks are in our
  56. * data space.
  57. */
  58. static inline long get_user_reg(struct task_struct *task, int offset)
  59. {
  60. return task_pt_regs(task)->uregs[offset];
  61. }
  62. /*
  63. * this routine will put a word on the processes privileged stack.
  64. * the offset is how far from the base addr as stored in the THREAD.
  65. * this routine assumes that all the privileged stacks are in our
  66. * data space.
  67. */
  68. static inline int
  69. put_user_reg(struct task_struct *task, int offset, long data)
  70. {
  71. struct pt_regs newregs, *regs = task_pt_regs(task);
  72. int ret = -EINVAL;
  73. newregs = *regs;
  74. newregs.uregs[offset] = data;
  75. if (valid_user_regs(&newregs)) {
  76. regs->uregs[offset] = data;
  77. ret = 0;
  78. }
  79. return ret;
  80. }
  81. static inline int
  82. read_u32(struct task_struct *task, unsigned long addr, u32 *res)
  83. {
  84. int ret;
  85. ret = access_process_vm(task, addr, res, sizeof(*res), 0);
  86. return ret == sizeof(*res) ? 0 : -EIO;
  87. }
  88. static inline int
  89. read_instr(struct task_struct *task, unsigned long addr, u32 *res)
  90. {
  91. int ret;
  92. if (addr & 1) {
  93. u16 val;
  94. ret = access_process_vm(task, addr & ~1, &val, sizeof(val), 0);
  95. ret = ret == sizeof(val) ? 0 : -EIO;
  96. *res = val;
  97. } else {
  98. u32 val;
  99. ret = access_process_vm(task, addr & ~3, &val, sizeof(val), 0);
  100. ret = ret == sizeof(val) ? 0 : -EIO;
  101. *res = val;
  102. }
  103. return ret;
  104. }
  105. /*
  106. * Get value of register `rn' (in the instruction)
  107. */
  108. static unsigned long
  109. ptrace_getrn(struct task_struct *child, unsigned long insn)
  110. {
  111. unsigned int reg = (insn >> 16) & 15;
  112. unsigned long val;
  113. val = get_user_reg(child, reg);
  114. if (reg == 15)
  115. val = pc_pointer(val + 8);
  116. return val;
  117. }
  118. /*
  119. * Get value of operand 2 (in an ALU instruction)
  120. */
  121. static unsigned long
  122. ptrace_getaluop2(struct task_struct *child, unsigned long insn)
  123. {
  124. unsigned long val;
  125. int shift;
  126. int type;
  127. if (insn & 1 << 25) {
  128. val = insn & 255;
  129. shift = (insn >> 8) & 15;
  130. type = 3;
  131. } else {
  132. val = get_user_reg (child, insn & 15);
  133. if (insn & (1 << 4))
  134. shift = (int)get_user_reg (child, (insn >> 8) & 15);
  135. else
  136. shift = (insn >> 7) & 31;
  137. type = (insn >> 5) & 3;
  138. }
  139. switch (type) {
  140. case 0: val <<= shift; break;
  141. case 1: val >>= shift; break;
  142. case 2:
  143. val = (((signed long)val) >> shift);
  144. break;
  145. case 3:
  146. val = (val >> shift) | (val << (32 - shift));
  147. break;
  148. }
  149. return val;
  150. }
  151. /*
  152. * Get value of operand 2 (in a LDR instruction)
  153. */
  154. static unsigned long
  155. ptrace_getldrop2(struct task_struct *child, unsigned long insn)
  156. {
  157. unsigned long val;
  158. int shift;
  159. int type;
  160. val = get_user_reg(child, insn & 15);
  161. shift = (insn >> 7) & 31;
  162. type = (insn >> 5) & 3;
  163. switch (type) {
  164. case 0: val <<= shift; break;
  165. case 1: val >>= shift; break;
  166. case 2:
  167. val = (((signed long)val) >> shift);
  168. break;
  169. case 3:
  170. val = (val >> shift) | (val << (32 - shift));
  171. break;
  172. }
  173. return val;
  174. }
  175. #define OP_MASK 0x01e00000
  176. #define OP_AND 0x00000000
  177. #define OP_EOR 0x00200000
  178. #define OP_SUB 0x00400000
  179. #define OP_RSB 0x00600000
  180. #define OP_ADD 0x00800000
  181. #define OP_ADC 0x00a00000
  182. #define OP_SBC 0x00c00000
  183. #define OP_RSC 0x00e00000
  184. #define OP_ORR 0x01800000
  185. #define OP_MOV 0x01a00000
  186. #define OP_BIC 0x01c00000
  187. #define OP_MVN 0x01e00000
  188. static unsigned long
  189. get_branch_address(struct task_struct *child, unsigned long pc, unsigned long insn)
  190. {
  191. u32 alt = 0;
  192. switch (insn & 0x0e000000) {
  193. case 0x00000000:
  194. case 0x02000000: {
  195. /*
  196. * data processing
  197. */
  198. long aluop1, aluop2, ccbit;
  199. if ((insn & 0x0fffffd0) == 0x012fff10) {
  200. /*
  201. * bx or blx
  202. */
  203. alt = get_user_reg(child, insn & 15);
  204. break;
  205. }
  206. if ((insn & 0xf000) != 0xf000)
  207. break;
  208. aluop1 = ptrace_getrn(child, insn);
  209. aluop2 = ptrace_getaluop2(child, insn);
  210. ccbit = get_user_reg(child, REG_PSR) & PSR_C_BIT ? 1 : 0;
  211. switch (insn & OP_MASK) {
  212. case OP_AND: alt = aluop1 & aluop2; break;
  213. case OP_EOR: alt = aluop1 ^ aluop2; break;
  214. case OP_SUB: alt = aluop1 - aluop2; break;
  215. case OP_RSB: alt = aluop2 - aluop1; break;
  216. case OP_ADD: alt = aluop1 + aluop2; break;
  217. case OP_ADC: alt = aluop1 + aluop2 + ccbit; break;
  218. case OP_SBC: alt = aluop1 - aluop2 + ccbit; break;
  219. case OP_RSC: alt = aluop2 - aluop1 + ccbit; break;
  220. case OP_ORR: alt = aluop1 | aluop2; break;
  221. case OP_MOV: alt = aluop2; break;
  222. case OP_BIC: alt = aluop1 & ~aluop2; break;
  223. case OP_MVN: alt = ~aluop2; break;
  224. }
  225. break;
  226. }
  227. case 0x04000000:
  228. case 0x06000000:
  229. /*
  230. * ldr
  231. */
  232. if ((insn & 0x0010f000) == 0x0010f000) {
  233. unsigned long base;
  234. base = ptrace_getrn(child, insn);
  235. if (insn & 1 << 24) {
  236. long aluop2;
  237. if (insn & 0x02000000)
  238. aluop2 = ptrace_getldrop2(child, insn);
  239. else
  240. aluop2 = insn & 0xfff;
  241. if (insn & 1 << 23)
  242. base += aluop2;
  243. else
  244. base -= aluop2;
  245. }
  246. if (read_u32(child, base, &alt) == 0)
  247. alt = pc_pointer(alt);
  248. }
  249. break;
  250. case 0x08000000:
  251. /*
  252. * ldm
  253. */
  254. if ((insn & 0x00108000) == 0x00108000) {
  255. unsigned long base;
  256. unsigned int nr_regs;
  257. if (insn & (1 << 23)) {
  258. nr_regs = hweight16(insn & 65535) << 2;
  259. if (!(insn & (1 << 24)))
  260. nr_regs -= 4;
  261. } else {
  262. if (insn & (1 << 24))
  263. nr_regs = -4;
  264. else
  265. nr_regs = 0;
  266. }
  267. base = ptrace_getrn(child, insn);
  268. if (read_u32(child, base + nr_regs, &alt) == 0)
  269. alt = pc_pointer(alt);
  270. break;
  271. }
  272. break;
  273. case 0x0a000000: {
  274. /*
  275. * bl or b
  276. */
  277. signed long displ;
  278. /* It's a branch/branch link: instead of trying to
  279. * figure out whether the branch will be taken or not,
  280. * we'll put a breakpoint at both locations. This is
  281. * simpler, more reliable, and probably not a whole lot
  282. * slower than the alternative approach of emulating the
  283. * branch.
  284. */
  285. displ = (insn & 0x00ffffff) << 8;
  286. displ = (displ >> 6) + 8;
  287. if (displ != 0 && displ != 4)
  288. alt = pc + displ;
  289. }
  290. break;
  291. }
  292. return alt;
  293. }
  294. static int
  295. swap_insn(struct task_struct *task, unsigned long addr,
  296. void *old_insn, void *new_insn, int size)
  297. {
  298. int ret;
  299. ret = access_process_vm(task, addr, old_insn, size, 0);
  300. if (ret == size)
  301. ret = access_process_vm(task, addr, new_insn, size, 1);
  302. return ret;
  303. }
  304. static void
  305. add_breakpoint(struct task_struct *task, struct debug_info *dbg, unsigned long addr)
  306. {
  307. int nr = dbg->nsaved;
  308. if (nr < 2) {
  309. u32 new_insn = BREAKINST_ARM;
  310. int res;
  311. res = swap_insn(task, addr, &dbg->bp[nr].insn, &new_insn, 4);
  312. if (res == 4) {
  313. dbg->bp[nr].address = addr;
  314. dbg->nsaved += 1;
  315. }
  316. } else
  317. printk(KERN_ERR "ptrace: too many breakpoints\n");
  318. }
  319. /*
  320. * Clear one breakpoint in the user program. We copy what the hardware
  321. * does and use bit 0 of the address to indicate whether this is a Thumb
  322. * breakpoint or an ARM breakpoint.
  323. */
  324. static void clear_breakpoint(struct task_struct *task, struct debug_entry *bp)
  325. {
  326. unsigned long addr = bp->address;
  327. union debug_insn old_insn;
  328. int ret;
  329. if (addr & 1) {
  330. ret = swap_insn(task, addr & ~1, &old_insn.thumb,
  331. &bp->insn.thumb, 2);
  332. if (ret != 2 || old_insn.thumb != BREAKINST_THUMB)
  333. printk(KERN_ERR "%s:%d: corrupted Thumb breakpoint at "
  334. "0x%08lx (0x%04x)\n", task->comm, task->pid,
  335. addr, old_insn.thumb);
  336. } else {
  337. ret = swap_insn(task, addr & ~3, &old_insn.arm,
  338. &bp->insn.arm, 4);
  339. if (ret != 4 || old_insn.arm != BREAKINST_ARM)
  340. printk(KERN_ERR "%s:%d: corrupted ARM breakpoint at "
  341. "0x%08lx (0x%08x)\n", task->comm, task->pid,
  342. addr, old_insn.arm);
  343. }
  344. }
  345. void ptrace_set_bpt(struct task_struct *child)
  346. {
  347. struct pt_regs *regs;
  348. unsigned long pc;
  349. u32 insn;
  350. int res;
  351. regs = task_pt_regs(child);
  352. pc = instruction_pointer(regs);
  353. if (thumb_mode(regs)) {
  354. printk(KERN_WARNING "ptrace: can't handle thumb mode\n");
  355. return;
  356. }
  357. res = read_instr(child, pc, &insn);
  358. if (!res) {
  359. struct debug_info *dbg = &child->thread.debug;
  360. unsigned long alt;
  361. dbg->nsaved = 0;
  362. alt = get_branch_address(child, pc, insn);
  363. if (alt)
  364. add_breakpoint(child, dbg, alt);
  365. /*
  366. * Note that we ignore the result of setting the above
  367. * breakpoint since it may fail. When it does, this is
  368. * not so much an error, but a forewarning that we may
  369. * be receiving a prefetch abort shortly.
  370. *
  371. * If we don't set this breakpoint here, then we can
  372. * lose control of the thread during single stepping.
  373. */
  374. if (!alt || predicate(insn) != PREDICATE_ALWAYS)
  375. add_breakpoint(child, dbg, pc + 4);
  376. }
  377. }
  378. /*
  379. * Ensure no single-step breakpoint is pending. Returns non-zero
  380. * value if child was being single-stepped.
  381. */
  382. void ptrace_cancel_bpt(struct task_struct *child)
  383. {
  384. int i, nsaved = child->thread.debug.nsaved;
  385. child->thread.debug.nsaved = 0;
  386. if (nsaved > 2) {
  387. printk("ptrace_cancel_bpt: bogus nsaved: %d!\n", nsaved);
  388. nsaved = 2;
  389. }
  390. for (i = 0; i < nsaved; i++)
  391. clear_breakpoint(child, &child->thread.debug.bp[i]);
  392. }
  393. /*
  394. * Called by kernel/ptrace.c when detaching..
  395. *
  396. * Make sure the single step bit is not set.
  397. */
  398. void ptrace_disable(struct task_struct *child)
  399. {
  400. child->ptrace &= ~PT_SINGLESTEP;
  401. ptrace_cancel_bpt(child);
  402. }
  403. /*
  404. * Handle hitting a breakpoint.
  405. */
  406. void ptrace_break(struct task_struct *tsk, struct pt_regs *regs)
  407. {
  408. siginfo_t info;
  409. ptrace_cancel_bpt(tsk);
  410. info.si_signo = SIGTRAP;
  411. info.si_errno = 0;
  412. info.si_code = TRAP_BRKPT;
  413. info.si_addr = (void __user *)instruction_pointer(regs);
  414. force_sig_info(SIGTRAP, &info, tsk);
  415. }
  416. static int break_trap(struct pt_regs *regs, unsigned int instr)
  417. {
  418. ptrace_break(current, regs);
  419. return 0;
  420. }
  421. static struct undef_hook arm_break_hook = {
  422. .instr_mask = 0x0fffffff,
  423. .instr_val = 0x07f001f0,
  424. .cpsr_mask = PSR_T_BIT,
  425. .cpsr_val = 0,
  426. .fn = break_trap,
  427. };
  428. static struct undef_hook thumb_break_hook = {
  429. .instr_mask = 0xffff,
  430. .instr_val = 0xde01,
  431. .cpsr_mask = PSR_T_BIT,
  432. .cpsr_val = PSR_T_BIT,
  433. .fn = break_trap,
  434. };
  435. static int __init ptrace_break_init(void)
  436. {
  437. register_undef_hook(&arm_break_hook);
  438. register_undef_hook(&thumb_break_hook);
  439. return 0;
  440. }
  441. core_initcall(ptrace_break_init);
  442. /*
  443. * Read the word at offset "off" into the "struct user". We
  444. * actually access the pt_regs stored on the kernel stack.
  445. */
  446. static int ptrace_read_user(struct task_struct *tsk, unsigned long off,
  447. unsigned long __user *ret)
  448. {
  449. unsigned long tmp;
  450. if (off & 3 || off >= sizeof(struct user))
  451. return -EIO;
  452. tmp = 0;
  453. if (off < sizeof(struct pt_regs))
  454. tmp = get_user_reg(tsk, off >> 2);
  455. return put_user(tmp, ret);
  456. }
  457. /*
  458. * Write the word at offset "off" into "struct user". We
  459. * actually access the pt_regs stored on the kernel stack.
  460. */
  461. static int ptrace_write_user(struct task_struct *tsk, unsigned long off,
  462. unsigned long val)
  463. {
  464. if (off & 3 || off >= sizeof(struct user))
  465. return -EIO;
  466. if (off >= sizeof(struct pt_regs))
  467. return 0;
  468. return put_user_reg(tsk, off >> 2, val);
  469. }
  470. /*
  471. * Get all user integer registers.
  472. */
  473. static int ptrace_getregs(struct task_struct *tsk, void __user *uregs)
  474. {
  475. struct pt_regs *regs = task_pt_regs(tsk);
  476. return copy_to_user(uregs, regs, sizeof(struct pt_regs)) ? -EFAULT : 0;
  477. }
  478. /*
  479. * Set all user integer registers.
  480. */
  481. static int ptrace_setregs(struct task_struct *tsk, void __user *uregs)
  482. {
  483. struct pt_regs newregs;
  484. int ret;
  485. ret = -EFAULT;
  486. if (copy_from_user(&newregs, uregs, sizeof(struct pt_regs)) == 0) {
  487. struct pt_regs *regs = task_pt_regs(tsk);
  488. ret = -EINVAL;
  489. if (valid_user_regs(&newregs)) {
  490. *regs = newregs;
  491. ret = 0;
  492. }
  493. }
  494. return ret;
  495. }
  496. /*
  497. * Get the child FPU state.
  498. */
  499. static int ptrace_getfpregs(struct task_struct *tsk, void __user *ufp)
  500. {
  501. return copy_to_user(ufp, &task_thread_info(tsk)->fpstate,
  502. sizeof(struct user_fp)) ? -EFAULT : 0;
  503. }
  504. /*
  505. * Set the child FPU state.
  506. */
  507. static int ptrace_setfpregs(struct task_struct *tsk, void __user *ufp)
  508. {
  509. struct thread_info *thread = task_thread_info(tsk);
  510. thread->used_cp[1] = thread->used_cp[2] = 1;
  511. return copy_from_user(&thread->fpstate, ufp,
  512. sizeof(struct user_fp)) ? -EFAULT : 0;
  513. }
  514. #ifdef CONFIG_IWMMXT
  515. /*
  516. * Get the child iWMMXt state.
  517. */
  518. static int ptrace_getwmmxregs(struct task_struct *tsk, void __user *ufp)
  519. {
  520. struct thread_info *thread = task_thread_info(tsk);
  521. void *ptr = &thread->fpstate;
  522. if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
  523. return -ENODATA;
  524. iwmmxt_task_disable(thread); /* force it to ram */
  525. /* The iWMMXt state is stored doubleword-aligned. */
  526. if (((long) ptr) & 4)
  527. ptr += 4;
  528. return copy_to_user(ufp, ptr, 0x98) ? -EFAULT : 0;
  529. }
  530. /*
  531. * Set the child iWMMXt state.
  532. */
  533. static int ptrace_setwmmxregs(struct task_struct *tsk, void __user *ufp)
  534. {
  535. struct thread_info *thread = task_thread_info(tsk);
  536. void *ptr = &thread->fpstate;
  537. if (!test_ti_thread_flag(thread, TIF_USING_IWMMXT))
  538. return -EACCES;
  539. iwmmxt_task_release(thread); /* force a reload */
  540. /* The iWMMXt state is stored doubleword-aligned. */
  541. if (((long) ptr) & 4)
  542. ptr += 4;
  543. return copy_from_user(ptr, ufp, 0x98) ? -EFAULT : 0;
  544. }
  545. #endif
  546. long arch_ptrace(struct task_struct *child, long request, long addr, long data)
  547. {
  548. unsigned long tmp;
  549. int ret;
  550. switch (request) {
  551. /*
  552. * read word at location "addr" in the child process.
  553. */
  554. case PTRACE_PEEKTEXT:
  555. case PTRACE_PEEKDATA:
  556. ret = access_process_vm(child, addr, &tmp,
  557. sizeof(unsigned long), 0);
  558. if (ret == sizeof(unsigned long))
  559. ret = put_user(tmp, (unsigned long __user *) data);
  560. else
  561. ret = -EIO;
  562. break;
  563. case PTRACE_PEEKUSR:
  564. ret = ptrace_read_user(child, addr, (unsigned long __user *)data);
  565. break;
  566. /*
  567. * write the word at location addr.
  568. */
  569. case PTRACE_POKETEXT:
  570. case PTRACE_POKEDATA:
  571. ret = access_process_vm(child, addr, &data,
  572. sizeof(unsigned long), 1);
  573. if (ret == sizeof(unsigned long))
  574. ret = 0;
  575. else
  576. ret = -EIO;
  577. break;
  578. case PTRACE_POKEUSR:
  579. ret = ptrace_write_user(child, addr, data);
  580. break;
  581. /*
  582. * continue/restart and stop at next (return from) syscall
  583. */
  584. case PTRACE_SYSCALL:
  585. case PTRACE_CONT:
  586. ret = -EIO;
  587. if (!valid_signal(data))
  588. break;
  589. if (request == PTRACE_SYSCALL)
  590. set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
  591. else
  592. clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
  593. child->exit_code = data;
  594. /* make sure single-step breakpoint is gone. */
  595. child->ptrace &= ~PT_SINGLESTEP;
  596. ptrace_cancel_bpt(child);
  597. wake_up_process(child);
  598. ret = 0;
  599. break;
  600. /*
  601. * make the child exit. Best I can do is send it a sigkill.
  602. * perhaps it should be put in the status that it wants to
  603. * exit.
  604. */
  605. case PTRACE_KILL:
  606. /* make sure single-step breakpoint is gone. */
  607. child->ptrace &= ~PT_SINGLESTEP;
  608. ptrace_cancel_bpt(child);
  609. if (child->exit_state != EXIT_ZOMBIE) {
  610. child->exit_code = SIGKILL;
  611. wake_up_process(child);
  612. }
  613. ret = 0;
  614. break;
  615. /*
  616. * execute single instruction.
  617. */
  618. case PTRACE_SINGLESTEP:
  619. ret = -EIO;
  620. if (!valid_signal(data))
  621. break;
  622. child->ptrace |= PT_SINGLESTEP;
  623. clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
  624. child->exit_code = data;
  625. /* give it a chance to run. */
  626. wake_up_process(child);
  627. ret = 0;
  628. break;
  629. case PTRACE_DETACH:
  630. ret = ptrace_detach(child, data);
  631. break;
  632. case PTRACE_GETREGS:
  633. ret = ptrace_getregs(child, (void __user *)data);
  634. break;
  635. case PTRACE_SETREGS:
  636. ret = ptrace_setregs(child, (void __user *)data);
  637. break;
  638. case PTRACE_GETFPREGS:
  639. ret = ptrace_getfpregs(child, (void __user *)data);
  640. break;
  641. case PTRACE_SETFPREGS:
  642. ret = ptrace_setfpregs(child, (void __user *)data);
  643. break;
  644. #ifdef CONFIG_IWMMXT
  645. case PTRACE_GETWMMXREGS:
  646. ret = ptrace_getwmmxregs(child, (void __user *)data);
  647. break;
  648. case PTRACE_SETWMMXREGS:
  649. ret = ptrace_setwmmxregs(child, (void __user *)data);
  650. break;
  651. #endif
  652. case PTRACE_GET_THREAD_AREA:
  653. ret = put_user(task_thread_info(child)->tp_value,
  654. (unsigned long __user *) data);
  655. break;
  656. case PTRACE_SET_SYSCALL:
  657. ret = 0;
  658. child->ptrace_message = data;
  659. break;
  660. default:
  661. ret = ptrace_request(child, request, addr, data);
  662. break;
  663. }
  664. return ret;
  665. }
  666. asmlinkage int syscall_trace(int why, struct pt_regs *regs, int scno)
  667. {
  668. unsigned long ip;
  669. if (!test_thread_flag(TIF_SYSCALL_TRACE))
  670. return scno;
  671. if (!(current->ptrace & PT_PTRACED))
  672. return scno;
  673. /*
  674. * Save IP. IP is used to denote syscall entry/exit:
  675. * IP = 0 -> entry, = 1 -> exit
  676. */
  677. ip = regs->ARM_ip;
  678. regs->ARM_ip = why;
  679. current->ptrace_message = scno;
  680. /* the 0x80 provides a way for the tracing parent to distinguish
  681. between a syscall stop and SIGTRAP delivery */
  682. ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
  683. ? 0x80 : 0));
  684. /*
  685. * this isn't the same as continuing with a signal, but it will do
  686. * for normal use. strace only continues with a signal if the
  687. * stopping signal is not SIGTRAP. -brl
  688. */
  689. if (current->exit_code) {
  690. send_sig(current->exit_code, current, 1);
  691. current->exit_code = 0;
  692. }
  693. regs->ARM_ip = ip;
  694. return current->ptrace_message;
  695. }