edac.txt 19 KB

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  1. EDAC - Error Detection And Correction
  2. Written by Doug Thompson <norsk5@xmission.com>
  3. 7 Dec 2005
  4. EDAC was written by:
  5. Thayne Harbaugh,
  6. modified by Dave Peterson, Doug Thompson, et al,
  7. from the bluesmoke.sourceforge.net project.
  8. ============================================================================
  9. EDAC PURPOSE
  10. The 'edac' kernel module goal is to detect and report errors that occur
  11. within the computer system. In the initial release, memory Correctable Errors
  12. (CE) and Uncorrectable Errors (UE) are the primary errors being harvested.
  13. Detecting CE events, then harvesting those events and reporting them,
  14. CAN be a predictor of future UE events. With CE events, the system can
  15. continue to operate, but with less safety. Preventive maintainence and
  16. proactive part replacement of memory DIMMs exhibiting CEs can reduce
  17. the likelihood of the dreaded UE events and system 'panics'.
  18. In addition, PCI Bus Parity and SERR Errors are scanned for on PCI devices
  19. in order to determine if errors are occurring on data transfers.
  20. The presence of PCI Parity errors must be examined with a grain of salt.
  21. There are several addin adapters that do NOT follow the PCI specification
  22. with regards to Parity generation and reporting. The specification says
  23. the vendor should tie the parity status bits to 0 if they do not intend
  24. to generate parity. Some vendors do not do this, and thus the parity bit
  25. can "float" giving false positives.
  26. The PCI Parity EDAC device has the ability to "skip" known flakey
  27. cards during the parity scan. These are set by the parity "blacklist"
  28. interface in the sysfs for PCI Parity. (See the PCI section in the sysfs
  29. section below.) There is also a parity "whitelist" which is used as
  30. an explicit list of devices to scan, while the blacklist is a list
  31. of devices to skip.
  32. EDAC will have future error detectors that will be added or integrated
  33. into EDAC in the following list:
  34. MCE Machine Check Exception
  35. MCA Machine Check Architecture
  36. NMI NMI notification of ECC errors
  37. MSRs Machine Specific Register error cases
  38. and other mechanisms.
  39. These errors are usually bus errors, ECC errors, thermal throttling
  40. and the like.
  41. ============================================================================
  42. EDAC VERSIONING
  43. EDAC is composed of a "core" module (edac_mc.ko) and several Memory
  44. Controller (MC) driver modules. On a given system, the CORE
  45. is loaded and one MC driver will be loaded. Both the CORE and
  46. the MC driver have individual versions that reflect current release
  47. level of their respective modules. Thus, to "report" on what version
  48. a system is running, one must report both the CORE's and the
  49. MC driver's versions.
  50. LOADING
  51. If 'edac' was statically linked with the kernel then no loading is
  52. necessary. If 'edac' was built as modules then simply modprobe the
  53. 'edac' pieces that you need. You should be able to modprobe
  54. hardware-specific modules and have the dependencies load the necessary core
  55. modules.
  56. Example:
  57. $> modprobe amd76x_edac
  58. loads both the amd76x_edac.ko memory controller module and the edac_mc.ko
  59. core module.
  60. ============================================================================
  61. EDAC sysfs INTERFACE
  62. EDAC presents a 'sysfs' interface for control, reporting and attribute
  63. reporting purposes.
  64. EDAC lives in the /sys/devices/system/edac directory. Within this directory
  65. there currently reside 2 'edac' components:
  66. mc memory controller(s) system
  67. pci PCI status system
  68. ============================================================================
  69. Memory Controller (mc) Model
  70. First a background on the memory controller's model abstracted in EDAC.
  71. Each mc device controls a set of DIMM memory modules. These modules are
  72. layed out in a Chip-Select Row (csrowX) and Channel table (chX). There can
  73. be multiple csrows and two channels.
  74. Memory controllers allow for several csrows, with 8 csrows being a typical value.
  75. Yet, the actual number of csrows depends on the electrical "loading"
  76. of a given motherboard, memory controller and DIMM characteristics.
  77. Dual channels allows for 128 bit data transfers to the CPU from memory.
  78. Channel 0 Channel 1
  79. ===================================
  80. csrow0 | DIMM_A0 | DIMM_B0 |
  81. csrow1 | DIMM_A0 | DIMM_B0 |
  82. ===================================
  83. ===================================
  84. csrow2 | DIMM_A1 | DIMM_B1 |
  85. csrow3 | DIMM_A1 | DIMM_B1 |
  86. ===================================
  87. In the above example table there are 4 physical slots on the motherboard
  88. for memory DIMMs:
  89. DIMM_A0
  90. DIMM_B0
  91. DIMM_A1
  92. DIMM_B1
  93. Labels for these slots are usually silk screened on the motherboard. Slots
  94. labeled 'A' are channel 0 in this example. Slots labled 'B'
  95. are channel 1. Notice that there are two csrows possible on a
  96. physical DIMM. These csrows are allocated their csrow assignment
  97. based on the slot into which the memory DIMM is placed. Thus, when 1 DIMM
  98. is placed in each Channel, the csrows cross both DIMMs.
  99. Memory DIMMs come single or dual "ranked". A rank is a populated csrow.
  100. Thus, 2 single ranked DIMMs, placed in slots DIMM_A0 and DIMM_B0 above
  101. will have 1 csrow, csrow0. csrow1 will be empty. On the other hand,
  102. when 2 dual ranked DIMMs are similiaryly placed, then both csrow0 and
  103. csrow1 will be populated. The pattern repeats itself for csrow2 and
  104. csrow3.
  105. The representation of the above is reflected in the directory tree
  106. in EDAC's sysfs interface. Starting in directory
  107. /sys/devices/system/edac/mc each memory controller will be represented
  108. by its own 'mcX' directory, where 'X" is the index of the MC.
  109. ..../edac/mc/
  110. |
  111. |->mc0
  112. |->mc1
  113. |->mc2
  114. ....
  115. Under each 'mcX' directory each 'csrowX' is again represented by a
  116. 'csrowX', where 'X" is the csrow index:
  117. .../mc/mc0/
  118. |
  119. |->csrow0
  120. |->csrow2
  121. |->csrow3
  122. ....
  123. Notice that there is no csrow1, which indicates that csrow0 is
  124. composed of a single ranked DIMMs. This should also apply in both
  125. Channels, in order to have dual-channel mode be operational. Since
  126. both csrow2 and csrow3 are populated, this indicates a dual ranked
  127. set of DIMMs for channels 0 and 1.
  128. Within each of the 'mc','mcX' and 'csrowX' directories are several
  129. EDAC control and attribute files.
  130. ============================================================================
  131. DIRECTORY 'mc'
  132. In directory 'mc' are EDAC system overall control and attribute files:
  133. Panic on UE control file:
  134. 'panic_on_ue'
  135. An uncorrectable error will cause a machine panic. This is usually
  136. desirable. It is a bad idea to continue when an uncorrectable error
  137. occurs - it is indeterminate what was uncorrected and the operating
  138. system context might be so mangled that continuing will lead to further
  139. corruption. If the kernel has MCE configured, then EDAC will never
  140. notice the UE.
  141. LOAD TIME: module/kernel parameter: panic_on_ue=[0|1]
  142. RUN TIME: echo "1" >/sys/devices/system/edac/mc/panic_on_ue
  143. Log UE control file:
  144. 'log_ue'
  145. Generate kernel messages describing uncorrectable errors. These errors
  146. are reported through the system message log system. UE statistics
  147. will be accumulated even when UE logging is disabled.
  148. LOAD TIME: module/kernel parameter: log_ue=[0|1]
  149. RUN TIME: echo "1" >/sys/devices/system/edac/mc/log_ue
  150. Log CE control file:
  151. 'log_ce'
  152. Generate kernel messages describing correctable errors. These
  153. errors are reported through the system message log system.
  154. CE statistics will be accumulated even when CE logging is disabled.
  155. LOAD TIME: module/kernel parameter: log_ce=[0|1]
  156. RUN TIME: echo "1" >/sys/devices/system/edac/mc/log_ce
  157. Polling period control file:
  158. 'poll_msec'
  159. The time period, in milliseconds, for polling for error information.
  160. Too small a value wastes resources. Too large a value might delay
  161. necessary handling of errors and might loose valuable information for
  162. locating the error. 1000 milliseconds (once each second) is about
  163. right for most uses.
  164. LOAD TIME: module/kernel parameter: poll_msec=[0|1]
  165. RUN TIME: echo "1000" >/sys/devices/system/edac/mc/poll_msec
  166. Module Version read-only attribute file:
  167. 'mc_version'
  168. The EDAC CORE modules's version and compile date are shown here to
  169. indicate what EDAC is running.
  170. ============================================================================
  171. 'mcX' DIRECTORIES
  172. In 'mcX' directories are EDAC control and attribute files for
  173. this 'X" instance of the memory controllers:
  174. Counter reset control file:
  175. 'reset_counters'
  176. This write-only control file will zero all the statistical counters
  177. for UE and CE errors. Zeroing the counters will also reset the timer
  178. indicating how long since the last counter zero. This is useful
  179. for computing errors/time. Since the counters are always reset at
  180. driver initialization time, no module/kernel parameter is available.
  181. RUN TIME: echo "anything" >/sys/devices/system/edac/mc/mc0/counter_reset
  182. This resets the counters on memory controller 0
  183. Seconds since last counter reset control file:
  184. 'seconds_since_reset'
  185. This attribute file displays how many seconds have elapsed since the
  186. last counter reset. This can be used with the error counters to
  187. measure error rates.
  188. DIMM capability attribute file:
  189. 'edac_capability'
  190. The EDAC (Error Detection and Correction) capabilities/modes of
  191. the memory controller hardware.
  192. DIMM Current Capability attribute file:
  193. 'edac_current_capability'
  194. The EDAC capabilities available with the hardware
  195. configuration. This may not be the same as "EDAC capability"
  196. if the correct memory is not used. If a memory controller is
  197. capable of EDAC, but DIMMs without check bits are in use, then
  198. Parity, SECDED, S4ECD4ED capabilities will not be available
  199. even though the memory controller might be capable of those
  200. modes with the proper memory loaded.
  201. Memory Type supported on this controller attribute file:
  202. 'supported_mem_type'
  203. This attribute file displays the memory type, usually
  204. buffered and unbuffered DIMMs.
  205. Memory Controller name attribute file:
  206. 'mc_name'
  207. This attribute file displays the type of memory controller
  208. that is being utilized.
  209. Memory Controller Module name attribute file:
  210. 'module_name'
  211. This attribute file displays the memory controller module name,
  212. version and date built. The name of the memory controller
  213. hardware - some drivers work with multiple controllers and
  214. this field shows which hardware is present.
  215. Total memory managed by this memory controller attribute file:
  216. 'size_mb'
  217. This attribute file displays, in count of megabytes, of memory
  218. that this instance of memory controller manages.
  219. Total Uncorrectable Errors count attribute file:
  220. 'ue_count'
  221. This attribute file displays the total count of uncorrectable
  222. errors that have occurred on this memory controller. If panic_on_ue
  223. is set this counter will not have a chance to increment,
  224. since EDAC will panic the system.
  225. Total UE count that had no information attribute fileY:
  226. 'ue_noinfo_count'
  227. This attribute file displays the number of UEs that
  228. have occurred have occurred with no informations as to which DIMM
  229. slot is having errors.
  230. Total Correctable Errors count attribute file:
  231. 'ce_count'
  232. This attribute file displays the total count of correctable
  233. errors that have occurred on this memory controller. This
  234. count is very important to examine. CEs provide early
  235. indications that a DIMM is beginning to fail. This count
  236. field should be monitored for non-zero values and report
  237. such information to the system administrator.
  238. Total Correctable Errors count attribute file:
  239. 'ce_noinfo_count'
  240. This attribute file displays the number of CEs that
  241. have occurred wherewith no informations as to which DIMM slot
  242. is having errors. Memory is handicapped, but operational,
  243. yet no information is available to indicate which slot
  244. the failing memory is in. This count field should be also
  245. be monitored for non-zero values.
  246. Device Symlink:
  247. 'device'
  248. Symlink to the memory controller device
  249. ============================================================================
  250. 'csrowX' DIRECTORIES
  251. In the 'csrowX' directories are EDAC control and attribute files for
  252. this 'X" instance of csrow:
  253. Total Uncorrectable Errors count attribute file:
  254. 'ue_count'
  255. This attribute file displays the total count of uncorrectable
  256. errors that have occurred on this csrow. If panic_on_ue is set
  257. this counter will not have a chance to increment, since EDAC
  258. will panic the system.
  259. Total Correctable Errors count attribute file:
  260. 'ce_count'
  261. This attribute file displays the total count of correctable
  262. errors that have occurred on this csrow. This
  263. count is very important to examine. CEs provide early
  264. indications that a DIMM is beginning to fail. This count
  265. field should be monitored for non-zero values and report
  266. such information to the system administrator.
  267. Total memory managed by this csrow attribute file:
  268. 'size_mb'
  269. This attribute file displays, in count of megabytes, of memory
  270. that this csrow contatins.
  271. Memory Type attribute file:
  272. 'mem_type'
  273. This attribute file will display what type of memory is currently
  274. on this csrow. Normally, either buffered or unbuffered memory.
  275. EDAC Mode of operation attribute file:
  276. 'edac_mode'
  277. This attribute file will display what type of Error detection
  278. and correction is being utilized.
  279. Device type attribute file:
  280. 'dev_type'
  281. This attribute file will display what type of DIMM device is
  282. being utilized. Example: x4
  283. Channel 0 CE Count attribute file:
  284. 'ch0_ce_count'
  285. This attribute file will display the count of CEs on this
  286. DIMM located in channel 0.
  287. Channel 0 UE Count attribute file:
  288. 'ch0_ue_count'
  289. This attribute file will display the count of UEs on this
  290. DIMM located in channel 0.
  291. Channel 0 DIMM Label control file:
  292. 'ch0_dimm_label'
  293. This control file allows this DIMM to have a label assigned
  294. to it. With this label in the module, when errors occur
  295. the output can provide the DIMM label in the system log.
  296. This becomes vital for panic events to isolate the
  297. cause of the UE event.
  298. DIMM Labels must be assigned after booting, with information
  299. that correctly identifies the physical slot with its
  300. silk screen label. This information is currently very
  301. motherboard specific and determination of this information
  302. must occur in userland at this time.
  303. Channel 1 CE Count attribute file:
  304. 'ch1_ce_count'
  305. This attribute file will display the count of CEs on this
  306. DIMM located in channel 1.
  307. Channel 1 UE Count attribute file:
  308. 'ch1_ue_count'
  309. This attribute file will display the count of UEs on this
  310. DIMM located in channel 0.
  311. Channel 1 DIMM Label control file:
  312. 'ch1_dimm_label'
  313. This control file allows this DIMM to have a label assigned
  314. to it. With this label in the module, when errors occur
  315. the output can provide the DIMM label in the system log.
  316. This becomes vital for panic events to isolate the
  317. cause of the UE event.
  318. DIMM Labels must be assigned after booting, with information
  319. that correctly identifies the physical slot with its
  320. silk screen label. This information is currently very
  321. motherboard specific and determination of this information
  322. must occur in userland at this time.
  323. ============================================================================
  324. SYSTEM LOGGING
  325. If logging for UEs and CEs are enabled then system logs will have
  326. error notices indicating errors that have been detected:
  327. MC0: CE page 0x283, offset 0xce0, grain 8, syndrome 0x6ec3, row 0,
  328. channel 1 "DIMM_B1": amd76x_edac
  329. MC0: CE page 0x1e5, offset 0xfb0, grain 8, syndrome 0xb741, row 0,
  330. channel 1 "DIMM_B1": amd76x_edac
  331. The structure of the message is:
  332. the memory controller (MC0)
  333. Error type (CE)
  334. memory page (0x283)
  335. offset in the page (0xce0)
  336. the byte granularity (grain 8)
  337. or resolution of the error
  338. the error syndrome (0xb741)
  339. memory row (row 0)
  340. memory channel (channel 1)
  341. DIMM label, if set prior (DIMM B1
  342. and then an optional, driver-specific message that may
  343. have additional information.
  344. Both UEs and CEs with no info will lack all but memory controller,
  345. error type, a notice of "no info" and then an optional,
  346. driver-specific error message.
  347. ============================================================================
  348. PCI Bus Parity Detection
  349. On Header Type 00 devices the primary status is looked at
  350. for any parity error regardless of whether Parity is enabled on the
  351. device. (The spec indicates parity is generated in some cases).
  352. On Header Type 01 bridges, the secondary status register is also
  353. looked at to see if parity ocurred on the bus on the other side of
  354. the bridge.
  355. SYSFS CONFIGURATION
  356. Under /sys/devices/system/edac/pci are control and attribute files as follows:
  357. Enable/Disable PCI Parity checking control file:
  358. 'check_pci_parity'
  359. This control file enables or disables the PCI Bus Parity scanning
  360. operation. Writing a 1 to this file enables the scanning. Writing
  361. a 0 to this file disables the scanning.
  362. Enable:
  363. echo "1" >/sys/devices/system/edac/pci/check_pci_parity
  364. Disable:
  365. echo "0" >/sys/devices/system/edac/pci/check_pci_parity
  366. Panic on PCI PARITY Error:
  367. 'panic_on_pci_parity'
  368. This control files enables or disables panic'ing when a parity
  369. error has been detected.
  370. module/kernel parameter: panic_on_pci_parity=[0|1]
  371. Enable:
  372. echo "1" >/sys/devices/system/edac/pci/panic_on_pci_parity
  373. Disable:
  374. echo "0" >/sys/devices/system/edac/pci/panic_on_pci_parity
  375. Parity Count:
  376. 'pci_parity_count'
  377. This attribute file will display the number of parity errors that
  378. have been detected.
  379. PCI Device Whitelist:
  380. 'pci_parity_whitelist'
  381. This control file allows for an explicit list of PCI devices to be
  382. scanned for parity errors. Only devices found on this list will
  383. be examined. The list is a line of hexadecimel VENDOR and DEVICE
  384. ID tuples:
  385. 1022:7450,1434:16a6
  386. One or more can be inserted, seperated by a comma.
  387. To write the above list doing the following as one command line:
  388. echo "1022:7450,1434:16a6"
  389. > /sys/devices/system/edac/pci/pci_parity_whitelist
  390. To display what the whitelist is, simply 'cat' the same file.
  391. PCI Device Blacklist:
  392. 'pci_parity_blacklist'
  393. This control file allows for a list of PCI devices to be
  394. skipped for scanning.
  395. The list is a line of hexadecimel VENDOR and DEVICE ID tuples:
  396. 1022:7450,1434:16a6
  397. One or more can be inserted, seperated by a comma.
  398. To write the above list doing the following as one command line:
  399. echo "1022:7450,1434:16a6"
  400. > /sys/devices/system/edac/pci/pci_parity_blacklist
  401. To display what the whitelist current contatins,
  402. simply 'cat' the same file.
  403. =======================================================================
  404. PCI Vendor and Devices IDs can be obtained with the lspci command. Using
  405. the -n option lspci will display the vendor and device IDs. The system
  406. adminstrator will have to determine which devices should be scanned or
  407. skipped.
  408. The two lists (white and black) are prioritized. blacklist is the lower
  409. priority and will NOT be utilized when a whitelist has been set.
  410. Turn OFF a whitelist by an empty echo command:
  411. echo > /sys/devices/system/edac/pci/pci_parity_whitelist
  412. and any previous blacklist will be utililzed.