omap_drv.c 15 KB

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  1. /*
  2. * drivers/gpu/drm/omapdrm/omap_drv.c
  3. *
  4. * Copyright (C) 2011 Texas Instruments
  5. * Author: Rob Clark <rob@ti.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include "omap_drv.h"
  20. #include "drm_crtc_helper.h"
  21. #include "drm_fb_helper.h"
  22. #include "omap_dmm_tiler.h"
  23. #define DRIVER_NAME MODULE_NAME
  24. #define DRIVER_DESC "OMAP DRM"
  25. #define DRIVER_DATE "20110917"
  26. #define DRIVER_MAJOR 1
  27. #define DRIVER_MINOR 0
  28. #define DRIVER_PATCHLEVEL 0
  29. static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
  30. MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
  31. module_param(num_crtc, int, 0600);
  32. /*
  33. * mode config funcs
  34. */
  35. /* Notes about mapping DSS and DRM entities:
  36. * CRTC: overlay
  37. * encoder: manager.. with some extension to allow one primary CRTC
  38. * and zero or more video CRTC's to be mapped to one encoder?
  39. * connector: dssdev.. manager can be attached/detached from different
  40. * devices
  41. */
  42. static void omap_fb_output_poll_changed(struct drm_device *dev)
  43. {
  44. struct omap_drm_private *priv = dev->dev_private;
  45. DBG("dev=%p", dev);
  46. if (priv->fbdev)
  47. drm_fb_helper_hotplug_event(priv->fbdev);
  48. }
  49. static const struct drm_mode_config_funcs omap_mode_config_funcs = {
  50. .fb_create = omap_framebuffer_create,
  51. .output_poll_changed = omap_fb_output_poll_changed,
  52. };
  53. static int get_connector_type(struct omap_dss_device *dssdev)
  54. {
  55. switch (dssdev->type) {
  56. case OMAP_DISPLAY_TYPE_HDMI:
  57. return DRM_MODE_CONNECTOR_HDMIA;
  58. case OMAP_DISPLAY_TYPE_DPI:
  59. if (!strcmp(dssdev->name, "dvi"))
  60. return DRM_MODE_CONNECTOR_DVID;
  61. /* fallthrough */
  62. default:
  63. return DRM_MODE_CONNECTOR_Unknown;
  64. }
  65. }
  66. static int omap_modeset_init(struct drm_device *dev)
  67. {
  68. struct omap_drm_private *priv = dev->dev_private;
  69. struct omap_dss_device *dssdev = NULL;
  70. int num_ovls = dss_feat_get_num_ovls();
  71. int id;
  72. drm_mode_config_init(dev);
  73. omap_drm_irq_install(dev);
  74. /*
  75. * Create private planes and CRTCs for the last NUM_CRTCs overlay
  76. * plus manager:
  77. */
  78. for (id = 0; id < min(num_crtc, num_ovls); id++) {
  79. struct drm_plane *plane;
  80. struct drm_crtc *crtc;
  81. plane = omap_plane_init(dev, id, true);
  82. crtc = omap_crtc_init(dev, plane, pipe2chan(id), id);
  83. BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
  84. priv->crtcs[id] = crtc;
  85. priv->num_crtcs++;
  86. priv->planes[id] = plane;
  87. priv->num_planes++;
  88. }
  89. /*
  90. * Create normal planes for the remaining overlays:
  91. */
  92. for (; id < num_ovls; id++) {
  93. struct drm_plane *plane = omap_plane_init(dev, id, false);
  94. BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
  95. priv->planes[priv->num_planes++] = plane;
  96. }
  97. for_each_dss_dev(dssdev) {
  98. struct drm_connector *connector;
  99. struct drm_encoder *encoder;
  100. if (!dssdev->driver) {
  101. dev_warn(dev->dev, "%s has no driver.. skipping it\n",
  102. dssdev->name);
  103. return 0;
  104. }
  105. if (!(dssdev->driver->get_timings ||
  106. dssdev->driver->read_edid)) {
  107. dev_warn(dev->dev, "%s driver does not support "
  108. "get_timings or read_edid.. skipping it!\n",
  109. dssdev->name);
  110. return 0;
  111. }
  112. encoder = omap_encoder_init(dev, dssdev);
  113. if (!encoder) {
  114. dev_err(dev->dev, "could not create encoder: %s\n",
  115. dssdev->name);
  116. return -ENOMEM;
  117. }
  118. connector = omap_connector_init(dev,
  119. get_connector_type(dssdev), dssdev, encoder);
  120. if (!connector) {
  121. dev_err(dev->dev, "could not create connector: %s\n",
  122. dssdev->name);
  123. return -ENOMEM;
  124. }
  125. BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
  126. BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
  127. priv->encoders[priv->num_encoders++] = encoder;
  128. priv->connectors[priv->num_connectors++] = connector;
  129. drm_mode_connector_attach_encoder(connector, encoder);
  130. /* figure out which crtc's we can connect the encoder to: */
  131. encoder->possible_crtcs = 0;
  132. for (id = 0; id < priv->num_crtcs; id++) {
  133. enum omap_dss_output_id supported_outputs =
  134. dss_feat_get_supported_outputs(pipe2chan(id));
  135. if (supported_outputs & dssdev->output->id)
  136. encoder->possible_crtcs |= (1 << id);
  137. }
  138. }
  139. dev->mode_config.min_width = 32;
  140. dev->mode_config.min_height = 32;
  141. /* note: eventually will need some cpu_is_omapXYZ() type stuff here
  142. * to fill in these limits properly on different OMAP generations..
  143. */
  144. dev->mode_config.max_width = 2048;
  145. dev->mode_config.max_height = 2048;
  146. dev->mode_config.funcs = &omap_mode_config_funcs;
  147. return 0;
  148. }
  149. static void omap_modeset_free(struct drm_device *dev)
  150. {
  151. drm_mode_config_cleanup(dev);
  152. }
  153. /*
  154. * drm ioctl funcs
  155. */
  156. static int ioctl_get_param(struct drm_device *dev, void *data,
  157. struct drm_file *file_priv)
  158. {
  159. struct omap_drm_private *priv = dev->dev_private;
  160. struct drm_omap_param *args = data;
  161. DBG("%p: param=%llu", dev, args->param);
  162. switch (args->param) {
  163. case OMAP_PARAM_CHIPSET_ID:
  164. args->value = priv->omaprev;
  165. break;
  166. default:
  167. DBG("unknown parameter %lld", args->param);
  168. return -EINVAL;
  169. }
  170. return 0;
  171. }
  172. static int ioctl_set_param(struct drm_device *dev, void *data,
  173. struct drm_file *file_priv)
  174. {
  175. struct drm_omap_param *args = data;
  176. switch (args->param) {
  177. default:
  178. DBG("unknown parameter %lld", args->param);
  179. return -EINVAL;
  180. }
  181. return 0;
  182. }
  183. static int ioctl_gem_new(struct drm_device *dev, void *data,
  184. struct drm_file *file_priv)
  185. {
  186. struct drm_omap_gem_new *args = data;
  187. VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
  188. args->size.bytes, args->flags);
  189. return omap_gem_new_handle(dev, file_priv, args->size,
  190. args->flags, &args->handle);
  191. }
  192. static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
  193. struct drm_file *file_priv)
  194. {
  195. struct drm_omap_gem_cpu_prep *args = data;
  196. struct drm_gem_object *obj;
  197. int ret;
  198. VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
  199. obj = drm_gem_object_lookup(dev, file_priv, args->handle);
  200. if (!obj)
  201. return -ENOENT;
  202. ret = omap_gem_op_sync(obj, args->op);
  203. if (!ret)
  204. ret = omap_gem_op_start(obj, args->op);
  205. drm_gem_object_unreference_unlocked(obj);
  206. return ret;
  207. }
  208. static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
  209. struct drm_file *file_priv)
  210. {
  211. struct drm_omap_gem_cpu_fini *args = data;
  212. struct drm_gem_object *obj;
  213. int ret;
  214. VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
  215. obj = drm_gem_object_lookup(dev, file_priv, args->handle);
  216. if (!obj)
  217. return -ENOENT;
  218. /* XXX flushy, flushy */
  219. ret = 0;
  220. if (!ret)
  221. ret = omap_gem_op_finish(obj, args->op);
  222. drm_gem_object_unreference_unlocked(obj);
  223. return ret;
  224. }
  225. static int ioctl_gem_info(struct drm_device *dev, void *data,
  226. struct drm_file *file_priv)
  227. {
  228. struct drm_omap_gem_info *args = data;
  229. struct drm_gem_object *obj;
  230. int ret = 0;
  231. VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
  232. obj = drm_gem_object_lookup(dev, file_priv, args->handle);
  233. if (!obj)
  234. return -ENOENT;
  235. args->size = omap_gem_mmap_size(obj);
  236. args->offset = omap_gem_mmap_offset(obj);
  237. drm_gem_object_unreference_unlocked(obj);
  238. return ret;
  239. }
  240. struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
  241. DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_UNLOCKED|DRM_AUTH),
  242. DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  243. DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_UNLOCKED|DRM_AUTH),
  244. DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
  245. DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
  246. DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_UNLOCKED|DRM_AUTH),
  247. };
  248. /*
  249. * drm driver funcs
  250. */
  251. /**
  252. * load - setup chip and create an initial config
  253. * @dev: DRM device
  254. * @flags: startup flags
  255. *
  256. * The driver load routine has to do several things:
  257. * - initialize the memory manager
  258. * - allocate initial config memory
  259. * - setup the DRM framebuffer with the allocated memory
  260. */
  261. static int dev_load(struct drm_device *dev, unsigned long flags)
  262. {
  263. struct omap_drm_platform_data *pdata = dev->dev->platform_data;
  264. struct omap_drm_private *priv;
  265. int ret;
  266. DBG("load: dev=%p", dev);
  267. priv = kzalloc(sizeof(*priv), GFP_KERNEL);
  268. if (!priv) {
  269. dev_err(dev->dev, "could not allocate priv\n");
  270. return -ENOMEM;
  271. }
  272. priv->omaprev = pdata->omaprev;
  273. dev->dev_private = priv;
  274. priv->wq = alloc_ordered_workqueue("omapdrm", 0);
  275. INIT_LIST_HEAD(&priv->obj_list);
  276. omap_gem_init(dev);
  277. ret = omap_modeset_init(dev);
  278. if (ret) {
  279. dev_err(dev->dev, "omap_modeset_init failed: ret=%d\n", ret);
  280. dev->dev_private = NULL;
  281. kfree(priv);
  282. return ret;
  283. }
  284. ret = drm_vblank_init(dev, priv->num_crtcs);
  285. if (ret)
  286. dev_warn(dev->dev, "could not init vblank\n");
  287. priv->fbdev = omap_fbdev_init(dev);
  288. if (!priv->fbdev) {
  289. dev_warn(dev->dev, "omap_fbdev_init failed\n");
  290. /* well, limp along without an fbdev.. maybe X11 will work? */
  291. }
  292. /* store off drm_device for use in pm ops */
  293. dev_set_drvdata(dev->dev, dev);
  294. drm_kms_helper_poll_init(dev);
  295. return 0;
  296. }
  297. static int dev_unload(struct drm_device *dev)
  298. {
  299. struct omap_drm_private *priv = dev->dev_private;
  300. DBG("unload: dev=%p", dev);
  301. drm_kms_helper_poll_fini(dev);
  302. drm_vblank_cleanup(dev);
  303. omap_drm_irq_uninstall(dev);
  304. omap_fbdev_free(dev);
  305. omap_modeset_free(dev);
  306. omap_gem_deinit(dev);
  307. flush_workqueue(priv->wq);
  308. destroy_workqueue(priv->wq);
  309. kfree(dev->dev_private);
  310. dev->dev_private = NULL;
  311. dev_set_drvdata(dev->dev, NULL);
  312. return 0;
  313. }
  314. static int dev_open(struct drm_device *dev, struct drm_file *file)
  315. {
  316. file->driver_priv = NULL;
  317. DBG("open: dev=%p, file=%p", dev, file);
  318. return 0;
  319. }
  320. static int dev_firstopen(struct drm_device *dev)
  321. {
  322. DBG("firstopen: dev=%p", dev);
  323. return 0;
  324. }
  325. /**
  326. * lastclose - clean up after all DRM clients have exited
  327. * @dev: DRM device
  328. *
  329. * Take care of cleaning up after all DRM clients have exited. In the
  330. * mode setting case, we want to restore the kernel's initial mode (just
  331. * in case the last client left us in a bad state).
  332. */
  333. static void dev_lastclose(struct drm_device *dev)
  334. {
  335. int i;
  336. /* we don't support vga-switcheroo.. so just make sure the fbdev
  337. * mode is active
  338. */
  339. struct omap_drm_private *priv = dev->dev_private;
  340. int ret;
  341. DBG("lastclose: dev=%p", dev);
  342. if (priv->rotation_prop) {
  343. /* need to restore default rotation state.. not sure
  344. * if there is a cleaner way to restore properties to
  345. * default state? Maybe a flag that properties should
  346. * automatically be restored to default state on
  347. * lastclose?
  348. */
  349. for (i = 0; i < priv->num_crtcs; i++) {
  350. drm_object_property_set_value(&priv->crtcs[i]->base,
  351. priv->rotation_prop, 0);
  352. }
  353. for (i = 0; i < priv->num_planes; i++) {
  354. drm_object_property_set_value(&priv->planes[i]->base,
  355. priv->rotation_prop, 0);
  356. }
  357. }
  358. drm_modeset_lock_all(dev);
  359. ret = drm_fb_helper_restore_fbdev_mode(priv->fbdev);
  360. drm_modeset_unlock_all(dev);
  361. if (ret)
  362. DBG("failed to restore crtc mode");
  363. }
  364. static void dev_preclose(struct drm_device *dev, struct drm_file *file)
  365. {
  366. DBG("preclose: dev=%p", dev);
  367. }
  368. static void dev_postclose(struct drm_device *dev, struct drm_file *file)
  369. {
  370. DBG("postclose: dev=%p, file=%p", dev, file);
  371. }
  372. static const struct vm_operations_struct omap_gem_vm_ops = {
  373. .fault = omap_gem_fault,
  374. .open = drm_gem_vm_open,
  375. .close = drm_gem_vm_close,
  376. };
  377. static const struct file_operations omapdriver_fops = {
  378. .owner = THIS_MODULE,
  379. .open = drm_open,
  380. .unlocked_ioctl = drm_ioctl,
  381. .release = drm_release,
  382. .mmap = omap_gem_mmap,
  383. .poll = drm_poll,
  384. .fasync = drm_fasync,
  385. .read = drm_read,
  386. .llseek = noop_llseek,
  387. };
  388. static struct drm_driver omap_drm_driver = {
  389. .driver_features =
  390. DRIVER_HAVE_IRQ | DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME,
  391. .load = dev_load,
  392. .unload = dev_unload,
  393. .open = dev_open,
  394. .firstopen = dev_firstopen,
  395. .lastclose = dev_lastclose,
  396. .preclose = dev_preclose,
  397. .postclose = dev_postclose,
  398. .get_vblank_counter = drm_vblank_count,
  399. .enable_vblank = omap_irq_enable_vblank,
  400. .disable_vblank = omap_irq_disable_vblank,
  401. .irq_preinstall = omap_irq_preinstall,
  402. .irq_postinstall = omap_irq_postinstall,
  403. .irq_uninstall = omap_irq_uninstall,
  404. .irq_handler = omap_irq_handler,
  405. #ifdef CONFIG_DEBUG_FS
  406. .debugfs_init = omap_debugfs_init,
  407. .debugfs_cleanup = omap_debugfs_cleanup,
  408. #endif
  409. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  410. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  411. .gem_prime_export = omap_gem_prime_export,
  412. .gem_prime_import = omap_gem_prime_import,
  413. .gem_init_object = omap_gem_init_object,
  414. .gem_free_object = omap_gem_free_object,
  415. .gem_vm_ops = &omap_gem_vm_ops,
  416. .dumb_create = omap_gem_dumb_create,
  417. .dumb_map_offset = omap_gem_dumb_map_offset,
  418. .dumb_destroy = omap_gem_dumb_destroy,
  419. .ioctls = ioctls,
  420. .num_ioctls = DRM_OMAP_NUM_IOCTLS,
  421. .fops = &omapdriver_fops,
  422. .name = DRIVER_NAME,
  423. .desc = DRIVER_DESC,
  424. .date = DRIVER_DATE,
  425. .major = DRIVER_MAJOR,
  426. .minor = DRIVER_MINOR,
  427. .patchlevel = DRIVER_PATCHLEVEL,
  428. };
  429. static int pdev_suspend(struct platform_device *pDevice, pm_message_t state)
  430. {
  431. DBG("");
  432. return 0;
  433. }
  434. static int pdev_resume(struct platform_device *device)
  435. {
  436. DBG("");
  437. return 0;
  438. }
  439. static void pdev_shutdown(struct platform_device *device)
  440. {
  441. DBG("");
  442. }
  443. static int pdev_probe(struct platform_device *device)
  444. {
  445. DBG("%s", device->name);
  446. return drm_platform_init(&omap_drm_driver, device);
  447. }
  448. static int pdev_remove(struct platform_device *device)
  449. {
  450. DBG("");
  451. drm_platform_exit(&omap_drm_driver, device);
  452. platform_driver_unregister(&omap_dmm_driver);
  453. return 0;
  454. }
  455. #ifdef CONFIG_PM
  456. static const struct dev_pm_ops omapdrm_pm_ops = {
  457. .resume = omap_gem_resume,
  458. };
  459. #endif
  460. struct platform_driver pdev = {
  461. .driver = {
  462. .name = DRIVER_NAME,
  463. .owner = THIS_MODULE,
  464. #ifdef CONFIG_PM
  465. .pm = &omapdrm_pm_ops,
  466. #endif
  467. },
  468. .probe = pdev_probe,
  469. .remove = pdev_remove,
  470. .suspend = pdev_suspend,
  471. .resume = pdev_resume,
  472. .shutdown = pdev_shutdown,
  473. };
  474. static int __init omap_drm_init(void)
  475. {
  476. DBG("init");
  477. if (platform_driver_register(&omap_dmm_driver)) {
  478. /* we can continue on without DMM.. so not fatal */
  479. dev_err(NULL, "DMM registration failed\n");
  480. }
  481. return platform_driver_register(&pdev);
  482. }
  483. static void __exit omap_drm_fini(void)
  484. {
  485. DBG("fini");
  486. platform_driver_unregister(&pdev);
  487. }
  488. /* need late_initcall() so we load after dss_driver's are loaded */
  489. late_initcall(omap_drm_init);
  490. module_exit(omap_drm_fini);
  491. MODULE_AUTHOR("Rob Clark <rob@ti.com>");
  492. MODULE_DESCRIPTION("OMAP DRM Display Driver");
  493. MODULE_ALIAS("platform:" DRIVER_NAME);
  494. MODULE_LICENSE("GPL v2");