mpt2sas_base.c 131 KB

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  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2010 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/kernel.h>
  43. #include <linux/module.h>
  44. #include <linux/errno.h>
  45. #include <linux/init.h>
  46. #include <linux/slab.h>
  47. #include <linux/types.h>
  48. #include <linux/pci.h>
  49. #include <linux/kdev_t.h>
  50. #include <linux/blkdev.h>
  51. #include <linux/delay.h>
  52. #include <linux/interrupt.h>
  53. #include <linux/dma-mapping.h>
  54. #include <linux/sort.h>
  55. #include <linux/io.h>
  56. #include <linux/time.h>
  57. #include <linux/kthread.h>
  58. #include <linux/aer.h>
  59. #include "mpt2sas_base.h"
  60. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  61. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  62. static int max_queue_depth = -1;
  63. module_param(max_queue_depth, int, 0);
  64. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  65. static int max_sgl_entries = -1;
  66. module_param(max_sgl_entries, int, 0);
  67. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  68. static int msix_disable = -1;
  69. module_param(msix_disable, int, 0);
  70. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  71. static int missing_delay[2] = {-1, -1};
  72. module_param_array(missing_delay, int, NULL, 0);
  73. MODULE_PARM_DESC(missing_delay, " device missing delay , io missing delay");
  74. static int mpt2sas_fwfault_debug;
  75. MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault "
  76. "and halt firmware - (default=0)");
  77. static int disable_discovery = -1;
  78. module_param(disable_discovery, int, 0);
  79. MODULE_PARM_DESC(disable_discovery, " disable discovery ");
  80. /* diag_buffer_enable is bitwise
  81. * bit 0 set = TRACE
  82. * bit 1 set = SNAPSHOT
  83. * bit 2 set = EXTENDED
  84. *
  85. * Either bit can be set, or both
  86. */
  87. static int diag_buffer_enable;
  88. module_param(diag_buffer_enable, int, 0);
  89. MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers "
  90. "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)");
  91. /**
  92. * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
  93. *
  94. */
  95. static int
  96. _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
  97. {
  98. int ret = param_set_int(val, kp);
  99. struct MPT2SAS_ADAPTER *ioc;
  100. if (ret)
  101. return ret;
  102. printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug);
  103. list_for_each_entry(ioc, &mpt2sas_ioc_list, list)
  104. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  105. return 0;
  106. }
  107. module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug,
  108. param_get_int, &mpt2sas_fwfault_debug, 0644);
  109. /**
  110. * mpt2sas_remove_dead_ioc_func - kthread context to remove dead ioc
  111. * @arg: input argument, used to derive ioc
  112. *
  113. * Return 0 if controller is removed from pci subsystem.
  114. * Return -1 for other case.
  115. */
  116. static int mpt2sas_remove_dead_ioc_func(void *arg)
  117. {
  118. struct MPT2SAS_ADAPTER *ioc = (struct MPT2SAS_ADAPTER *)arg;
  119. struct pci_dev *pdev;
  120. if ((ioc == NULL))
  121. return -1;
  122. pdev = ioc->pdev;
  123. if ((pdev == NULL))
  124. return -1;
  125. pci_remove_bus_device(pdev);
  126. return 0;
  127. }
  128. /**
  129. * _base_fault_reset_work - workq handling ioc fault conditions
  130. * @work: input argument, used to derive ioc
  131. * Context: sleep.
  132. *
  133. * Return nothing.
  134. */
  135. static void
  136. _base_fault_reset_work(struct work_struct *work)
  137. {
  138. struct MPT2SAS_ADAPTER *ioc =
  139. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  140. unsigned long flags;
  141. u32 doorbell;
  142. int rc;
  143. struct task_struct *p;
  144. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  145. if (ioc->shost_recovery)
  146. goto rearm_timer;
  147. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  148. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  149. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_MASK) {
  150. printk(MPT2SAS_INFO_FMT "%s : SAS host is non-operational !!!!\n",
  151. ioc->name, __func__);
  152. /*
  153. * Call _scsih_flush_pending_cmds callback so that we flush all
  154. * pending commands back to OS. This call is required to aovid
  155. * deadlock at block layer. Dead IOC will fail to do diag reset,
  156. * and this call is safe since dead ioc will never return any
  157. * command back from HW.
  158. */
  159. ioc->schedule_dead_ioc_flush_running_cmds(ioc);
  160. /*
  161. * Set remove_host flag early since kernel thread will
  162. * take some time to execute.
  163. */
  164. ioc->remove_host = 1;
  165. /*Remove the Dead Host */
  166. p = kthread_run(mpt2sas_remove_dead_ioc_func, ioc,
  167. "mpt2sas_dead_ioc_%d", ioc->id);
  168. if (IS_ERR(p)) {
  169. printk(MPT2SAS_ERR_FMT
  170. "%s: Running mpt2sas_dead_ioc thread failed !!!!\n",
  171. ioc->name, __func__);
  172. } else {
  173. printk(MPT2SAS_ERR_FMT
  174. "%s: Running mpt2sas_dead_ioc thread success !!!!\n",
  175. ioc->name, __func__);
  176. }
  177. return; /* don't rearm timer */
  178. }
  179. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  180. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  181. FORCE_BIG_HAMMER);
  182. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  183. __func__, (rc == 0) ? "success" : "failed");
  184. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  185. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  186. mpt2sas_base_fault_info(ioc, doorbell &
  187. MPI2_DOORBELL_DATA_MASK);
  188. }
  189. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  190. rearm_timer:
  191. if (ioc->fault_reset_work_q)
  192. queue_delayed_work(ioc->fault_reset_work_q,
  193. &ioc->fault_reset_work,
  194. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  195. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  196. }
  197. /**
  198. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  199. * @ioc: per adapter object
  200. * Context: sleep.
  201. *
  202. * Return nothing.
  203. */
  204. void
  205. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  206. {
  207. unsigned long flags;
  208. if (ioc->fault_reset_work_q)
  209. return;
  210. /* initialize fault polling */
  211. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  212. snprintf(ioc->fault_reset_work_q_name,
  213. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  214. ioc->fault_reset_work_q =
  215. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  216. if (!ioc->fault_reset_work_q) {
  217. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  218. ioc->name, __func__, __LINE__);
  219. return;
  220. }
  221. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  222. if (ioc->fault_reset_work_q)
  223. queue_delayed_work(ioc->fault_reset_work_q,
  224. &ioc->fault_reset_work,
  225. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  226. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  227. }
  228. /**
  229. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  230. * @ioc: per adapter object
  231. * Context: sleep.
  232. *
  233. * Return nothing.
  234. */
  235. void
  236. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  237. {
  238. unsigned long flags;
  239. struct workqueue_struct *wq;
  240. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  241. wq = ioc->fault_reset_work_q;
  242. ioc->fault_reset_work_q = NULL;
  243. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  244. if (wq) {
  245. if (!cancel_delayed_work(&ioc->fault_reset_work))
  246. flush_workqueue(wq);
  247. destroy_workqueue(wq);
  248. }
  249. }
  250. /**
  251. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  252. * @ioc: per adapter object
  253. * @fault_code: fault code
  254. *
  255. * Return nothing.
  256. */
  257. void
  258. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  259. {
  260. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  261. ioc->name, fault_code);
  262. }
  263. /**
  264. * mpt2sas_halt_firmware - halt's mpt controller firmware
  265. * @ioc: per adapter object
  266. *
  267. * For debugging timeout related issues. Writing 0xCOFFEE00
  268. * to the doorbell register will halt controller firmware. With
  269. * the purpose to stop both driver and firmware, the enduser can
  270. * obtain a ring buffer from controller UART.
  271. */
  272. void
  273. mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc)
  274. {
  275. u32 doorbell;
  276. if (!ioc->fwfault_debug)
  277. return;
  278. dump_stack();
  279. doorbell = readl(&ioc->chip->Doorbell);
  280. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  281. mpt2sas_base_fault_info(ioc , doorbell);
  282. else {
  283. writel(0xC0FFEE00, &ioc->chip->Doorbell);
  284. printk(MPT2SAS_ERR_FMT "Firmware is halted due to command "
  285. "timeout\n", ioc->name);
  286. }
  287. panic("panic in %s\n", __func__);
  288. }
  289. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  290. /**
  291. * _base_sas_ioc_info - verbose translation of the ioc status
  292. * @ioc: per adapter object
  293. * @mpi_reply: reply mf payload returned from firmware
  294. * @request_hdr: request mf
  295. *
  296. * Return nothing.
  297. */
  298. static void
  299. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  300. MPI2RequestHeader_t *request_hdr)
  301. {
  302. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  303. MPI2_IOCSTATUS_MASK;
  304. char *desc = NULL;
  305. u16 frame_sz;
  306. char *func_str = NULL;
  307. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  308. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  309. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  310. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  311. return;
  312. if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
  313. return;
  314. switch (ioc_status) {
  315. /****************************************************************************
  316. * Common IOCStatus values for all replies
  317. ****************************************************************************/
  318. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  319. desc = "invalid function";
  320. break;
  321. case MPI2_IOCSTATUS_BUSY:
  322. desc = "busy";
  323. break;
  324. case MPI2_IOCSTATUS_INVALID_SGL:
  325. desc = "invalid sgl";
  326. break;
  327. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  328. desc = "internal error";
  329. break;
  330. case MPI2_IOCSTATUS_INVALID_VPID:
  331. desc = "invalid vpid";
  332. break;
  333. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  334. desc = "insufficient resources";
  335. break;
  336. case MPI2_IOCSTATUS_INVALID_FIELD:
  337. desc = "invalid field";
  338. break;
  339. case MPI2_IOCSTATUS_INVALID_STATE:
  340. desc = "invalid state";
  341. break;
  342. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  343. desc = "op state not supported";
  344. break;
  345. /****************************************************************************
  346. * Config IOCStatus values
  347. ****************************************************************************/
  348. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  349. desc = "config invalid action";
  350. break;
  351. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  352. desc = "config invalid type";
  353. break;
  354. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  355. desc = "config invalid page";
  356. break;
  357. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  358. desc = "config invalid data";
  359. break;
  360. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  361. desc = "config no defaults";
  362. break;
  363. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  364. desc = "config cant commit";
  365. break;
  366. /****************************************************************************
  367. * SCSI IO Reply
  368. ****************************************************************************/
  369. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  370. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  371. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  372. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  373. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  374. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  375. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  376. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  377. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  378. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  379. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  380. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  381. break;
  382. /****************************************************************************
  383. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  384. ****************************************************************************/
  385. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  386. desc = "eedp guard error";
  387. break;
  388. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  389. desc = "eedp ref tag error";
  390. break;
  391. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  392. desc = "eedp app tag error";
  393. break;
  394. /****************************************************************************
  395. * SCSI Target values
  396. ****************************************************************************/
  397. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  398. desc = "target invalid io index";
  399. break;
  400. case MPI2_IOCSTATUS_TARGET_ABORTED:
  401. desc = "target aborted";
  402. break;
  403. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  404. desc = "target no conn retryable";
  405. break;
  406. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  407. desc = "target no connection";
  408. break;
  409. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  410. desc = "target xfer count mismatch";
  411. break;
  412. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  413. desc = "target data offset error";
  414. break;
  415. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  416. desc = "target too much write data";
  417. break;
  418. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  419. desc = "target iu too short";
  420. break;
  421. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  422. desc = "target ack nak timeout";
  423. break;
  424. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  425. desc = "target nak received";
  426. break;
  427. /****************************************************************************
  428. * Serial Attached SCSI values
  429. ****************************************************************************/
  430. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  431. desc = "smp request failed";
  432. break;
  433. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  434. desc = "smp data overrun";
  435. break;
  436. /****************************************************************************
  437. * Diagnostic Buffer Post / Diagnostic Release values
  438. ****************************************************************************/
  439. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  440. desc = "diagnostic released";
  441. break;
  442. default:
  443. break;
  444. }
  445. if (!desc)
  446. return;
  447. switch (request_hdr->Function) {
  448. case MPI2_FUNCTION_CONFIG:
  449. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  450. func_str = "config_page";
  451. break;
  452. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  453. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  454. func_str = "task_mgmt";
  455. break;
  456. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  457. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  458. func_str = "sas_iounit_ctl";
  459. break;
  460. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  461. frame_sz = sizeof(Mpi2SepRequest_t);
  462. func_str = "enclosure";
  463. break;
  464. case MPI2_FUNCTION_IOC_INIT:
  465. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  466. func_str = "ioc_init";
  467. break;
  468. case MPI2_FUNCTION_PORT_ENABLE:
  469. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  470. func_str = "port_enable";
  471. break;
  472. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  473. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  474. func_str = "smp_passthru";
  475. break;
  476. default:
  477. frame_sz = 32;
  478. func_str = "unknown";
  479. break;
  480. }
  481. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  482. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  483. _debug_dump_mf(request_hdr, frame_sz/4);
  484. }
  485. /**
  486. * _base_display_event_data - verbose translation of firmware asyn events
  487. * @ioc: per adapter object
  488. * @mpi_reply: reply mf payload returned from firmware
  489. *
  490. * Return nothing.
  491. */
  492. static void
  493. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  494. Mpi2EventNotificationReply_t *mpi_reply)
  495. {
  496. char *desc = NULL;
  497. u16 event;
  498. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  499. return;
  500. event = le16_to_cpu(mpi_reply->Event);
  501. switch (event) {
  502. case MPI2_EVENT_LOG_DATA:
  503. desc = "Log Data";
  504. break;
  505. case MPI2_EVENT_STATE_CHANGE:
  506. desc = "Status Change";
  507. break;
  508. case MPI2_EVENT_HARD_RESET_RECEIVED:
  509. desc = "Hard Reset Received";
  510. break;
  511. case MPI2_EVENT_EVENT_CHANGE:
  512. desc = "Event Change";
  513. break;
  514. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  515. desc = "Device Status Change";
  516. break;
  517. case MPI2_EVENT_IR_OPERATION_STATUS:
  518. if (!ioc->hide_ir_msg)
  519. desc = "IR Operation Status";
  520. break;
  521. case MPI2_EVENT_SAS_DISCOVERY:
  522. {
  523. Mpi2EventDataSasDiscovery_t *event_data =
  524. (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
  525. printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name,
  526. (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
  527. "start" : "stop");
  528. if (event_data->DiscoveryStatus)
  529. printk("discovery_status(0x%08x)",
  530. le32_to_cpu(event_data->DiscoveryStatus));
  531. printk("\n");
  532. return;
  533. }
  534. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  535. desc = "SAS Broadcast Primitive";
  536. break;
  537. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  538. desc = "SAS Init Device Status Change";
  539. break;
  540. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  541. desc = "SAS Init Table Overflow";
  542. break;
  543. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  544. desc = "SAS Topology Change List";
  545. break;
  546. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  547. desc = "SAS Enclosure Device Status Change";
  548. break;
  549. case MPI2_EVENT_IR_VOLUME:
  550. if (!ioc->hide_ir_msg)
  551. desc = "IR Volume";
  552. break;
  553. case MPI2_EVENT_IR_PHYSICAL_DISK:
  554. if (!ioc->hide_ir_msg)
  555. desc = "IR Physical Disk";
  556. break;
  557. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  558. if (!ioc->hide_ir_msg)
  559. desc = "IR Configuration Change List";
  560. break;
  561. case MPI2_EVENT_LOG_ENTRY_ADDED:
  562. if (!ioc->hide_ir_msg)
  563. desc = "Log Entry Added";
  564. break;
  565. }
  566. if (!desc)
  567. return;
  568. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  569. }
  570. #endif
  571. /**
  572. * _base_sas_log_info - verbose translation of firmware log info
  573. * @ioc: per adapter object
  574. * @log_info: log info
  575. *
  576. * Return nothing.
  577. */
  578. static void
  579. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  580. {
  581. union loginfo_type {
  582. u32 loginfo;
  583. struct {
  584. u32 subcode:16;
  585. u32 code:8;
  586. u32 originator:4;
  587. u32 bus_type:4;
  588. } dw;
  589. };
  590. union loginfo_type sas_loginfo;
  591. char *originator_str = NULL;
  592. sas_loginfo.loginfo = log_info;
  593. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  594. return;
  595. /* each nexus loss loginfo */
  596. if (log_info == 0x31170000)
  597. return;
  598. /* eat the loginfos associated with task aborts */
  599. if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
  600. 0x31140000 || log_info == 0x31130000))
  601. return;
  602. switch (sas_loginfo.dw.originator) {
  603. case 0:
  604. originator_str = "IOP";
  605. break;
  606. case 1:
  607. originator_str = "PL";
  608. break;
  609. case 2:
  610. if (!ioc->hide_ir_msg)
  611. originator_str = "IR";
  612. else
  613. originator_str = "WarpDrive";
  614. break;
  615. }
  616. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  617. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  618. originator_str, sas_loginfo.dw.code,
  619. sas_loginfo.dw.subcode);
  620. }
  621. /**
  622. * _base_display_reply_info -
  623. * @ioc: per adapter object
  624. * @smid: system request message index
  625. * @msix_index: MSIX table index supplied by the OS
  626. * @reply: reply message frame(lower 32bit addr)
  627. *
  628. * Return nothing.
  629. */
  630. static void
  631. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  632. u32 reply)
  633. {
  634. MPI2DefaultReply_t *mpi_reply;
  635. u16 ioc_status;
  636. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  637. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  638. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  639. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  640. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  641. _base_sas_ioc_info(ioc , mpi_reply,
  642. mpt2sas_base_get_msg_frame(ioc, smid));
  643. }
  644. #endif
  645. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  646. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  647. }
  648. /**
  649. * mpt2sas_base_done - base internal command completion routine
  650. * @ioc: per adapter object
  651. * @smid: system request message index
  652. * @msix_index: MSIX table index supplied by the OS
  653. * @reply: reply message frame(lower 32bit addr)
  654. *
  655. * Return 1 meaning mf should be freed from _base_interrupt
  656. * 0 means the mf is freed from this function.
  657. */
  658. u8
  659. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  660. u32 reply)
  661. {
  662. MPI2DefaultReply_t *mpi_reply;
  663. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  664. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  665. return 1;
  666. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  667. return 1;
  668. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  669. if (mpi_reply) {
  670. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  671. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  672. }
  673. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  674. complete(&ioc->base_cmds.done);
  675. return 1;
  676. }
  677. /**
  678. * _base_async_event - main callback handler for firmware asyn events
  679. * @ioc: per adapter object
  680. * @msix_index: MSIX table index supplied by the OS
  681. * @reply: reply message frame(lower 32bit addr)
  682. *
  683. * Return 1 meaning mf should be freed from _base_interrupt
  684. * 0 means the mf is freed from this function.
  685. */
  686. static u8
  687. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
  688. {
  689. Mpi2EventNotificationReply_t *mpi_reply;
  690. Mpi2EventAckRequest_t *ack_request;
  691. u16 smid;
  692. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  693. if (!mpi_reply)
  694. return 1;
  695. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  696. return 1;
  697. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  698. _base_display_event_data(ioc, mpi_reply);
  699. #endif
  700. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  701. goto out;
  702. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  703. if (!smid) {
  704. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  705. ioc->name, __func__);
  706. goto out;
  707. }
  708. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  709. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  710. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  711. ack_request->Event = mpi_reply->Event;
  712. ack_request->EventContext = mpi_reply->EventContext;
  713. ack_request->VF_ID = 0; /* TODO */
  714. ack_request->VP_ID = 0;
  715. mpt2sas_base_put_smid_default(ioc, smid);
  716. out:
  717. /* scsih callback handler */
  718. mpt2sas_scsih_event_callback(ioc, msix_index, reply);
  719. /* ctl callback handler */
  720. mpt2sas_ctl_event_callback(ioc, msix_index, reply);
  721. return 1;
  722. }
  723. /**
  724. * _base_get_cb_idx - obtain the callback index
  725. * @ioc: per adapter object
  726. * @smid: system request message index
  727. *
  728. * Return callback index.
  729. */
  730. static u8
  731. _base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  732. {
  733. int i;
  734. u8 cb_idx;
  735. if (smid < ioc->hi_priority_smid) {
  736. i = smid - 1;
  737. cb_idx = ioc->scsi_lookup[i].cb_idx;
  738. } else if (smid < ioc->internal_smid) {
  739. i = smid - ioc->hi_priority_smid;
  740. cb_idx = ioc->hpr_lookup[i].cb_idx;
  741. } else if (smid <= ioc->hba_queue_depth) {
  742. i = smid - ioc->internal_smid;
  743. cb_idx = ioc->internal_lookup[i].cb_idx;
  744. } else
  745. cb_idx = 0xFF;
  746. return cb_idx;
  747. }
  748. /**
  749. * _base_mask_interrupts - disable interrupts
  750. * @ioc: per adapter object
  751. *
  752. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  753. *
  754. * Return nothing.
  755. */
  756. static void
  757. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  758. {
  759. u32 him_register;
  760. ioc->mask_interrupts = 1;
  761. him_register = readl(&ioc->chip->HostInterruptMask);
  762. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  763. writel(him_register, &ioc->chip->HostInterruptMask);
  764. readl(&ioc->chip->HostInterruptMask);
  765. }
  766. /**
  767. * _base_unmask_interrupts - enable interrupts
  768. * @ioc: per adapter object
  769. *
  770. * Enabling only Reply Interrupts
  771. *
  772. * Return nothing.
  773. */
  774. static void
  775. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  776. {
  777. u32 him_register;
  778. him_register = readl(&ioc->chip->HostInterruptMask);
  779. him_register &= ~MPI2_HIM_RIM;
  780. writel(him_register, &ioc->chip->HostInterruptMask);
  781. ioc->mask_interrupts = 0;
  782. }
  783. union reply_descriptor {
  784. u64 word;
  785. struct {
  786. u32 low;
  787. u32 high;
  788. } u;
  789. };
  790. /**
  791. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  792. * @irq: irq number (not used)
  793. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  794. * @r: pt_regs pointer (not used)
  795. *
  796. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  797. */
  798. static irqreturn_t
  799. _base_interrupt(int irq, void *bus_id)
  800. {
  801. struct adapter_reply_queue *reply_q = bus_id;
  802. union reply_descriptor rd;
  803. u32 completed_cmds;
  804. u8 request_desript_type;
  805. u16 smid;
  806. u8 cb_idx;
  807. u32 reply;
  808. u8 msix_index = reply_q->msix_index;
  809. struct MPT2SAS_ADAPTER *ioc = reply_q->ioc;
  810. Mpi2ReplyDescriptorsUnion_t *rpf;
  811. u8 rc;
  812. if (ioc->mask_interrupts)
  813. return IRQ_NONE;
  814. if (!atomic_add_unless(&reply_q->busy, 1, 1))
  815. return IRQ_NONE;
  816. rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index];
  817. request_desript_type = rpf->Default.ReplyFlags
  818. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  819. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) {
  820. atomic_dec(&reply_q->busy);
  821. return IRQ_NONE;
  822. }
  823. completed_cmds = 0;
  824. cb_idx = 0xFF;
  825. do {
  826. rd.word = le64_to_cpu(rpf->Words);
  827. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  828. goto out;
  829. reply = 0;
  830. smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
  831. if (request_desript_type ==
  832. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  833. reply = le32_to_cpu
  834. (rpf->AddressReply.ReplyFrameAddress);
  835. if (reply > ioc->reply_dma_max_address ||
  836. reply < ioc->reply_dma_min_address)
  837. reply = 0;
  838. } else if (request_desript_type ==
  839. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  840. goto next;
  841. else if (request_desript_type ==
  842. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  843. goto next;
  844. if (smid)
  845. cb_idx = _base_get_cb_idx(ioc, smid);
  846. if (smid && cb_idx != 0xFF) {
  847. rc = mpt_callbacks[cb_idx](ioc, smid, msix_index,
  848. reply);
  849. if (reply)
  850. _base_display_reply_info(ioc, smid, msix_index,
  851. reply);
  852. if (rc)
  853. mpt2sas_base_free_smid(ioc, smid);
  854. }
  855. if (!smid)
  856. _base_async_event(ioc, msix_index, reply);
  857. /* reply free queue handling */
  858. if (reply) {
  859. ioc->reply_free_host_index =
  860. (ioc->reply_free_host_index ==
  861. (ioc->reply_free_queue_depth - 1)) ?
  862. 0 : ioc->reply_free_host_index + 1;
  863. ioc->reply_free[ioc->reply_free_host_index] =
  864. cpu_to_le32(reply);
  865. wmb();
  866. writel(ioc->reply_free_host_index,
  867. &ioc->chip->ReplyFreeHostIndex);
  868. }
  869. next:
  870. rpf->Words = cpu_to_le64(ULLONG_MAX);
  871. reply_q->reply_post_host_index =
  872. (reply_q->reply_post_host_index ==
  873. (ioc->reply_post_queue_depth - 1)) ? 0 :
  874. reply_q->reply_post_host_index + 1;
  875. request_desript_type =
  876. reply_q->reply_post_free[reply_q->reply_post_host_index].
  877. Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  878. completed_cmds++;
  879. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  880. goto out;
  881. if (!reply_q->reply_post_host_index)
  882. rpf = reply_q->reply_post_free;
  883. else
  884. rpf++;
  885. } while (1);
  886. out:
  887. if (!completed_cmds) {
  888. atomic_dec(&reply_q->busy);
  889. return IRQ_NONE;
  890. }
  891. wmb();
  892. if (ioc->is_warpdrive) {
  893. writel(reply_q->reply_post_host_index,
  894. ioc->reply_post_host_index[msix_index]);
  895. atomic_dec(&reply_q->busy);
  896. return IRQ_HANDLED;
  897. }
  898. writel(reply_q->reply_post_host_index | (msix_index <<
  899. MPI2_RPHI_MSIX_INDEX_SHIFT), &ioc->chip->ReplyPostHostIndex);
  900. atomic_dec(&reply_q->busy);
  901. return IRQ_HANDLED;
  902. }
  903. /**
  904. * _base_is_controller_msix_enabled - is controller support muli-reply queues
  905. * @ioc: per adapter object
  906. *
  907. */
  908. static inline int
  909. _base_is_controller_msix_enabled(struct MPT2SAS_ADAPTER *ioc)
  910. {
  911. return (ioc->facts.IOCCapabilities &
  912. MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
  913. }
  914. /**
  915. * mpt2sas_base_flush_reply_queues - flushing the MSIX reply queues
  916. * @ioc: per adapter object
  917. * Context: ISR conext
  918. *
  919. * Called when a Task Management request has completed. We want
  920. * to flush the other reply queues so all the outstanding IO has been
  921. * completed back to OS before we process the TM completetion.
  922. *
  923. * Return nothing.
  924. */
  925. void
  926. mpt2sas_base_flush_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  927. {
  928. struct adapter_reply_queue *reply_q;
  929. /* If MSIX capability is turned off
  930. * then multi-queues are not enabled
  931. */
  932. if (!_base_is_controller_msix_enabled(ioc))
  933. return;
  934. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  935. if (ioc->shost_recovery)
  936. return;
  937. /* TMs are on msix_index == 0 */
  938. if (reply_q->msix_index == 0)
  939. continue;
  940. _base_interrupt(reply_q->vector, (void *)reply_q);
  941. }
  942. }
  943. /**
  944. * mpt2sas_base_release_callback_handler - clear interrupt callback handler
  945. * @cb_idx: callback index
  946. *
  947. * Return nothing.
  948. */
  949. void
  950. mpt2sas_base_release_callback_handler(u8 cb_idx)
  951. {
  952. mpt_callbacks[cb_idx] = NULL;
  953. }
  954. /**
  955. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  956. * @cb_func: callback function
  957. *
  958. * Returns cb_func.
  959. */
  960. u8
  961. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  962. {
  963. u8 cb_idx;
  964. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  965. if (mpt_callbacks[cb_idx] == NULL)
  966. break;
  967. mpt_callbacks[cb_idx] = cb_func;
  968. return cb_idx;
  969. }
  970. /**
  971. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  972. *
  973. * Return nothing.
  974. */
  975. void
  976. mpt2sas_base_initialize_callback_handler(void)
  977. {
  978. u8 cb_idx;
  979. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  980. mpt2sas_base_release_callback_handler(cb_idx);
  981. }
  982. /**
  983. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  984. * @ioc: per adapter object
  985. * @paddr: virtual address for SGE
  986. *
  987. * Create a zero length scatter gather entry to insure the IOCs hardware has
  988. * something to use if the target device goes brain dead and tries
  989. * to send data even when none is asked for.
  990. *
  991. * Return nothing.
  992. */
  993. void
  994. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  995. {
  996. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  997. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  998. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  999. MPI2_SGE_FLAGS_SHIFT);
  1000. ioc->base_add_sg_single(paddr, flags_length, -1);
  1001. }
  1002. /**
  1003. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  1004. * @paddr: virtual address for SGE
  1005. * @flags_length: SGE flags and data transfer length
  1006. * @dma_addr: Physical address
  1007. *
  1008. * Return nothing.
  1009. */
  1010. static void
  1011. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  1012. {
  1013. Mpi2SGESimple32_t *sgel = paddr;
  1014. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  1015. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  1016. sgel->FlagsLength = cpu_to_le32(flags_length);
  1017. sgel->Address = cpu_to_le32(dma_addr);
  1018. }
  1019. /**
  1020. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  1021. * @paddr: virtual address for SGE
  1022. * @flags_length: SGE flags and data transfer length
  1023. * @dma_addr: Physical address
  1024. *
  1025. * Return nothing.
  1026. */
  1027. static void
  1028. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  1029. {
  1030. Mpi2SGESimple64_t *sgel = paddr;
  1031. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  1032. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  1033. sgel->FlagsLength = cpu_to_le32(flags_length);
  1034. sgel->Address = cpu_to_le64(dma_addr);
  1035. }
  1036. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  1037. /**
  1038. * _base_config_dma_addressing - set dma addressing
  1039. * @ioc: per adapter object
  1040. * @pdev: PCI device struct
  1041. *
  1042. * Returns 0 for success, non-zero for failure.
  1043. */
  1044. static int
  1045. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  1046. {
  1047. struct sysinfo s;
  1048. char *desc = NULL;
  1049. if (sizeof(dma_addr_t) > 4) {
  1050. const uint64_t required_mask =
  1051. dma_get_required_mask(&pdev->dev);
  1052. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  1053. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  1054. DMA_BIT_MASK(64))) {
  1055. ioc->base_add_sg_single = &_base_add_sg_single_64;
  1056. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  1057. desc = "64";
  1058. goto out;
  1059. }
  1060. }
  1061. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  1062. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  1063. ioc->base_add_sg_single = &_base_add_sg_single_32;
  1064. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  1065. desc = "32";
  1066. } else
  1067. return -ENODEV;
  1068. out:
  1069. si_meminfo(&s);
  1070. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  1071. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  1072. return 0;
  1073. }
  1074. /**
  1075. * _base_check_enable_msix - checks MSIX capabable.
  1076. * @ioc: per adapter object
  1077. *
  1078. * Check to see if card is capable of MSIX, and set number
  1079. * of available msix vectors
  1080. */
  1081. static int
  1082. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1083. {
  1084. int base;
  1085. u16 message_control;
  1086. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  1087. if (!base) {
  1088. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  1089. "supported\n", ioc->name));
  1090. return -EINVAL;
  1091. }
  1092. /* get msix vector count */
  1093. /* NUMA_IO not supported for older controllers */
  1094. if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
  1095. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
  1096. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
  1097. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
  1098. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
  1099. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
  1100. ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
  1101. ioc->msix_vector_count = 1;
  1102. else {
  1103. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  1104. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  1105. }
  1106. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  1107. "vector_count(%d)\n", ioc->name, ioc->msix_vector_count));
  1108. return 0;
  1109. }
  1110. /**
  1111. * _base_free_irq - free irq
  1112. * @ioc: per adapter object
  1113. *
  1114. * Freeing respective reply_queue from the list.
  1115. */
  1116. static void
  1117. _base_free_irq(struct MPT2SAS_ADAPTER *ioc)
  1118. {
  1119. struct adapter_reply_queue *reply_q, *next;
  1120. if (list_empty(&ioc->reply_queue_list))
  1121. return;
  1122. list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
  1123. list_del(&reply_q->list);
  1124. synchronize_irq(reply_q->vector);
  1125. free_irq(reply_q->vector, reply_q);
  1126. kfree(reply_q);
  1127. }
  1128. }
  1129. /**
  1130. * _base_request_irq - request irq
  1131. * @ioc: per adapter object
  1132. * @index: msix index into vector table
  1133. * @vector: irq vector
  1134. *
  1135. * Inserting respective reply_queue into the list.
  1136. */
  1137. static int
  1138. _base_request_irq(struct MPT2SAS_ADAPTER *ioc, u8 index, u32 vector)
  1139. {
  1140. struct adapter_reply_queue *reply_q;
  1141. int r;
  1142. reply_q = kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL);
  1143. if (!reply_q) {
  1144. printk(MPT2SAS_ERR_FMT "unable to allocate memory %d!\n",
  1145. ioc->name, (int)sizeof(struct adapter_reply_queue));
  1146. return -ENOMEM;
  1147. }
  1148. reply_q->ioc = ioc;
  1149. reply_q->msix_index = index;
  1150. reply_q->vector = vector;
  1151. atomic_set(&reply_q->busy, 0);
  1152. if (ioc->msix_enable)
  1153. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d",
  1154. MPT2SAS_DRIVER_NAME, ioc->id, index);
  1155. else
  1156. snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d",
  1157. MPT2SAS_DRIVER_NAME, ioc->id);
  1158. r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name,
  1159. reply_q);
  1160. if (r) {
  1161. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  1162. reply_q->name, vector);
  1163. kfree(reply_q);
  1164. return -EBUSY;
  1165. }
  1166. INIT_LIST_HEAD(&reply_q->list);
  1167. list_add_tail(&reply_q->list, &ioc->reply_queue_list);
  1168. return 0;
  1169. }
  1170. /**
  1171. * _base_assign_reply_queues - assigning msix index for each cpu
  1172. * @ioc: per adapter object
  1173. *
  1174. * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
  1175. *
  1176. * It would nice if we could call irq_set_affinity, however it is not
  1177. * an exported symbol
  1178. */
  1179. static void
  1180. _base_assign_reply_queues(struct MPT2SAS_ADAPTER *ioc)
  1181. {
  1182. struct adapter_reply_queue *reply_q;
  1183. int cpu_id;
  1184. int cpu_grouping, loop, grouping, grouping_mod;
  1185. if (!_base_is_controller_msix_enabled(ioc))
  1186. return;
  1187. memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
  1188. /* when there are more cpus than available msix vectors,
  1189. * then group cpus togeather on same irq
  1190. */
  1191. if (ioc->cpu_count > ioc->msix_vector_count) {
  1192. grouping = ioc->cpu_count / ioc->msix_vector_count;
  1193. grouping_mod = ioc->cpu_count % ioc->msix_vector_count;
  1194. if (grouping < 2 || (grouping == 2 && !grouping_mod))
  1195. cpu_grouping = 2;
  1196. else if (grouping < 4 || (grouping == 4 && !grouping_mod))
  1197. cpu_grouping = 4;
  1198. else if (grouping < 8 || (grouping == 8 && !grouping_mod))
  1199. cpu_grouping = 8;
  1200. else
  1201. cpu_grouping = 16;
  1202. } else
  1203. cpu_grouping = 0;
  1204. loop = 0;
  1205. reply_q = list_entry(ioc->reply_queue_list.next,
  1206. struct adapter_reply_queue, list);
  1207. for_each_online_cpu(cpu_id) {
  1208. if (!cpu_grouping) {
  1209. ioc->cpu_msix_table[cpu_id] = reply_q->msix_index;
  1210. reply_q = list_entry(reply_q->list.next,
  1211. struct adapter_reply_queue, list);
  1212. } else {
  1213. if (loop < cpu_grouping) {
  1214. ioc->cpu_msix_table[cpu_id] =
  1215. reply_q->msix_index;
  1216. loop++;
  1217. } else {
  1218. reply_q = list_entry(reply_q->list.next,
  1219. struct adapter_reply_queue, list);
  1220. ioc->cpu_msix_table[cpu_id] =
  1221. reply_q->msix_index;
  1222. loop = 1;
  1223. }
  1224. }
  1225. }
  1226. }
  1227. /**
  1228. * _base_disable_msix - disables msix
  1229. * @ioc: per adapter object
  1230. *
  1231. */
  1232. static void
  1233. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  1234. {
  1235. if (ioc->msix_enable) {
  1236. pci_disable_msix(ioc->pdev);
  1237. ioc->msix_enable = 0;
  1238. }
  1239. }
  1240. /**
  1241. * _base_enable_msix - enables msix, failback to io_apic
  1242. * @ioc: per adapter object
  1243. *
  1244. */
  1245. static int
  1246. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  1247. {
  1248. struct msix_entry *entries, *a;
  1249. int r;
  1250. int i;
  1251. u8 try_msix = 0;
  1252. INIT_LIST_HEAD(&ioc->reply_queue_list);
  1253. if (msix_disable == -1 || msix_disable == 0)
  1254. try_msix = 1;
  1255. if (!try_msix)
  1256. goto try_ioapic;
  1257. if (_base_check_enable_msix(ioc) != 0)
  1258. goto try_ioapic;
  1259. ioc->reply_queue_count = min_t(u8, ioc->cpu_count,
  1260. ioc->msix_vector_count);
  1261. entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
  1262. GFP_KERNEL);
  1263. if (!entries) {
  1264. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "kcalloc "
  1265. "failed @ at %s:%d/%s() !!!\n", ioc->name, __FILE__,
  1266. __LINE__, __func__));
  1267. goto try_ioapic;
  1268. }
  1269. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
  1270. a->entry = i;
  1271. r = pci_enable_msix(ioc->pdev, entries, ioc->reply_queue_count);
  1272. if (r) {
  1273. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  1274. "failed (r=%d) !!!\n", ioc->name, r));
  1275. kfree(entries);
  1276. goto try_ioapic;
  1277. }
  1278. ioc->msix_enable = 1;
  1279. for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
  1280. r = _base_request_irq(ioc, i, a->vector);
  1281. if (r) {
  1282. _base_free_irq(ioc);
  1283. _base_disable_msix(ioc);
  1284. kfree(entries);
  1285. goto try_ioapic;
  1286. }
  1287. }
  1288. kfree(entries);
  1289. return 0;
  1290. /* failback to io_apic interrupt routing */
  1291. try_ioapic:
  1292. r = _base_request_irq(ioc, 0, ioc->pdev->irq);
  1293. return r;
  1294. }
  1295. /**
  1296. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  1297. * @ioc: per adapter object
  1298. *
  1299. * Returns 0 for success, non-zero for failure.
  1300. */
  1301. int
  1302. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  1303. {
  1304. struct pci_dev *pdev = ioc->pdev;
  1305. u32 memap_sz;
  1306. u32 pio_sz;
  1307. int i, r = 0;
  1308. u64 pio_chip = 0;
  1309. u64 chip_phys = 0;
  1310. struct adapter_reply_queue *reply_q;
  1311. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n",
  1312. ioc->name, __func__));
  1313. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1314. if (pci_enable_device_mem(pdev)) {
  1315. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1316. "failed\n", ioc->name);
  1317. return -ENODEV;
  1318. }
  1319. if (pci_request_selected_regions(pdev, ioc->bars,
  1320. MPT2SAS_DRIVER_NAME)) {
  1321. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1322. "failed\n", ioc->name);
  1323. r = -ENODEV;
  1324. goto out_fail;
  1325. }
  1326. /* AER (Advanced Error Reporting) hooks */
  1327. pci_enable_pcie_error_reporting(pdev);
  1328. pci_set_master(pdev);
  1329. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1330. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1331. ioc->name, pci_name(pdev));
  1332. r = -ENODEV;
  1333. goto out_fail;
  1334. }
  1335. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1336. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  1337. if (pio_sz)
  1338. continue;
  1339. pio_chip = (u64)pci_resource_start(pdev, i);
  1340. pio_sz = pci_resource_len(pdev, i);
  1341. } else {
  1342. if (memap_sz)
  1343. continue;
  1344. /* verify memory resource is valid before using */
  1345. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  1346. ioc->chip_phys = pci_resource_start(pdev, i);
  1347. chip_phys = (u64)ioc->chip_phys;
  1348. memap_sz = pci_resource_len(pdev, i);
  1349. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1350. if (ioc->chip == NULL) {
  1351. printk(MPT2SAS_ERR_FMT "unable to map "
  1352. "adapter memory!\n", ioc->name);
  1353. r = -EINVAL;
  1354. goto out_fail;
  1355. }
  1356. }
  1357. }
  1358. }
  1359. _base_mask_interrupts(ioc);
  1360. r = _base_enable_msix(ioc);
  1361. if (r)
  1362. goto out_fail;
  1363. list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
  1364. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1365. reply_q->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1366. "IO-APIC enabled"), reply_q->vector);
  1367. printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
  1368. ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
  1369. printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n",
  1370. ioc->name, (unsigned long long)pio_chip, pio_sz);
  1371. /* Save PCI configuration state for recovery from PCI AER/EEH errors */
  1372. pci_save_state(pdev);
  1373. return 0;
  1374. out_fail:
  1375. if (ioc->chip_phys)
  1376. iounmap(ioc->chip);
  1377. ioc->chip_phys = 0;
  1378. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1379. pci_disable_pcie_error_reporting(pdev);
  1380. pci_disable_device(pdev);
  1381. return r;
  1382. }
  1383. /**
  1384. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1385. * @ioc: per adapter object
  1386. * @smid: system request message index(smid zero is invalid)
  1387. *
  1388. * Returns virt pointer to message frame.
  1389. */
  1390. void *
  1391. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1392. {
  1393. return (void *)(ioc->request + (smid * ioc->request_sz));
  1394. }
  1395. /**
  1396. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1397. * @ioc: per adapter object
  1398. * @smid: system request message index
  1399. *
  1400. * Returns virt pointer to sense buffer.
  1401. */
  1402. void *
  1403. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1404. {
  1405. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1406. }
  1407. /**
  1408. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1409. * @ioc: per adapter object
  1410. * @smid: system request message index
  1411. *
  1412. * Returns phys pointer to the low 32bit address of the sense buffer.
  1413. */
  1414. __le32
  1415. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1416. {
  1417. return cpu_to_le32(ioc->sense_dma +
  1418. ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1419. }
  1420. /**
  1421. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1422. * @ioc: per adapter object
  1423. * @phys_addr: lower 32 physical addr of the reply
  1424. *
  1425. * Converts 32bit lower physical addr into a virt address.
  1426. */
  1427. void *
  1428. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1429. {
  1430. if (!phys_addr)
  1431. return NULL;
  1432. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1433. }
  1434. /**
  1435. * mpt2sas_base_get_smid - obtain a free smid from internal queue
  1436. * @ioc: per adapter object
  1437. * @cb_idx: callback index
  1438. *
  1439. * Returns smid (zero is invalid)
  1440. */
  1441. u16
  1442. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1443. {
  1444. unsigned long flags;
  1445. struct request_tracker *request;
  1446. u16 smid;
  1447. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1448. if (list_empty(&ioc->internal_free_list)) {
  1449. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1450. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1451. ioc->name, __func__);
  1452. return 0;
  1453. }
  1454. request = list_entry(ioc->internal_free_list.next,
  1455. struct request_tracker, tracker_list);
  1456. request->cb_idx = cb_idx;
  1457. smid = request->smid;
  1458. list_del(&request->tracker_list);
  1459. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1460. return smid;
  1461. }
  1462. /**
  1463. * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
  1464. * @ioc: per adapter object
  1465. * @cb_idx: callback index
  1466. * @scmd: pointer to scsi command object
  1467. *
  1468. * Returns smid (zero is invalid)
  1469. */
  1470. u16
  1471. mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx,
  1472. struct scsi_cmnd *scmd)
  1473. {
  1474. unsigned long flags;
  1475. struct scsiio_tracker *request;
  1476. u16 smid;
  1477. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1478. if (list_empty(&ioc->free_list)) {
  1479. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1480. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1481. ioc->name, __func__);
  1482. return 0;
  1483. }
  1484. request = list_entry(ioc->free_list.next,
  1485. struct scsiio_tracker, tracker_list);
  1486. request->scmd = scmd;
  1487. request->cb_idx = cb_idx;
  1488. smid = request->smid;
  1489. list_del(&request->tracker_list);
  1490. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1491. return smid;
  1492. }
  1493. /**
  1494. * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
  1495. * @ioc: per adapter object
  1496. * @cb_idx: callback index
  1497. *
  1498. * Returns smid (zero is invalid)
  1499. */
  1500. u16
  1501. mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1502. {
  1503. unsigned long flags;
  1504. struct request_tracker *request;
  1505. u16 smid;
  1506. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1507. if (list_empty(&ioc->hpr_free_list)) {
  1508. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1509. return 0;
  1510. }
  1511. request = list_entry(ioc->hpr_free_list.next,
  1512. struct request_tracker, tracker_list);
  1513. request->cb_idx = cb_idx;
  1514. smid = request->smid;
  1515. list_del(&request->tracker_list);
  1516. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1517. return smid;
  1518. }
  1519. /**
  1520. * mpt2sas_base_free_smid - put smid back on free_list
  1521. * @ioc: per adapter object
  1522. * @smid: system request message index
  1523. *
  1524. * Return nothing.
  1525. */
  1526. void
  1527. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1528. {
  1529. unsigned long flags;
  1530. int i;
  1531. struct chain_tracker *chain_req, *next;
  1532. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1533. if (smid < ioc->hi_priority_smid) {
  1534. /* scsiio queue */
  1535. i = smid - 1;
  1536. if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
  1537. list_for_each_entry_safe(chain_req, next,
  1538. &ioc->scsi_lookup[i].chain_list, tracker_list) {
  1539. list_del_init(&chain_req->tracker_list);
  1540. list_add_tail(&chain_req->tracker_list,
  1541. &ioc->free_chain_list);
  1542. }
  1543. }
  1544. ioc->scsi_lookup[i].cb_idx = 0xFF;
  1545. ioc->scsi_lookup[i].scmd = NULL;
  1546. ioc->scsi_lookup[i].direct_io = 0;
  1547. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  1548. &ioc->free_list);
  1549. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1550. /*
  1551. * See _wait_for_commands_to_complete() call with regards
  1552. * to this code.
  1553. */
  1554. if (ioc->shost_recovery && ioc->pending_io_count) {
  1555. if (ioc->pending_io_count == 1)
  1556. wake_up(&ioc->reset_wq);
  1557. ioc->pending_io_count--;
  1558. }
  1559. return;
  1560. } else if (smid < ioc->internal_smid) {
  1561. /* hi-priority */
  1562. i = smid - ioc->hi_priority_smid;
  1563. ioc->hpr_lookup[i].cb_idx = 0xFF;
  1564. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  1565. &ioc->hpr_free_list);
  1566. } else if (smid <= ioc->hba_queue_depth) {
  1567. /* internal queue */
  1568. i = smid - ioc->internal_smid;
  1569. ioc->internal_lookup[i].cb_idx = 0xFF;
  1570. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  1571. &ioc->internal_free_list);
  1572. }
  1573. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1574. }
  1575. /**
  1576. * _base_writeq - 64 bit write to MMIO
  1577. * @ioc: per adapter object
  1578. * @b: data payload
  1579. * @addr: address in MMIO space
  1580. * @writeq_lock: spin lock
  1581. *
  1582. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1583. * care of 32 bit environment where its not quarenteed to send the entire word
  1584. * in one transfer.
  1585. */
  1586. #ifndef writeq
  1587. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1588. spinlock_t *writeq_lock)
  1589. {
  1590. unsigned long flags;
  1591. __u64 data_out = cpu_to_le64(b);
  1592. spin_lock_irqsave(writeq_lock, flags);
  1593. writel((u32)(data_out), addr);
  1594. writel((u32)(data_out >> 32), (addr + 4));
  1595. spin_unlock_irqrestore(writeq_lock, flags);
  1596. }
  1597. #else
  1598. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1599. spinlock_t *writeq_lock)
  1600. {
  1601. writeq(cpu_to_le64(b), addr);
  1602. }
  1603. #endif
  1604. static inline u8
  1605. _base_get_msix_index(struct MPT2SAS_ADAPTER *ioc)
  1606. {
  1607. return ioc->cpu_msix_table[smp_processor_id()];
  1608. }
  1609. /**
  1610. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1611. * @ioc: per adapter object
  1612. * @smid: system request message index
  1613. * @handle: device handle
  1614. *
  1615. * Return nothing.
  1616. */
  1617. void
  1618. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle)
  1619. {
  1620. Mpi2RequestDescriptorUnion_t descriptor;
  1621. u64 *request = (u64 *)&descriptor;
  1622. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1623. descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc);
  1624. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1625. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1626. descriptor.SCSIIO.LMID = 0;
  1627. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1628. &ioc->scsi_lookup_lock);
  1629. }
  1630. /**
  1631. * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware
  1632. * @ioc: per adapter object
  1633. * @smid: system request message index
  1634. *
  1635. * Return nothing.
  1636. */
  1637. void
  1638. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1639. {
  1640. Mpi2RequestDescriptorUnion_t descriptor;
  1641. u64 *request = (u64 *)&descriptor;
  1642. descriptor.HighPriority.RequestFlags =
  1643. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1644. descriptor.HighPriority.MSIxIndex = 0;
  1645. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1646. descriptor.HighPriority.LMID = 0;
  1647. descriptor.HighPriority.Reserved1 = 0;
  1648. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1649. &ioc->scsi_lookup_lock);
  1650. }
  1651. /**
  1652. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1653. * @ioc: per adapter object
  1654. * @smid: system request message index
  1655. *
  1656. * Return nothing.
  1657. */
  1658. void
  1659. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1660. {
  1661. Mpi2RequestDescriptorUnion_t descriptor;
  1662. u64 *request = (u64 *)&descriptor;
  1663. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1664. descriptor.Default.MSIxIndex = _base_get_msix_index(ioc);
  1665. descriptor.Default.SMID = cpu_to_le16(smid);
  1666. descriptor.Default.LMID = 0;
  1667. descriptor.Default.DescriptorTypeDependent = 0;
  1668. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1669. &ioc->scsi_lookup_lock);
  1670. }
  1671. /**
  1672. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1673. * @ioc: per adapter object
  1674. * @smid: system request message index
  1675. * @io_index: value used to track the IO
  1676. *
  1677. * Return nothing.
  1678. */
  1679. void
  1680. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1681. u16 io_index)
  1682. {
  1683. Mpi2RequestDescriptorUnion_t descriptor;
  1684. u64 *request = (u64 *)&descriptor;
  1685. descriptor.SCSITarget.RequestFlags =
  1686. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1687. descriptor.SCSITarget.MSIxIndex = _base_get_msix_index(ioc);
  1688. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1689. descriptor.SCSITarget.LMID = 0;
  1690. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1691. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1692. &ioc->scsi_lookup_lock);
  1693. }
  1694. /**
  1695. * _base_display_dell_branding - Disply branding string
  1696. * @ioc: per adapter object
  1697. *
  1698. * Return nothing.
  1699. */
  1700. static void
  1701. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1702. {
  1703. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1704. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1705. return;
  1706. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1707. switch (ioc->pdev->subsystem_device) {
  1708. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1709. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1710. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1711. break;
  1712. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1713. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1714. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1715. break;
  1716. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1717. strncpy(dell_branding,
  1718. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1719. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1720. break;
  1721. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1722. strncpy(dell_branding,
  1723. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1724. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1725. break;
  1726. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1727. strncpy(dell_branding,
  1728. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1729. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1730. break;
  1731. case MPT2SAS_DELL_PERC_H200_SSDID:
  1732. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1733. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1734. break;
  1735. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1736. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1737. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1738. break;
  1739. default:
  1740. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1741. break;
  1742. }
  1743. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1744. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1745. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1746. ioc->pdev->subsystem_device);
  1747. }
  1748. /**
  1749. * _base_display_intel_branding - Display branding string
  1750. * @ioc: per adapter object
  1751. *
  1752. * Return nothing.
  1753. */
  1754. static void
  1755. _base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc)
  1756. {
  1757. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
  1758. return;
  1759. switch (ioc->pdev->device) {
  1760. case MPI2_MFGPAGE_DEVID_SAS2008:
  1761. switch (ioc->pdev->subsystem_device) {
  1762. case MPT2SAS_INTEL_RMS2LL080_SSDID:
  1763. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1764. MPT2SAS_INTEL_RMS2LL080_BRANDING);
  1765. break;
  1766. case MPT2SAS_INTEL_RMS2LL040_SSDID:
  1767. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1768. MPT2SAS_INTEL_RMS2LL040_BRANDING);
  1769. break;
  1770. case MPT2SAS_INTEL_RAMSDALE_SSDID:
  1771. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1772. MPT2SAS_INTEL_RAMSDALE_BRANDING);
  1773. break;
  1774. default:
  1775. break;
  1776. }
  1777. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1778. switch (ioc->pdev->subsystem_device) {
  1779. case MPT2SAS_INTEL_RS25GB008_SSDID:
  1780. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1781. MPT2SAS_INTEL_RS25GB008_BRANDING);
  1782. break;
  1783. case MPT2SAS_INTEL_RMS25JB080_SSDID:
  1784. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1785. MPT2SAS_INTEL_RMS25JB080_BRANDING);
  1786. break;
  1787. case MPT2SAS_INTEL_RMS25JB040_SSDID:
  1788. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1789. MPT2SAS_INTEL_RMS25JB040_BRANDING);
  1790. break;
  1791. case MPT2SAS_INTEL_RMS25KB080_SSDID:
  1792. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1793. MPT2SAS_INTEL_RMS25KB080_BRANDING);
  1794. break;
  1795. case MPT2SAS_INTEL_RMS25KB040_SSDID:
  1796. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1797. MPT2SAS_INTEL_RMS25KB040_BRANDING);
  1798. break;
  1799. default:
  1800. break;
  1801. }
  1802. default:
  1803. break;
  1804. }
  1805. }
  1806. /**
  1807. * _base_display_hp_branding - Display branding string
  1808. * @ioc: per adapter object
  1809. *
  1810. * Return nothing.
  1811. */
  1812. static void
  1813. _base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc)
  1814. {
  1815. if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID)
  1816. return;
  1817. switch (ioc->pdev->device) {
  1818. case MPI2_MFGPAGE_DEVID_SAS2004:
  1819. switch (ioc->pdev->subsystem_device) {
  1820. case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID:
  1821. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1822. MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING);
  1823. break;
  1824. default:
  1825. break;
  1826. }
  1827. case MPI2_MFGPAGE_DEVID_SAS2308_2:
  1828. switch (ioc->pdev->subsystem_device) {
  1829. case MPT2SAS_HP_2_4_INTERNAL_SSDID:
  1830. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1831. MPT2SAS_HP_2_4_INTERNAL_BRANDING);
  1832. break;
  1833. case MPT2SAS_HP_2_4_EXTERNAL_SSDID:
  1834. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1835. MPT2SAS_HP_2_4_EXTERNAL_BRANDING);
  1836. break;
  1837. case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID:
  1838. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1839. MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING);
  1840. break;
  1841. case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID:
  1842. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  1843. MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING);
  1844. break;
  1845. default:
  1846. break;
  1847. }
  1848. default:
  1849. break;
  1850. }
  1851. }
  1852. /**
  1853. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1854. * @ioc: per adapter object
  1855. *
  1856. * Return nothing.
  1857. */
  1858. static void
  1859. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1860. {
  1861. int i = 0;
  1862. char desc[16];
  1863. u8 revision;
  1864. u32 iounit_pg1_flags;
  1865. u32 bios_version;
  1866. bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
  1867. pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
  1868. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1869. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1870. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1871. ioc->name, desc,
  1872. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1873. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1874. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1875. ioc->facts.FWVersion.Word & 0x000000FF,
  1876. revision,
  1877. (bios_version & 0xFF000000) >> 24,
  1878. (bios_version & 0x00FF0000) >> 16,
  1879. (bios_version & 0x0000FF00) >> 8,
  1880. bios_version & 0x000000FF);
  1881. _base_display_dell_branding(ioc);
  1882. _base_display_intel_branding(ioc);
  1883. _base_display_hp_branding(ioc);
  1884. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1885. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1886. printk("Initiator");
  1887. i++;
  1888. }
  1889. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1890. printk("%sTarget", i ? "," : "");
  1891. i++;
  1892. }
  1893. i = 0;
  1894. printk("), ");
  1895. printk("Capabilities=(");
  1896. if (!ioc->hide_ir_msg) {
  1897. if (ioc->facts.IOCCapabilities &
  1898. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1899. printk("Raid");
  1900. i++;
  1901. }
  1902. }
  1903. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1904. printk("%sTLR", i ? "," : "");
  1905. i++;
  1906. }
  1907. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1908. printk("%sMulticast", i ? "," : "");
  1909. i++;
  1910. }
  1911. if (ioc->facts.IOCCapabilities &
  1912. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1913. printk("%sBIDI Target", i ? "," : "");
  1914. i++;
  1915. }
  1916. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1917. printk("%sEEDP", i ? "," : "");
  1918. i++;
  1919. }
  1920. if (ioc->facts.IOCCapabilities &
  1921. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1922. printk("%sSnapshot Buffer", i ? "," : "");
  1923. i++;
  1924. }
  1925. if (ioc->facts.IOCCapabilities &
  1926. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1927. printk("%sDiag Trace Buffer", i ? "," : "");
  1928. i++;
  1929. }
  1930. if (ioc->facts.IOCCapabilities &
  1931. MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
  1932. printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : "");
  1933. i++;
  1934. }
  1935. if (ioc->facts.IOCCapabilities &
  1936. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1937. printk("%sTask Set Full", i ? "," : "");
  1938. i++;
  1939. }
  1940. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1941. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1942. printk("%sNCQ", i ? "," : "");
  1943. i++;
  1944. }
  1945. printk(")\n");
  1946. }
  1947. /**
  1948. * _base_update_missing_delay - change the missing delay timers
  1949. * @ioc: per adapter object
  1950. * @device_missing_delay: amount of time till device is reported missing
  1951. * @io_missing_delay: interval IO is returned when there is a missing device
  1952. *
  1953. * Return nothing.
  1954. *
  1955. * Passed on the command line, this function will modify the device missing
  1956. * delay, as well as the io missing delay. This should be called at driver
  1957. * load time.
  1958. */
  1959. static void
  1960. _base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc,
  1961. u16 device_missing_delay, u8 io_missing_delay)
  1962. {
  1963. u16 dmd, dmd_new, dmd_orignal;
  1964. u8 io_missing_delay_original;
  1965. u16 sz;
  1966. Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
  1967. Mpi2ConfigReply_t mpi_reply;
  1968. u8 num_phys = 0;
  1969. u16 ioc_status;
  1970. mpt2sas_config_get_number_hba_phys(ioc, &num_phys);
  1971. if (!num_phys)
  1972. return;
  1973. sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
  1974. sizeof(Mpi2SasIOUnit1PhyData_t));
  1975. sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
  1976. if (!sas_iounit_pg1) {
  1977. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1978. ioc->name, __FILE__, __LINE__, __func__);
  1979. goto out;
  1980. }
  1981. if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
  1982. sas_iounit_pg1, sz))) {
  1983. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1984. ioc->name, __FILE__, __LINE__, __func__);
  1985. goto out;
  1986. }
  1987. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
  1988. MPI2_IOCSTATUS_MASK;
  1989. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  1990. printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n",
  1991. ioc->name, __FILE__, __LINE__, __func__);
  1992. goto out;
  1993. }
  1994. /* device missing delay */
  1995. dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
  1996. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  1997. dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  1998. else
  1999. dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  2000. dmd_orignal = dmd;
  2001. if (device_missing_delay > 0x7F) {
  2002. dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
  2003. device_missing_delay;
  2004. dmd = dmd / 16;
  2005. dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
  2006. } else
  2007. dmd = device_missing_delay;
  2008. sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
  2009. /* io missing delay */
  2010. io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
  2011. sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
  2012. if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
  2013. sz)) {
  2014. if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
  2015. dmd_new = (dmd &
  2016. MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
  2017. else
  2018. dmd_new =
  2019. dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
  2020. printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), "
  2021. "new(%d)\n", ioc->name, dmd_orignal, dmd_new);
  2022. printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), "
  2023. "new(%d)\n", ioc->name, io_missing_delay_original,
  2024. io_missing_delay);
  2025. ioc->device_missing_delay = dmd_new;
  2026. ioc->io_missing_delay = io_missing_delay;
  2027. }
  2028. out:
  2029. kfree(sas_iounit_pg1);
  2030. }
  2031. /**
  2032. * _base_static_config_pages - static start of day config pages
  2033. * @ioc: per adapter object
  2034. *
  2035. * Return nothing.
  2036. */
  2037. static void
  2038. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  2039. {
  2040. Mpi2ConfigReply_t mpi_reply;
  2041. u32 iounit_pg1_flags;
  2042. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  2043. if (ioc->ir_firmware)
  2044. mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
  2045. &ioc->manu_pg10);
  2046. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  2047. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  2048. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  2049. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  2050. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  2051. _base_display_ioc_capabilities(ioc);
  2052. /*
  2053. * Enable task_set_full handling in iounit_pg1 when the
  2054. * facts capabilities indicate that its supported.
  2055. */
  2056. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  2057. if ((ioc->facts.IOCCapabilities &
  2058. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  2059. iounit_pg1_flags &=
  2060. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  2061. else
  2062. iounit_pg1_flags |=
  2063. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  2064. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  2065. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  2066. }
  2067. /**
  2068. * _base_release_memory_pools - release memory
  2069. * @ioc: per adapter object
  2070. *
  2071. * Free memory allocated from _base_allocate_memory_pools.
  2072. *
  2073. * Return nothing.
  2074. */
  2075. static void
  2076. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  2077. {
  2078. int i;
  2079. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2080. __func__));
  2081. if (ioc->request) {
  2082. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  2083. ioc->request, ioc->request_dma);
  2084. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  2085. ": free\n", ioc->name, ioc->request));
  2086. ioc->request = NULL;
  2087. }
  2088. if (ioc->sense) {
  2089. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  2090. if (ioc->sense_dma_pool)
  2091. pci_pool_destroy(ioc->sense_dma_pool);
  2092. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  2093. ": free\n", ioc->name, ioc->sense));
  2094. ioc->sense = NULL;
  2095. }
  2096. if (ioc->reply) {
  2097. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  2098. if (ioc->reply_dma_pool)
  2099. pci_pool_destroy(ioc->reply_dma_pool);
  2100. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  2101. ": free\n", ioc->name, ioc->reply));
  2102. ioc->reply = NULL;
  2103. }
  2104. if (ioc->reply_free) {
  2105. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  2106. ioc->reply_free_dma);
  2107. if (ioc->reply_free_dma_pool)
  2108. pci_pool_destroy(ioc->reply_free_dma_pool);
  2109. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  2110. "(0x%p): free\n", ioc->name, ioc->reply_free));
  2111. ioc->reply_free = NULL;
  2112. }
  2113. if (ioc->reply_post_free) {
  2114. pci_pool_free(ioc->reply_post_free_dma_pool,
  2115. ioc->reply_post_free, ioc->reply_post_free_dma);
  2116. if (ioc->reply_post_free_dma_pool)
  2117. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  2118. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2119. "reply_post_free_pool(0x%p): free\n", ioc->name,
  2120. ioc->reply_post_free));
  2121. ioc->reply_post_free = NULL;
  2122. }
  2123. if (ioc->config_page) {
  2124. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2125. "config_page(0x%p): free\n", ioc->name,
  2126. ioc->config_page));
  2127. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  2128. ioc->config_page, ioc->config_page_dma);
  2129. }
  2130. if (ioc->scsi_lookup) {
  2131. free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
  2132. ioc->scsi_lookup = NULL;
  2133. }
  2134. kfree(ioc->hpr_lookup);
  2135. kfree(ioc->internal_lookup);
  2136. if (ioc->chain_lookup) {
  2137. for (i = 0; i < ioc->chain_depth; i++) {
  2138. if (ioc->chain_lookup[i].chain_buffer)
  2139. pci_pool_free(ioc->chain_dma_pool,
  2140. ioc->chain_lookup[i].chain_buffer,
  2141. ioc->chain_lookup[i].chain_buffer_dma);
  2142. }
  2143. if (ioc->chain_dma_pool)
  2144. pci_pool_destroy(ioc->chain_dma_pool);
  2145. }
  2146. if (ioc->chain_lookup) {
  2147. free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
  2148. ioc->chain_lookup = NULL;
  2149. }
  2150. }
  2151. /**
  2152. * _base_allocate_memory_pools - allocate start of day memory pools
  2153. * @ioc: per adapter object
  2154. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2155. *
  2156. * Returns 0 success, anything else error
  2157. */
  2158. static int
  2159. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2160. {
  2161. struct mpt2sas_facts *facts;
  2162. u32 queue_size, queue_diff;
  2163. u16 max_sge_elements;
  2164. u16 num_of_reply_frames;
  2165. u16 chains_needed_per_io;
  2166. u32 sz, total_sz, reply_post_free_sz;
  2167. u32 retry_sz;
  2168. u16 max_request_credit;
  2169. int i;
  2170. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2171. __func__));
  2172. retry_sz = 0;
  2173. facts = &ioc->facts;
  2174. /* command line tunables for max sgl entries */
  2175. if (max_sgl_entries != -1) {
  2176. ioc->shost->sg_tablesize = (max_sgl_entries <
  2177. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  2178. MPT2SAS_SG_DEPTH;
  2179. } else {
  2180. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  2181. }
  2182. /* command line tunables for max controller queue depth */
  2183. if (max_queue_depth != -1)
  2184. max_request_credit = (max_queue_depth < facts->RequestCredit)
  2185. ? max_queue_depth : facts->RequestCredit;
  2186. else
  2187. max_request_credit = facts->RequestCredit;
  2188. ioc->hba_queue_depth = max_request_credit;
  2189. ioc->hi_priority_depth = facts->HighPriorityCredit;
  2190. ioc->internal_depth = ioc->hi_priority_depth + 5;
  2191. /* request frame size */
  2192. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  2193. /* reply frame size */
  2194. ioc->reply_sz = facts->ReplyFrameSize * 4;
  2195. retry_allocation:
  2196. total_sz = 0;
  2197. /* calculate number of sg elements left over in the 1st frame */
  2198. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  2199. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  2200. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  2201. /* now do the same for a chain buffer */
  2202. max_sge_elements = ioc->request_sz - ioc->sge_size;
  2203. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  2204. ioc->chain_offset_value_for_main_message =
  2205. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  2206. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  2207. /*
  2208. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  2209. */
  2210. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  2211. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  2212. + 1;
  2213. if (chains_needed_per_io > facts->MaxChainDepth) {
  2214. chains_needed_per_io = facts->MaxChainDepth;
  2215. ioc->shost->sg_tablesize = min_t(u16,
  2216. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  2217. * chains_needed_per_io), ioc->shost->sg_tablesize);
  2218. }
  2219. ioc->chains_needed_per_io = chains_needed_per_io;
  2220. /* reply free queue sizing - taking into account for events */
  2221. num_of_reply_frames = ioc->hba_queue_depth + 32;
  2222. /* number of replies frames can't be a multiple of 16 */
  2223. /* decrease number of reply frames by 1 */
  2224. if (!(num_of_reply_frames % 16))
  2225. num_of_reply_frames--;
  2226. /* calculate number of reply free queue entries
  2227. * (must be multiple of 16)
  2228. */
  2229. /* (we know reply_free_queue_depth is not a multiple of 16) */
  2230. queue_size = num_of_reply_frames;
  2231. queue_size += 16 - (queue_size % 16);
  2232. ioc->reply_free_queue_depth = queue_size;
  2233. /* reply descriptor post queue sizing */
  2234. /* this size should be the number of request frames + number of reply
  2235. * frames
  2236. */
  2237. queue_size = ioc->hba_queue_depth + num_of_reply_frames + 1;
  2238. /* round up to 16 byte boundary */
  2239. if (queue_size % 16)
  2240. queue_size += 16 - (queue_size % 16);
  2241. /* check against IOC maximum reply post queue depth */
  2242. if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
  2243. queue_diff = queue_size -
  2244. facts->MaxReplyDescriptorPostQueueDepth;
  2245. /* round queue_diff up to multiple of 16 */
  2246. if (queue_diff % 16)
  2247. queue_diff += 16 - (queue_diff % 16);
  2248. /* adjust hba_queue_depth, reply_free_queue_depth,
  2249. * and queue_size
  2250. */
  2251. ioc->hba_queue_depth -= (queue_diff / 2);
  2252. ioc->reply_free_queue_depth -= (queue_diff / 2);
  2253. queue_size = facts->MaxReplyDescriptorPostQueueDepth;
  2254. }
  2255. ioc->reply_post_queue_depth = queue_size;
  2256. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  2257. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  2258. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  2259. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  2260. ioc->chains_needed_per_io));
  2261. ioc->scsiio_depth = ioc->hba_queue_depth -
  2262. ioc->hi_priority_depth - ioc->internal_depth;
  2263. /* set the scsi host can_queue depth
  2264. * with some internal commands that could be outstanding
  2265. */
  2266. ioc->shost->can_queue = ioc->scsiio_depth - (2);
  2267. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: "
  2268. "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue));
  2269. /* contiguous pool for request and chains, 16 byte align, one extra "
  2270. * "frame for smid=0
  2271. */
  2272. ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
  2273. sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
  2274. /* hi-priority queue */
  2275. sz += (ioc->hi_priority_depth * ioc->request_sz);
  2276. /* internal queue */
  2277. sz += (ioc->internal_depth * ioc->request_sz);
  2278. ioc->request_dma_sz = sz;
  2279. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  2280. if (!ioc->request) {
  2281. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2282. "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2283. "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
  2284. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2285. if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  2286. goto out;
  2287. retry_sz += 64;
  2288. ioc->hba_queue_depth = max_request_credit - retry_sz;
  2289. goto retry_allocation;
  2290. }
  2291. if (retry_sz)
  2292. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  2293. "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
  2294. "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
  2295. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  2296. /* hi-priority queue */
  2297. ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
  2298. ioc->request_sz);
  2299. ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
  2300. ioc->request_sz);
  2301. /* internal queue */
  2302. ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
  2303. ioc->request_sz);
  2304. ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
  2305. ioc->request_sz);
  2306. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  2307. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2308. ioc->request, ioc->hba_queue_depth, ioc->request_sz,
  2309. (ioc->hba_queue_depth * ioc->request_sz)/1024));
  2310. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  2311. ioc->name, (unsigned long long) ioc->request_dma));
  2312. total_sz += sz;
  2313. sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
  2314. ioc->scsi_lookup_pages = get_order(sz);
  2315. ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
  2316. GFP_KERNEL, ioc->scsi_lookup_pages);
  2317. if (!ioc->scsi_lookup) {
  2318. printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, "
  2319. "sz(%d)\n", ioc->name, (int)sz);
  2320. goto out;
  2321. }
  2322. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): "
  2323. "depth(%d)\n", ioc->name, ioc->request,
  2324. ioc->scsiio_depth));
  2325. /* loop till the allocation succeeds */
  2326. do {
  2327. sz = ioc->chain_depth * sizeof(struct chain_tracker);
  2328. ioc->chain_pages = get_order(sz);
  2329. ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
  2330. GFP_KERNEL, ioc->chain_pages);
  2331. if (ioc->chain_lookup == NULL)
  2332. ioc->chain_depth -= 100;
  2333. } while (ioc->chain_lookup == NULL);
  2334. ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
  2335. ioc->request_sz, 16, 0);
  2336. if (!ioc->chain_dma_pool) {
  2337. printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create "
  2338. "failed\n", ioc->name);
  2339. goto out;
  2340. }
  2341. for (i = 0; i < ioc->chain_depth; i++) {
  2342. ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
  2343. ioc->chain_dma_pool , GFP_KERNEL,
  2344. &ioc->chain_lookup[i].chain_buffer_dma);
  2345. if (!ioc->chain_lookup[i].chain_buffer) {
  2346. ioc->chain_depth = i;
  2347. goto chain_done;
  2348. }
  2349. total_sz += ioc->request_sz;
  2350. }
  2351. chain_done:
  2352. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth"
  2353. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  2354. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  2355. ioc->request_sz))/1024));
  2356. /* initialize hi-priority queue smid's */
  2357. ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
  2358. sizeof(struct request_tracker), GFP_KERNEL);
  2359. if (!ioc->hpr_lookup) {
  2360. printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n",
  2361. ioc->name);
  2362. goto out;
  2363. }
  2364. ioc->hi_priority_smid = ioc->scsiio_depth + 1;
  2365. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): "
  2366. "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority,
  2367. ioc->hi_priority_depth, ioc->hi_priority_smid));
  2368. /* initialize internal queue smid's */
  2369. ioc->internal_lookup = kcalloc(ioc->internal_depth,
  2370. sizeof(struct request_tracker), GFP_KERNEL);
  2371. if (!ioc->internal_lookup) {
  2372. printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n",
  2373. ioc->name);
  2374. goto out;
  2375. }
  2376. ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
  2377. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): "
  2378. "depth(%d), start smid(%d)\n", ioc->name, ioc->internal,
  2379. ioc->internal_depth, ioc->internal_smid));
  2380. /* sense buffers, 4 byte align */
  2381. sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
  2382. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  2383. 0);
  2384. if (!ioc->sense_dma_pool) {
  2385. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  2386. ioc->name);
  2387. goto out;
  2388. }
  2389. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  2390. &ioc->sense_dma);
  2391. if (!ioc->sense) {
  2392. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  2393. ioc->name);
  2394. goto out;
  2395. }
  2396. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  2397. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  2398. "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
  2399. SCSI_SENSE_BUFFERSIZE, sz/1024));
  2400. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  2401. ioc->name, (unsigned long long)ioc->sense_dma));
  2402. total_sz += sz;
  2403. /* reply pool, 4 byte align */
  2404. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  2405. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  2406. 0);
  2407. if (!ioc->reply_dma_pool) {
  2408. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  2409. ioc->name);
  2410. goto out;
  2411. }
  2412. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  2413. &ioc->reply_dma);
  2414. if (!ioc->reply) {
  2415. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  2416. ioc->name);
  2417. goto out;
  2418. }
  2419. ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
  2420. ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
  2421. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  2422. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  2423. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  2424. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  2425. ioc->name, (unsigned long long)ioc->reply_dma));
  2426. total_sz += sz;
  2427. /* reply free queue, 16 byte align */
  2428. sz = ioc->reply_free_queue_depth * 4;
  2429. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  2430. ioc->pdev, sz, 16, 0);
  2431. if (!ioc->reply_free_dma_pool) {
  2432. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  2433. "failed\n", ioc->name);
  2434. goto out;
  2435. }
  2436. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  2437. &ioc->reply_free_dma);
  2438. if (!ioc->reply_free) {
  2439. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  2440. "failed\n", ioc->name);
  2441. goto out;
  2442. }
  2443. memset(ioc->reply_free, 0, sz);
  2444. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  2445. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  2446. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  2447. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  2448. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  2449. total_sz += sz;
  2450. /* reply post queue, 16 byte align */
  2451. reply_post_free_sz = ioc->reply_post_queue_depth *
  2452. sizeof(Mpi2DefaultReplyDescriptor_t);
  2453. if (_base_is_controller_msix_enabled(ioc))
  2454. sz = reply_post_free_sz * ioc->reply_queue_count;
  2455. else
  2456. sz = reply_post_free_sz;
  2457. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  2458. ioc->pdev, sz, 16, 0);
  2459. if (!ioc->reply_post_free_dma_pool) {
  2460. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  2461. "failed\n", ioc->name);
  2462. goto out;
  2463. }
  2464. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  2465. GFP_KERNEL, &ioc->reply_post_free_dma);
  2466. if (!ioc->reply_post_free) {
  2467. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  2468. "failed\n", ioc->name);
  2469. goto out;
  2470. }
  2471. memset(ioc->reply_post_free, 0, sz);
  2472. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  2473. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  2474. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  2475. sz/1024));
  2476. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  2477. "(0x%llx)\n", ioc->name, (unsigned long long)
  2478. ioc->reply_post_free_dma));
  2479. total_sz += sz;
  2480. ioc->config_page_sz = 512;
  2481. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  2482. ioc->config_page_sz, &ioc->config_page_dma);
  2483. if (!ioc->config_page) {
  2484. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  2485. "failed\n", ioc->name);
  2486. goto out;
  2487. }
  2488. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  2489. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  2490. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  2491. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  2492. total_sz += ioc->config_page_sz;
  2493. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  2494. ioc->name, total_sz/1024);
  2495. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  2496. "Max Controller Queue Depth(%d)\n",
  2497. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  2498. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  2499. ioc->name, ioc->shost->sg_tablesize);
  2500. return 0;
  2501. out:
  2502. return -ENOMEM;
  2503. }
  2504. /**
  2505. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  2506. * @ioc: Pointer to MPT_ADAPTER structure
  2507. * @cooked: Request raw or cooked IOC state
  2508. *
  2509. * Returns all IOC Doorbell register bits if cooked==0, else just the
  2510. * Doorbell bits in MPI_IOC_STATE_MASK.
  2511. */
  2512. u32
  2513. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  2514. {
  2515. u32 s, sc;
  2516. s = readl(&ioc->chip->Doorbell);
  2517. sc = s & MPI2_IOC_STATE_MASK;
  2518. return cooked ? sc : s;
  2519. }
  2520. /**
  2521. * _base_wait_on_iocstate - waiting on a particular ioc state
  2522. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  2523. * @timeout: timeout in second
  2524. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2525. *
  2526. * Returns 0 for success, non-zero for failure.
  2527. */
  2528. static int
  2529. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  2530. int sleep_flag)
  2531. {
  2532. u32 count, cntdn;
  2533. u32 current_state;
  2534. count = 0;
  2535. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2536. do {
  2537. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  2538. if (current_state == ioc_state)
  2539. return 0;
  2540. if (count && current_state == MPI2_IOC_STATE_FAULT)
  2541. break;
  2542. if (sleep_flag == CAN_SLEEP)
  2543. msleep(1);
  2544. else
  2545. udelay(500);
  2546. count++;
  2547. } while (--cntdn);
  2548. return current_state;
  2549. }
  2550. /**
  2551. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  2552. * a write to the doorbell)
  2553. * @ioc: per adapter object
  2554. * @timeout: timeout in second
  2555. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2556. *
  2557. * Returns 0 for success, non-zero for failure.
  2558. *
  2559. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  2560. */
  2561. static int
  2562. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2563. int sleep_flag)
  2564. {
  2565. u32 cntdn, count;
  2566. u32 int_status;
  2567. count = 0;
  2568. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2569. do {
  2570. int_status = readl(&ioc->chip->HostInterruptStatus);
  2571. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2572. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2573. "successful count(%d), timeout(%d)\n", ioc->name,
  2574. __func__, count, timeout));
  2575. return 0;
  2576. }
  2577. if (sleep_flag == CAN_SLEEP)
  2578. msleep(1);
  2579. else
  2580. udelay(500);
  2581. count++;
  2582. } while (--cntdn);
  2583. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2584. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2585. return -EFAULT;
  2586. }
  2587. /**
  2588. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  2589. * @ioc: per adapter object
  2590. * @timeout: timeout in second
  2591. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2592. *
  2593. * Returns 0 for success, non-zero for failure.
  2594. *
  2595. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  2596. * doorbell.
  2597. */
  2598. static int
  2599. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2600. int sleep_flag)
  2601. {
  2602. u32 cntdn, count;
  2603. u32 int_status;
  2604. u32 doorbell;
  2605. count = 0;
  2606. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2607. do {
  2608. int_status = readl(&ioc->chip->HostInterruptStatus);
  2609. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  2610. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2611. "successful count(%d), timeout(%d)\n", ioc->name,
  2612. __func__, count, timeout));
  2613. return 0;
  2614. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  2615. doorbell = readl(&ioc->chip->Doorbell);
  2616. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  2617. MPI2_IOC_STATE_FAULT) {
  2618. mpt2sas_base_fault_info(ioc , doorbell);
  2619. return -EFAULT;
  2620. }
  2621. } else if (int_status == 0xFFFFFFFF)
  2622. goto out;
  2623. if (sleep_flag == CAN_SLEEP)
  2624. msleep(1);
  2625. else
  2626. udelay(500);
  2627. count++;
  2628. } while (--cntdn);
  2629. out:
  2630. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2631. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  2632. return -EFAULT;
  2633. }
  2634. /**
  2635. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  2636. * @ioc: per adapter object
  2637. * @timeout: timeout in second
  2638. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2639. *
  2640. * Returns 0 for success, non-zero for failure.
  2641. *
  2642. */
  2643. static int
  2644. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  2645. int sleep_flag)
  2646. {
  2647. u32 cntdn, count;
  2648. u32 doorbell_reg;
  2649. count = 0;
  2650. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  2651. do {
  2652. doorbell_reg = readl(&ioc->chip->Doorbell);
  2653. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  2654. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  2655. "successful count(%d), timeout(%d)\n", ioc->name,
  2656. __func__, count, timeout));
  2657. return 0;
  2658. }
  2659. if (sleep_flag == CAN_SLEEP)
  2660. msleep(1);
  2661. else
  2662. udelay(500);
  2663. count++;
  2664. } while (--cntdn);
  2665. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  2666. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  2667. return -EFAULT;
  2668. }
  2669. /**
  2670. * _base_send_ioc_reset - send doorbell reset
  2671. * @ioc: per adapter object
  2672. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  2673. * @timeout: timeout in second
  2674. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2675. *
  2676. * Returns 0 for success, non-zero for failure.
  2677. */
  2678. static int
  2679. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  2680. int sleep_flag)
  2681. {
  2682. u32 ioc_state;
  2683. int r = 0;
  2684. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  2685. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  2686. ioc->name, __func__);
  2687. return -EFAULT;
  2688. }
  2689. if (!(ioc->facts.IOCCapabilities &
  2690. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  2691. return -EFAULT;
  2692. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  2693. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  2694. &ioc->chip->Doorbell);
  2695. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  2696. r = -EFAULT;
  2697. goto out;
  2698. }
  2699. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  2700. timeout, sleep_flag);
  2701. if (ioc_state) {
  2702. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2703. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2704. r = -EFAULT;
  2705. goto out;
  2706. }
  2707. out:
  2708. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  2709. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2710. return r;
  2711. }
  2712. /**
  2713. * _base_handshake_req_reply_wait - send request thru doorbell interface
  2714. * @ioc: per adapter object
  2715. * @request_bytes: request length
  2716. * @request: pointer having request payload
  2717. * @reply_bytes: reply length
  2718. * @reply: pointer to reply payload
  2719. * @timeout: timeout in second
  2720. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2721. *
  2722. * Returns 0 for success, non-zero for failure.
  2723. */
  2724. static int
  2725. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  2726. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  2727. {
  2728. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  2729. int i;
  2730. u8 failed;
  2731. u16 dummy;
  2732. __le32 *mfp;
  2733. /* make sure doorbell is not in use */
  2734. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  2735. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  2736. " (line=%d)\n", ioc->name, __LINE__);
  2737. return -EFAULT;
  2738. }
  2739. /* clear pending doorbell interrupts from previous state changes */
  2740. if (readl(&ioc->chip->HostInterruptStatus) &
  2741. MPI2_HIS_IOC2SYS_DB_STATUS)
  2742. writel(0, &ioc->chip->HostInterruptStatus);
  2743. /* send message to ioc */
  2744. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2745. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2746. &ioc->chip->Doorbell);
  2747. if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
  2748. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2749. "int failed (line=%d)\n", ioc->name, __LINE__);
  2750. return -EFAULT;
  2751. }
  2752. writel(0, &ioc->chip->HostInterruptStatus);
  2753. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2754. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2755. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2756. return -EFAULT;
  2757. }
  2758. /* send message 32-bits at a time */
  2759. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2760. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2761. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2762. failed = 1;
  2763. }
  2764. if (failed) {
  2765. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2766. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2767. return -EFAULT;
  2768. }
  2769. /* now wait for the reply */
  2770. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2771. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2772. "int failed (line=%d)\n", ioc->name, __LINE__);
  2773. return -EFAULT;
  2774. }
  2775. /* read the first two 16-bits, it gives the total length of the reply */
  2776. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2777. & MPI2_DOORBELL_DATA_MASK);
  2778. writel(0, &ioc->chip->HostInterruptStatus);
  2779. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2780. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2781. "int failed (line=%d)\n", ioc->name, __LINE__);
  2782. return -EFAULT;
  2783. }
  2784. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2785. & MPI2_DOORBELL_DATA_MASK);
  2786. writel(0, &ioc->chip->HostInterruptStatus);
  2787. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2788. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2789. printk(MPT2SAS_ERR_FMT "doorbell "
  2790. "handshake int failed (line=%d)\n", ioc->name,
  2791. __LINE__);
  2792. return -EFAULT;
  2793. }
  2794. if (i >= reply_bytes/2) /* overflow case */
  2795. dummy = readl(&ioc->chip->Doorbell);
  2796. else
  2797. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2798. & MPI2_DOORBELL_DATA_MASK);
  2799. writel(0, &ioc->chip->HostInterruptStatus);
  2800. }
  2801. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2802. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2803. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2804. " (line=%d)\n", ioc->name, __LINE__));
  2805. }
  2806. writel(0, &ioc->chip->HostInterruptStatus);
  2807. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2808. mfp = (__le32 *)reply;
  2809. printk(KERN_INFO "\toffset:data\n");
  2810. for (i = 0; i < reply_bytes/4; i++)
  2811. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  2812. le32_to_cpu(mfp[i]));
  2813. }
  2814. return 0;
  2815. }
  2816. /**
  2817. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2818. * @ioc: per adapter object
  2819. * @mpi_reply: the reply payload from FW
  2820. * @mpi_request: the request payload sent to FW
  2821. *
  2822. * The SAS IO Unit Control Request message allows the host to perform low-level
  2823. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2824. * to obtain the IOC assigned device handles for a device if it has other
  2825. * identifying information about the device, in addition allows the host to
  2826. * remove IOC resources associated with the device.
  2827. *
  2828. * Returns 0 for success, non-zero for failure.
  2829. */
  2830. int
  2831. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2832. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2833. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2834. {
  2835. u16 smid;
  2836. u32 ioc_state;
  2837. unsigned long timeleft;
  2838. u8 issue_reset;
  2839. int rc;
  2840. void *request;
  2841. u16 wait_state_count;
  2842. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2843. __func__));
  2844. mutex_lock(&ioc->base_cmds.mutex);
  2845. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2846. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2847. ioc->name, __func__);
  2848. rc = -EAGAIN;
  2849. goto out;
  2850. }
  2851. wait_state_count = 0;
  2852. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2853. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2854. if (wait_state_count++ == 10) {
  2855. printk(MPT2SAS_ERR_FMT
  2856. "%s: failed due to ioc not operational\n",
  2857. ioc->name, __func__);
  2858. rc = -EFAULT;
  2859. goto out;
  2860. }
  2861. ssleep(1);
  2862. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2863. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2864. "operational state(count=%d)\n", ioc->name,
  2865. __func__, wait_state_count);
  2866. }
  2867. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2868. if (!smid) {
  2869. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2870. ioc->name, __func__);
  2871. rc = -EAGAIN;
  2872. goto out;
  2873. }
  2874. rc = 0;
  2875. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2876. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2877. ioc->base_cmds.smid = smid;
  2878. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2879. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2880. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2881. ioc->ioc_link_reset_in_progress = 1;
  2882. init_completion(&ioc->base_cmds.done);
  2883. mpt2sas_base_put_smid_default(ioc, smid);
  2884. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2885. msecs_to_jiffies(10000));
  2886. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2887. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2888. ioc->ioc_link_reset_in_progress)
  2889. ioc->ioc_link_reset_in_progress = 0;
  2890. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2891. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2892. ioc->name, __func__);
  2893. _debug_dump_mf(mpi_request,
  2894. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2895. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2896. issue_reset = 1;
  2897. goto issue_host_reset;
  2898. }
  2899. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2900. memcpy(mpi_reply, ioc->base_cmds.reply,
  2901. sizeof(Mpi2SasIoUnitControlReply_t));
  2902. else
  2903. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2904. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2905. goto out;
  2906. issue_host_reset:
  2907. if (issue_reset)
  2908. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2909. FORCE_BIG_HAMMER);
  2910. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2911. rc = -EFAULT;
  2912. out:
  2913. mutex_unlock(&ioc->base_cmds.mutex);
  2914. return rc;
  2915. }
  2916. /**
  2917. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2918. * @ioc: per adapter object
  2919. * @mpi_reply: the reply payload from FW
  2920. * @mpi_request: the request payload sent to FW
  2921. *
  2922. * The SCSI Enclosure Processor request message causes the IOC to
  2923. * communicate with SES devices to control LED status signals.
  2924. *
  2925. * Returns 0 for success, non-zero for failure.
  2926. */
  2927. int
  2928. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2929. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2930. {
  2931. u16 smid;
  2932. u32 ioc_state;
  2933. unsigned long timeleft;
  2934. u8 issue_reset;
  2935. int rc;
  2936. void *request;
  2937. u16 wait_state_count;
  2938. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  2939. __func__));
  2940. mutex_lock(&ioc->base_cmds.mutex);
  2941. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2942. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2943. ioc->name, __func__);
  2944. rc = -EAGAIN;
  2945. goto out;
  2946. }
  2947. wait_state_count = 0;
  2948. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2949. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2950. if (wait_state_count++ == 10) {
  2951. printk(MPT2SAS_ERR_FMT
  2952. "%s: failed due to ioc not operational\n",
  2953. ioc->name, __func__);
  2954. rc = -EFAULT;
  2955. goto out;
  2956. }
  2957. ssleep(1);
  2958. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2959. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2960. "operational state(count=%d)\n", ioc->name,
  2961. __func__, wait_state_count);
  2962. }
  2963. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2964. if (!smid) {
  2965. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2966. ioc->name, __func__);
  2967. rc = -EAGAIN;
  2968. goto out;
  2969. }
  2970. rc = 0;
  2971. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2972. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2973. ioc->base_cmds.smid = smid;
  2974. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2975. init_completion(&ioc->base_cmds.done);
  2976. mpt2sas_base_put_smid_default(ioc, smid);
  2977. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2978. msecs_to_jiffies(10000));
  2979. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2980. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2981. ioc->name, __func__);
  2982. _debug_dump_mf(mpi_request,
  2983. sizeof(Mpi2SepRequest_t)/4);
  2984. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2985. issue_reset = 1;
  2986. goto issue_host_reset;
  2987. }
  2988. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2989. memcpy(mpi_reply, ioc->base_cmds.reply,
  2990. sizeof(Mpi2SepReply_t));
  2991. else
  2992. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2993. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2994. goto out;
  2995. issue_host_reset:
  2996. if (issue_reset)
  2997. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2998. FORCE_BIG_HAMMER);
  2999. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3000. rc = -EFAULT;
  3001. out:
  3002. mutex_unlock(&ioc->base_cmds.mutex);
  3003. return rc;
  3004. }
  3005. /**
  3006. * _base_get_port_facts - obtain port facts reply and save in ioc
  3007. * @ioc: per adapter object
  3008. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3009. *
  3010. * Returns 0 for success, non-zero for failure.
  3011. */
  3012. static int
  3013. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  3014. {
  3015. Mpi2PortFactsRequest_t mpi_request;
  3016. Mpi2PortFactsReply_t mpi_reply;
  3017. struct mpt2sas_port_facts *pfacts;
  3018. int mpi_reply_sz, mpi_request_sz, r;
  3019. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3020. __func__));
  3021. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  3022. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  3023. memset(&mpi_request, 0, mpi_request_sz);
  3024. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  3025. mpi_request.PortNumber = port;
  3026. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  3027. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  3028. if (r != 0) {
  3029. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3030. ioc->name, __func__, r);
  3031. return r;
  3032. }
  3033. pfacts = &ioc->pfacts[port];
  3034. memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
  3035. pfacts->PortNumber = mpi_reply.PortNumber;
  3036. pfacts->VP_ID = mpi_reply.VP_ID;
  3037. pfacts->VF_ID = mpi_reply.VF_ID;
  3038. pfacts->MaxPostedCmdBuffers =
  3039. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  3040. return 0;
  3041. }
  3042. /**
  3043. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  3044. * @ioc: per adapter object
  3045. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3046. *
  3047. * Returns 0 for success, non-zero for failure.
  3048. */
  3049. static int
  3050. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3051. {
  3052. Mpi2IOCFactsRequest_t mpi_request;
  3053. Mpi2IOCFactsReply_t mpi_reply;
  3054. struct mpt2sas_facts *facts;
  3055. int mpi_reply_sz, mpi_request_sz, r;
  3056. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3057. __func__));
  3058. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  3059. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  3060. memset(&mpi_request, 0, mpi_request_sz);
  3061. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  3062. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  3063. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  3064. if (r != 0) {
  3065. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3066. ioc->name, __func__, r);
  3067. return r;
  3068. }
  3069. facts = &ioc->facts;
  3070. memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
  3071. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  3072. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  3073. facts->VP_ID = mpi_reply.VP_ID;
  3074. facts->VF_ID = mpi_reply.VF_ID;
  3075. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  3076. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  3077. facts->WhoInit = mpi_reply.WhoInit;
  3078. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  3079. facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors;
  3080. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  3081. facts->MaxReplyDescriptorPostQueueDepth =
  3082. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  3083. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  3084. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  3085. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  3086. ioc->ir_firmware = 1;
  3087. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  3088. facts->IOCRequestFrameSize =
  3089. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  3090. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  3091. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  3092. ioc->shost->max_id = -1;
  3093. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  3094. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  3095. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  3096. facts->HighPriorityCredit =
  3097. le16_to_cpu(mpi_reply.HighPriorityCredit);
  3098. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  3099. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  3100. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  3101. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  3102. facts->MaxChainDepth));
  3103. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  3104. "reply frame size(%d)\n", ioc->name,
  3105. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  3106. return 0;
  3107. }
  3108. /**
  3109. * _base_send_ioc_init - send ioc_init to firmware
  3110. * @ioc: per adapter object
  3111. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3112. *
  3113. * Returns 0 for success, non-zero for failure.
  3114. */
  3115. static int
  3116. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3117. {
  3118. Mpi2IOCInitRequest_t mpi_request;
  3119. Mpi2IOCInitReply_t mpi_reply;
  3120. int r;
  3121. struct timeval current_time;
  3122. u16 ioc_status;
  3123. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3124. __func__));
  3125. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  3126. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  3127. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  3128. mpi_request.VF_ID = 0; /* TODO */
  3129. mpi_request.VP_ID = 0;
  3130. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  3131. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  3132. if (_base_is_controller_msix_enabled(ioc))
  3133. mpi_request.HostMSIxVectors = ioc->reply_queue_count;
  3134. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  3135. mpi_request.ReplyDescriptorPostQueueDepth =
  3136. cpu_to_le16(ioc->reply_post_queue_depth);
  3137. mpi_request.ReplyFreeQueueDepth =
  3138. cpu_to_le16(ioc->reply_free_queue_depth);
  3139. mpi_request.SenseBufferAddressHigh =
  3140. cpu_to_le32((u64)ioc->sense_dma >> 32);
  3141. mpi_request.SystemReplyAddressHigh =
  3142. cpu_to_le32((u64)ioc->reply_dma >> 32);
  3143. mpi_request.SystemRequestFrameBaseAddress =
  3144. cpu_to_le64((u64)ioc->request_dma);
  3145. mpi_request.ReplyFreeQueueAddress =
  3146. cpu_to_le64((u64)ioc->reply_free_dma);
  3147. mpi_request.ReplyDescriptorPostQueueAddress =
  3148. cpu_to_le64((u64)ioc->reply_post_free_dma);
  3149. /* This time stamp specifies number of milliseconds
  3150. * since epoch ~ midnight January 1, 1970.
  3151. */
  3152. do_gettimeofday(&current_time);
  3153. mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
  3154. (current_time.tv_usec / 1000));
  3155. if (ioc->logging_level & MPT_DEBUG_INIT) {
  3156. __le32 *mfp;
  3157. int i;
  3158. mfp = (__le32 *)&mpi_request;
  3159. printk(KERN_INFO "\toffset:data\n");
  3160. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  3161. printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4,
  3162. le32_to_cpu(mfp[i]));
  3163. }
  3164. r = _base_handshake_req_reply_wait(ioc,
  3165. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  3166. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  3167. sleep_flag);
  3168. if (r != 0) {
  3169. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  3170. ioc->name, __func__, r);
  3171. return r;
  3172. }
  3173. ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
  3174. if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
  3175. mpi_reply.IOCLogInfo) {
  3176. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  3177. r = -EIO;
  3178. }
  3179. return 0;
  3180. }
  3181. /**
  3182. * mpt2sas_port_enable_done - command completion routine for port enable
  3183. * @ioc: per adapter object
  3184. * @smid: system request message index
  3185. * @msix_index: MSIX table index supplied by the OS
  3186. * @reply: reply message frame(lower 32bit addr)
  3187. *
  3188. * Return 1 meaning mf should be freed from _base_interrupt
  3189. * 0 means the mf is freed from this function.
  3190. */
  3191. u8
  3192. mpt2sas_port_enable_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
  3193. u32 reply)
  3194. {
  3195. MPI2DefaultReply_t *mpi_reply;
  3196. u16 ioc_status;
  3197. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  3198. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  3199. return 1;
  3200. if (ioc->port_enable_cmds.status == MPT2_CMD_NOT_USED)
  3201. return 1;
  3202. ioc->port_enable_cmds.status |= MPT2_CMD_COMPLETE;
  3203. if (mpi_reply) {
  3204. ioc->port_enable_cmds.status |= MPT2_CMD_REPLY_VALID;
  3205. memcpy(ioc->port_enable_cmds.reply, mpi_reply,
  3206. mpi_reply->MsgLength*4);
  3207. }
  3208. ioc->port_enable_cmds.status &= ~MPT2_CMD_PENDING;
  3209. ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
  3210. if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
  3211. ioc->port_enable_failed = 1;
  3212. if (ioc->is_driver_loading) {
  3213. if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
  3214. mpt2sas_port_enable_complete(ioc);
  3215. return 1;
  3216. } else {
  3217. ioc->start_scan_failed = ioc_status;
  3218. ioc->start_scan = 0;
  3219. return 1;
  3220. }
  3221. }
  3222. complete(&ioc->port_enable_cmds.done);
  3223. return 1;
  3224. }
  3225. /**
  3226. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  3227. * @ioc: per adapter object
  3228. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3229. *
  3230. * Returns 0 for success, non-zero for failure.
  3231. */
  3232. static int
  3233. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3234. {
  3235. Mpi2PortEnableRequest_t *mpi_request;
  3236. Mpi2PortEnableReply_t *mpi_reply;
  3237. unsigned long timeleft;
  3238. int r = 0;
  3239. u16 smid;
  3240. u16 ioc_status;
  3241. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  3242. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3243. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3244. ioc->name, __func__);
  3245. return -EAGAIN;
  3246. }
  3247. smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
  3248. if (!smid) {
  3249. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3250. ioc->name, __func__);
  3251. return -EAGAIN;
  3252. }
  3253. ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
  3254. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3255. ioc->port_enable_cmds.smid = smid;
  3256. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  3257. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  3258. init_completion(&ioc->port_enable_cmds.done);
  3259. mpt2sas_base_put_smid_default(ioc, smid);
  3260. timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done,
  3261. 300*HZ);
  3262. if (!(ioc->port_enable_cmds.status & MPT2_CMD_COMPLETE)) {
  3263. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3264. ioc->name, __func__);
  3265. _debug_dump_mf(mpi_request,
  3266. sizeof(Mpi2PortEnableRequest_t)/4);
  3267. if (ioc->port_enable_cmds.status & MPT2_CMD_RESET)
  3268. r = -EFAULT;
  3269. else
  3270. r = -ETIME;
  3271. goto out;
  3272. }
  3273. mpi_reply = ioc->port_enable_cmds.reply;
  3274. ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
  3275. if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
  3276. printk(MPT2SAS_ERR_FMT "%s: failed with (ioc_status=0x%08x)\n",
  3277. ioc->name, __func__, ioc_status);
  3278. r = -EFAULT;
  3279. goto out;
  3280. }
  3281. out:
  3282. ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
  3283. printk(MPT2SAS_INFO_FMT "port enable: %s\n", ioc->name, ((r == 0) ?
  3284. "SUCCESS" : "FAILED"));
  3285. return r;
  3286. }
  3287. /**
  3288. * mpt2sas_port_enable - initiate firmware discovery (don't wait for reply)
  3289. * @ioc: per adapter object
  3290. *
  3291. * Returns 0 for success, non-zero for failure.
  3292. */
  3293. int
  3294. mpt2sas_port_enable(struct MPT2SAS_ADAPTER *ioc)
  3295. {
  3296. Mpi2PortEnableRequest_t *mpi_request;
  3297. u16 smid;
  3298. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  3299. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  3300. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3301. ioc->name, __func__);
  3302. return -EAGAIN;
  3303. }
  3304. smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
  3305. if (!smid) {
  3306. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3307. ioc->name, __func__);
  3308. return -EAGAIN;
  3309. }
  3310. ioc->port_enable_cmds.status = MPT2_CMD_PENDING;
  3311. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3312. ioc->port_enable_cmds.smid = smid;
  3313. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  3314. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  3315. mpt2sas_base_put_smid_default(ioc, smid);
  3316. return 0;
  3317. }
  3318. /**
  3319. * _base_determine_wait_on_discovery - desposition
  3320. * @ioc: per adapter object
  3321. *
  3322. * Decide whether to wait on discovery to complete. Used to either
  3323. * locate boot device, or report volumes ahead of physical devices.
  3324. *
  3325. * Returns 1 for wait, 0 for don't wait
  3326. */
  3327. static int
  3328. _base_determine_wait_on_discovery(struct MPT2SAS_ADAPTER *ioc)
  3329. {
  3330. /* We wait for discovery to complete if IR firmware is loaded.
  3331. * The sas topology events arrive before PD events, so we need time to
  3332. * turn on the bit in ioc->pd_handles to indicate PD
  3333. * Also, it maybe required to report Volumes ahead of physical
  3334. * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
  3335. */
  3336. if (ioc->ir_firmware)
  3337. return 1;
  3338. /* if no Bios, then we don't need to wait */
  3339. if (!ioc->bios_pg3.BiosVersion)
  3340. return 0;
  3341. /* Bios is present, then we drop down here.
  3342. *
  3343. * If there any entries in the Bios Page 2, then we wait
  3344. * for discovery to complete.
  3345. */
  3346. /* Current Boot Device */
  3347. if ((ioc->bios_pg2.CurrentBootDeviceForm &
  3348. MPI2_BIOSPAGE2_FORM_MASK) ==
  3349. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
  3350. /* Request Boot Device */
  3351. (ioc->bios_pg2.ReqBootDeviceForm &
  3352. MPI2_BIOSPAGE2_FORM_MASK) ==
  3353. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
  3354. /* Alternate Request Boot Device */
  3355. (ioc->bios_pg2.ReqAltBootDeviceForm &
  3356. MPI2_BIOSPAGE2_FORM_MASK) ==
  3357. MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED)
  3358. return 0;
  3359. return 1;
  3360. }
  3361. /**
  3362. * _base_unmask_events - turn on notification for this event
  3363. * @ioc: per adapter object
  3364. * @event: firmware event
  3365. *
  3366. * The mask is stored in ioc->event_masks.
  3367. */
  3368. static void
  3369. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  3370. {
  3371. u32 desired_event;
  3372. if (event >= 128)
  3373. return;
  3374. desired_event = (1 << (event % 32));
  3375. if (event < 32)
  3376. ioc->event_masks[0] &= ~desired_event;
  3377. else if (event < 64)
  3378. ioc->event_masks[1] &= ~desired_event;
  3379. else if (event < 96)
  3380. ioc->event_masks[2] &= ~desired_event;
  3381. else if (event < 128)
  3382. ioc->event_masks[3] &= ~desired_event;
  3383. }
  3384. /**
  3385. * _base_event_notification - send event notification
  3386. * @ioc: per adapter object
  3387. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3388. *
  3389. * Returns 0 for success, non-zero for failure.
  3390. */
  3391. static int
  3392. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3393. {
  3394. Mpi2EventNotificationRequest_t *mpi_request;
  3395. unsigned long timeleft;
  3396. u16 smid;
  3397. int r = 0;
  3398. int i;
  3399. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3400. __func__));
  3401. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3402. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  3403. ioc->name, __func__);
  3404. return -EAGAIN;
  3405. }
  3406. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  3407. if (!smid) {
  3408. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  3409. ioc->name, __func__);
  3410. return -EAGAIN;
  3411. }
  3412. ioc->base_cmds.status = MPT2_CMD_PENDING;
  3413. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  3414. ioc->base_cmds.smid = smid;
  3415. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  3416. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  3417. mpi_request->VF_ID = 0; /* TODO */
  3418. mpi_request->VP_ID = 0;
  3419. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3420. mpi_request->EventMasks[i] =
  3421. cpu_to_le32(ioc->event_masks[i]);
  3422. init_completion(&ioc->base_cmds.done);
  3423. mpt2sas_base_put_smid_default(ioc, smid);
  3424. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  3425. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  3426. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  3427. ioc->name, __func__);
  3428. _debug_dump_mf(mpi_request,
  3429. sizeof(Mpi2EventNotificationRequest_t)/4);
  3430. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  3431. r = -EFAULT;
  3432. else
  3433. r = -ETIME;
  3434. } else
  3435. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n",
  3436. ioc->name, __func__));
  3437. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3438. return r;
  3439. }
  3440. /**
  3441. * mpt2sas_base_validate_event_type - validating event types
  3442. * @ioc: per adapter object
  3443. * @event: firmware event
  3444. *
  3445. * This will turn on firmware event notification when application
  3446. * ask for that event. We don't mask events that are already enabled.
  3447. */
  3448. void
  3449. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  3450. {
  3451. int i, j;
  3452. u32 event_mask, desired_event;
  3453. u8 send_update_to_fw;
  3454. for (i = 0, send_update_to_fw = 0; i <
  3455. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  3456. event_mask = ~event_type[i];
  3457. desired_event = 1;
  3458. for (j = 0; j < 32; j++) {
  3459. if (!(event_mask & desired_event) &&
  3460. (ioc->event_masks[i] & desired_event)) {
  3461. ioc->event_masks[i] &= ~desired_event;
  3462. send_update_to_fw = 1;
  3463. }
  3464. desired_event = (desired_event << 1);
  3465. }
  3466. }
  3467. if (!send_update_to_fw)
  3468. return;
  3469. mutex_lock(&ioc->base_cmds.mutex);
  3470. _base_event_notification(ioc, CAN_SLEEP);
  3471. mutex_unlock(&ioc->base_cmds.mutex);
  3472. }
  3473. /**
  3474. * _base_diag_reset - the "big hammer" start of day reset
  3475. * @ioc: per adapter object
  3476. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3477. *
  3478. * Returns 0 for success, non-zero for failure.
  3479. */
  3480. static int
  3481. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3482. {
  3483. u32 host_diagnostic;
  3484. u32 ioc_state;
  3485. u32 count;
  3486. u32 hcb_size;
  3487. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  3488. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n",
  3489. ioc->name));
  3490. count = 0;
  3491. do {
  3492. /* Write magic sequence to WriteSequence register
  3493. * Loop until in diagnostic mode
  3494. */
  3495. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic "
  3496. "sequence\n", ioc->name));
  3497. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3498. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  3499. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  3500. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  3501. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3502. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3503. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  3504. /* wait 100 msec */
  3505. if (sleep_flag == CAN_SLEEP)
  3506. msleep(100);
  3507. else
  3508. mdelay(100);
  3509. if (count++ > 20)
  3510. goto out;
  3511. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3512. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic "
  3513. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  3514. ioc->name, count, host_diagnostic));
  3515. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  3516. hcb_size = readl(&ioc->chip->HCBSize);
  3517. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n",
  3518. ioc->name));
  3519. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  3520. &ioc->chip->HostDiagnostic);
  3521. /* don't access any registers for 50 milliseconds */
  3522. msleep(50);
  3523. /* 300 second max wait */
  3524. for (count = 0; count < 3000000 ; count++) {
  3525. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  3526. if (host_diagnostic == 0xFFFFFFFF)
  3527. goto out;
  3528. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  3529. break;
  3530. /* wait 100 msec */
  3531. if (sleep_flag == CAN_SLEEP)
  3532. msleep(1);
  3533. else
  3534. mdelay(1);
  3535. }
  3536. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  3537. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter "
  3538. "assuming the HCB Address points to good F/W\n",
  3539. ioc->name));
  3540. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  3541. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  3542. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  3543. drsprintk(ioc, printk(MPT2SAS_INFO_FMT
  3544. "re-enable the HCDW\n", ioc->name));
  3545. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  3546. &ioc->chip->HCBSize);
  3547. }
  3548. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n",
  3549. ioc->name));
  3550. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  3551. &ioc->chip->HostDiagnostic);
  3552. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the "
  3553. "diagnostic register\n", ioc->name));
  3554. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  3555. drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the "
  3556. "READY state\n", ioc->name));
  3557. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  3558. sleep_flag);
  3559. if (ioc_state) {
  3560. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  3561. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  3562. goto out;
  3563. }
  3564. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  3565. return 0;
  3566. out:
  3567. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  3568. return -EFAULT;
  3569. }
  3570. /**
  3571. * _base_make_ioc_ready - put controller in READY state
  3572. * @ioc: per adapter object
  3573. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3574. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3575. *
  3576. * Returns 0 for success, non-zero for failure.
  3577. */
  3578. static int
  3579. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3580. enum reset_type type)
  3581. {
  3582. u32 ioc_state;
  3583. int rc;
  3584. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3585. __func__));
  3586. if (ioc->pci_error_recovery)
  3587. return 0;
  3588. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3589. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n",
  3590. ioc->name, __func__, ioc_state));
  3591. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  3592. return 0;
  3593. if (ioc_state & MPI2_DOORBELL_USED) {
  3594. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell "
  3595. "active!\n", ioc->name));
  3596. goto issue_diag_reset;
  3597. }
  3598. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  3599. mpt2sas_base_fault_info(ioc, ioc_state &
  3600. MPI2_DOORBELL_DATA_MASK);
  3601. goto issue_diag_reset;
  3602. }
  3603. if (type == FORCE_BIG_HAMMER)
  3604. goto issue_diag_reset;
  3605. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  3606. if (!(_base_send_ioc_reset(ioc,
  3607. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
  3608. ioc->ioc_reset_count++;
  3609. return 0;
  3610. }
  3611. issue_diag_reset:
  3612. rc = _base_diag_reset(ioc, CAN_SLEEP);
  3613. ioc->ioc_reset_count++;
  3614. return rc;
  3615. }
  3616. /**
  3617. * _base_make_ioc_operational - put controller in OPERATIONAL state
  3618. * @ioc: per adapter object
  3619. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3620. *
  3621. * Returns 0 for success, non-zero for failure.
  3622. */
  3623. static int
  3624. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3625. {
  3626. int r, i;
  3627. unsigned long flags;
  3628. u32 reply_address;
  3629. u16 smid;
  3630. struct _tr_list *delayed_tr, *delayed_tr_next;
  3631. u8 hide_flag;
  3632. struct adapter_reply_queue *reply_q;
  3633. long reply_post_free;
  3634. u32 reply_post_free_sz;
  3635. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3636. __func__));
  3637. /* clean the delayed target reset list */
  3638. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3639. &ioc->delayed_tr_list, list) {
  3640. list_del(&delayed_tr->list);
  3641. kfree(delayed_tr);
  3642. }
  3643. list_for_each_entry_safe(delayed_tr, delayed_tr_next,
  3644. &ioc->delayed_tr_volume_list, list) {
  3645. list_del(&delayed_tr->list);
  3646. kfree(delayed_tr);
  3647. }
  3648. /* initialize the scsi lookup free list */
  3649. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3650. INIT_LIST_HEAD(&ioc->free_list);
  3651. smid = 1;
  3652. for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
  3653. INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
  3654. ioc->scsi_lookup[i].cb_idx = 0xFF;
  3655. ioc->scsi_lookup[i].smid = smid;
  3656. ioc->scsi_lookup[i].scmd = NULL;
  3657. ioc->scsi_lookup[i].direct_io = 0;
  3658. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  3659. &ioc->free_list);
  3660. }
  3661. /* hi-priority queue */
  3662. INIT_LIST_HEAD(&ioc->hpr_free_list);
  3663. smid = ioc->hi_priority_smid;
  3664. for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
  3665. ioc->hpr_lookup[i].cb_idx = 0xFF;
  3666. ioc->hpr_lookup[i].smid = smid;
  3667. list_add_tail(&ioc->hpr_lookup[i].tracker_list,
  3668. &ioc->hpr_free_list);
  3669. }
  3670. /* internal queue */
  3671. INIT_LIST_HEAD(&ioc->internal_free_list);
  3672. smid = ioc->internal_smid;
  3673. for (i = 0; i < ioc->internal_depth; i++, smid++) {
  3674. ioc->internal_lookup[i].cb_idx = 0xFF;
  3675. ioc->internal_lookup[i].smid = smid;
  3676. list_add_tail(&ioc->internal_lookup[i].tracker_list,
  3677. &ioc->internal_free_list);
  3678. }
  3679. /* chain pool */
  3680. INIT_LIST_HEAD(&ioc->free_chain_list);
  3681. for (i = 0; i < ioc->chain_depth; i++)
  3682. list_add_tail(&ioc->chain_lookup[i].tracker_list,
  3683. &ioc->free_chain_list);
  3684. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3685. /* initialize Reply Free Queue */
  3686. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  3687. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  3688. ioc->reply_sz)
  3689. ioc->reply_free[i] = cpu_to_le32(reply_address);
  3690. /* initialize reply queues */
  3691. _base_assign_reply_queues(ioc);
  3692. /* initialize Reply Post Free Queue */
  3693. reply_post_free = (long)ioc->reply_post_free;
  3694. reply_post_free_sz = ioc->reply_post_queue_depth *
  3695. sizeof(Mpi2DefaultReplyDescriptor_t);
  3696. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  3697. reply_q->reply_post_host_index = 0;
  3698. reply_q->reply_post_free = (Mpi2ReplyDescriptorsUnion_t *)
  3699. reply_post_free;
  3700. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  3701. reply_q->reply_post_free[i].Words =
  3702. cpu_to_le64(ULLONG_MAX);
  3703. if (!_base_is_controller_msix_enabled(ioc))
  3704. goto skip_init_reply_post_free_queue;
  3705. reply_post_free += reply_post_free_sz;
  3706. }
  3707. skip_init_reply_post_free_queue:
  3708. r = _base_send_ioc_init(ioc, sleep_flag);
  3709. if (r)
  3710. return r;
  3711. /* initialize reply free host index */
  3712. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  3713. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  3714. /* initialize reply post host index */
  3715. list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
  3716. writel(reply_q->msix_index << MPI2_RPHI_MSIX_INDEX_SHIFT,
  3717. &ioc->chip->ReplyPostHostIndex);
  3718. if (!_base_is_controller_msix_enabled(ioc))
  3719. goto skip_init_reply_post_host_index;
  3720. }
  3721. skip_init_reply_post_host_index:
  3722. _base_unmask_interrupts(ioc);
  3723. r = _base_event_notification(ioc, sleep_flag);
  3724. if (r)
  3725. return r;
  3726. if (sleep_flag == CAN_SLEEP)
  3727. _base_static_config_pages(ioc);
  3728. if (ioc->is_driver_loading) {
  3729. ioc->wait_for_discovery_to_complete =
  3730. _base_determine_wait_on_discovery(ioc);
  3731. return r; /* scan_start and scan_finished support */
  3732. }
  3733. if (ioc->wait_for_discovery_to_complete && ioc->is_warpdrive) {
  3734. if (ioc->manu_pg10.OEMIdentifier == 0x80) {
  3735. hide_flag = (u8) (ioc->manu_pg10.OEMSpecificFlags0 &
  3736. MFG_PAGE10_HIDE_SSDS_MASK);
  3737. if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK)
  3738. ioc->mfg_pg10_hide_flag = hide_flag;
  3739. }
  3740. }
  3741. r = _base_send_port_enable(ioc, sleep_flag);
  3742. if (r)
  3743. return r;
  3744. return r;
  3745. }
  3746. /**
  3747. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  3748. * @ioc: per adapter object
  3749. *
  3750. * Return nothing.
  3751. */
  3752. void
  3753. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  3754. {
  3755. struct pci_dev *pdev = ioc->pdev;
  3756. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3757. __func__));
  3758. _base_mask_interrupts(ioc);
  3759. ioc->shost_recovery = 1;
  3760. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3761. ioc->shost_recovery = 0;
  3762. _base_free_irq(ioc);
  3763. _base_disable_msix(ioc);
  3764. if (ioc->chip_phys)
  3765. iounmap(ioc->chip);
  3766. ioc->chip_phys = 0;
  3767. pci_release_selected_regions(ioc->pdev, ioc->bars);
  3768. pci_disable_pcie_error_reporting(pdev);
  3769. pci_disable_device(pdev);
  3770. return;
  3771. }
  3772. /**
  3773. * mpt2sas_base_attach - attach controller instance
  3774. * @ioc: per adapter object
  3775. *
  3776. * Returns 0 for success, non-zero for failure.
  3777. */
  3778. int
  3779. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  3780. {
  3781. int r, i;
  3782. int cpu_id, last_cpu_id = 0;
  3783. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3784. __func__));
  3785. /* setup cpu_msix_table */
  3786. ioc->cpu_count = num_online_cpus();
  3787. for_each_online_cpu(cpu_id)
  3788. last_cpu_id = cpu_id;
  3789. ioc->cpu_msix_table_sz = last_cpu_id + 1;
  3790. ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL);
  3791. ioc->reply_queue_count = 1;
  3792. if (!ioc->cpu_msix_table) {
  3793. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  3794. "cpu_msix_table failed!!!\n", ioc->name));
  3795. r = -ENOMEM;
  3796. goto out_free_resources;
  3797. }
  3798. if (ioc->is_warpdrive) {
  3799. ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz,
  3800. sizeof(resource_size_t *), GFP_KERNEL);
  3801. if (!ioc->reply_post_host_index) {
  3802. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation "
  3803. "for cpu_msix_table failed!!!\n", ioc->name));
  3804. r = -ENOMEM;
  3805. goto out_free_resources;
  3806. }
  3807. }
  3808. r = mpt2sas_base_map_resources(ioc);
  3809. if (r)
  3810. return r;
  3811. if (ioc->is_warpdrive) {
  3812. ioc->reply_post_host_index[0] =
  3813. (resource_size_t *)&ioc->chip->ReplyPostHostIndex;
  3814. for (i = 1; i < ioc->cpu_msix_table_sz; i++)
  3815. ioc->reply_post_host_index[i] = (resource_size_t *)
  3816. ((u8 *)&ioc->chip->Doorbell + (0x4000 + ((i - 1)
  3817. * 4)));
  3818. }
  3819. pci_set_drvdata(ioc->pdev, ioc->shost);
  3820. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  3821. if (r)
  3822. goto out_free_resources;
  3823. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  3824. if (r)
  3825. goto out_free_resources;
  3826. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  3827. sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
  3828. if (!ioc->pfacts) {
  3829. r = -ENOMEM;
  3830. goto out_free_resources;
  3831. }
  3832. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  3833. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  3834. if (r)
  3835. goto out_free_resources;
  3836. }
  3837. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  3838. if (r)
  3839. goto out_free_resources;
  3840. init_waitqueue_head(&ioc->reset_wq);
  3841. /* allocate memory pd handle bitmask list */
  3842. ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
  3843. if (ioc->facts.MaxDevHandle % 8)
  3844. ioc->pd_handles_sz++;
  3845. ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
  3846. GFP_KERNEL);
  3847. if (!ioc->pd_handles) {
  3848. r = -ENOMEM;
  3849. goto out_free_resources;
  3850. }
  3851. ioc->fwfault_debug = mpt2sas_fwfault_debug;
  3852. /* base internal command bits */
  3853. mutex_init(&ioc->base_cmds.mutex);
  3854. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3855. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  3856. /* port_enable command bits */
  3857. ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3858. ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED;
  3859. /* transport internal command bits */
  3860. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3861. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  3862. mutex_init(&ioc->transport_cmds.mutex);
  3863. /* scsih internal command bits */
  3864. ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3865. ioc->scsih_cmds.status = MPT2_CMD_NOT_USED;
  3866. mutex_init(&ioc->scsih_cmds.mutex);
  3867. /* task management internal command bits */
  3868. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3869. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  3870. mutex_init(&ioc->tm_cmds.mutex);
  3871. /* config page internal command bits */
  3872. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3873. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  3874. mutex_init(&ioc->config_cmds.mutex);
  3875. /* ctl module internal command bits */
  3876. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  3877. ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
  3878. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  3879. mutex_init(&ioc->ctl_cmds.mutex);
  3880. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3881. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3882. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
  3883. !ioc->ctl_cmds.sense) {
  3884. r = -ENOMEM;
  3885. goto out_free_resources;
  3886. }
  3887. if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
  3888. !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
  3889. !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) {
  3890. r = -ENOMEM;
  3891. goto out_free_resources;
  3892. }
  3893. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  3894. ioc->event_masks[i] = -1;
  3895. /* here we enable the events we care about */
  3896. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  3897. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  3898. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  3899. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  3900. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  3901. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  3902. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  3903. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  3904. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  3905. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  3906. r = _base_make_ioc_operational(ioc, CAN_SLEEP);
  3907. if (r)
  3908. goto out_free_resources;
  3909. if (missing_delay[0] != -1 && missing_delay[1] != -1)
  3910. _base_update_missing_delay(ioc, missing_delay[0],
  3911. missing_delay[1]);
  3912. return 0;
  3913. out_free_resources:
  3914. ioc->remove_host = 1;
  3915. mpt2sas_base_free_resources(ioc);
  3916. _base_release_memory_pools(ioc);
  3917. pci_set_drvdata(ioc->pdev, NULL);
  3918. kfree(ioc->cpu_msix_table);
  3919. if (ioc->is_warpdrive)
  3920. kfree(ioc->reply_post_host_index);
  3921. kfree(ioc->pd_handles);
  3922. kfree(ioc->tm_cmds.reply);
  3923. kfree(ioc->transport_cmds.reply);
  3924. kfree(ioc->scsih_cmds.reply);
  3925. kfree(ioc->config_cmds.reply);
  3926. kfree(ioc->base_cmds.reply);
  3927. kfree(ioc->port_enable_cmds.reply);
  3928. kfree(ioc->ctl_cmds.reply);
  3929. kfree(ioc->ctl_cmds.sense);
  3930. kfree(ioc->pfacts);
  3931. ioc->ctl_cmds.reply = NULL;
  3932. ioc->base_cmds.reply = NULL;
  3933. ioc->tm_cmds.reply = NULL;
  3934. ioc->scsih_cmds.reply = NULL;
  3935. ioc->transport_cmds.reply = NULL;
  3936. ioc->config_cmds.reply = NULL;
  3937. ioc->pfacts = NULL;
  3938. return r;
  3939. }
  3940. /**
  3941. * mpt2sas_base_detach - remove controller instance
  3942. * @ioc: per adapter object
  3943. *
  3944. * Return nothing.
  3945. */
  3946. void
  3947. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  3948. {
  3949. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name,
  3950. __func__));
  3951. mpt2sas_base_stop_watchdog(ioc);
  3952. mpt2sas_base_free_resources(ioc);
  3953. _base_release_memory_pools(ioc);
  3954. pci_set_drvdata(ioc->pdev, NULL);
  3955. kfree(ioc->cpu_msix_table);
  3956. if (ioc->is_warpdrive)
  3957. kfree(ioc->reply_post_host_index);
  3958. kfree(ioc->pd_handles);
  3959. kfree(ioc->pfacts);
  3960. kfree(ioc->ctl_cmds.reply);
  3961. kfree(ioc->ctl_cmds.sense);
  3962. kfree(ioc->base_cmds.reply);
  3963. kfree(ioc->port_enable_cmds.reply);
  3964. kfree(ioc->tm_cmds.reply);
  3965. kfree(ioc->transport_cmds.reply);
  3966. kfree(ioc->scsih_cmds.reply);
  3967. kfree(ioc->config_cmds.reply);
  3968. }
  3969. /**
  3970. * _base_reset_handler - reset callback handler (for base)
  3971. * @ioc: per adapter object
  3972. * @reset_phase: phase
  3973. *
  3974. * The handler for doing any required cleanup or initialization.
  3975. *
  3976. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  3977. * MPT2_IOC_DONE_RESET
  3978. *
  3979. * Return nothing.
  3980. */
  3981. static void
  3982. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  3983. {
  3984. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  3985. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  3986. switch (reset_phase) {
  3987. case MPT2_IOC_PRE_RESET:
  3988. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3989. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  3990. break;
  3991. case MPT2_IOC_AFTER_RESET:
  3992. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  3993. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  3994. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  3995. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  3996. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  3997. complete(&ioc->transport_cmds.done);
  3998. }
  3999. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  4000. ioc->base_cmds.status |= MPT2_CMD_RESET;
  4001. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  4002. complete(&ioc->base_cmds.done);
  4003. }
  4004. if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) {
  4005. ioc->port_enable_failed = 1;
  4006. ioc->port_enable_cmds.status |= MPT2_CMD_RESET;
  4007. mpt2sas_base_free_smid(ioc, ioc->port_enable_cmds.smid);
  4008. if (ioc->is_driver_loading) {
  4009. ioc->start_scan_failed =
  4010. MPI2_IOCSTATUS_INTERNAL_ERROR;
  4011. ioc->start_scan = 0;
  4012. ioc->port_enable_cmds.status =
  4013. MPT2_CMD_NOT_USED;
  4014. } else
  4015. complete(&ioc->port_enable_cmds.done);
  4016. }
  4017. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  4018. ioc->config_cmds.status |= MPT2_CMD_RESET;
  4019. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  4020. ioc->config_cmds.smid = USHRT_MAX;
  4021. complete(&ioc->config_cmds.done);
  4022. }
  4023. break;
  4024. case MPT2_IOC_DONE_RESET:
  4025. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: "
  4026. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  4027. break;
  4028. }
  4029. }
  4030. /**
  4031. * _wait_for_commands_to_complete - reset controller
  4032. * @ioc: Pointer to MPT_ADAPTER structure
  4033. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  4034. *
  4035. * This function waiting(3s) for all pending commands to complete
  4036. * prior to putting controller in reset.
  4037. */
  4038. static void
  4039. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  4040. {
  4041. u32 ioc_state;
  4042. unsigned long flags;
  4043. u16 i;
  4044. ioc->pending_io_count = 0;
  4045. if (sleep_flag != CAN_SLEEP)
  4046. return;
  4047. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  4048. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  4049. return;
  4050. /* pending command count */
  4051. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  4052. for (i = 0; i < ioc->scsiio_depth; i++)
  4053. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  4054. ioc->pending_io_count++;
  4055. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  4056. if (!ioc->pending_io_count)
  4057. return;
  4058. /* wait for pending commands to complete */
  4059. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
  4060. }
  4061. /**
  4062. * mpt2sas_base_hard_reset_handler - reset controller
  4063. * @ioc: Pointer to MPT_ADAPTER structure
  4064. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  4065. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  4066. *
  4067. * Returns 0 for success, non-zero for failure.
  4068. */
  4069. int
  4070. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  4071. enum reset_type type)
  4072. {
  4073. int r;
  4074. unsigned long flags;
  4075. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name,
  4076. __func__));
  4077. if (ioc->pci_error_recovery) {
  4078. printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n",
  4079. ioc->name, __func__);
  4080. r = 0;
  4081. goto out;
  4082. }
  4083. if (mpt2sas_fwfault_debug)
  4084. mpt2sas_halt_firmware(ioc);
  4085. /* TODO - What we really should be doing is pulling
  4086. * out all the code associated with NO_SLEEP; its never used.
  4087. * That is legacy code from mpt fusion driver, ported over.
  4088. * I will leave this BUG_ON here for now till its been resolved.
  4089. */
  4090. BUG_ON(sleep_flag == NO_SLEEP);
  4091. /* wait for an active reset in progress to complete */
  4092. if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
  4093. do {
  4094. ssleep(1);
  4095. } while (ioc->shost_recovery == 1);
  4096. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  4097. __func__));
  4098. return ioc->ioc_reset_in_progress_status;
  4099. }
  4100. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  4101. ioc->shost_recovery = 1;
  4102. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  4103. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  4104. _wait_for_commands_to_complete(ioc, sleep_flag);
  4105. _base_mask_interrupts(ioc);
  4106. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  4107. if (r)
  4108. goto out;
  4109. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  4110. /* If this hard reset is called while port enable is active, then
  4111. * there is no reason to call make_ioc_operational
  4112. */
  4113. if (ioc->is_driver_loading && ioc->port_enable_failed) {
  4114. ioc->remove_host = 1;
  4115. r = -EFAULT;
  4116. goto out;
  4117. }
  4118. r = _base_make_ioc_operational(ioc, sleep_flag);
  4119. if (!r)
  4120. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  4121. out:
  4122. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n",
  4123. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  4124. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  4125. ioc->ioc_reset_in_progress_status = r;
  4126. ioc->shost_recovery = 0;
  4127. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  4128. mutex_unlock(&ioc->reset_in_progress_mutex);
  4129. dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name,
  4130. __func__));
  4131. return r;
  4132. }