htirq.c 4.5 KB

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  1. /*
  2. * File: htirq.c
  3. * Purpose: Hypertransport Interrupt Capability
  4. *
  5. * Copyright (C) 2006 Linux Networx
  6. * Copyright (C) Eric Biederman <ebiederman@lnxi.com>
  7. */
  8. #include <linux/irq.h>
  9. #include <linux/pci.h>
  10. #include <linux/spinlock.h>
  11. #include <linux/slab.h>
  12. #include <linux/gfp.h>
  13. /* Global ht irq lock.
  14. *
  15. * This is needed to serialize access to the data port in hypertransport
  16. * irq capability.
  17. *
  18. * With multiple simultaneous hypertransport irq devices it might pay
  19. * to make this more fine grained. But start with simple, stupid, and correct.
  20. */
  21. static DEFINE_SPINLOCK(ht_irq_lock);
  22. struct ht_irq_cfg {
  23. struct pci_dev *dev;
  24. unsigned pos;
  25. unsigned idx;
  26. };
  27. void write_ht_irq_low(unsigned int irq, u32 data)
  28. {
  29. struct ht_irq_cfg *cfg = get_irq_data(irq);
  30. unsigned long flags;
  31. spin_lock_irqsave(&ht_irq_lock, flags);
  32. pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx);
  33. pci_write_config_dword(cfg->dev, cfg->pos + 4, data);
  34. spin_unlock_irqrestore(&ht_irq_lock, flags);
  35. }
  36. void write_ht_irq_high(unsigned int irq, u32 data)
  37. {
  38. struct ht_irq_cfg *cfg = get_irq_data(irq);
  39. unsigned long flags;
  40. spin_lock_irqsave(&ht_irq_lock, flags);
  41. pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx + 1);
  42. pci_write_config_dword(cfg->dev, cfg->pos + 4, data);
  43. spin_unlock_irqrestore(&ht_irq_lock, flags);
  44. }
  45. u32 read_ht_irq_low(unsigned int irq)
  46. {
  47. struct ht_irq_cfg *cfg = get_irq_data(irq);
  48. unsigned long flags;
  49. u32 data;
  50. spin_lock_irqsave(&ht_irq_lock, flags);
  51. pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx);
  52. pci_read_config_dword(cfg->dev, cfg->pos + 4, &data);
  53. spin_unlock_irqrestore(&ht_irq_lock, flags);
  54. return data;
  55. }
  56. u32 read_ht_irq_high(unsigned int irq)
  57. {
  58. struct ht_irq_cfg *cfg = get_irq_data(irq);
  59. unsigned long flags;
  60. u32 data;
  61. spin_lock_irqsave(&ht_irq_lock, flags);
  62. pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx + 1);
  63. pci_read_config_dword(cfg->dev, cfg->pos + 4, &data);
  64. spin_unlock_irqrestore(&ht_irq_lock, flags);
  65. return data;
  66. }
  67. void mask_ht_irq(unsigned int irq)
  68. {
  69. struct ht_irq_cfg *cfg;
  70. unsigned long flags;
  71. u32 data;
  72. cfg = get_irq_data(irq);
  73. spin_lock_irqsave(&ht_irq_lock, flags);
  74. pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx);
  75. pci_read_config_dword(cfg->dev, cfg->pos + 4, &data);
  76. data |= 1;
  77. pci_write_config_dword(cfg->dev, cfg->pos + 4, data);
  78. spin_unlock_irqrestore(&ht_irq_lock, flags);
  79. }
  80. void unmask_ht_irq(unsigned int irq)
  81. {
  82. struct ht_irq_cfg *cfg;
  83. unsigned long flags;
  84. u32 data;
  85. cfg = get_irq_data(irq);
  86. spin_lock_irqsave(&ht_irq_lock, flags);
  87. pci_write_config_byte(cfg->dev, cfg->pos + 2, cfg->idx);
  88. pci_read_config_dword(cfg->dev, cfg->pos + 4, &data);
  89. data &= ~1;
  90. pci_write_config_dword(cfg->dev, cfg->pos + 4, data);
  91. spin_unlock_irqrestore(&ht_irq_lock, flags);
  92. }
  93. /**
  94. * ht_create_irq - create an irq and attach it to a device.
  95. * @dev: The hypertransport device to find the irq capability on.
  96. * @idx: Which of the possible irqs to attach to.
  97. *
  98. * ht_create_irq is needs to be called for all hypertransport devices
  99. * that generate irqs.
  100. *
  101. * The irq number of the new irq or a negative error value is returned.
  102. */
  103. int ht_create_irq(struct pci_dev *dev, int idx)
  104. {
  105. struct ht_irq_cfg *cfg;
  106. unsigned long flags;
  107. u32 data;
  108. int max_irq;
  109. int pos;
  110. int irq;
  111. pos = pci_find_capability(dev, PCI_CAP_ID_HT);
  112. while (pos) {
  113. u8 subtype;
  114. pci_read_config_byte(dev, pos + 3, &subtype);
  115. if (subtype == HT_CAPTYPE_IRQ)
  116. break;
  117. pos = pci_find_next_capability(dev, pos, PCI_CAP_ID_HT);
  118. }
  119. if (!pos)
  120. return -EINVAL;
  121. /* Verify the idx I want to use is in range */
  122. spin_lock_irqsave(&ht_irq_lock, flags);
  123. pci_write_config_byte(dev, pos + 2, 1);
  124. pci_read_config_dword(dev, pos + 4, &data);
  125. spin_unlock_irqrestore(&ht_irq_lock, flags);
  126. max_irq = (data >> 16) & 0xff;
  127. if ( idx > max_irq)
  128. return -EINVAL;
  129. cfg = kmalloc(sizeof(*cfg), GFP_KERNEL);
  130. if (!cfg)
  131. return -ENOMEM;
  132. cfg->dev = dev;
  133. cfg->pos = pos;
  134. cfg->idx = 0x10 + (idx * 2);
  135. irq = create_irq();
  136. if (irq < 0) {
  137. kfree(cfg);
  138. return -EBUSY;
  139. }
  140. set_irq_data(irq, cfg);
  141. if (arch_setup_ht_irq(irq, dev) < 0) {
  142. ht_destroy_irq(irq);
  143. return -EBUSY;
  144. }
  145. return irq;
  146. }
  147. /**
  148. * ht_destroy_irq - destroy an irq created with ht_create_irq
  149. *
  150. * This reverses ht_create_irq removing the specified irq from
  151. * existence. The irq should be free before this happens.
  152. */
  153. void ht_destroy_irq(unsigned int irq)
  154. {
  155. struct ht_irq_cfg *cfg;
  156. cfg = get_irq_data(irq);
  157. set_irq_chip(irq, NULL);
  158. set_irq_data(irq, NULL);
  159. destroy_irq(irq);
  160. kfree(cfg);
  161. }
  162. EXPORT_SYMBOL(ht_create_irq);
  163. EXPORT_SYMBOL(ht_destroy_irq);