mmu.c 39 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "vmx.h"
  20. #include "kvm.h"
  21. #include <linux/types.h>
  22. #include <linux/string.h>
  23. #include <linux/mm.h>
  24. #include <linux/highmem.h>
  25. #include <linux/module.h>
  26. #include <asm/page.h>
  27. #include <asm/cmpxchg.h>
  28. #undef MMU_DEBUG
  29. #undef AUDIT
  30. #ifdef AUDIT
  31. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  32. #else
  33. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  34. #endif
  35. #ifdef MMU_DEBUG
  36. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  37. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  38. #else
  39. #define pgprintk(x...) do { } while (0)
  40. #define rmap_printk(x...) do { } while (0)
  41. #endif
  42. #if defined(MMU_DEBUG) || defined(AUDIT)
  43. static int dbg = 1;
  44. #endif
  45. #ifndef MMU_DEBUG
  46. #define ASSERT(x) do { } while (0)
  47. #else
  48. #define ASSERT(x) \
  49. if (!(x)) { \
  50. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  51. __FILE__, __LINE__, #x); \
  52. }
  53. #endif
  54. #define PT64_PT_BITS 9
  55. #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
  56. #define PT32_PT_BITS 10
  57. #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
  58. #define PT_WRITABLE_SHIFT 1
  59. #define PT_PRESENT_MASK (1ULL << 0)
  60. #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
  61. #define PT_USER_MASK (1ULL << 2)
  62. #define PT_PWT_MASK (1ULL << 3)
  63. #define PT_PCD_MASK (1ULL << 4)
  64. #define PT_ACCESSED_MASK (1ULL << 5)
  65. #define PT_DIRTY_MASK (1ULL << 6)
  66. #define PT_PAGE_SIZE_MASK (1ULL << 7)
  67. #define PT_PAT_MASK (1ULL << 7)
  68. #define PT_GLOBAL_MASK (1ULL << 8)
  69. #define PT64_NX_MASK (1ULL << 63)
  70. #define PT_PAT_SHIFT 7
  71. #define PT_DIR_PAT_SHIFT 12
  72. #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
  73. #define PT32_DIR_PSE36_SIZE 4
  74. #define PT32_DIR_PSE36_SHIFT 13
  75. #define PT32_DIR_PSE36_MASK \
  76. (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
  77. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  78. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  79. #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
  80. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  81. #define PT64_LEVEL_BITS 9
  82. #define PT64_LEVEL_SHIFT(level) \
  83. (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
  84. #define PT64_LEVEL_MASK(level) \
  85. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  86. #define PT64_INDEX(address, level)\
  87. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  88. #define PT32_LEVEL_BITS 10
  89. #define PT32_LEVEL_SHIFT(level) \
  90. (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
  91. #define PT32_LEVEL_MASK(level) \
  92. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  93. #define PT32_INDEX(address, level)\
  94. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  95. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  96. #define PT64_DIR_BASE_ADDR_MASK \
  97. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  98. #define PT32_BASE_ADDR_MASK PAGE_MASK
  99. #define PT32_DIR_BASE_ADDR_MASK \
  100. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  101. #define PFERR_PRESENT_MASK (1U << 0)
  102. #define PFERR_WRITE_MASK (1U << 1)
  103. #define PFERR_USER_MASK (1U << 2)
  104. #define PFERR_FETCH_MASK (1U << 4)
  105. #define PT64_ROOT_LEVEL 4
  106. #define PT32_ROOT_LEVEL 2
  107. #define PT32E_ROOT_LEVEL 3
  108. #define PT_DIRECTORY_LEVEL 2
  109. #define PT_PAGE_TABLE_LEVEL 1
  110. #define RMAP_EXT 4
  111. struct kvm_rmap_desc {
  112. u64 *shadow_ptes[RMAP_EXT];
  113. struct kvm_rmap_desc *more;
  114. };
  115. static struct kmem_cache *pte_chain_cache;
  116. static struct kmem_cache *rmap_desc_cache;
  117. static struct kmem_cache *mmu_page_header_cache;
  118. static u64 __read_mostly shadow_trap_nonpresent_pte;
  119. static u64 __read_mostly shadow_notrap_nonpresent_pte;
  120. void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
  121. {
  122. shadow_trap_nonpresent_pte = trap_pte;
  123. shadow_notrap_nonpresent_pte = notrap_pte;
  124. }
  125. EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
  126. static int is_write_protection(struct kvm_vcpu *vcpu)
  127. {
  128. return vcpu->cr0 & X86_CR0_WP;
  129. }
  130. static int is_cpuid_PSE36(void)
  131. {
  132. return 1;
  133. }
  134. static int is_nx(struct kvm_vcpu *vcpu)
  135. {
  136. return vcpu->shadow_efer & EFER_NX;
  137. }
  138. static int is_present_pte(unsigned long pte)
  139. {
  140. return pte & PT_PRESENT_MASK;
  141. }
  142. static int is_shadow_present_pte(u64 pte)
  143. {
  144. pte &= ~PT_SHADOW_IO_MARK;
  145. return pte != shadow_trap_nonpresent_pte
  146. && pte != shadow_notrap_nonpresent_pte;
  147. }
  148. static int is_writeble_pte(unsigned long pte)
  149. {
  150. return pte & PT_WRITABLE_MASK;
  151. }
  152. static int is_dirty_pte(unsigned long pte)
  153. {
  154. return pte & PT_DIRTY_MASK;
  155. }
  156. static int is_io_pte(unsigned long pte)
  157. {
  158. return pte & PT_SHADOW_IO_MARK;
  159. }
  160. static int is_rmap_pte(u64 pte)
  161. {
  162. return pte != shadow_trap_nonpresent_pte
  163. && pte != shadow_notrap_nonpresent_pte;
  164. }
  165. static void set_shadow_pte(u64 *sptep, u64 spte)
  166. {
  167. #ifdef CONFIG_X86_64
  168. set_64bit((unsigned long *)sptep, spte);
  169. #else
  170. set_64bit((unsigned long long *)sptep, spte);
  171. #endif
  172. }
  173. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  174. struct kmem_cache *base_cache, int min)
  175. {
  176. void *obj;
  177. if (cache->nobjs >= min)
  178. return 0;
  179. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  180. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  181. if (!obj)
  182. return -ENOMEM;
  183. cache->objects[cache->nobjs++] = obj;
  184. }
  185. return 0;
  186. }
  187. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  188. {
  189. while (mc->nobjs)
  190. kfree(mc->objects[--mc->nobjs]);
  191. }
  192. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  193. int min)
  194. {
  195. struct page *page;
  196. if (cache->nobjs >= min)
  197. return 0;
  198. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  199. page = alloc_page(GFP_KERNEL);
  200. if (!page)
  201. return -ENOMEM;
  202. set_page_private(page, 0);
  203. cache->objects[cache->nobjs++] = page_address(page);
  204. }
  205. return 0;
  206. }
  207. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  208. {
  209. while (mc->nobjs)
  210. free_page((unsigned long)mc->objects[--mc->nobjs]);
  211. }
  212. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  213. {
  214. int r;
  215. kvm_mmu_free_some_pages(vcpu);
  216. r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
  217. pte_chain_cache, 4);
  218. if (r)
  219. goto out;
  220. r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
  221. rmap_desc_cache, 1);
  222. if (r)
  223. goto out;
  224. r = mmu_topup_memory_cache_page(&vcpu->mmu_page_cache, 8);
  225. if (r)
  226. goto out;
  227. r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache,
  228. mmu_page_header_cache, 4);
  229. out:
  230. return r;
  231. }
  232. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  233. {
  234. mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
  235. mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
  236. mmu_free_memory_cache_page(&vcpu->mmu_page_cache);
  237. mmu_free_memory_cache(&vcpu->mmu_page_header_cache);
  238. }
  239. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  240. size_t size)
  241. {
  242. void *p;
  243. BUG_ON(!mc->nobjs);
  244. p = mc->objects[--mc->nobjs];
  245. memset(p, 0, size);
  246. return p;
  247. }
  248. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  249. {
  250. return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
  251. sizeof(struct kvm_pte_chain));
  252. }
  253. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  254. {
  255. kfree(pc);
  256. }
  257. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  258. {
  259. return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
  260. sizeof(struct kvm_rmap_desc));
  261. }
  262. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  263. {
  264. kfree(rd);
  265. }
  266. /*
  267. * Take gfn and return the reverse mapping to it.
  268. * Note: gfn must be unaliased before this function get called
  269. */
  270. static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn)
  271. {
  272. struct kvm_memory_slot *slot;
  273. slot = gfn_to_memslot(kvm, gfn);
  274. return &slot->rmap[gfn - slot->base_gfn];
  275. }
  276. /*
  277. * Reverse mapping data structures:
  278. *
  279. * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
  280. * that points to page_address(page).
  281. *
  282. * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
  283. * containing more mappings.
  284. */
  285. static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
  286. {
  287. struct kvm_mmu_page *page;
  288. struct kvm_rmap_desc *desc;
  289. unsigned long *rmapp;
  290. int i;
  291. if (!is_rmap_pte(*spte))
  292. return;
  293. gfn = unalias_gfn(vcpu->kvm, gfn);
  294. page = page_header(__pa(spte));
  295. page->gfns[spte - page->spt] = gfn;
  296. rmapp = gfn_to_rmap(vcpu->kvm, gfn);
  297. if (!*rmapp) {
  298. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  299. *rmapp = (unsigned long)spte;
  300. } else if (!(*rmapp & 1)) {
  301. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  302. desc = mmu_alloc_rmap_desc(vcpu);
  303. desc->shadow_ptes[0] = (u64 *)*rmapp;
  304. desc->shadow_ptes[1] = spte;
  305. *rmapp = (unsigned long)desc | 1;
  306. } else {
  307. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  308. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  309. while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
  310. desc = desc->more;
  311. if (desc->shadow_ptes[RMAP_EXT-1]) {
  312. desc->more = mmu_alloc_rmap_desc(vcpu);
  313. desc = desc->more;
  314. }
  315. for (i = 0; desc->shadow_ptes[i]; ++i)
  316. ;
  317. desc->shadow_ptes[i] = spte;
  318. }
  319. }
  320. static void rmap_desc_remove_entry(unsigned long *rmapp,
  321. struct kvm_rmap_desc *desc,
  322. int i,
  323. struct kvm_rmap_desc *prev_desc)
  324. {
  325. int j;
  326. for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
  327. ;
  328. desc->shadow_ptes[i] = desc->shadow_ptes[j];
  329. desc->shadow_ptes[j] = NULL;
  330. if (j != 0)
  331. return;
  332. if (!prev_desc && !desc->more)
  333. *rmapp = (unsigned long)desc->shadow_ptes[0];
  334. else
  335. if (prev_desc)
  336. prev_desc->more = desc->more;
  337. else
  338. *rmapp = (unsigned long)desc->more | 1;
  339. mmu_free_rmap_desc(desc);
  340. }
  341. static void rmap_remove(struct kvm *kvm, u64 *spte)
  342. {
  343. struct kvm_rmap_desc *desc;
  344. struct kvm_rmap_desc *prev_desc;
  345. struct kvm_mmu_page *page;
  346. unsigned long *rmapp;
  347. int i;
  348. if (!is_rmap_pte(*spte))
  349. return;
  350. page = page_header(__pa(spte));
  351. kvm_release_page(pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >>
  352. PAGE_SHIFT));
  353. rmapp = gfn_to_rmap(kvm, page->gfns[spte - page->spt]);
  354. if (!*rmapp) {
  355. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  356. BUG();
  357. } else if (!(*rmapp & 1)) {
  358. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  359. if ((u64 *)*rmapp != spte) {
  360. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  361. spte, *spte);
  362. BUG();
  363. }
  364. *rmapp = 0;
  365. } else {
  366. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  367. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  368. prev_desc = NULL;
  369. while (desc) {
  370. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
  371. if (desc->shadow_ptes[i] == spte) {
  372. rmap_desc_remove_entry(rmapp,
  373. desc, i,
  374. prev_desc);
  375. return;
  376. }
  377. prev_desc = desc;
  378. desc = desc->more;
  379. }
  380. BUG();
  381. }
  382. }
  383. static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
  384. {
  385. struct kvm_rmap_desc *desc;
  386. struct kvm_rmap_desc *prev_desc;
  387. u64 *prev_spte;
  388. int i;
  389. if (!*rmapp)
  390. return NULL;
  391. else if (!(*rmapp & 1)) {
  392. if (!spte)
  393. return (u64 *)*rmapp;
  394. return NULL;
  395. }
  396. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  397. prev_desc = NULL;
  398. prev_spte = NULL;
  399. while (desc) {
  400. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
  401. if (prev_spte == spte)
  402. return desc->shadow_ptes[i];
  403. prev_spte = desc->shadow_ptes[i];
  404. }
  405. desc = desc->more;
  406. }
  407. return NULL;
  408. }
  409. static void rmap_write_protect(struct kvm *kvm, u64 gfn)
  410. {
  411. unsigned long *rmapp;
  412. u64 *spte;
  413. gfn = unalias_gfn(kvm, gfn);
  414. rmapp = gfn_to_rmap(kvm, gfn);
  415. spte = rmap_next(kvm, rmapp, NULL);
  416. while (spte) {
  417. BUG_ON(!spte);
  418. BUG_ON(!(*spte & PT_PRESENT_MASK));
  419. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  420. if (is_writeble_pte(*spte))
  421. set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
  422. kvm_flush_remote_tlbs(kvm);
  423. spte = rmap_next(kvm, rmapp, spte);
  424. }
  425. }
  426. #ifdef MMU_DEBUG
  427. static int is_empty_shadow_page(u64 *spt)
  428. {
  429. u64 *pos;
  430. u64 *end;
  431. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  432. if ((*pos & ~PT_SHADOW_IO_MARK) != shadow_trap_nonpresent_pte) {
  433. printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
  434. pos, *pos);
  435. return 0;
  436. }
  437. return 1;
  438. }
  439. #endif
  440. static void kvm_mmu_free_page(struct kvm *kvm,
  441. struct kvm_mmu_page *page_head)
  442. {
  443. ASSERT(is_empty_shadow_page(page_head->spt));
  444. list_del(&page_head->link);
  445. __free_page(virt_to_page(page_head->spt));
  446. __free_page(virt_to_page(page_head->gfns));
  447. kfree(page_head);
  448. ++kvm->n_free_mmu_pages;
  449. }
  450. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  451. {
  452. return gfn;
  453. }
  454. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  455. u64 *parent_pte)
  456. {
  457. struct kvm_mmu_page *page;
  458. if (!vcpu->kvm->n_free_mmu_pages)
  459. return NULL;
  460. page = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache,
  461. sizeof *page);
  462. page->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
  463. page->gfns = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
  464. set_page_private(virt_to_page(page->spt), (unsigned long)page);
  465. list_add(&page->link, &vcpu->kvm->active_mmu_pages);
  466. ASSERT(is_empty_shadow_page(page->spt));
  467. page->slot_bitmap = 0;
  468. page->multimapped = 0;
  469. page->parent_pte = parent_pte;
  470. --vcpu->kvm->n_free_mmu_pages;
  471. return page;
  472. }
  473. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  474. struct kvm_mmu_page *page, u64 *parent_pte)
  475. {
  476. struct kvm_pte_chain *pte_chain;
  477. struct hlist_node *node;
  478. int i;
  479. if (!parent_pte)
  480. return;
  481. if (!page->multimapped) {
  482. u64 *old = page->parent_pte;
  483. if (!old) {
  484. page->parent_pte = parent_pte;
  485. return;
  486. }
  487. page->multimapped = 1;
  488. pte_chain = mmu_alloc_pte_chain(vcpu);
  489. INIT_HLIST_HEAD(&page->parent_ptes);
  490. hlist_add_head(&pte_chain->link, &page->parent_ptes);
  491. pte_chain->parent_ptes[0] = old;
  492. }
  493. hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
  494. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  495. continue;
  496. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  497. if (!pte_chain->parent_ptes[i]) {
  498. pte_chain->parent_ptes[i] = parent_pte;
  499. return;
  500. }
  501. }
  502. pte_chain = mmu_alloc_pte_chain(vcpu);
  503. BUG_ON(!pte_chain);
  504. hlist_add_head(&pte_chain->link, &page->parent_ptes);
  505. pte_chain->parent_ptes[0] = parent_pte;
  506. }
  507. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *page,
  508. u64 *parent_pte)
  509. {
  510. struct kvm_pte_chain *pte_chain;
  511. struct hlist_node *node;
  512. int i;
  513. if (!page->multimapped) {
  514. BUG_ON(page->parent_pte != parent_pte);
  515. page->parent_pte = NULL;
  516. return;
  517. }
  518. hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
  519. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  520. if (!pte_chain->parent_ptes[i])
  521. break;
  522. if (pte_chain->parent_ptes[i] != parent_pte)
  523. continue;
  524. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  525. && pte_chain->parent_ptes[i + 1]) {
  526. pte_chain->parent_ptes[i]
  527. = pte_chain->parent_ptes[i + 1];
  528. ++i;
  529. }
  530. pte_chain->parent_ptes[i] = NULL;
  531. if (i == 0) {
  532. hlist_del(&pte_chain->link);
  533. mmu_free_pte_chain(pte_chain);
  534. if (hlist_empty(&page->parent_ptes)) {
  535. page->multimapped = 0;
  536. page->parent_pte = NULL;
  537. }
  538. }
  539. return;
  540. }
  541. BUG();
  542. }
  543. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm,
  544. gfn_t gfn)
  545. {
  546. unsigned index;
  547. struct hlist_head *bucket;
  548. struct kvm_mmu_page *page;
  549. struct hlist_node *node;
  550. pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
  551. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  552. bucket = &kvm->mmu_page_hash[index];
  553. hlist_for_each_entry(page, node, bucket, hash_link)
  554. if (page->gfn == gfn && !page->role.metaphysical) {
  555. pgprintk("%s: found role %x\n",
  556. __FUNCTION__, page->role.word);
  557. return page;
  558. }
  559. return NULL;
  560. }
  561. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  562. gfn_t gfn,
  563. gva_t gaddr,
  564. unsigned level,
  565. int metaphysical,
  566. unsigned hugepage_access,
  567. u64 *parent_pte)
  568. {
  569. union kvm_mmu_page_role role;
  570. unsigned index;
  571. unsigned quadrant;
  572. struct hlist_head *bucket;
  573. struct kvm_mmu_page *page;
  574. struct hlist_node *node;
  575. role.word = 0;
  576. role.glevels = vcpu->mmu.root_level;
  577. role.level = level;
  578. role.metaphysical = metaphysical;
  579. role.hugepage_access = hugepage_access;
  580. if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
  581. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  582. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  583. role.quadrant = quadrant;
  584. }
  585. pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
  586. gfn, role.word);
  587. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  588. bucket = &vcpu->kvm->mmu_page_hash[index];
  589. hlist_for_each_entry(page, node, bucket, hash_link)
  590. if (page->gfn == gfn && page->role.word == role.word) {
  591. mmu_page_add_parent_pte(vcpu, page, parent_pte);
  592. pgprintk("%s: found\n", __FUNCTION__);
  593. return page;
  594. }
  595. page = kvm_mmu_alloc_page(vcpu, parent_pte);
  596. if (!page)
  597. return page;
  598. pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
  599. page->gfn = gfn;
  600. page->role = role;
  601. hlist_add_head(&page->hash_link, bucket);
  602. vcpu->mmu.prefetch_page(vcpu, page);
  603. if (!metaphysical)
  604. rmap_write_protect(vcpu->kvm, gfn);
  605. return page;
  606. }
  607. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  608. struct kvm_mmu_page *page)
  609. {
  610. unsigned i;
  611. u64 *pt;
  612. u64 ent;
  613. pt = page->spt;
  614. if (page->role.level == PT_PAGE_TABLE_LEVEL) {
  615. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  616. if (is_shadow_present_pte(pt[i]))
  617. rmap_remove(kvm, &pt[i]);
  618. pt[i] = shadow_trap_nonpresent_pte;
  619. }
  620. kvm_flush_remote_tlbs(kvm);
  621. return;
  622. }
  623. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  624. ent = pt[i];
  625. pt[i] = shadow_trap_nonpresent_pte;
  626. if (!is_shadow_present_pte(ent))
  627. continue;
  628. ent &= PT64_BASE_ADDR_MASK;
  629. mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
  630. }
  631. kvm_flush_remote_tlbs(kvm);
  632. }
  633. static void kvm_mmu_put_page(struct kvm_mmu_page *page,
  634. u64 *parent_pte)
  635. {
  636. mmu_page_remove_parent_pte(page, parent_pte);
  637. }
  638. static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
  639. {
  640. int i;
  641. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  642. if (kvm->vcpus[i])
  643. kvm->vcpus[i]->last_pte_updated = NULL;
  644. }
  645. static void kvm_mmu_zap_page(struct kvm *kvm,
  646. struct kvm_mmu_page *page)
  647. {
  648. u64 *parent_pte;
  649. while (page->multimapped || page->parent_pte) {
  650. if (!page->multimapped)
  651. parent_pte = page->parent_pte;
  652. else {
  653. struct kvm_pte_chain *chain;
  654. chain = container_of(page->parent_ptes.first,
  655. struct kvm_pte_chain, link);
  656. parent_pte = chain->parent_ptes[0];
  657. }
  658. BUG_ON(!parent_pte);
  659. kvm_mmu_put_page(page, parent_pte);
  660. set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
  661. }
  662. kvm_mmu_page_unlink_children(kvm, page);
  663. if (!page->root_count) {
  664. hlist_del(&page->hash_link);
  665. kvm_mmu_free_page(kvm, page);
  666. } else
  667. list_move(&page->link, &kvm->active_mmu_pages);
  668. kvm_mmu_reset_last_pte_updated(kvm);
  669. }
  670. /*
  671. * Changing the number of mmu pages allocated to the vm
  672. * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
  673. */
  674. void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
  675. {
  676. /*
  677. * If we set the number of mmu pages to be smaller be than the
  678. * number of actived pages , we must to free some mmu pages before we
  679. * change the value
  680. */
  681. if ((kvm->n_alloc_mmu_pages - kvm->n_free_mmu_pages) >
  682. kvm_nr_mmu_pages) {
  683. int n_used_mmu_pages = kvm->n_alloc_mmu_pages
  684. - kvm->n_free_mmu_pages;
  685. while (n_used_mmu_pages > kvm_nr_mmu_pages) {
  686. struct kvm_mmu_page *page;
  687. page = container_of(kvm->active_mmu_pages.prev,
  688. struct kvm_mmu_page, link);
  689. kvm_mmu_zap_page(kvm, page);
  690. n_used_mmu_pages--;
  691. }
  692. kvm->n_free_mmu_pages = 0;
  693. }
  694. else
  695. kvm->n_free_mmu_pages += kvm_nr_mmu_pages
  696. - kvm->n_alloc_mmu_pages;
  697. kvm->n_alloc_mmu_pages = kvm_nr_mmu_pages;
  698. }
  699. static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
  700. {
  701. unsigned index;
  702. struct hlist_head *bucket;
  703. struct kvm_mmu_page *page;
  704. struct hlist_node *node, *n;
  705. int r;
  706. pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
  707. r = 0;
  708. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  709. bucket = &kvm->mmu_page_hash[index];
  710. hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
  711. if (page->gfn == gfn && !page->role.metaphysical) {
  712. pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
  713. page->role.word);
  714. kvm_mmu_zap_page(kvm, page);
  715. r = 1;
  716. }
  717. return r;
  718. }
  719. static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
  720. {
  721. struct kvm_mmu_page *page;
  722. while ((page = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
  723. pgprintk("%s: zap %lx %x\n",
  724. __FUNCTION__, gfn, page->role.word);
  725. kvm_mmu_zap_page(kvm, page);
  726. }
  727. }
  728. static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
  729. {
  730. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
  731. struct kvm_mmu_page *page_head = page_header(__pa(pte));
  732. __set_bit(slot, &page_head->slot_bitmap);
  733. }
  734. hpa_t gpa_to_hpa(struct kvm *kvm, gpa_t gpa)
  735. {
  736. struct page *page;
  737. hpa_t hpa;
  738. ASSERT((gpa & HPA_ERR_MASK) == 0);
  739. page = gfn_to_page(kvm, gpa >> PAGE_SHIFT);
  740. hpa = ((hpa_t)page_to_pfn(page) << PAGE_SHIFT) | (gpa & (PAGE_SIZE-1));
  741. if (is_error_page(page))
  742. return hpa | HPA_ERR_MASK;
  743. return hpa;
  744. }
  745. hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
  746. {
  747. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  748. if (gpa == UNMAPPED_GVA)
  749. return UNMAPPED_GVA;
  750. return gpa_to_hpa(vcpu->kvm, gpa);
  751. }
  752. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  753. {
  754. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  755. if (gpa == UNMAPPED_GVA)
  756. return NULL;
  757. return pfn_to_page(gpa_to_hpa(vcpu->kvm, gpa) >> PAGE_SHIFT);
  758. }
  759. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  760. {
  761. }
  762. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
  763. {
  764. int level = PT32E_ROOT_LEVEL;
  765. hpa_t table_addr = vcpu->mmu.root_hpa;
  766. for (; ; level--) {
  767. u32 index = PT64_INDEX(v, level);
  768. u64 *table;
  769. u64 pte;
  770. ASSERT(VALID_PAGE(table_addr));
  771. table = __va(table_addr);
  772. if (level == 1) {
  773. int was_rmapped;
  774. pte = table[index];
  775. was_rmapped = is_rmap_pte(pte);
  776. if (is_shadow_present_pte(pte) && is_writeble_pte(pte))
  777. return 0;
  778. mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
  779. page_header_update_slot(vcpu->kvm, table, v);
  780. table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
  781. PT_USER_MASK;
  782. if (!was_rmapped)
  783. rmap_add(vcpu, &table[index], v >> PAGE_SHIFT);
  784. else
  785. kvm_release_page(pfn_to_page(p >> PAGE_SHIFT));
  786. return 0;
  787. }
  788. if (table[index] == shadow_trap_nonpresent_pte) {
  789. struct kvm_mmu_page *new_table;
  790. gfn_t pseudo_gfn;
  791. pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
  792. >> PAGE_SHIFT;
  793. new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
  794. v, level - 1,
  795. 1, 3, &table[index]);
  796. if (!new_table) {
  797. pgprintk("nonpaging_map: ENOMEM\n");
  798. kvm_release_page(pfn_to_page(p >> PAGE_SHIFT));
  799. return -ENOMEM;
  800. }
  801. table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
  802. | PT_WRITABLE_MASK | PT_USER_MASK;
  803. }
  804. table_addr = table[index] & PT64_BASE_ADDR_MASK;
  805. }
  806. }
  807. static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
  808. struct kvm_mmu_page *sp)
  809. {
  810. int i;
  811. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  812. sp->spt[i] = shadow_trap_nonpresent_pte;
  813. }
  814. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  815. {
  816. int i;
  817. struct kvm_mmu_page *page;
  818. if (!VALID_PAGE(vcpu->mmu.root_hpa))
  819. return;
  820. #ifdef CONFIG_X86_64
  821. if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  822. hpa_t root = vcpu->mmu.root_hpa;
  823. page = page_header(root);
  824. --page->root_count;
  825. vcpu->mmu.root_hpa = INVALID_PAGE;
  826. return;
  827. }
  828. #endif
  829. for (i = 0; i < 4; ++i) {
  830. hpa_t root = vcpu->mmu.pae_root[i];
  831. if (root) {
  832. root &= PT64_BASE_ADDR_MASK;
  833. page = page_header(root);
  834. --page->root_count;
  835. }
  836. vcpu->mmu.pae_root[i] = INVALID_PAGE;
  837. }
  838. vcpu->mmu.root_hpa = INVALID_PAGE;
  839. }
  840. static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
  841. {
  842. int i;
  843. gfn_t root_gfn;
  844. struct kvm_mmu_page *page;
  845. root_gfn = vcpu->cr3 >> PAGE_SHIFT;
  846. #ifdef CONFIG_X86_64
  847. if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  848. hpa_t root = vcpu->mmu.root_hpa;
  849. ASSERT(!VALID_PAGE(root));
  850. page = kvm_mmu_get_page(vcpu, root_gfn, 0,
  851. PT64_ROOT_LEVEL, 0, 0, NULL);
  852. root = __pa(page->spt);
  853. ++page->root_count;
  854. vcpu->mmu.root_hpa = root;
  855. return;
  856. }
  857. #endif
  858. for (i = 0; i < 4; ++i) {
  859. hpa_t root = vcpu->mmu.pae_root[i];
  860. ASSERT(!VALID_PAGE(root));
  861. if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) {
  862. if (!is_present_pte(vcpu->pdptrs[i])) {
  863. vcpu->mmu.pae_root[i] = 0;
  864. continue;
  865. }
  866. root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
  867. } else if (vcpu->mmu.root_level == 0)
  868. root_gfn = 0;
  869. page = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  870. PT32_ROOT_LEVEL, !is_paging(vcpu),
  871. 0, NULL);
  872. root = __pa(page->spt);
  873. ++page->root_count;
  874. vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
  875. }
  876. vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
  877. }
  878. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  879. {
  880. return vaddr;
  881. }
  882. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  883. u32 error_code)
  884. {
  885. gpa_t addr = gva;
  886. hpa_t paddr;
  887. int r;
  888. r = mmu_topup_memory_caches(vcpu);
  889. if (r)
  890. return r;
  891. ASSERT(vcpu);
  892. ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
  893. paddr = gpa_to_hpa(vcpu->kvm, addr & PT64_BASE_ADDR_MASK);
  894. if (is_error_hpa(paddr)) {
  895. kvm_release_page(pfn_to_page((paddr & PT64_BASE_ADDR_MASK)
  896. >> PAGE_SHIFT));
  897. return 1;
  898. }
  899. return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
  900. }
  901. static void nonpaging_free(struct kvm_vcpu *vcpu)
  902. {
  903. mmu_free_roots(vcpu);
  904. }
  905. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  906. {
  907. struct kvm_mmu *context = &vcpu->mmu;
  908. context->new_cr3 = nonpaging_new_cr3;
  909. context->page_fault = nonpaging_page_fault;
  910. context->gva_to_gpa = nonpaging_gva_to_gpa;
  911. context->free = nonpaging_free;
  912. context->prefetch_page = nonpaging_prefetch_page;
  913. context->root_level = 0;
  914. context->shadow_root_level = PT32E_ROOT_LEVEL;
  915. context->root_hpa = INVALID_PAGE;
  916. return 0;
  917. }
  918. static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  919. {
  920. ++vcpu->stat.tlb_flush;
  921. kvm_x86_ops->tlb_flush(vcpu);
  922. }
  923. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  924. {
  925. pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
  926. mmu_free_roots(vcpu);
  927. }
  928. static void inject_page_fault(struct kvm_vcpu *vcpu,
  929. u64 addr,
  930. u32 err_code)
  931. {
  932. kvm_x86_ops->inject_page_fault(vcpu, addr, err_code);
  933. }
  934. static void paging_free(struct kvm_vcpu *vcpu)
  935. {
  936. nonpaging_free(vcpu);
  937. }
  938. #define PTTYPE 64
  939. #include "paging_tmpl.h"
  940. #undef PTTYPE
  941. #define PTTYPE 32
  942. #include "paging_tmpl.h"
  943. #undef PTTYPE
  944. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  945. {
  946. struct kvm_mmu *context = &vcpu->mmu;
  947. ASSERT(is_pae(vcpu));
  948. context->new_cr3 = paging_new_cr3;
  949. context->page_fault = paging64_page_fault;
  950. context->gva_to_gpa = paging64_gva_to_gpa;
  951. context->prefetch_page = paging64_prefetch_page;
  952. context->free = paging_free;
  953. context->root_level = level;
  954. context->shadow_root_level = level;
  955. context->root_hpa = INVALID_PAGE;
  956. return 0;
  957. }
  958. static int paging64_init_context(struct kvm_vcpu *vcpu)
  959. {
  960. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  961. }
  962. static int paging32_init_context(struct kvm_vcpu *vcpu)
  963. {
  964. struct kvm_mmu *context = &vcpu->mmu;
  965. context->new_cr3 = paging_new_cr3;
  966. context->page_fault = paging32_page_fault;
  967. context->gva_to_gpa = paging32_gva_to_gpa;
  968. context->free = paging_free;
  969. context->prefetch_page = paging32_prefetch_page;
  970. context->root_level = PT32_ROOT_LEVEL;
  971. context->shadow_root_level = PT32E_ROOT_LEVEL;
  972. context->root_hpa = INVALID_PAGE;
  973. return 0;
  974. }
  975. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  976. {
  977. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  978. }
  979. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  980. {
  981. ASSERT(vcpu);
  982. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  983. if (!is_paging(vcpu))
  984. return nonpaging_init_context(vcpu);
  985. else if (is_long_mode(vcpu))
  986. return paging64_init_context(vcpu);
  987. else if (is_pae(vcpu))
  988. return paging32E_init_context(vcpu);
  989. else
  990. return paging32_init_context(vcpu);
  991. }
  992. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  993. {
  994. ASSERT(vcpu);
  995. if (VALID_PAGE(vcpu->mmu.root_hpa)) {
  996. vcpu->mmu.free(vcpu);
  997. vcpu->mmu.root_hpa = INVALID_PAGE;
  998. }
  999. }
  1000. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  1001. {
  1002. destroy_kvm_mmu(vcpu);
  1003. return init_kvm_mmu(vcpu);
  1004. }
  1005. EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
  1006. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  1007. {
  1008. int r;
  1009. mutex_lock(&vcpu->kvm->lock);
  1010. r = mmu_topup_memory_caches(vcpu);
  1011. if (r)
  1012. goto out;
  1013. mmu_alloc_roots(vcpu);
  1014. kvm_x86_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
  1015. kvm_mmu_flush_tlb(vcpu);
  1016. out:
  1017. mutex_unlock(&vcpu->kvm->lock);
  1018. return r;
  1019. }
  1020. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  1021. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  1022. {
  1023. mmu_free_roots(vcpu);
  1024. }
  1025. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  1026. struct kvm_mmu_page *page,
  1027. u64 *spte)
  1028. {
  1029. u64 pte;
  1030. struct kvm_mmu_page *child;
  1031. pte = *spte;
  1032. if (is_shadow_present_pte(pte)) {
  1033. if (page->role.level == PT_PAGE_TABLE_LEVEL)
  1034. rmap_remove(vcpu->kvm, spte);
  1035. else {
  1036. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1037. mmu_page_remove_parent_pte(child, spte);
  1038. }
  1039. }
  1040. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  1041. kvm_flush_remote_tlbs(vcpu->kvm);
  1042. }
  1043. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  1044. struct kvm_mmu_page *page,
  1045. u64 *spte,
  1046. const void *new, int bytes,
  1047. int offset_in_pte)
  1048. {
  1049. if (page->role.level != PT_PAGE_TABLE_LEVEL)
  1050. return;
  1051. if (page->role.glevels == PT32_ROOT_LEVEL)
  1052. paging32_update_pte(vcpu, page, spte, new, bytes,
  1053. offset_in_pte);
  1054. else
  1055. paging64_update_pte(vcpu, page, spte, new, bytes,
  1056. offset_in_pte);
  1057. }
  1058. static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
  1059. {
  1060. u64 *spte = vcpu->last_pte_updated;
  1061. return !!(spte && (*spte & PT_ACCESSED_MASK));
  1062. }
  1063. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  1064. const u8 *new, int bytes)
  1065. {
  1066. gfn_t gfn = gpa >> PAGE_SHIFT;
  1067. struct kvm_mmu_page *page;
  1068. struct hlist_node *node, *n;
  1069. struct hlist_head *bucket;
  1070. unsigned index;
  1071. u64 *spte;
  1072. unsigned offset = offset_in_page(gpa);
  1073. unsigned pte_size;
  1074. unsigned page_offset;
  1075. unsigned misaligned;
  1076. unsigned quadrant;
  1077. int level;
  1078. int flooded = 0;
  1079. int npte;
  1080. pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
  1081. kvm_mmu_audit(vcpu, "pre pte write");
  1082. if (gfn == vcpu->last_pt_write_gfn
  1083. && !last_updated_pte_accessed(vcpu)) {
  1084. ++vcpu->last_pt_write_count;
  1085. if (vcpu->last_pt_write_count >= 3)
  1086. flooded = 1;
  1087. } else {
  1088. vcpu->last_pt_write_gfn = gfn;
  1089. vcpu->last_pt_write_count = 1;
  1090. vcpu->last_pte_updated = NULL;
  1091. }
  1092. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  1093. bucket = &vcpu->kvm->mmu_page_hash[index];
  1094. hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
  1095. if (page->gfn != gfn || page->role.metaphysical)
  1096. continue;
  1097. pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  1098. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  1099. misaligned |= bytes < 4;
  1100. if (misaligned || flooded) {
  1101. /*
  1102. * Misaligned accesses are too much trouble to fix
  1103. * up; also, they usually indicate a page is not used
  1104. * as a page table.
  1105. *
  1106. * If we're seeing too many writes to a page,
  1107. * it may no longer be a page table, or we may be
  1108. * forking, in which case it is better to unmap the
  1109. * page.
  1110. */
  1111. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  1112. gpa, bytes, page->role.word);
  1113. kvm_mmu_zap_page(vcpu->kvm, page);
  1114. continue;
  1115. }
  1116. page_offset = offset;
  1117. level = page->role.level;
  1118. npte = 1;
  1119. if (page->role.glevels == PT32_ROOT_LEVEL) {
  1120. page_offset <<= 1; /* 32->64 */
  1121. /*
  1122. * A 32-bit pde maps 4MB while the shadow pdes map
  1123. * only 2MB. So we need to double the offset again
  1124. * and zap two pdes instead of one.
  1125. */
  1126. if (level == PT32_ROOT_LEVEL) {
  1127. page_offset &= ~7; /* kill rounding error */
  1128. page_offset <<= 1;
  1129. npte = 2;
  1130. }
  1131. quadrant = page_offset >> PAGE_SHIFT;
  1132. page_offset &= ~PAGE_MASK;
  1133. if (quadrant != page->role.quadrant)
  1134. continue;
  1135. }
  1136. spte = &page->spt[page_offset / sizeof(*spte)];
  1137. while (npte--) {
  1138. mmu_pte_write_zap_pte(vcpu, page, spte);
  1139. mmu_pte_write_new_pte(vcpu, page, spte, new, bytes,
  1140. page_offset & (pte_size - 1));
  1141. ++spte;
  1142. }
  1143. }
  1144. kvm_mmu_audit(vcpu, "post pte write");
  1145. }
  1146. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  1147. {
  1148. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  1149. return kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1150. }
  1151. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  1152. {
  1153. while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
  1154. struct kvm_mmu_page *page;
  1155. page = container_of(vcpu->kvm->active_mmu_pages.prev,
  1156. struct kvm_mmu_page, link);
  1157. kvm_mmu_zap_page(vcpu->kvm, page);
  1158. }
  1159. }
  1160. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  1161. {
  1162. struct kvm_mmu_page *page;
  1163. while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
  1164. page = container_of(vcpu->kvm->active_mmu_pages.next,
  1165. struct kvm_mmu_page, link);
  1166. kvm_mmu_zap_page(vcpu->kvm, page);
  1167. }
  1168. free_page((unsigned long)vcpu->mmu.pae_root);
  1169. }
  1170. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  1171. {
  1172. struct page *page;
  1173. int i;
  1174. ASSERT(vcpu);
  1175. if (vcpu->kvm->n_requested_mmu_pages)
  1176. vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_requested_mmu_pages;
  1177. else
  1178. vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_alloc_mmu_pages;
  1179. /*
  1180. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  1181. * Therefore we need to allocate shadow page tables in the first
  1182. * 4GB of memory, which happens to fit the DMA32 zone.
  1183. */
  1184. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  1185. if (!page)
  1186. goto error_1;
  1187. vcpu->mmu.pae_root = page_address(page);
  1188. for (i = 0; i < 4; ++i)
  1189. vcpu->mmu.pae_root[i] = INVALID_PAGE;
  1190. return 0;
  1191. error_1:
  1192. free_mmu_pages(vcpu);
  1193. return -ENOMEM;
  1194. }
  1195. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  1196. {
  1197. ASSERT(vcpu);
  1198. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  1199. return alloc_mmu_pages(vcpu);
  1200. }
  1201. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  1202. {
  1203. ASSERT(vcpu);
  1204. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  1205. return init_kvm_mmu(vcpu);
  1206. }
  1207. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  1208. {
  1209. ASSERT(vcpu);
  1210. destroy_kvm_mmu(vcpu);
  1211. free_mmu_pages(vcpu);
  1212. mmu_free_memory_caches(vcpu);
  1213. }
  1214. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  1215. {
  1216. struct kvm_mmu_page *page;
  1217. list_for_each_entry(page, &kvm->active_mmu_pages, link) {
  1218. int i;
  1219. u64 *pt;
  1220. if (!test_bit(slot, &page->slot_bitmap))
  1221. continue;
  1222. pt = page->spt;
  1223. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  1224. /* avoid RMW */
  1225. if (pt[i] & PT_WRITABLE_MASK)
  1226. pt[i] &= ~PT_WRITABLE_MASK;
  1227. }
  1228. }
  1229. void kvm_mmu_zap_all(struct kvm *kvm)
  1230. {
  1231. struct kvm_mmu_page *page, *node;
  1232. list_for_each_entry_safe(page, node, &kvm->active_mmu_pages, link)
  1233. kvm_mmu_zap_page(kvm, page);
  1234. kvm_flush_remote_tlbs(kvm);
  1235. }
  1236. void kvm_mmu_module_exit(void)
  1237. {
  1238. if (pte_chain_cache)
  1239. kmem_cache_destroy(pte_chain_cache);
  1240. if (rmap_desc_cache)
  1241. kmem_cache_destroy(rmap_desc_cache);
  1242. if (mmu_page_header_cache)
  1243. kmem_cache_destroy(mmu_page_header_cache);
  1244. }
  1245. int kvm_mmu_module_init(void)
  1246. {
  1247. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  1248. sizeof(struct kvm_pte_chain),
  1249. 0, 0, NULL);
  1250. if (!pte_chain_cache)
  1251. goto nomem;
  1252. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  1253. sizeof(struct kvm_rmap_desc),
  1254. 0, 0, NULL);
  1255. if (!rmap_desc_cache)
  1256. goto nomem;
  1257. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  1258. sizeof(struct kvm_mmu_page),
  1259. 0, 0, NULL);
  1260. if (!mmu_page_header_cache)
  1261. goto nomem;
  1262. return 0;
  1263. nomem:
  1264. kvm_mmu_module_exit();
  1265. return -ENOMEM;
  1266. }
  1267. #ifdef AUDIT
  1268. static const char *audit_msg;
  1269. static gva_t canonicalize(gva_t gva)
  1270. {
  1271. #ifdef CONFIG_X86_64
  1272. gva = (long long)(gva << 16) >> 16;
  1273. #endif
  1274. return gva;
  1275. }
  1276. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  1277. gva_t va, int level)
  1278. {
  1279. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  1280. int i;
  1281. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  1282. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  1283. u64 ent = pt[i];
  1284. if (ent == shadow_trap_nonpresent_pte)
  1285. continue;
  1286. va = canonicalize(va);
  1287. if (level > 1) {
  1288. if (ent == shadow_notrap_nonpresent_pte)
  1289. printk(KERN_ERR "audit: (%s) nontrapping pte"
  1290. " in nonleaf level: levels %d gva %lx"
  1291. " level %d pte %llx\n", audit_msg,
  1292. vcpu->mmu.root_level, va, level, ent);
  1293. audit_mappings_page(vcpu, ent, va, level - 1);
  1294. } else {
  1295. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
  1296. hpa_t hpa = gpa_to_hpa(vcpu, gpa);
  1297. struct page *page;
  1298. if (is_shadow_present_pte(ent)
  1299. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  1300. printk(KERN_ERR "xx audit error: (%s) levels %d"
  1301. " gva %lx gpa %llx hpa %llx ent %llx %d\n",
  1302. audit_msg, vcpu->mmu.root_level,
  1303. va, gpa, hpa, ent,
  1304. is_shadow_present_pte(ent));
  1305. else if (ent == shadow_notrap_nonpresent_pte
  1306. && !is_error_hpa(hpa))
  1307. printk(KERN_ERR "audit: (%s) notrap shadow,"
  1308. " valid guest gva %lx\n", audit_msg, va);
  1309. page = pfn_to_page((gpa & PT64_BASE_ADDR_MASK)
  1310. >> PAGE_SHIFT);
  1311. kvm_release_page(page);
  1312. }
  1313. }
  1314. }
  1315. static void audit_mappings(struct kvm_vcpu *vcpu)
  1316. {
  1317. unsigned i;
  1318. if (vcpu->mmu.root_level == 4)
  1319. audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
  1320. else
  1321. for (i = 0; i < 4; ++i)
  1322. if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
  1323. audit_mappings_page(vcpu,
  1324. vcpu->mmu.pae_root[i],
  1325. i << 30,
  1326. 2);
  1327. }
  1328. static int count_rmaps(struct kvm_vcpu *vcpu)
  1329. {
  1330. int nmaps = 0;
  1331. int i, j, k;
  1332. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  1333. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  1334. struct kvm_rmap_desc *d;
  1335. for (j = 0; j < m->npages; ++j) {
  1336. unsigned long *rmapp = &m->rmap[j];
  1337. if (!*rmapp)
  1338. continue;
  1339. if (!(*rmapp & 1)) {
  1340. ++nmaps;
  1341. continue;
  1342. }
  1343. d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  1344. while (d) {
  1345. for (k = 0; k < RMAP_EXT; ++k)
  1346. if (d->shadow_ptes[k])
  1347. ++nmaps;
  1348. else
  1349. break;
  1350. d = d->more;
  1351. }
  1352. }
  1353. }
  1354. return nmaps;
  1355. }
  1356. static int count_writable_mappings(struct kvm_vcpu *vcpu)
  1357. {
  1358. int nmaps = 0;
  1359. struct kvm_mmu_page *page;
  1360. int i;
  1361. list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
  1362. u64 *pt = page->spt;
  1363. if (page->role.level != PT_PAGE_TABLE_LEVEL)
  1364. continue;
  1365. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1366. u64 ent = pt[i];
  1367. if (!(ent & PT_PRESENT_MASK))
  1368. continue;
  1369. if (!(ent & PT_WRITABLE_MASK))
  1370. continue;
  1371. ++nmaps;
  1372. }
  1373. }
  1374. return nmaps;
  1375. }
  1376. static void audit_rmap(struct kvm_vcpu *vcpu)
  1377. {
  1378. int n_rmap = count_rmaps(vcpu);
  1379. int n_actual = count_writable_mappings(vcpu);
  1380. if (n_rmap != n_actual)
  1381. printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
  1382. __FUNCTION__, audit_msg, n_rmap, n_actual);
  1383. }
  1384. static void audit_write_protection(struct kvm_vcpu *vcpu)
  1385. {
  1386. struct kvm_mmu_page *page;
  1387. struct kvm_memory_slot *slot;
  1388. unsigned long *rmapp;
  1389. gfn_t gfn;
  1390. list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
  1391. if (page->role.metaphysical)
  1392. continue;
  1393. slot = gfn_to_memslot(vcpu->kvm, page->gfn);
  1394. gfn = unalias_gfn(vcpu->kvm, page->gfn);
  1395. rmapp = &slot->rmap[gfn - slot->base_gfn];
  1396. if (*rmapp)
  1397. printk(KERN_ERR "%s: (%s) shadow page has writable"
  1398. " mappings: gfn %lx role %x\n",
  1399. __FUNCTION__, audit_msg, page->gfn,
  1400. page->role.word);
  1401. }
  1402. }
  1403. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  1404. {
  1405. int olddbg = dbg;
  1406. dbg = 0;
  1407. audit_msg = msg;
  1408. audit_rmap(vcpu);
  1409. audit_write_protection(vcpu);
  1410. audit_mappings(vcpu);
  1411. dbg = olddbg;
  1412. }
  1413. #endif