i2c-exynos5.txt 1.2 KB

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  1. * Samsung's High Speed I2C controller
  2. The Samsung's High Speed I2C controller is used to interface with I2C devices
  3. at various speeds ranging from 100khz to 3.4Mhz.
  4. Required properties:
  5. - compatible: value should be.
  6. -> "samsung,exynos5-hsi2c", for i2c compatible with exynos5 hsi2c.
  7. - reg: physical base address of the controller and length of memory mapped
  8. region.
  9. - interrupts: interrupt number to the cpu.
  10. - #address-cells: always 1 (for i2c addresses)
  11. - #size-cells: always 0
  12. - Pinctrl:
  13. - pinctrl-0: Pin control group to be used for this controller.
  14. - pinctrl-names: Should contain only one value - "default".
  15. Optional properties:
  16. - clock-frequency: Desired operating frequency in Hz of the bus.
  17. -> If not specified, the bus operates in fast-speed mode at
  18. at 100khz.
  19. -> If specified, the bus operates in high-speed mode only if the
  20. clock-frequency is >= 1Mhz.
  21. Example:
  22. hsi2c@12ca0000 {
  23. compatible = "samsung,exynos5-hsi2c";
  24. reg = <0x12ca0000 0x100>;
  25. interrupts = <56>;
  26. clock-frequency = <100000>;
  27. pinctrl-0 = <&i2c4_bus>;
  28. pinctrl-names = "default";
  29. #address-cells = <1>;
  30. #size-cells = <0>;
  31. s2mps11_pmic@66 {
  32. compatible = "samsung,s2mps11-pmic";
  33. reg = <0x66>;
  34. };
  35. };