intel_lvds.c 29 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. * Dave Airlie <airlied@linux.ie>
  27. * Jesse Barnes <jesse.barnes@intel.com>
  28. */
  29. #include <linux/dmi.h>
  30. #include <linux/i2c.h>
  31. #include "drmP.h"
  32. #include "drm.h"
  33. #include "drm_crtc.h"
  34. #include "drm_edid.h"
  35. #include "intel_drv.h"
  36. #include "i915_drm.h"
  37. #include "i915_drv.h"
  38. #include <linux/acpi.h>
  39. /*
  40. * the following four scaling options are defined.
  41. * #define DRM_MODE_SCALE_NON_GPU 0
  42. * #define DRM_MODE_SCALE_FULLSCREEN 1
  43. * #define DRM_MODE_SCALE_NO_SCALE 2
  44. * #define DRM_MODE_SCALE_ASPECT 3
  45. */
  46. /* Private structure for the integrated LVDS support */
  47. struct intel_lvds_priv {
  48. int fitting_mode;
  49. u32 pfit_control;
  50. u32 pfit_pgm_ratios;
  51. };
  52. /**
  53. * Sets the backlight level.
  54. *
  55. * \param level backlight level, from 0 to intel_lvds_get_max_backlight().
  56. */
  57. static void intel_lvds_set_backlight(struct drm_device *dev, int level)
  58. {
  59. struct drm_i915_private *dev_priv = dev->dev_private;
  60. u32 blc_pwm_ctl, reg;
  61. if (IS_IGDNG(dev))
  62. reg = BLC_PWM_CPU_CTL;
  63. else
  64. reg = BLC_PWM_CTL;
  65. blc_pwm_ctl = I915_READ(reg) & ~BACKLIGHT_DUTY_CYCLE_MASK;
  66. I915_WRITE(reg, (blc_pwm_ctl |
  67. (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
  68. }
  69. /**
  70. * Returns the maximum level of the backlight duty cycle field.
  71. */
  72. static u32 intel_lvds_get_max_backlight(struct drm_device *dev)
  73. {
  74. struct drm_i915_private *dev_priv = dev->dev_private;
  75. u32 reg;
  76. if (IS_IGDNG(dev))
  77. reg = BLC_PWM_PCH_CTL2;
  78. else
  79. reg = BLC_PWM_CTL;
  80. return ((I915_READ(reg) & BACKLIGHT_MODULATION_FREQ_MASK) >>
  81. BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
  82. }
  83. /**
  84. * Sets the power state for the panel.
  85. */
  86. static void intel_lvds_set_power(struct drm_device *dev, bool on)
  87. {
  88. struct drm_i915_private *dev_priv = dev->dev_private;
  89. u32 pp_status, ctl_reg, status_reg;
  90. if (IS_IGDNG(dev)) {
  91. ctl_reg = PCH_PP_CONTROL;
  92. status_reg = PCH_PP_STATUS;
  93. } else {
  94. ctl_reg = PP_CONTROL;
  95. status_reg = PP_STATUS;
  96. }
  97. if (on) {
  98. I915_WRITE(ctl_reg, I915_READ(ctl_reg) |
  99. POWER_TARGET_ON);
  100. do {
  101. pp_status = I915_READ(status_reg);
  102. } while ((pp_status & PP_ON) == 0);
  103. intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle);
  104. } else {
  105. intel_lvds_set_backlight(dev, 0);
  106. I915_WRITE(ctl_reg, I915_READ(ctl_reg) &
  107. ~POWER_TARGET_ON);
  108. do {
  109. pp_status = I915_READ(status_reg);
  110. } while (pp_status & PP_ON);
  111. }
  112. }
  113. static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
  114. {
  115. struct drm_device *dev = encoder->dev;
  116. if (mode == DRM_MODE_DPMS_ON)
  117. intel_lvds_set_power(dev, true);
  118. else
  119. intel_lvds_set_power(dev, false);
  120. /* XXX: We never power down the LVDS pairs. */
  121. }
  122. static void intel_lvds_save(struct drm_connector *connector)
  123. {
  124. struct drm_device *dev = connector->dev;
  125. struct drm_i915_private *dev_priv = dev->dev_private;
  126. u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
  127. u32 pwm_ctl_reg;
  128. if (IS_IGDNG(dev)) {
  129. pp_on_reg = PCH_PP_ON_DELAYS;
  130. pp_off_reg = PCH_PP_OFF_DELAYS;
  131. pp_ctl_reg = PCH_PP_CONTROL;
  132. pp_div_reg = PCH_PP_DIVISOR;
  133. pwm_ctl_reg = BLC_PWM_CPU_CTL;
  134. } else {
  135. pp_on_reg = PP_ON_DELAYS;
  136. pp_off_reg = PP_OFF_DELAYS;
  137. pp_ctl_reg = PP_CONTROL;
  138. pp_div_reg = PP_DIVISOR;
  139. pwm_ctl_reg = BLC_PWM_CTL;
  140. }
  141. dev_priv->savePP_ON = I915_READ(pp_on_reg);
  142. dev_priv->savePP_OFF = I915_READ(pp_off_reg);
  143. dev_priv->savePP_CONTROL = I915_READ(pp_ctl_reg);
  144. dev_priv->savePP_DIVISOR = I915_READ(pp_div_reg);
  145. dev_priv->saveBLC_PWM_CTL = I915_READ(pwm_ctl_reg);
  146. dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
  147. BACKLIGHT_DUTY_CYCLE_MASK);
  148. /*
  149. * If the light is off at server startup, just make it full brightness
  150. */
  151. if (dev_priv->backlight_duty_cycle == 0)
  152. dev_priv->backlight_duty_cycle =
  153. intel_lvds_get_max_backlight(dev);
  154. }
  155. static void intel_lvds_restore(struct drm_connector *connector)
  156. {
  157. struct drm_device *dev = connector->dev;
  158. struct drm_i915_private *dev_priv = dev->dev_private;
  159. u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
  160. u32 pwm_ctl_reg;
  161. if (IS_IGDNG(dev)) {
  162. pp_on_reg = PCH_PP_ON_DELAYS;
  163. pp_off_reg = PCH_PP_OFF_DELAYS;
  164. pp_ctl_reg = PCH_PP_CONTROL;
  165. pp_div_reg = PCH_PP_DIVISOR;
  166. pwm_ctl_reg = BLC_PWM_CPU_CTL;
  167. } else {
  168. pp_on_reg = PP_ON_DELAYS;
  169. pp_off_reg = PP_OFF_DELAYS;
  170. pp_ctl_reg = PP_CONTROL;
  171. pp_div_reg = PP_DIVISOR;
  172. pwm_ctl_reg = BLC_PWM_CTL;
  173. }
  174. I915_WRITE(pwm_ctl_reg, dev_priv->saveBLC_PWM_CTL);
  175. I915_WRITE(pp_on_reg, dev_priv->savePP_ON);
  176. I915_WRITE(pp_off_reg, dev_priv->savePP_OFF);
  177. I915_WRITE(pp_div_reg, dev_priv->savePP_DIVISOR);
  178. I915_WRITE(pp_ctl_reg, dev_priv->savePP_CONTROL);
  179. if (dev_priv->savePP_CONTROL & POWER_TARGET_ON)
  180. intel_lvds_set_power(dev, true);
  181. else
  182. intel_lvds_set_power(dev, false);
  183. }
  184. static int intel_lvds_mode_valid(struct drm_connector *connector,
  185. struct drm_display_mode *mode)
  186. {
  187. struct drm_device *dev = connector->dev;
  188. struct drm_i915_private *dev_priv = dev->dev_private;
  189. struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
  190. if (fixed_mode) {
  191. if (mode->hdisplay > fixed_mode->hdisplay)
  192. return MODE_PANEL;
  193. if (mode->vdisplay > fixed_mode->vdisplay)
  194. return MODE_PANEL;
  195. }
  196. return MODE_OK;
  197. }
  198. static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
  199. struct drm_display_mode *mode,
  200. struct drm_display_mode *adjusted_mode)
  201. {
  202. /*
  203. * float point operation is not supported . So the PANEL_RATIO_FACTOR
  204. * is defined, which can avoid the float point computation when
  205. * calculating the panel ratio.
  206. */
  207. #define PANEL_RATIO_FACTOR 8192
  208. struct drm_device *dev = encoder->dev;
  209. struct drm_i915_private *dev_priv = dev->dev_private;
  210. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
  211. struct drm_encoder *tmp_encoder;
  212. struct intel_output *intel_output = enc_to_intel_output(encoder);
  213. struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
  214. u32 pfit_control = 0, pfit_pgm_ratios = 0;
  215. int left_border = 0, right_border = 0, top_border = 0;
  216. int bottom_border = 0;
  217. bool border = 0;
  218. int panel_ratio, desired_ratio, vert_scale, horiz_scale;
  219. int horiz_ratio, vert_ratio;
  220. u32 hsync_width, vsync_width;
  221. u32 hblank_width, vblank_width;
  222. u32 hsync_pos, vsync_pos;
  223. /* Should never happen!! */
  224. if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
  225. DRM_ERROR("Can't support LVDS on pipe A\n");
  226. return false;
  227. }
  228. /* Should never happen!! */
  229. list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
  230. if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
  231. DRM_ERROR("Can't enable LVDS and another "
  232. "encoder on the same pipe\n");
  233. return false;
  234. }
  235. }
  236. /* If we don't have a panel mode, there is nothing we can do */
  237. if (dev_priv->panel_fixed_mode == NULL)
  238. return true;
  239. /*
  240. * If we have timings from the BIOS for the panel, put them in
  241. * to the adjusted mode. The CRTC will be set up for this mode,
  242. * with the panel scaling set up to source from the H/VDisplay
  243. * of the original mode.
  244. */
  245. if (dev_priv->panel_fixed_mode != NULL) {
  246. adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
  247. adjusted_mode->hsync_start =
  248. dev_priv->panel_fixed_mode->hsync_start;
  249. adjusted_mode->hsync_end =
  250. dev_priv->panel_fixed_mode->hsync_end;
  251. adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
  252. adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
  253. adjusted_mode->vsync_start =
  254. dev_priv->panel_fixed_mode->vsync_start;
  255. adjusted_mode->vsync_end =
  256. dev_priv->panel_fixed_mode->vsync_end;
  257. adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
  258. adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
  259. drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
  260. }
  261. /* Make sure pre-965s set dither correctly */
  262. if (!IS_I965G(dev)) {
  263. if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
  264. pfit_control |= PANEL_8TO6_DITHER_ENABLE;
  265. }
  266. /* Native modes don't need fitting */
  267. if (adjusted_mode->hdisplay == mode->hdisplay &&
  268. adjusted_mode->vdisplay == mode->vdisplay) {
  269. pfit_pgm_ratios = 0;
  270. border = 0;
  271. goto out;
  272. }
  273. /* 965+ wants fuzzy fitting */
  274. if (IS_I965G(dev))
  275. pfit_control |= (intel_crtc->pipe << PFIT_PIPE_SHIFT) |
  276. PFIT_FILTER_FUZZY;
  277. hsync_width = adjusted_mode->crtc_hsync_end -
  278. adjusted_mode->crtc_hsync_start;
  279. vsync_width = adjusted_mode->crtc_vsync_end -
  280. adjusted_mode->crtc_vsync_start;
  281. hblank_width = adjusted_mode->crtc_hblank_end -
  282. adjusted_mode->crtc_hblank_start;
  283. vblank_width = adjusted_mode->crtc_vblank_end -
  284. adjusted_mode->crtc_vblank_start;
  285. /*
  286. * Deal with panel fitting options. Figure out how to stretch the
  287. * image based on its aspect ratio & the current panel fitting mode.
  288. */
  289. panel_ratio = adjusted_mode->hdisplay * PANEL_RATIO_FACTOR /
  290. adjusted_mode->vdisplay;
  291. desired_ratio = mode->hdisplay * PANEL_RATIO_FACTOR /
  292. mode->vdisplay;
  293. /*
  294. * Enable automatic panel scaling for non-native modes so that they fill
  295. * the screen. Should be enabled before the pipe is enabled, according
  296. * to register description and PRM.
  297. * Change the value here to see the borders for debugging
  298. */
  299. I915_WRITE(BCLRPAT_A, 0);
  300. I915_WRITE(BCLRPAT_B, 0);
  301. switch (lvds_priv->fitting_mode) {
  302. case DRM_MODE_SCALE_NO_SCALE:
  303. /*
  304. * For centered modes, we have to calculate border widths &
  305. * heights and modify the values programmed into the CRTC.
  306. */
  307. left_border = (adjusted_mode->hdisplay - mode->hdisplay) / 2;
  308. right_border = left_border;
  309. if (mode->hdisplay & 1)
  310. right_border++;
  311. top_border = (adjusted_mode->vdisplay - mode->vdisplay) / 2;
  312. bottom_border = top_border;
  313. if (mode->vdisplay & 1)
  314. bottom_border++;
  315. /* Set active & border values */
  316. adjusted_mode->crtc_hdisplay = mode->hdisplay;
  317. /* Keep the boder be even */
  318. if (right_border & 1)
  319. right_border++;
  320. /* use the border directly instead of border minuse one */
  321. adjusted_mode->crtc_hblank_start = mode->hdisplay +
  322. right_border;
  323. /* keep the blank width constant */
  324. adjusted_mode->crtc_hblank_end =
  325. adjusted_mode->crtc_hblank_start + hblank_width;
  326. /* get the hsync pos relative to hblank start */
  327. hsync_pos = (hblank_width - hsync_width) / 2;
  328. /* keep the hsync pos be even */
  329. if (hsync_pos & 1)
  330. hsync_pos++;
  331. adjusted_mode->crtc_hsync_start =
  332. adjusted_mode->crtc_hblank_start + hsync_pos;
  333. /* keep the hsync width constant */
  334. adjusted_mode->crtc_hsync_end =
  335. adjusted_mode->crtc_hsync_start + hsync_width;
  336. adjusted_mode->crtc_vdisplay = mode->vdisplay;
  337. /* use the border instead of border minus one */
  338. adjusted_mode->crtc_vblank_start = mode->vdisplay +
  339. bottom_border;
  340. /* keep the vblank width constant */
  341. adjusted_mode->crtc_vblank_end =
  342. adjusted_mode->crtc_vblank_start + vblank_width;
  343. /* get the vsync start postion relative to vblank start */
  344. vsync_pos = (vblank_width - vsync_width) / 2;
  345. adjusted_mode->crtc_vsync_start =
  346. adjusted_mode->crtc_vblank_start + vsync_pos;
  347. /* keep the vsync width constant */
  348. adjusted_mode->crtc_vsync_end =
  349. adjusted_mode->crtc_vblank_start + vsync_width;
  350. border = 1;
  351. break;
  352. case DRM_MODE_SCALE_ASPECT:
  353. /* Scale but preserve the spect ratio */
  354. pfit_control |= PFIT_ENABLE;
  355. if (IS_I965G(dev)) {
  356. /* 965+ is easy, it does everything in hw */
  357. if (panel_ratio > desired_ratio)
  358. pfit_control |= PFIT_SCALING_PILLAR;
  359. else if (panel_ratio < desired_ratio)
  360. pfit_control |= PFIT_SCALING_LETTER;
  361. else
  362. pfit_control |= PFIT_SCALING_AUTO;
  363. } else {
  364. /*
  365. * For earlier chips we have to calculate the scaling
  366. * ratio by hand and program it into the
  367. * PFIT_PGM_RATIO register
  368. */
  369. u32 horiz_bits, vert_bits, bits = 12;
  370. horiz_ratio = mode->hdisplay * PANEL_RATIO_FACTOR/
  371. adjusted_mode->hdisplay;
  372. vert_ratio = mode->vdisplay * PANEL_RATIO_FACTOR/
  373. adjusted_mode->vdisplay;
  374. horiz_scale = adjusted_mode->hdisplay *
  375. PANEL_RATIO_FACTOR / mode->hdisplay;
  376. vert_scale = adjusted_mode->vdisplay *
  377. PANEL_RATIO_FACTOR / mode->vdisplay;
  378. /* retain aspect ratio */
  379. if (panel_ratio > desired_ratio) { /* Pillar */
  380. u32 scaled_width;
  381. scaled_width = mode->hdisplay * vert_scale /
  382. PANEL_RATIO_FACTOR;
  383. horiz_ratio = vert_ratio;
  384. pfit_control |= (VERT_AUTO_SCALE |
  385. VERT_INTERP_BILINEAR |
  386. HORIZ_INTERP_BILINEAR);
  387. /* Pillar will have left/right borders */
  388. left_border = (adjusted_mode->hdisplay -
  389. scaled_width) / 2;
  390. right_border = left_border;
  391. if (mode->hdisplay & 1) /* odd resolutions */
  392. right_border++;
  393. /* keep the border be even */
  394. if (right_border & 1)
  395. right_border++;
  396. adjusted_mode->crtc_hdisplay = scaled_width;
  397. /* use border instead of border minus one */
  398. adjusted_mode->crtc_hblank_start =
  399. scaled_width + right_border;
  400. /* keep the hblank width constant */
  401. adjusted_mode->crtc_hblank_end =
  402. adjusted_mode->crtc_hblank_start +
  403. hblank_width;
  404. /*
  405. * get the hsync start pos relative to
  406. * hblank start
  407. */
  408. hsync_pos = (hblank_width - hsync_width) / 2;
  409. /* keep the hsync_pos be even */
  410. if (hsync_pos & 1)
  411. hsync_pos++;
  412. adjusted_mode->crtc_hsync_start =
  413. adjusted_mode->crtc_hblank_start +
  414. hsync_pos;
  415. /* keept hsync width constant */
  416. adjusted_mode->crtc_hsync_end =
  417. adjusted_mode->crtc_hsync_start +
  418. hsync_width;
  419. border = 1;
  420. } else if (panel_ratio < desired_ratio) { /* letter */
  421. u32 scaled_height = mode->vdisplay *
  422. horiz_scale / PANEL_RATIO_FACTOR;
  423. vert_ratio = horiz_ratio;
  424. pfit_control |= (HORIZ_AUTO_SCALE |
  425. VERT_INTERP_BILINEAR |
  426. HORIZ_INTERP_BILINEAR);
  427. /* Letterbox will have top/bottom border */
  428. top_border = (adjusted_mode->vdisplay -
  429. scaled_height) / 2;
  430. bottom_border = top_border;
  431. if (mode->vdisplay & 1)
  432. bottom_border++;
  433. adjusted_mode->crtc_vdisplay = scaled_height;
  434. /* use border instead of border minus one */
  435. adjusted_mode->crtc_vblank_start =
  436. scaled_height + bottom_border;
  437. /* keep the vblank width constant */
  438. adjusted_mode->crtc_vblank_end =
  439. adjusted_mode->crtc_vblank_start +
  440. vblank_width;
  441. /*
  442. * get the vsync start pos relative to
  443. * vblank start
  444. */
  445. vsync_pos = (vblank_width - vsync_width) / 2;
  446. adjusted_mode->crtc_vsync_start =
  447. adjusted_mode->crtc_vblank_start +
  448. vsync_pos;
  449. /* keep the vsync width constant */
  450. adjusted_mode->crtc_vsync_end =
  451. adjusted_mode->crtc_vsync_start +
  452. vsync_width;
  453. border = 1;
  454. } else {
  455. /* Aspects match, Let hw scale both directions */
  456. pfit_control |= (VERT_AUTO_SCALE |
  457. HORIZ_AUTO_SCALE |
  458. VERT_INTERP_BILINEAR |
  459. HORIZ_INTERP_BILINEAR);
  460. }
  461. horiz_bits = (1 << bits) * horiz_ratio /
  462. PANEL_RATIO_FACTOR;
  463. vert_bits = (1 << bits) * vert_ratio /
  464. PANEL_RATIO_FACTOR;
  465. pfit_pgm_ratios =
  466. ((vert_bits << PFIT_VERT_SCALE_SHIFT) &
  467. PFIT_VERT_SCALE_MASK) |
  468. ((horiz_bits << PFIT_HORIZ_SCALE_SHIFT) &
  469. PFIT_HORIZ_SCALE_MASK);
  470. }
  471. break;
  472. case DRM_MODE_SCALE_FULLSCREEN:
  473. /*
  474. * Full scaling, even if it changes the aspect ratio.
  475. * Fortunately this is all done for us in hw.
  476. */
  477. pfit_control |= PFIT_ENABLE;
  478. if (IS_I965G(dev))
  479. pfit_control |= PFIT_SCALING_AUTO;
  480. else
  481. pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
  482. VERT_INTERP_BILINEAR |
  483. HORIZ_INTERP_BILINEAR);
  484. break;
  485. default:
  486. break;
  487. }
  488. out:
  489. lvds_priv->pfit_control = pfit_control;
  490. lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
  491. /*
  492. * XXX: It would be nice to support lower refresh rates on the
  493. * panels to reduce power consumption, and perhaps match the
  494. * user's requested refresh rate.
  495. */
  496. return true;
  497. }
  498. static void intel_lvds_prepare(struct drm_encoder *encoder)
  499. {
  500. struct drm_device *dev = encoder->dev;
  501. struct drm_i915_private *dev_priv = dev->dev_private;
  502. u32 reg;
  503. if (IS_IGDNG(dev))
  504. reg = BLC_PWM_CPU_CTL;
  505. else
  506. reg = BLC_PWM_CTL;
  507. dev_priv->saveBLC_PWM_CTL = I915_READ(reg);
  508. dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
  509. BACKLIGHT_DUTY_CYCLE_MASK);
  510. intel_lvds_set_power(dev, false);
  511. }
  512. static void intel_lvds_commit( struct drm_encoder *encoder)
  513. {
  514. struct drm_device *dev = encoder->dev;
  515. struct drm_i915_private *dev_priv = dev->dev_private;
  516. if (dev_priv->backlight_duty_cycle == 0)
  517. dev_priv->backlight_duty_cycle =
  518. intel_lvds_get_max_backlight(dev);
  519. intel_lvds_set_power(dev, true);
  520. }
  521. static void intel_lvds_mode_set(struct drm_encoder *encoder,
  522. struct drm_display_mode *mode,
  523. struct drm_display_mode *adjusted_mode)
  524. {
  525. struct drm_device *dev = encoder->dev;
  526. struct drm_i915_private *dev_priv = dev->dev_private;
  527. struct intel_output *intel_output = enc_to_intel_output(encoder);
  528. struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
  529. /*
  530. * The LVDS pin pair will already have been turned on in the
  531. * intel_crtc_mode_set since it has a large impact on the DPLL
  532. * settings.
  533. */
  534. /* No panel fitting yet, fixme */
  535. if (IS_IGDNG(dev))
  536. return;
  537. /*
  538. * Enable automatic panel scaling so that non-native modes fill the
  539. * screen. Should be enabled before the pipe is enabled, according to
  540. * register description and PRM.
  541. */
  542. I915_WRITE(PFIT_PGM_RATIOS, lvds_priv->pfit_pgm_ratios);
  543. I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control);
  544. }
  545. /**
  546. * Detect the LVDS connection.
  547. *
  548. * This always returns CONNECTOR_STATUS_CONNECTED. This connector should only have
  549. * been set up if the LVDS was actually connected anyway.
  550. */
  551. static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector)
  552. {
  553. return connector_status_connected;
  554. }
  555. /**
  556. * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
  557. */
  558. static int intel_lvds_get_modes(struct drm_connector *connector)
  559. {
  560. struct drm_device *dev = connector->dev;
  561. struct intel_output *intel_output = to_intel_output(connector);
  562. struct drm_i915_private *dev_priv = dev->dev_private;
  563. int ret = 0;
  564. ret = intel_ddc_get_modes(intel_output);
  565. if (ret)
  566. return ret;
  567. /* Didn't get an EDID, so
  568. * Set wide sync ranges so we get all modes
  569. * handed to valid_mode for checking
  570. */
  571. connector->display_info.min_vfreq = 0;
  572. connector->display_info.max_vfreq = 200;
  573. connector->display_info.min_hfreq = 0;
  574. connector->display_info.max_hfreq = 200;
  575. if (dev_priv->panel_fixed_mode != NULL) {
  576. struct drm_display_mode *mode;
  577. mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
  578. drm_mode_probed_add(connector, mode);
  579. return 1;
  580. }
  581. return 0;
  582. }
  583. /**
  584. * intel_lvds_destroy - unregister and free LVDS structures
  585. * @connector: connector to free
  586. *
  587. * Unregister the DDC bus for this connector then free the driver private
  588. * structure.
  589. */
  590. static void intel_lvds_destroy(struct drm_connector *connector)
  591. {
  592. struct intel_output *intel_output = to_intel_output(connector);
  593. if (intel_output->ddc_bus)
  594. intel_i2c_destroy(intel_output->ddc_bus);
  595. drm_sysfs_connector_remove(connector);
  596. drm_connector_cleanup(connector);
  597. kfree(connector);
  598. }
  599. static int intel_lvds_set_property(struct drm_connector *connector,
  600. struct drm_property *property,
  601. uint64_t value)
  602. {
  603. struct drm_device *dev = connector->dev;
  604. struct intel_output *intel_output =
  605. to_intel_output(connector);
  606. if (property == dev->mode_config.scaling_mode_property &&
  607. connector->encoder) {
  608. struct drm_crtc *crtc = connector->encoder->crtc;
  609. struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
  610. if (value == DRM_MODE_SCALE_NON_GPU) {
  611. DRM_DEBUG_KMS("non_GPU property is unsupported\n");
  612. return 0;
  613. }
  614. if (lvds_priv->fitting_mode == value) {
  615. /* the LVDS scaling property is not changed */
  616. return 0;
  617. }
  618. lvds_priv->fitting_mode = value;
  619. if (crtc && crtc->enabled) {
  620. /*
  621. * If the CRTC is enabled, the display will be changed
  622. * according to the new panel fitting mode.
  623. */
  624. drm_crtc_helper_set_mode(crtc, &crtc->mode,
  625. crtc->x, crtc->y, crtc->fb);
  626. }
  627. }
  628. return 0;
  629. }
  630. static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
  631. .dpms = intel_lvds_dpms,
  632. .mode_fixup = intel_lvds_mode_fixup,
  633. .prepare = intel_lvds_prepare,
  634. .mode_set = intel_lvds_mode_set,
  635. .commit = intel_lvds_commit,
  636. };
  637. static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
  638. .get_modes = intel_lvds_get_modes,
  639. .mode_valid = intel_lvds_mode_valid,
  640. .best_encoder = intel_best_encoder,
  641. };
  642. static const struct drm_connector_funcs intel_lvds_connector_funcs = {
  643. .dpms = drm_helper_connector_dpms,
  644. .save = intel_lvds_save,
  645. .restore = intel_lvds_restore,
  646. .detect = intel_lvds_detect,
  647. .fill_modes = drm_helper_probe_single_connector_modes,
  648. .set_property = intel_lvds_set_property,
  649. .destroy = intel_lvds_destroy,
  650. };
  651. static void intel_lvds_enc_destroy(struct drm_encoder *encoder)
  652. {
  653. drm_encoder_cleanup(encoder);
  654. }
  655. static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
  656. .destroy = intel_lvds_enc_destroy,
  657. };
  658. static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
  659. {
  660. DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
  661. return 1;
  662. }
  663. /* These systems claim to have LVDS, but really don't */
  664. static const struct dmi_system_id intel_no_lvds[] = {
  665. {
  666. .callback = intel_no_lvds_dmi_callback,
  667. .ident = "Apple Mac Mini (Core series)",
  668. .matches = {
  669. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  670. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
  671. },
  672. },
  673. {
  674. .callback = intel_no_lvds_dmi_callback,
  675. .ident = "Apple Mac Mini (Core 2 series)",
  676. .matches = {
  677. DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
  678. DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
  679. },
  680. },
  681. {
  682. .callback = intel_no_lvds_dmi_callback,
  683. .ident = "MSI IM-945GSE-A",
  684. .matches = {
  685. DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
  686. DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
  687. },
  688. },
  689. {
  690. .callback = intel_no_lvds_dmi_callback,
  691. .ident = "Dell Studio Hybrid",
  692. .matches = {
  693. DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
  694. DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
  695. },
  696. },
  697. {
  698. .callback = intel_no_lvds_dmi_callback,
  699. .ident = "AOpen Mini PC",
  700. .matches = {
  701. DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
  702. DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
  703. },
  704. },
  705. {
  706. .callback = intel_no_lvds_dmi_callback,
  707. .ident = "Aopen i945GTt-VFA",
  708. .matches = {
  709. DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
  710. },
  711. },
  712. { } /* terminating entry */
  713. };
  714. #ifdef CONFIG_ACPI
  715. /*
  716. * check_lid_device -- check whether @handle is an ACPI LID device.
  717. * @handle: ACPI device handle
  718. * @level : depth in the ACPI namespace tree
  719. * @context: the number of LID device when we find the device
  720. * @rv: a return value to fill if desired (Not use)
  721. */
  722. static acpi_status
  723. check_lid_device(acpi_handle handle, u32 level, void *context,
  724. void **return_value)
  725. {
  726. struct acpi_device *acpi_dev;
  727. int *lid_present = context;
  728. acpi_dev = NULL;
  729. /* Get the acpi device for device handle */
  730. if (acpi_bus_get_device(handle, &acpi_dev) || !acpi_dev) {
  731. /* If there is no ACPI device for handle, return */
  732. return AE_OK;
  733. }
  734. if (!strncmp(acpi_device_hid(acpi_dev), "PNP0C0D", 7))
  735. *lid_present = 1;
  736. return AE_OK;
  737. }
  738. /**
  739. * check whether there exists the ACPI LID device by enumerating the ACPI
  740. * device tree.
  741. */
  742. static int intel_lid_present(void)
  743. {
  744. int lid_present = 0;
  745. if (acpi_disabled) {
  746. /* If ACPI is disabled, there is no ACPI device tree to
  747. * check, so assume the LID device would have been present.
  748. */
  749. return 1;
  750. }
  751. acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
  752. ACPI_UINT32_MAX,
  753. check_lid_device, &lid_present, NULL);
  754. return lid_present;
  755. }
  756. #else
  757. static int intel_lid_present(void)
  758. {
  759. /* In the absence of ACPI built in, assume that the LID device would
  760. * have been present.
  761. */
  762. return 1;
  763. }
  764. #endif
  765. /**
  766. * intel_lvds_init - setup LVDS connectors on this device
  767. * @dev: drm device
  768. *
  769. * Create the connector, register the LVDS DDC bus, and try to figure out what
  770. * modes we can display on the LVDS panel (if present).
  771. */
  772. void intel_lvds_init(struct drm_device *dev)
  773. {
  774. struct drm_i915_private *dev_priv = dev->dev_private;
  775. struct intel_output *intel_output;
  776. struct drm_connector *connector;
  777. struct drm_encoder *encoder;
  778. struct drm_display_mode *scan; /* *modes, *bios_mode; */
  779. struct drm_crtc *crtc;
  780. struct intel_lvds_priv *lvds_priv;
  781. u32 lvds;
  782. int pipe, gpio = GPIOC;
  783. /* Skip init on machines we know falsely report LVDS */
  784. if (dmi_check_system(intel_no_lvds))
  785. return;
  786. /* Assume that any device without an ACPI LID device also doesn't
  787. * have an integrated LVDS. We would be better off parsing the BIOS
  788. * to get a reliable indicator, but that code isn't written yet.
  789. *
  790. * In the case of all-in-one desktops using LVDS that we've seen,
  791. * they're using SDVO LVDS.
  792. */
  793. if (!intel_lid_present())
  794. return;
  795. if (IS_IGDNG(dev)) {
  796. if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
  797. return;
  798. gpio = PCH_GPIOC;
  799. }
  800. intel_output = kzalloc(sizeof(struct intel_output) +
  801. sizeof(struct intel_lvds_priv), GFP_KERNEL);
  802. if (!intel_output) {
  803. return;
  804. }
  805. connector = &intel_output->base;
  806. encoder = &intel_output->enc;
  807. drm_connector_init(dev, &intel_output->base, &intel_lvds_connector_funcs,
  808. DRM_MODE_CONNECTOR_LVDS);
  809. drm_encoder_init(dev, &intel_output->enc, &intel_lvds_enc_funcs,
  810. DRM_MODE_ENCODER_LVDS);
  811. drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc);
  812. intel_output->type = INTEL_OUTPUT_LVDS;
  813. drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
  814. drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
  815. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  816. connector->interlace_allowed = false;
  817. connector->doublescan_allowed = false;
  818. lvds_priv = (struct intel_lvds_priv *)(intel_output + 1);
  819. intel_output->dev_priv = lvds_priv;
  820. /* create the scaling mode property */
  821. drm_mode_create_scaling_mode_property(dev);
  822. /*
  823. * the initial panel fitting mode will be FULL_SCREEN.
  824. */
  825. drm_connector_attach_property(&intel_output->base,
  826. dev->mode_config.scaling_mode_property,
  827. DRM_MODE_SCALE_FULLSCREEN);
  828. lvds_priv->fitting_mode = DRM_MODE_SCALE_FULLSCREEN;
  829. /*
  830. * LVDS discovery:
  831. * 1) check for EDID on DDC
  832. * 2) check for VBT data
  833. * 3) check to see if LVDS is already on
  834. * if none of the above, no panel
  835. * 4) make sure lid is open
  836. * if closed, act like it's not there for now
  837. */
  838. /* Set up the DDC bus. */
  839. intel_output->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C");
  840. if (!intel_output->ddc_bus) {
  841. dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
  842. "failed.\n");
  843. goto failed;
  844. }
  845. /*
  846. * Attempt to get the fixed panel mode from DDC. Assume that the
  847. * preferred mode is the right one.
  848. */
  849. intel_ddc_get_modes(intel_output);
  850. list_for_each_entry(scan, &connector->probed_modes, head) {
  851. mutex_lock(&dev->mode_config.mutex);
  852. if (scan->type & DRM_MODE_TYPE_PREFERRED) {
  853. dev_priv->panel_fixed_mode =
  854. drm_mode_duplicate(dev, scan);
  855. mutex_unlock(&dev->mode_config.mutex);
  856. goto out;
  857. }
  858. mutex_unlock(&dev->mode_config.mutex);
  859. }
  860. /* Failed to get EDID, what about VBT? */
  861. if (dev_priv->lfp_lvds_vbt_mode) {
  862. mutex_lock(&dev->mode_config.mutex);
  863. dev_priv->panel_fixed_mode =
  864. drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
  865. mutex_unlock(&dev->mode_config.mutex);
  866. if (dev_priv->panel_fixed_mode) {
  867. dev_priv->panel_fixed_mode->type |=
  868. DRM_MODE_TYPE_PREFERRED;
  869. goto out;
  870. }
  871. }
  872. /*
  873. * If we didn't get EDID, try checking if the panel is already turned
  874. * on. If so, assume that whatever is currently programmed is the
  875. * correct mode.
  876. */
  877. /* IGDNG: FIXME if still fail, not try pipe mode now */
  878. if (IS_IGDNG(dev))
  879. goto failed;
  880. lvds = I915_READ(LVDS);
  881. pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
  882. crtc = intel_get_crtc_from_pipe(dev, pipe);
  883. if (crtc && (lvds & LVDS_PORT_EN)) {
  884. dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc);
  885. if (dev_priv->panel_fixed_mode) {
  886. dev_priv->panel_fixed_mode->type |=
  887. DRM_MODE_TYPE_PREFERRED;
  888. goto out;
  889. }
  890. }
  891. /* If we still don't have a mode after all that, give up. */
  892. if (!dev_priv->panel_fixed_mode)
  893. goto failed;
  894. out:
  895. if (IS_IGDNG(dev)) {
  896. u32 pwm;
  897. /* make sure PWM is enabled */
  898. pwm = I915_READ(BLC_PWM_CPU_CTL2);
  899. pwm |= (PWM_ENABLE | PWM_PIPE_B);
  900. I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
  901. pwm = I915_READ(BLC_PWM_PCH_CTL1);
  902. pwm |= PWM_PCH_ENABLE;
  903. I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
  904. }
  905. drm_sysfs_connector_add(connector);
  906. return;
  907. failed:
  908. DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
  909. if (intel_output->ddc_bus)
  910. intel_i2c_destroy(intel_output->ddc_bus);
  911. drm_connector_cleanup(connector);
  912. kfree(intel_output);
  913. }