ide-dma.c 14 KB

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  1. /*
  2. * IDE DMA support (including IDE PCI BM-DMA).
  3. *
  4. * Copyright (C) 1995-1998 Mark Lord
  5. * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
  6. * Copyright (C) 2004, 2007 Bartlomiej Zolnierkiewicz
  7. *
  8. * May be copied or modified under the terms of the GNU General Public License
  9. *
  10. * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
  11. */
  12. /*
  13. * Special Thanks to Mark for his Six years of work.
  14. */
  15. /*
  16. * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
  17. * fixing the problem with the BIOS on some Acer motherboards.
  18. *
  19. * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
  20. * "TX" chipset compatibility and for providing patches for the "TX" chipset.
  21. *
  22. * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
  23. * at generic DMA -- his patches were referred to when preparing this code.
  24. *
  25. * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
  26. * for supplying a Promise UDMA board & WD UDMA drive for this work!
  27. */
  28. #include <linux/types.h>
  29. #include <linux/kernel.h>
  30. #include <linux/ide.h>
  31. #include <linux/scatterlist.h>
  32. #include <linux/dma-mapping.h>
  33. static const struct drive_list_entry drive_whitelist[] = {
  34. { "Micropolis 2112A" , NULL },
  35. { "CONNER CTMA 4000" , NULL },
  36. { "CONNER CTT8000-A" , NULL },
  37. { "ST34342A" , NULL },
  38. { NULL , NULL }
  39. };
  40. static const struct drive_list_entry drive_blacklist[] = {
  41. { "WDC AC11000H" , NULL },
  42. { "WDC AC22100H" , NULL },
  43. { "WDC AC32500H" , NULL },
  44. { "WDC AC33100H" , NULL },
  45. { "WDC AC31600H" , NULL },
  46. { "WDC AC32100H" , "24.09P07" },
  47. { "WDC AC23200L" , "21.10N21" },
  48. { "Compaq CRD-8241B" , NULL },
  49. { "CRD-8400B" , NULL },
  50. { "CRD-8480B", NULL },
  51. { "CRD-8482B", NULL },
  52. { "CRD-84" , NULL },
  53. { "SanDisk SDP3B" , NULL },
  54. { "SanDisk SDP3B-64" , NULL },
  55. { "SANYO CD-ROM CRD" , NULL },
  56. { "HITACHI CDR-8" , NULL },
  57. { "HITACHI CDR-8335" , NULL },
  58. { "HITACHI CDR-8435" , NULL },
  59. { "Toshiba CD-ROM XM-6202B" , NULL },
  60. { "TOSHIBA CD-ROM XM-1702BC", NULL },
  61. { "CD-532E-A" , NULL },
  62. { "E-IDE CD-ROM CR-840", NULL },
  63. { "CD-ROM Drive/F5A", NULL },
  64. { "WPI CDD-820", NULL },
  65. { "SAMSUNG CD-ROM SC-148C", NULL },
  66. { "SAMSUNG CD-ROM SC", NULL },
  67. { "ATAPI CD-ROM DRIVE 40X MAXIMUM", NULL },
  68. { "_NEC DV5800A", NULL },
  69. { "SAMSUNG CD-ROM SN-124", "N001" },
  70. { "Seagate STT20000A", NULL },
  71. { "CD-ROM CDR_U200", "1.09" },
  72. { NULL , NULL }
  73. };
  74. /**
  75. * ide_dma_intr - IDE DMA interrupt handler
  76. * @drive: the drive the interrupt is for
  77. *
  78. * Handle an interrupt completing a read/write DMA transfer on an
  79. * IDE device
  80. */
  81. ide_startstop_t ide_dma_intr(ide_drive_t *drive)
  82. {
  83. ide_hwif_t *hwif = drive->hwif;
  84. u8 stat = 0, dma_stat = 0;
  85. dma_stat = hwif->dma_ops->dma_end(drive);
  86. ide_destroy_dmatable(drive);
  87. stat = hwif->tp_ops->read_status(hwif);
  88. if (OK_STAT(stat, DRIVE_READY, drive->bad_wstat | ATA_DRQ)) {
  89. if (!dma_stat) {
  90. struct ide_cmd *cmd = &hwif->cmd;
  91. if ((cmd->tf_flags & IDE_TFLAG_FS) == 0)
  92. ide_finish_cmd(drive, cmd, stat);
  93. else
  94. ide_complete_rq(drive, 0,
  95. cmd->rq->nr_sectors << 9);
  96. return ide_stopped;
  97. }
  98. printk(KERN_ERR "%s: %s: bad DMA status (0x%02x)\n",
  99. drive->name, __func__, dma_stat);
  100. }
  101. return ide_error(drive, "dma_intr", stat);
  102. }
  103. int ide_dma_good_drive(ide_drive_t *drive)
  104. {
  105. return ide_in_drive_list(drive->id, drive_whitelist);
  106. }
  107. /**
  108. * ide_build_sglist - map IDE scatter gather for DMA I/O
  109. * @drive: the drive to build the DMA table for
  110. * @cmd: command
  111. *
  112. * Perform the DMA mapping magic necessary to access the source or
  113. * target buffers of a request via DMA. The lower layers of the
  114. * kernel provide the necessary cache management so that we can
  115. * operate in a portable fashion.
  116. */
  117. static int ide_build_sglist(ide_drive_t *drive, struct ide_cmd *cmd)
  118. {
  119. ide_hwif_t *hwif = drive->hwif;
  120. struct scatterlist *sg = hwif->sg_table;
  121. int i;
  122. ide_map_sg(drive, cmd);
  123. if (cmd->tf_flags & IDE_TFLAG_WRITE)
  124. cmd->sg_dma_direction = DMA_TO_DEVICE;
  125. else
  126. cmd->sg_dma_direction = DMA_FROM_DEVICE;
  127. i = dma_map_sg(hwif->dev, sg, cmd->sg_nents, cmd->sg_dma_direction);
  128. if (i == 0)
  129. ide_map_sg(drive, cmd);
  130. else {
  131. cmd->orig_sg_nents = cmd->sg_nents;
  132. cmd->sg_nents = i;
  133. }
  134. return i;
  135. }
  136. /**
  137. * ide_destroy_dmatable - clean up DMA mapping
  138. * @drive: The drive to unmap
  139. *
  140. * Teardown mappings after DMA has completed. This must be called
  141. * after the completion of each use of ide_build_dmatable and before
  142. * the next use of ide_build_dmatable. Failure to do so will cause
  143. * an oops as only one mapping can be live for each target at a given
  144. * time.
  145. */
  146. void ide_destroy_dmatable(ide_drive_t *drive)
  147. {
  148. ide_hwif_t *hwif = drive->hwif;
  149. struct ide_cmd *cmd = &hwif->cmd;
  150. dma_unmap_sg(hwif->dev, hwif->sg_table, cmd->orig_sg_nents,
  151. cmd->sg_dma_direction);
  152. }
  153. EXPORT_SYMBOL_GPL(ide_destroy_dmatable);
  154. /**
  155. * ide_dma_off_quietly - Generic DMA kill
  156. * @drive: drive to control
  157. *
  158. * Turn off the current DMA on this IDE controller.
  159. */
  160. void ide_dma_off_quietly(ide_drive_t *drive)
  161. {
  162. drive->dev_flags &= ~IDE_DFLAG_USING_DMA;
  163. ide_toggle_bounce(drive, 0);
  164. drive->hwif->dma_ops->dma_host_set(drive, 0);
  165. }
  166. EXPORT_SYMBOL(ide_dma_off_quietly);
  167. /**
  168. * ide_dma_off - disable DMA on a device
  169. * @drive: drive to disable DMA on
  170. *
  171. * Disable IDE DMA for a device on this IDE controller.
  172. * Inform the user that DMA has been disabled.
  173. */
  174. void ide_dma_off(ide_drive_t *drive)
  175. {
  176. printk(KERN_INFO "%s: DMA disabled\n", drive->name);
  177. ide_dma_off_quietly(drive);
  178. }
  179. EXPORT_SYMBOL(ide_dma_off);
  180. /**
  181. * ide_dma_on - Enable DMA on a device
  182. * @drive: drive to enable DMA on
  183. *
  184. * Enable IDE DMA for a device on this IDE controller.
  185. */
  186. void ide_dma_on(ide_drive_t *drive)
  187. {
  188. drive->dev_flags |= IDE_DFLAG_USING_DMA;
  189. ide_toggle_bounce(drive, 1);
  190. drive->hwif->dma_ops->dma_host_set(drive, 1);
  191. }
  192. int __ide_dma_bad_drive(ide_drive_t *drive)
  193. {
  194. u16 *id = drive->id;
  195. int blacklist = ide_in_drive_list(id, drive_blacklist);
  196. if (blacklist) {
  197. printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n",
  198. drive->name, (char *)&id[ATA_ID_PROD]);
  199. return blacklist;
  200. }
  201. return 0;
  202. }
  203. EXPORT_SYMBOL(__ide_dma_bad_drive);
  204. static const u8 xfer_mode_bases[] = {
  205. XFER_UDMA_0,
  206. XFER_MW_DMA_0,
  207. XFER_SW_DMA_0,
  208. };
  209. static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base, u8 req_mode)
  210. {
  211. u16 *id = drive->id;
  212. ide_hwif_t *hwif = drive->hwif;
  213. const struct ide_port_ops *port_ops = hwif->port_ops;
  214. unsigned int mask = 0;
  215. switch (base) {
  216. case XFER_UDMA_0:
  217. if ((id[ATA_ID_FIELD_VALID] & 4) == 0)
  218. break;
  219. if (port_ops && port_ops->udma_filter)
  220. mask = port_ops->udma_filter(drive);
  221. else
  222. mask = hwif->ultra_mask;
  223. mask &= id[ATA_ID_UDMA_MODES];
  224. /*
  225. * avoid false cable warning from eighty_ninty_three()
  226. */
  227. if (req_mode > XFER_UDMA_2) {
  228. if ((mask & 0x78) && (eighty_ninty_three(drive) == 0))
  229. mask &= 0x07;
  230. }
  231. break;
  232. case XFER_MW_DMA_0:
  233. if ((id[ATA_ID_FIELD_VALID] & 2) == 0)
  234. break;
  235. if (port_ops && port_ops->mdma_filter)
  236. mask = port_ops->mdma_filter(drive);
  237. else
  238. mask = hwif->mwdma_mask;
  239. mask &= id[ATA_ID_MWDMA_MODES];
  240. break;
  241. case XFER_SW_DMA_0:
  242. if (id[ATA_ID_FIELD_VALID] & 2) {
  243. mask = id[ATA_ID_SWDMA_MODES] & hwif->swdma_mask;
  244. } else if (id[ATA_ID_OLD_DMA_MODES] >> 8) {
  245. u8 mode = id[ATA_ID_OLD_DMA_MODES] >> 8;
  246. /*
  247. * if the mode is valid convert it to the mask
  248. * (the maximum allowed mode is XFER_SW_DMA_2)
  249. */
  250. if (mode <= 2)
  251. mask = ((2 << mode) - 1) & hwif->swdma_mask;
  252. }
  253. break;
  254. default:
  255. BUG();
  256. break;
  257. }
  258. return mask;
  259. }
  260. /**
  261. * ide_find_dma_mode - compute DMA speed
  262. * @drive: IDE device
  263. * @req_mode: requested mode
  264. *
  265. * Checks the drive/host capabilities and finds the speed to use for
  266. * the DMA transfer. The speed is then limited by the requested mode.
  267. *
  268. * Returns 0 if the drive/host combination is incapable of DMA transfers
  269. * or if the requested mode is not a DMA mode.
  270. */
  271. u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode)
  272. {
  273. ide_hwif_t *hwif = drive->hwif;
  274. unsigned int mask;
  275. int x, i;
  276. u8 mode = 0;
  277. if (drive->media != ide_disk) {
  278. if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
  279. return 0;
  280. }
  281. for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) {
  282. if (req_mode < xfer_mode_bases[i])
  283. continue;
  284. mask = ide_get_mode_mask(drive, xfer_mode_bases[i], req_mode);
  285. x = fls(mask) - 1;
  286. if (x >= 0) {
  287. mode = xfer_mode_bases[i] + x;
  288. break;
  289. }
  290. }
  291. if (hwif->chipset == ide_acorn && mode == 0) {
  292. /*
  293. * is this correct?
  294. */
  295. if (ide_dma_good_drive(drive) &&
  296. drive->id[ATA_ID_EIDE_DMA_TIME] < 150)
  297. mode = XFER_MW_DMA_1;
  298. }
  299. mode = min(mode, req_mode);
  300. printk(KERN_INFO "%s: %s mode selected\n", drive->name,
  301. mode ? ide_xfer_verbose(mode) : "no DMA");
  302. return mode;
  303. }
  304. EXPORT_SYMBOL_GPL(ide_find_dma_mode);
  305. static int ide_tune_dma(ide_drive_t *drive)
  306. {
  307. ide_hwif_t *hwif = drive->hwif;
  308. u8 speed;
  309. if (ata_id_has_dma(drive->id) == 0 ||
  310. (drive->dev_flags & IDE_DFLAG_NODMA))
  311. return 0;
  312. /* consult the list of known "bad" drives */
  313. if (__ide_dma_bad_drive(drive))
  314. return 0;
  315. if (ide_id_dma_bug(drive))
  316. return 0;
  317. if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
  318. return config_drive_for_dma(drive);
  319. speed = ide_max_dma_mode(drive);
  320. if (!speed)
  321. return 0;
  322. if (ide_set_dma_mode(drive, speed))
  323. return 0;
  324. return 1;
  325. }
  326. static int ide_dma_check(ide_drive_t *drive)
  327. {
  328. ide_hwif_t *hwif = drive->hwif;
  329. if (ide_tune_dma(drive))
  330. return 0;
  331. /* TODO: always do PIO fallback */
  332. if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
  333. return -1;
  334. ide_set_max_pio(drive);
  335. return -1;
  336. }
  337. int ide_id_dma_bug(ide_drive_t *drive)
  338. {
  339. u16 *id = drive->id;
  340. if (id[ATA_ID_FIELD_VALID] & 4) {
  341. if ((id[ATA_ID_UDMA_MODES] >> 8) &&
  342. (id[ATA_ID_MWDMA_MODES] >> 8))
  343. goto err_out;
  344. } else if (id[ATA_ID_FIELD_VALID] & 2) {
  345. if ((id[ATA_ID_MWDMA_MODES] >> 8) &&
  346. (id[ATA_ID_SWDMA_MODES] >> 8))
  347. goto err_out;
  348. }
  349. return 0;
  350. err_out:
  351. printk(KERN_ERR "%s: bad DMA info in identify block\n", drive->name);
  352. return 1;
  353. }
  354. int ide_set_dma(ide_drive_t *drive)
  355. {
  356. int rc;
  357. /*
  358. * Force DMAing for the beginning of the check.
  359. * Some chipsets appear to do interesting
  360. * things, if not checked and cleared.
  361. * PARANOIA!!!
  362. */
  363. ide_dma_off_quietly(drive);
  364. rc = ide_dma_check(drive);
  365. if (rc)
  366. return rc;
  367. ide_dma_on(drive);
  368. return 0;
  369. }
  370. void ide_check_dma_crc(ide_drive_t *drive)
  371. {
  372. u8 mode;
  373. ide_dma_off_quietly(drive);
  374. drive->crc_count = 0;
  375. mode = drive->current_speed;
  376. /*
  377. * Don't try non Ultra-DMA modes without iCRC's. Force the
  378. * device to PIO and make the user enable SWDMA/MWDMA modes.
  379. */
  380. if (mode > XFER_UDMA_0 && mode <= XFER_UDMA_7)
  381. mode--;
  382. else
  383. mode = XFER_PIO_4;
  384. ide_set_xfer_rate(drive, mode);
  385. if (drive->current_speed >= XFER_SW_DMA_0)
  386. ide_dma_on(drive);
  387. }
  388. void ide_dma_lost_irq(ide_drive_t *drive)
  389. {
  390. printk(KERN_ERR "%s: DMA interrupt recovery\n", drive->name);
  391. }
  392. EXPORT_SYMBOL_GPL(ide_dma_lost_irq);
  393. /*
  394. * un-busy the port etc, and clear any pending DMA status. we want to
  395. * retry the current request in pio mode instead of risking tossing it
  396. * all away
  397. */
  398. ide_startstop_t ide_dma_timeout_retry(ide_drive_t *drive, int error)
  399. {
  400. ide_hwif_t *hwif = drive->hwif;
  401. const struct ide_dma_ops *dma_ops = hwif->dma_ops;
  402. struct request *rq;
  403. ide_startstop_t ret = ide_stopped;
  404. /*
  405. * end current dma transaction
  406. */
  407. if (error < 0) {
  408. printk(KERN_WARNING "%s: DMA timeout error\n", drive->name);
  409. (void)dma_ops->dma_end(drive);
  410. ide_destroy_dmatable(drive);
  411. ret = ide_error(drive, "dma timeout error",
  412. hwif->tp_ops->read_status(hwif));
  413. } else {
  414. printk(KERN_WARNING "%s: DMA timeout retry\n", drive->name);
  415. if (dma_ops->dma_clear)
  416. dma_ops->dma_clear(drive);
  417. printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
  418. if (dma_ops->dma_test_irq(drive) == 0) {
  419. ide_dump_status(drive, "DMA timeout",
  420. hwif->tp_ops->read_status(hwif));
  421. (void)dma_ops->dma_end(drive);
  422. ide_destroy_dmatable(drive);
  423. }
  424. }
  425. /*
  426. * disable dma for now, but remember that we did so because of
  427. * a timeout -- we'll reenable after we finish this next request
  428. * (or rather the first chunk of it) in pio.
  429. */
  430. drive->dev_flags |= IDE_DFLAG_DMA_PIO_RETRY;
  431. drive->retry_pio++;
  432. ide_dma_off_quietly(drive);
  433. /*
  434. * un-busy drive etc and make sure request is sane
  435. */
  436. rq = hwif->rq;
  437. if (!rq)
  438. goto out;
  439. hwif->rq = NULL;
  440. rq->errors = 0;
  441. if (!rq->bio)
  442. goto out;
  443. rq->sector = rq->bio->bi_sector;
  444. rq->current_nr_sectors = bio_iovec(rq->bio)->bv_len >> 9;
  445. rq->hard_cur_sectors = rq->current_nr_sectors;
  446. rq->buffer = bio_data(rq->bio);
  447. out:
  448. return ret;
  449. }
  450. void ide_release_dma_engine(ide_hwif_t *hwif)
  451. {
  452. if (hwif->dmatable_cpu) {
  453. int prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
  454. dma_free_coherent(hwif->dev, prd_size,
  455. hwif->dmatable_cpu, hwif->dmatable_dma);
  456. hwif->dmatable_cpu = NULL;
  457. }
  458. }
  459. EXPORT_SYMBOL_GPL(ide_release_dma_engine);
  460. int ide_allocate_dma_engine(ide_hwif_t *hwif)
  461. {
  462. int prd_size;
  463. if (hwif->prd_max_nents == 0)
  464. hwif->prd_max_nents = PRD_ENTRIES;
  465. if (hwif->prd_ent_size == 0)
  466. hwif->prd_ent_size = PRD_BYTES;
  467. prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
  468. hwif->dmatable_cpu = dma_alloc_coherent(hwif->dev, prd_size,
  469. &hwif->dmatable_dma,
  470. GFP_ATOMIC);
  471. if (hwif->dmatable_cpu == NULL) {
  472. printk(KERN_ERR "%s: unable to allocate PRD table\n",
  473. hwif->name);
  474. return -ENOMEM;
  475. }
  476. return 0;
  477. }
  478. EXPORT_SYMBOL_GPL(ide_allocate_dma_engine);
  479. int ide_dma_prepare(ide_drive_t *drive, struct ide_cmd *cmd)
  480. {
  481. const struct ide_dma_ops *dma_ops = drive->hwif->dma_ops;
  482. if ((drive->dev_flags & IDE_DFLAG_USING_DMA) == 0 ||
  483. (dma_ops->dma_check && dma_ops->dma_check(drive, cmd)) ||
  484. ide_build_sglist(drive, cmd) == 0 ||
  485. dma_ops->dma_setup(drive, cmd))
  486. return 1;
  487. return 0;
  488. }