nm256.c 43 KB

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  1. /*
  2. * Driver for NeoMagic 256AV and 256ZX chipsets.
  3. * Copyright (c) 2000 by Takashi Iwai <tiwai@suse.de>
  4. *
  5. * Based on nm256_audio.c OSS driver in linux kernel.
  6. * The original author of OSS nm256 driver wishes to remain anonymous,
  7. * so I just put my acknoledgment to him/her here.
  8. * The original author's web page is found at
  9. * http://www.uglx.org/sony.html
  10. *
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <sound/driver.h>
  27. #include <asm/io.h>
  28. #include <linux/delay.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/init.h>
  31. #include <linux/pci.h>
  32. #include <linux/slab.h>
  33. #include <linux/moduleparam.h>
  34. #include <sound/core.h>
  35. #include <sound/info.h>
  36. #include <sound/control.h>
  37. #include <sound/pcm.h>
  38. #include <sound/ac97_codec.h>
  39. #include <sound/initval.h>
  40. #define CARD_NAME "NeoMagic 256AV/ZX"
  41. #define DRIVER_NAME "NM256"
  42. MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
  43. MODULE_DESCRIPTION("NeoMagic NM256AV/ZX");
  44. MODULE_LICENSE("GPL");
  45. MODULE_SUPPORTED_DEVICE("{{NeoMagic,NM256AV},"
  46. "{NeoMagic,NM256ZX}}");
  47. /*
  48. * some compile conditions.
  49. */
  50. static int index = SNDRV_DEFAULT_IDX1; /* Index */
  51. static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */
  52. static int playback_bufsize = 16;
  53. static int capture_bufsize = 16;
  54. static int force_ac97; /* disabled as default */
  55. static int buffer_top; /* not specified */
  56. static int use_cache; /* disabled */
  57. static int vaio_hack; /* disabled */
  58. static int reset_workaround;
  59. static int reset_workaround_2;
  60. module_param(index, int, 0444);
  61. MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard.");
  62. module_param(id, charp, 0444);
  63. MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard.");
  64. module_param(playback_bufsize, int, 0444);
  65. MODULE_PARM_DESC(playback_bufsize, "DAC frame size in kB for " CARD_NAME " soundcard.");
  66. module_param(capture_bufsize, int, 0444);
  67. MODULE_PARM_DESC(capture_bufsize, "ADC frame size in kB for " CARD_NAME " soundcard.");
  68. module_param(force_ac97, bool, 0444);
  69. MODULE_PARM_DESC(force_ac97, "Force to use AC97 codec for " CARD_NAME " soundcard.");
  70. module_param(buffer_top, int, 0444);
  71. MODULE_PARM_DESC(buffer_top, "Set the top address of audio buffer for " CARD_NAME " soundcard.");
  72. module_param(use_cache, bool, 0444);
  73. MODULE_PARM_DESC(use_cache, "Enable the cache for coefficient table access.");
  74. module_param(vaio_hack, bool, 0444);
  75. MODULE_PARM_DESC(vaio_hack, "Enable workaround for Sony VAIO notebooks.");
  76. module_param(reset_workaround, bool, 0444);
  77. MODULE_PARM_DESC(reset_workaround, "Enable AC97 RESET workaround for some laptops.");
  78. module_param(reset_workaround_2, bool, 0444);
  79. MODULE_PARM_DESC(reset_workaround_2, "Enable extended AC97 RESET workaround for some other laptops.");
  80. /* just for backward compatibility */
  81. static int enable;
  82. module_param(enable, bool, 0444);
  83. /*
  84. * hw definitions
  85. */
  86. /* The BIOS signature. */
  87. #define NM_SIGNATURE 0x4e4d0000
  88. /* Signature mask. */
  89. #define NM_SIG_MASK 0xffff0000
  90. /* Size of the second memory area. */
  91. #define NM_PORT2_SIZE 4096
  92. /* The base offset of the mixer in the second memory area. */
  93. #define NM_MIXER_OFFSET 0x600
  94. /* The maximum size of a coefficient entry. */
  95. #define NM_MAX_PLAYBACK_COEF_SIZE 0x5000
  96. #define NM_MAX_RECORD_COEF_SIZE 0x1260
  97. /* The interrupt register. */
  98. #define NM_INT_REG 0xa04
  99. /* And its bits. */
  100. #define NM_PLAYBACK_INT 0x40
  101. #define NM_RECORD_INT 0x100
  102. #define NM_MISC_INT_1 0x4000
  103. #define NM_MISC_INT_2 0x1
  104. #define NM_ACK_INT(chip, X) snd_nm256_writew(chip, NM_INT_REG, (X) << 1)
  105. /* The AV's "mixer ready" status bit and location. */
  106. #define NM_MIXER_STATUS_OFFSET 0xa04
  107. #define NM_MIXER_READY_MASK 0x0800
  108. #define NM_MIXER_PRESENCE 0xa06
  109. #define NM_PRESENCE_MASK 0x0050
  110. #define NM_PRESENCE_VALUE 0x0040
  111. /*
  112. * For the ZX. It uses the same interrupt register, but it holds 32
  113. * bits instead of 16.
  114. */
  115. #define NM2_PLAYBACK_INT 0x10000
  116. #define NM2_RECORD_INT 0x80000
  117. #define NM2_MISC_INT_1 0x8
  118. #define NM2_MISC_INT_2 0x2
  119. #define NM2_ACK_INT(chip, X) snd_nm256_writel(chip, NM_INT_REG, (X))
  120. /* The ZX's "mixer ready" status bit and location. */
  121. #define NM2_MIXER_STATUS_OFFSET 0xa06
  122. #define NM2_MIXER_READY_MASK 0x0800
  123. /* The playback registers start from here. */
  124. #define NM_PLAYBACK_REG_OFFSET 0x0
  125. /* The record registers start from here. */
  126. #define NM_RECORD_REG_OFFSET 0x200
  127. /* The rate register is located 2 bytes from the start of the register area. */
  128. #define NM_RATE_REG_OFFSET 2
  129. /* Mono/stereo flag, number of bits on playback, and rate mask. */
  130. #define NM_RATE_STEREO 1
  131. #define NM_RATE_BITS_16 2
  132. #define NM_RATE_MASK 0xf0
  133. /* Playback enable register. */
  134. #define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1)
  135. #define NM_PLAYBACK_ENABLE_FLAG 1
  136. #define NM_PLAYBACK_ONESHOT 2
  137. #define NM_PLAYBACK_FREERUN 4
  138. /* Mutes the audio output. */
  139. #define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18)
  140. #define NM_AUDIO_MUTE_LEFT 0x8000
  141. #define NM_AUDIO_MUTE_RIGHT 0x0080
  142. /* Recording enable register. */
  143. #define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0)
  144. #define NM_RECORD_ENABLE_FLAG 1
  145. #define NM_RECORD_FREERUN 2
  146. /* coefficient buffer pointer */
  147. #define NM_COEFF_START_OFFSET 0x1c
  148. #define NM_COEFF_END_OFFSET 0x20
  149. /* DMA buffer offsets */
  150. #define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4)
  151. #define NM_RBUFFER_END (NM_RECORD_REG_OFFSET + 0x10)
  152. #define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc)
  153. #define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8)
  154. #define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4)
  155. #define NM_PBUFFER_END (NM_PLAYBACK_REG_OFFSET + 0x14)
  156. #define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc)
  157. #define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8)
  158. /*
  159. * type definitions
  160. */
  161. typedef struct snd_nm256 nm256_t;
  162. typedef struct snd_nm256_stream nm256_stream_t;
  163. struct snd_nm256_stream {
  164. nm256_t *chip;
  165. snd_pcm_substream_t *substream;
  166. int running;
  167. int suspended;
  168. u32 buf; /* offset from chip->buffer */
  169. int bufsize; /* buffer size in bytes */
  170. void __iomem *bufptr; /* mapped pointer */
  171. unsigned long bufptr_addr; /* physical address of the mapped pointer */
  172. int dma_size; /* buffer size of the substream in bytes */
  173. int period_size; /* period size in bytes */
  174. int periods; /* # of periods */
  175. int shift; /* bit shifts */
  176. int cur_period; /* current period # */
  177. };
  178. struct snd_nm256 {
  179. snd_card_t *card;
  180. void __iomem *cport; /* control port */
  181. struct resource *res_cport; /* its resource */
  182. unsigned long cport_addr; /* physical address */
  183. void __iomem *buffer; /* buffer */
  184. struct resource *res_buffer; /* its resource */
  185. unsigned long buffer_addr; /* buffer phyiscal address */
  186. u32 buffer_start; /* start offset from pci resource 0 */
  187. u32 buffer_end; /* end offset */
  188. u32 buffer_size; /* total buffer size */
  189. u32 all_coeff_buf; /* coefficient buffer */
  190. u32 coeff_buf[2]; /* coefficient buffer for each stream */
  191. unsigned int coeffs_current: 1; /* coeff. table is loaded? */
  192. unsigned int use_cache: 1; /* use one big coef. table */
  193. unsigned int reset_workaround: 1; /* Workaround for some laptops to avoid freeze */
  194. unsigned int reset_workaround_2: 1; /* Extended workaround for some other laptops to avoid freeze */
  195. int mixer_base; /* register offset of ac97 mixer */
  196. int mixer_status_offset; /* offset of mixer status reg. */
  197. int mixer_status_mask; /* bit mask to test the mixer status */
  198. int irq;
  199. int irq_acks;
  200. irqreturn_t (*interrupt)(int, void *, struct pt_regs *);
  201. int badintrcount; /* counter to check bogus interrupts */
  202. struct semaphore irq_mutex;
  203. nm256_stream_t streams[2];
  204. ac97_t *ac97;
  205. snd_pcm_t *pcm;
  206. struct pci_dev *pci;
  207. spinlock_t reg_lock;
  208. };
  209. /*
  210. * include coefficient table
  211. */
  212. #include "nm256_coef.c"
  213. /*
  214. * PCI ids
  215. */
  216. static struct pci_device_id snd_nm256_ids[] = {
  217. {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  218. {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  219. {PCI_VENDOR_ID_NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  220. {0,},
  221. };
  222. MODULE_DEVICE_TABLE(pci, snd_nm256_ids);
  223. /*
  224. * lowlvel stuffs
  225. */
  226. static inline u8
  227. snd_nm256_readb(nm256_t *chip, int offset)
  228. {
  229. return readb(chip->cport + offset);
  230. }
  231. static inline u16
  232. snd_nm256_readw(nm256_t *chip, int offset)
  233. {
  234. return readw(chip->cport + offset);
  235. }
  236. static inline u32
  237. snd_nm256_readl(nm256_t *chip, int offset)
  238. {
  239. return readl(chip->cport + offset);
  240. }
  241. static inline void
  242. snd_nm256_writeb(nm256_t *chip, int offset, u8 val)
  243. {
  244. writeb(val, chip->cport + offset);
  245. }
  246. static inline void
  247. snd_nm256_writew(nm256_t *chip, int offset, u16 val)
  248. {
  249. writew(val, chip->cport + offset);
  250. }
  251. static inline void
  252. snd_nm256_writel(nm256_t *chip, int offset, u32 val)
  253. {
  254. writel(val, chip->cport + offset);
  255. }
  256. static inline void
  257. snd_nm256_write_buffer(nm256_t *chip, void *src, int offset, int size)
  258. {
  259. offset -= chip->buffer_start;
  260. #ifdef SNDRV_CONFIG_DEBUG
  261. if (offset < 0 || offset >= chip->buffer_size) {
  262. snd_printk("write_buffer invalid offset = %d size = %d\n", offset, size);
  263. return;
  264. }
  265. #endif
  266. memcpy_toio(chip->buffer + offset, src, size);
  267. }
  268. /*
  269. * coefficient handlers -- what a magic!
  270. */
  271. static u16
  272. snd_nm256_get_start_offset(int which)
  273. {
  274. u16 offset = 0;
  275. while (which-- > 0)
  276. offset += coefficient_sizes[which];
  277. return offset;
  278. }
  279. static void
  280. snd_nm256_load_one_coefficient(nm256_t *chip, int stream, u32 port, int which)
  281. {
  282. u32 coeff_buf = chip->coeff_buf[stream];
  283. u16 offset = snd_nm256_get_start_offset(which);
  284. u16 size = coefficient_sizes[which];
  285. snd_nm256_write_buffer(chip, coefficients + offset, coeff_buf, size);
  286. snd_nm256_writel(chip, port, coeff_buf);
  287. /* ??? Record seems to behave differently than playback. */
  288. if (stream == SNDRV_PCM_STREAM_PLAYBACK)
  289. size--;
  290. snd_nm256_writel(chip, port + 4, coeff_buf + size);
  291. }
  292. static void
  293. snd_nm256_load_coefficient(nm256_t *chip, int stream, int number)
  294. {
  295. /* The enable register for the specified engine. */
  296. u32 poffset = (stream == SNDRV_PCM_STREAM_CAPTURE ? NM_RECORD_ENABLE_REG : NM_PLAYBACK_ENABLE_REG);
  297. u32 addr = NM_COEFF_START_OFFSET;
  298. addr += (stream == SNDRV_PCM_STREAM_CAPTURE ? NM_RECORD_REG_OFFSET : NM_PLAYBACK_REG_OFFSET);
  299. if (snd_nm256_readb(chip, poffset) & 1) {
  300. snd_printd("NM256: Engine was enabled while loading coefficients!\n");
  301. return;
  302. }
  303. /* The recording engine uses coefficient values 8-15. */
  304. number &= 7;
  305. if (stream == SNDRV_PCM_STREAM_CAPTURE)
  306. number += 8;
  307. if (! chip->use_cache) {
  308. snd_nm256_load_one_coefficient(chip, stream, addr, number);
  309. return;
  310. }
  311. if (! chip->coeffs_current) {
  312. snd_nm256_write_buffer(chip, coefficients, chip->all_coeff_buf,
  313. NM_TOTAL_COEFF_COUNT * 4);
  314. chip->coeffs_current = 1;
  315. } else {
  316. u32 base = chip->all_coeff_buf;
  317. u32 offset = snd_nm256_get_start_offset(number);
  318. u32 end_offset = offset + coefficient_sizes[number];
  319. snd_nm256_writel(chip, addr, base + offset);
  320. if (stream == SNDRV_PCM_STREAM_PLAYBACK)
  321. end_offset--;
  322. snd_nm256_writel(chip, addr + 4, base + end_offset);
  323. }
  324. }
  325. /* The actual rates supported by the card. */
  326. static unsigned int samplerates[8] = {
  327. 8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000,
  328. };
  329. static snd_pcm_hw_constraint_list_t constraints_rates = {
  330. .count = ARRAY_SIZE(samplerates),
  331. .list = samplerates,
  332. .mask = 0,
  333. };
  334. /*
  335. * return the index of the target rate
  336. */
  337. static int
  338. snd_nm256_fixed_rate(unsigned int rate)
  339. {
  340. unsigned int i;
  341. for (i = 0; i < ARRAY_SIZE(samplerates); i++) {
  342. if (rate == samplerates[i])
  343. return i;
  344. }
  345. snd_BUG();
  346. return 0;
  347. }
  348. /*
  349. * set sample rate and format
  350. */
  351. static void
  352. snd_nm256_set_format(nm256_t *chip, nm256_stream_t *s, snd_pcm_substream_t *substream)
  353. {
  354. snd_pcm_runtime_t *runtime = substream->runtime;
  355. int rate_index = snd_nm256_fixed_rate(runtime->rate);
  356. unsigned char ratebits = (rate_index << 4) & NM_RATE_MASK;
  357. s->shift = 0;
  358. if (snd_pcm_format_width(runtime->format) == 16) {
  359. ratebits |= NM_RATE_BITS_16;
  360. s->shift++;
  361. }
  362. if (runtime->channels > 1) {
  363. ratebits |= NM_RATE_STEREO;
  364. s->shift++;
  365. }
  366. runtime->rate = samplerates[rate_index];
  367. switch (substream->stream) {
  368. case SNDRV_PCM_STREAM_PLAYBACK:
  369. snd_nm256_load_coefficient(chip, 0, rate_index); /* 0 = playback */
  370. snd_nm256_writeb(chip,
  371. NM_PLAYBACK_REG_OFFSET + NM_RATE_REG_OFFSET,
  372. ratebits);
  373. break;
  374. case SNDRV_PCM_STREAM_CAPTURE:
  375. snd_nm256_load_coefficient(chip, 1, rate_index); /* 1 = record */
  376. snd_nm256_writeb(chip,
  377. NM_RECORD_REG_OFFSET + NM_RATE_REG_OFFSET,
  378. ratebits);
  379. break;
  380. }
  381. }
  382. /* acquire interrupt */
  383. static int snd_nm256_acquire_irq(nm256_t *chip)
  384. {
  385. down(&chip->irq_mutex);
  386. if (chip->irq < 0) {
  387. if (request_irq(chip->pci->irq, chip->interrupt, SA_INTERRUPT|SA_SHIRQ,
  388. chip->card->driver, (void*)chip)) {
  389. snd_printk("unable to grab IRQ %d\n", chip->pci->irq);
  390. up(&chip->irq_mutex);
  391. return -EBUSY;
  392. }
  393. chip->irq = chip->pci->irq;
  394. }
  395. chip->irq_acks++;
  396. up(&chip->irq_mutex);
  397. return 0;
  398. }
  399. /* release interrupt */
  400. static void snd_nm256_release_irq(nm256_t *chip)
  401. {
  402. down(&chip->irq_mutex);
  403. if (chip->irq_acks > 0)
  404. chip->irq_acks--;
  405. if (chip->irq_acks == 0 && chip->irq >= 0) {
  406. free_irq(chip->irq, (void*)chip);
  407. chip->irq = -1;
  408. }
  409. up(&chip->irq_mutex);
  410. }
  411. /*
  412. * start / stop
  413. */
  414. /* update the watermark (current period) */
  415. static void snd_nm256_pcm_mark(nm256_t *chip, nm256_stream_t *s, int reg)
  416. {
  417. s->cur_period++;
  418. s->cur_period %= s->periods;
  419. snd_nm256_writel(chip, reg, s->buf + s->cur_period * s->period_size);
  420. }
  421. #define snd_nm256_playback_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_PBUFFER_WMARK)
  422. #define snd_nm256_capture_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_RBUFFER_WMARK)
  423. static void
  424. snd_nm256_playback_start(nm256_t *chip, nm256_stream_t *s, snd_pcm_substream_t *substream)
  425. {
  426. /* program buffer pointers */
  427. snd_nm256_writel(chip, NM_PBUFFER_START, s->buf);
  428. snd_nm256_writel(chip, NM_PBUFFER_END, s->buf + s->dma_size - (1 << s->shift));
  429. snd_nm256_writel(chip, NM_PBUFFER_CURRP, s->buf);
  430. snd_nm256_playback_mark(chip, s);
  431. /* Enable playback engine and interrupts. */
  432. snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG,
  433. NM_PLAYBACK_ENABLE_FLAG | NM_PLAYBACK_FREERUN);
  434. /* Enable both channels. */
  435. snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 0x0);
  436. }
  437. static void
  438. snd_nm256_capture_start(nm256_t *chip, nm256_stream_t *s, snd_pcm_substream_t *substream)
  439. {
  440. /* program buffer pointers */
  441. snd_nm256_writel(chip, NM_RBUFFER_START, s->buf);
  442. snd_nm256_writel(chip, NM_RBUFFER_END, s->buf + s->dma_size);
  443. snd_nm256_writel(chip, NM_RBUFFER_CURRP, s->buf);
  444. snd_nm256_capture_mark(chip, s);
  445. /* Enable playback engine and interrupts. */
  446. snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG,
  447. NM_RECORD_ENABLE_FLAG | NM_RECORD_FREERUN);
  448. }
  449. /* Stop the play engine. */
  450. static void
  451. snd_nm256_playback_stop(nm256_t *chip)
  452. {
  453. /* Shut off sound from both channels. */
  454. snd_nm256_writew(chip, NM_AUDIO_MUTE_REG,
  455. NM_AUDIO_MUTE_LEFT | NM_AUDIO_MUTE_RIGHT);
  456. /* Disable play engine. */
  457. snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 0);
  458. }
  459. static void
  460. snd_nm256_capture_stop(nm256_t *chip)
  461. {
  462. /* Disable recording engine. */
  463. snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 0);
  464. }
  465. static int
  466. snd_nm256_playback_trigger(snd_pcm_substream_t *substream, int cmd)
  467. {
  468. nm256_t *chip = snd_pcm_substream_chip(substream);
  469. nm256_stream_t *s = (nm256_stream_t*)substream->runtime->private_data;
  470. int err = 0;
  471. snd_assert(s != NULL, return -ENXIO);
  472. spin_lock(&chip->reg_lock);
  473. switch (cmd) {
  474. case SNDRV_PCM_TRIGGER_RESUME:
  475. s->suspended = 0;
  476. /* fallthru */
  477. case SNDRV_PCM_TRIGGER_START:
  478. if (! s->running) {
  479. snd_nm256_playback_start(chip, s, substream);
  480. s->running = 1;
  481. }
  482. break;
  483. case SNDRV_PCM_TRIGGER_SUSPEND:
  484. s->suspended = 1;
  485. /* fallthru */
  486. case SNDRV_PCM_TRIGGER_STOP:
  487. if (s->running) {
  488. snd_nm256_playback_stop(chip);
  489. s->running = 0;
  490. }
  491. break;
  492. default:
  493. err = -EINVAL;
  494. break;
  495. }
  496. spin_unlock(&chip->reg_lock);
  497. return err;
  498. }
  499. static int
  500. snd_nm256_capture_trigger(snd_pcm_substream_t *substream, int cmd)
  501. {
  502. nm256_t *chip = snd_pcm_substream_chip(substream);
  503. nm256_stream_t *s = (nm256_stream_t*)substream->runtime->private_data;
  504. int err = 0;
  505. snd_assert(s != NULL, return -ENXIO);
  506. spin_lock(&chip->reg_lock);
  507. switch (cmd) {
  508. case SNDRV_PCM_TRIGGER_START:
  509. case SNDRV_PCM_TRIGGER_RESUME:
  510. if (! s->running) {
  511. snd_nm256_capture_start(chip, s, substream);
  512. s->running = 1;
  513. }
  514. break;
  515. case SNDRV_PCM_TRIGGER_STOP:
  516. case SNDRV_PCM_TRIGGER_SUSPEND:
  517. if (s->running) {
  518. snd_nm256_capture_stop(chip);
  519. s->running = 0;
  520. }
  521. break;
  522. default:
  523. err = -EINVAL;
  524. break;
  525. }
  526. spin_unlock(&chip->reg_lock);
  527. return err;
  528. }
  529. /*
  530. * prepare playback/capture channel
  531. */
  532. static int snd_nm256_pcm_prepare(snd_pcm_substream_t *substream)
  533. {
  534. nm256_t *chip = snd_pcm_substream_chip(substream);
  535. snd_pcm_runtime_t *runtime = substream->runtime;
  536. nm256_stream_t *s = (nm256_stream_t*)runtime->private_data;
  537. snd_assert(s, return -ENXIO);
  538. s->dma_size = frames_to_bytes(runtime, substream->runtime->buffer_size);
  539. s->period_size = frames_to_bytes(runtime, substream->runtime->period_size);
  540. s->periods = substream->runtime->periods;
  541. s->cur_period = 0;
  542. spin_lock_irq(&chip->reg_lock);
  543. s->running = 0;
  544. snd_nm256_set_format(chip, s, substream);
  545. spin_unlock_irq(&chip->reg_lock);
  546. return 0;
  547. }
  548. /*
  549. * get the current pointer
  550. */
  551. static snd_pcm_uframes_t
  552. snd_nm256_playback_pointer(snd_pcm_substream_t * substream)
  553. {
  554. nm256_t *chip = snd_pcm_substream_chip(substream);
  555. nm256_stream_t *s = (nm256_stream_t*)substream->runtime->private_data;
  556. unsigned long curp;
  557. snd_assert(s, return 0);
  558. curp = snd_nm256_readl(chip, NM_PBUFFER_CURRP) - (unsigned long)s->buf;
  559. curp %= s->dma_size;
  560. return bytes_to_frames(substream->runtime, curp);
  561. }
  562. static snd_pcm_uframes_t
  563. snd_nm256_capture_pointer(snd_pcm_substream_t * substream)
  564. {
  565. nm256_t *chip = snd_pcm_substream_chip(substream);
  566. nm256_stream_t *s = (nm256_stream_t*)substream->runtime->private_data;
  567. unsigned long curp;
  568. snd_assert(s != NULL, return 0);
  569. curp = snd_nm256_readl(chip, NM_RBUFFER_CURRP) - (unsigned long)s->buf;
  570. curp %= s->dma_size;
  571. return bytes_to_frames(substream->runtime, curp);
  572. }
  573. /* Remapped I/O space can be accessible as pointer on i386 */
  574. /* This might be changed in the future */
  575. #ifndef __i386__
  576. /*
  577. * silence / copy for playback
  578. */
  579. static int
  580. snd_nm256_playback_silence(snd_pcm_substream_t *substream,
  581. int channel, /* not used (interleaved data) */
  582. snd_pcm_uframes_t pos,
  583. snd_pcm_uframes_t count)
  584. {
  585. snd_pcm_runtime_t *runtime = substream->runtime;
  586. nm256_stream_t *s = (nm256_stream_t*)runtime->private_data;
  587. count = frames_to_bytes(runtime, count);
  588. pos = frames_to_bytes(runtime, pos);
  589. memset_io(s->bufptr + pos, 0, count);
  590. return 0;
  591. }
  592. static int
  593. snd_nm256_playback_copy(snd_pcm_substream_t *substream,
  594. int channel, /* not used (interleaved data) */
  595. snd_pcm_uframes_t pos,
  596. void __user *src,
  597. snd_pcm_uframes_t count)
  598. {
  599. snd_pcm_runtime_t *runtime = substream->runtime;
  600. nm256_stream_t *s = (nm256_stream_t*)runtime->private_data;
  601. count = frames_to_bytes(runtime, count);
  602. pos = frames_to_bytes(runtime, pos);
  603. if (copy_from_user_toio(s->bufptr + pos, src, count))
  604. return -EFAULT;
  605. return 0;
  606. }
  607. /*
  608. * copy to user
  609. */
  610. static int
  611. snd_nm256_capture_copy(snd_pcm_substream_t *substream,
  612. int channel, /* not used (interleaved data) */
  613. snd_pcm_uframes_t pos,
  614. void __user *dst,
  615. snd_pcm_uframes_t count)
  616. {
  617. snd_pcm_runtime_t *runtime = substream->runtime;
  618. nm256_stream_t *s = (nm256_stream_t*)runtime->private_data;
  619. count = frames_to_bytes(runtime, count);
  620. pos = frames_to_bytes(runtime, pos);
  621. if (copy_to_user_fromio(dst, s->bufptr + pos, count))
  622. return -EFAULT;
  623. return 0;
  624. }
  625. #endif /* !__i386__ */
  626. /*
  627. * update playback/capture watermarks
  628. */
  629. /* spinlock held! */
  630. static void
  631. snd_nm256_playback_update(nm256_t *chip)
  632. {
  633. nm256_stream_t *s;
  634. s = &chip->streams[SNDRV_PCM_STREAM_PLAYBACK];
  635. if (s->running && s->substream) {
  636. spin_unlock(&chip->reg_lock);
  637. snd_pcm_period_elapsed(s->substream);
  638. spin_lock(&chip->reg_lock);
  639. snd_nm256_playback_mark(chip, s);
  640. }
  641. }
  642. /* spinlock held! */
  643. static void
  644. snd_nm256_capture_update(nm256_t *chip)
  645. {
  646. nm256_stream_t *s;
  647. s = &chip->streams[SNDRV_PCM_STREAM_CAPTURE];
  648. if (s->running && s->substream) {
  649. spin_unlock(&chip->reg_lock);
  650. snd_pcm_period_elapsed(s->substream);
  651. spin_lock(&chip->reg_lock);
  652. snd_nm256_capture_mark(chip, s);
  653. }
  654. }
  655. /*
  656. * hardware info
  657. */
  658. static snd_pcm_hardware_t snd_nm256_playback =
  659. {
  660. .info = SNDRV_PCM_INFO_MMAP_IOMEM |SNDRV_PCM_INFO_MMAP_VALID |
  661. SNDRV_PCM_INFO_INTERLEAVED |
  662. /*SNDRV_PCM_INFO_PAUSE |*/
  663. SNDRV_PCM_INFO_RESUME,
  664. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  665. .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
  666. .rate_min = 8000,
  667. .rate_max = 48000,
  668. .channels_min = 1,
  669. .channels_max = 2,
  670. .periods_min = 2,
  671. .periods_max = 1024,
  672. .buffer_bytes_max = 128 * 1024,
  673. .period_bytes_min = 256,
  674. .period_bytes_max = 128 * 1024,
  675. };
  676. static snd_pcm_hardware_t snd_nm256_capture =
  677. {
  678. .info = SNDRV_PCM_INFO_MMAP_IOMEM | SNDRV_PCM_INFO_MMAP_VALID |
  679. SNDRV_PCM_INFO_INTERLEAVED |
  680. /*SNDRV_PCM_INFO_PAUSE |*/
  681. SNDRV_PCM_INFO_RESUME,
  682. .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
  683. .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
  684. .rate_min = 8000,
  685. .rate_max = 48000,
  686. .channels_min = 1,
  687. .channels_max = 2,
  688. .periods_min = 2,
  689. .periods_max = 1024,
  690. .buffer_bytes_max = 128 * 1024,
  691. .period_bytes_min = 256,
  692. .period_bytes_max = 128 * 1024,
  693. };
  694. /* set dma transfer size */
  695. static int snd_nm256_pcm_hw_params(snd_pcm_substream_t *substream, snd_pcm_hw_params_t *hw_params)
  696. {
  697. /* area and addr are already set and unchanged */
  698. substream->runtime->dma_bytes = params_buffer_bytes(hw_params);
  699. return 0;
  700. }
  701. /*
  702. * open
  703. */
  704. static void snd_nm256_setup_stream(nm256_t *chip, nm256_stream_t *s,
  705. snd_pcm_substream_t *substream,
  706. snd_pcm_hardware_t *hw_ptr)
  707. {
  708. snd_pcm_runtime_t *runtime = substream->runtime;
  709. s->running = 0;
  710. runtime->hw = *hw_ptr;
  711. runtime->hw.buffer_bytes_max = s->bufsize;
  712. runtime->hw.period_bytes_max = s->bufsize / 2;
  713. runtime->dma_area = (void __force *) s->bufptr;
  714. runtime->dma_addr = s->bufptr_addr;
  715. runtime->dma_bytes = s->bufsize;
  716. runtime->private_data = s;
  717. s->substream = substream;
  718. snd_pcm_set_sync(substream);
  719. snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
  720. &constraints_rates);
  721. }
  722. static int
  723. snd_nm256_playback_open(snd_pcm_substream_t *substream)
  724. {
  725. nm256_t *chip = snd_pcm_substream_chip(substream);
  726. if (snd_nm256_acquire_irq(chip) < 0)
  727. return -EBUSY;
  728. snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_PLAYBACK],
  729. substream, &snd_nm256_playback);
  730. return 0;
  731. }
  732. static int
  733. snd_nm256_capture_open(snd_pcm_substream_t *substream)
  734. {
  735. nm256_t *chip = snd_pcm_substream_chip(substream);
  736. if (snd_nm256_acquire_irq(chip) < 0)
  737. return -EBUSY;
  738. snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_CAPTURE],
  739. substream, &snd_nm256_capture);
  740. return 0;
  741. }
  742. /*
  743. * close - we don't have to do special..
  744. */
  745. static int
  746. snd_nm256_playback_close(snd_pcm_substream_t *substream)
  747. {
  748. nm256_t *chip = snd_pcm_substream_chip(substream);
  749. snd_nm256_release_irq(chip);
  750. return 0;
  751. }
  752. static int
  753. snd_nm256_capture_close(snd_pcm_substream_t *substream)
  754. {
  755. nm256_t *chip = snd_pcm_substream_chip(substream);
  756. snd_nm256_release_irq(chip);
  757. return 0;
  758. }
  759. /*
  760. * create a pcm instance
  761. */
  762. static snd_pcm_ops_t snd_nm256_playback_ops = {
  763. .open = snd_nm256_playback_open,
  764. .close = snd_nm256_playback_close,
  765. .ioctl = snd_pcm_lib_ioctl,
  766. .hw_params = snd_nm256_pcm_hw_params,
  767. .prepare = snd_nm256_pcm_prepare,
  768. .trigger = snd_nm256_playback_trigger,
  769. .pointer = snd_nm256_playback_pointer,
  770. #ifndef __i386__
  771. .copy = snd_nm256_playback_copy,
  772. .silence = snd_nm256_playback_silence,
  773. #endif
  774. .mmap = snd_pcm_lib_mmap_iomem,
  775. };
  776. static snd_pcm_ops_t snd_nm256_capture_ops = {
  777. .open = snd_nm256_capture_open,
  778. .close = snd_nm256_capture_close,
  779. .ioctl = snd_pcm_lib_ioctl,
  780. .hw_params = snd_nm256_pcm_hw_params,
  781. .prepare = snd_nm256_pcm_prepare,
  782. .trigger = snd_nm256_capture_trigger,
  783. .pointer = snd_nm256_capture_pointer,
  784. #ifndef __i386__
  785. .copy = snd_nm256_capture_copy,
  786. #endif
  787. .mmap = snd_pcm_lib_mmap_iomem,
  788. };
  789. static int __devinit
  790. snd_nm256_pcm(nm256_t *chip, int device)
  791. {
  792. snd_pcm_t *pcm;
  793. int i, err;
  794. for (i = 0; i < 2; i++) {
  795. nm256_stream_t *s = &chip->streams[i];
  796. s->bufptr = chip->buffer + (s->buf - chip->buffer_start);
  797. s->bufptr_addr = chip->buffer_addr + (s->buf - chip->buffer_start);
  798. }
  799. err = snd_pcm_new(chip->card, chip->card->driver, device,
  800. 1, 1, &pcm);
  801. if (err < 0)
  802. return err;
  803. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_nm256_playback_ops);
  804. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_nm256_capture_ops);
  805. pcm->private_data = chip;
  806. pcm->info_flags = 0;
  807. chip->pcm = pcm;
  808. return 0;
  809. }
  810. /*
  811. * Initialize the hardware.
  812. */
  813. static void
  814. snd_nm256_init_chip(nm256_t *chip)
  815. {
  816. /* Reset everything. */
  817. snd_nm256_writeb(chip, 0x0, 0x11);
  818. snd_nm256_writew(chip, 0x214, 0);
  819. /* stop sounds.. */
  820. //snd_nm256_playback_stop(chip);
  821. //snd_nm256_capture_stop(chip);
  822. }
  823. static irqreturn_t
  824. snd_nm256_intr_check(nm256_t *chip)
  825. {
  826. if (chip->badintrcount++ > 1000) {
  827. /*
  828. * I'm not sure if the best thing is to stop the card from
  829. * playing or just release the interrupt (after all, we're in
  830. * a bad situation, so doing fancy stuff may not be such a good
  831. * idea).
  832. *
  833. * I worry about the card engine continuing to play noise
  834. * over and over, however--that could become a very
  835. * obnoxious problem. And we know that when this usually
  836. * happens things are fairly safe, it just means the user's
  837. * inserted a PCMCIA card and someone's spamming us with IRQ 9s.
  838. */
  839. if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
  840. snd_nm256_playback_stop(chip);
  841. if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
  842. snd_nm256_capture_stop(chip);
  843. chip->badintrcount = 0;
  844. return IRQ_HANDLED;
  845. }
  846. return IRQ_NONE;
  847. }
  848. /*
  849. * Handle a potential interrupt for the device referred to by DEV_ID.
  850. *
  851. * I don't like the cut-n-paste job here either between the two routines,
  852. * but there are sufficient differences between the two interrupt handlers
  853. * that parameterizing it isn't all that great either. (Could use a macro,
  854. * I suppose...yucky bleah.)
  855. */
  856. static irqreturn_t
  857. snd_nm256_interrupt(int irq, void *dev_id, struct pt_regs *dummy)
  858. {
  859. nm256_t *chip = dev_id;
  860. u16 status;
  861. u8 cbyte;
  862. status = snd_nm256_readw(chip, NM_INT_REG);
  863. /* Not ours. */
  864. if (status == 0)
  865. return snd_nm256_intr_check(chip);
  866. chip->badintrcount = 0;
  867. /* Rather boring; check for individual interrupts and process them. */
  868. spin_lock(&chip->reg_lock);
  869. if (status & NM_PLAYBACK_INT) {
  870. status &= ~NM_PLAYBACK_INT;
  871. NM_ACK_INT(chip, NM_PLAYBACK_INT);
  872. snd_nm256_playback_update(chip);
  873. }
  874. if (status & NM_RECORD_INT) {
  875. status &= ~NM_RECORD_INT;
  876. NM_ACK_INT(chip, NM_RECORD_INT);
  877. snd_nm256_capture_update(chip);
  878. }
  879. if (status & NM_MISC_INT_1) {
  880. status &= ~NM_MISC_INT_1;
  881. NM_ACK_INT(chip, NM_MISC_INT_1);
  882. snd_printd("NM256: Got misc interrupt #1\n");
  883. snd_nm256_writew(chip, NM_INT_REG, 0x8000);
  884. cbyte = snd_nm256_readb(chip, 0x400);
  885. snd_nm256_writeb(chip, 0x400, cbyte | 2);
  886. }
  887. if (status & NM_MISC_INT_2) {
  888. status &= ~NM_MISC_INT_2;
  889. NM_ACK_INT(chip, NM_MISC_INT_2);
  890. snd_printd("NM256: Got misc interrupt #2\n");
  891. cbyte = snd_nm256_readb(chip, 0x400);
  892. snd_nm256_writeb(chip, 0x400, cbyte & ~2);
  893. }
  894. /* Unknown interrupt. */
  895. if (status) {
  896. snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n",
  897. status);
  898. /* Pray. */
  899. NM_ACK_INT(chip, status);
  900. }
  901. spin_unlock(&chip->reg_lock);
  902. return IRQ_HANDLED;
  903. }
  904. /*
  905. * Handle a potential interrupt for the device referred to by DEV_ID.
  906. * This handler is for the 256ZX, and is very similar to the non-ZX
  907. * routine.
  908. */
  909. static irqreturn_t
  910. snd_nm256_interrupt_zx(int irq, void *dev_id, struct pt_regs *dummy)
  911. {
  912. nm256_t *chip = dev_id;
  913. u32 status;
  914. u8 cbyte;
  915. status = snd_nm256_readl(chip, NM_INT_REG);
  916. /* Not ours. */
  917. if (status == 0)
  918. return snd_nm256_intr_check(chip);
  919. chip->badintrcount = 0;
  920. /* Rather boring; check for individual interrupts and process them. */
  921. spin_lock(&chip->reg_lock);
  922. if (status & NM2_PLAYBACK_INT) {
  923. status &= ~NM2_PLAYBACK_INT;
  924. NM2_ACK_INT(chip, NM2_PLAYBACK_INT);
  925. snd_nm256_playback_update(chip);
  926. }
  927. if (status & NM2_RECORD_INT) {
  928. status &= ~NM2_RECORD_INT;
  929. NM2_ACK_INT(chip, NM2_RECORD_INT);
  930. snd_nm256_capture_update(chip);
  931. }
  932. if (status & NM2_MISC_INT_1) {
  933. status &= ~NM2_MISC_INT_1;
  934. NM2_ACK_INT(chip, NM2_MISC_INT_1);
  935. snd_printd("NM256: Got misc interrupt #1\n");
  936. cbyte = snd_nm256_readb(chip, 0x400);
  937. snd_nm256_writeb(chip, 0x400, cbyte | 2);
  938. }
  939. if (status & NM2_MISC_INT_2) {
  940. status &= ~NM2_MISC_INT_2;
  941. NM2_ACK_INT(chip, NM2_MISC_INT_2);
  942. snd_printd("NM256: Got misc interrupt #2\n");
  943. cbyte = snd_nm256_readb(chip, 0x400);
  944. snd_nm256_writeb(chip, 0x400, cbyte & ~2);
  945. }
  946. /* Unknown interrupt. */
  947. if (status) {
  948. snd_printd("NM256: Fire in the hole! Unknown status 0x%x\n",
  949. status);
  950. /* Pray. */
  951. NM2_ACK_INT(chip, status);
  952. }
  953. spin_unlock(&chip->reg_lock);
  954. return IRQ_HANDLED;
  955. }
  956. /*
  957. * AC97 interface
  958. */
  959. /*
  960. * Waits for the mixer to become ready to be written; returns a zero value
  961. * if it timed out.
  962. */
  963. static int
  964. snd_nm256_ac97_ready(nm256_t *chip)
  965. {
  966. int timeout = 10;
  967. u32 testaddr;
  968. u16 testb;
  969. testaddr = chip->mixer_status_offset;
  970. testb = chip->mixer_status_mask;
  971. /*
  972. * Loop around waiting for the mixer to become ready.
  973. */
  974. while (timeout-- > 0) {
  975. if ((snd_nm256_readw(chip, testaddr) & testb) == 0)
  976. return 1;
  977. udelay(100);
  978. }
  979. return 0;
  980. }
  981. /*
  982. */
  983. static unsigned short
  984. snd_nm256_ac97_read(ac97_t *ac97, unsigned short reg)
  985. {
  986. nm256_t *chip = ac97->private_data;
  987. int res;
  988. if (reg >= 128)
  989. return 0;
  990. if (! snd_nm256_ac97_ready(chip))
  991. return 0;
  992. res = snd_nm256_readw(chip, chip->mixer_base + reg);
  993. /* Magic delay. Bleah yucky. */
  994. msleep(1);
  995. return res;
  996. }
  997. /*
  998. */
  999. static void
  1000. snd_nm256_ac97_write(ac97_t *ac97,
  1001. unsigned short reg, unsigned short val)
  1002. {
  1003. nm256_t *chip = ac97->private_data;
  1004. int tries = 2;
  1005. u32 base;
  1006. base = chip->mixer_base;
  1007. snd_nm256_ac97_ready(chip);
  1008. /* Wait for the write to take, too. */
  1009. while (tries-- > 0) {
  1010. snd_nm256_writew(chip, base + reg, val);
  1011. msleep(1); /* a little delay here seems better.. */
  1012. if (snd_nm256_ac97_ready(chip))
  1013. return;
  1014. }
  1015. snd_printd("nm256: ac97 codec not ready..\n");
  1016. }
  1017. /* initialize the ac97 into a known state */
  1018. static void
  1019. snd_nm256_ac97_reset(ac97_t *ac97)
  1020. {
  1021. nm256_t *chip = ac97->private_data;
  1022. /* Reset the mixer. 'Tis magic! */
  1023. snd_nm256_writeb(chip, 0x6c0, 1);
  1024. if (! chip->reset_workaround) {
  1025. /* Dell latitude LS will lock up by this */
  1026. snd_nm256_writeb(chip, 0x6cc, 0x87);
  1027. }
  1028. if (! chip->reset_workaround_2) {
  1029. /* Dell latitude CSx will lock up by this */
  1030. snd_nm256_writeb(chip, 0x6cc, 0x80);
  1031. snd_nm256_writeb(chip, 0x6cc, 0x0);
  1032. }
  1033. }
  1034. /* create an ac97 mixer interface */
  1035. static int __devinit
  1036. snd_nm256_mixer(nm256_t *chip)
  1037. {
  1038. ac97_bus_t *pbus;
  1039. ac97_template_t ac97;
  1040. int i, err;
  1041. static ac97_bus_ops_t ops = {
  1042. .reset = snd_nm256_ac97_reset,
  1043. .write = snd_nm256_ac97_write,
  1044. .read = snd_nm256_ac97_read,
  1045. };
  1046. /* looks like nm256 hangs up when unexpected registers are touched... */
  1047. static int mixer_regs[] = {
  1048. AC97_MASTER, AC97_HEADPHONE, AC97_MASTER_MONO,
  1049. AC97_PC_BEEP, AC97_PHONE, AC97_MIC, AC97_LINE, AC97_CD,
  1050. AC97_VIDEO, AC97_AUX, AC97_PCM, AC97_REC_SEL,
  1051. AC97_REC_GAIN, AC97_GENERAL_PURPOSE, AC97_3D_CONTROL,
  1052. /*AC97_EXTENDED_ID,*/
  1053. AC97_VENDOR_ID1, AC97_VENDOR_ID2,
  1054. -1
  1055. };
  1056. if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
  1057. return err;
  1058. memset(&ac97, 0, sizeof(ac97));
  1059. ac97.scaps = AC97_SCAP_AUDIO; /* we support audio! */
  1060. ac97.limited_regs = 1;
  1061. for (i = 0; mixer_regs[i] >= 0; i++)
  1062. set_bit(mixer_regs[i], ac97.reg_accessed);
  1063. ac97.private_data = chip;
  1064. pbus->no_vra = 1;
  1065. err = snd_ac97_mixer(pbus, &ac97, &chip->ac97);
  1066. if (err < 0)
  1067. return err;
  1068. if (! (chip->ac97->id & (0xf0000000))) {
  1069. /* looks like an invalid id */
  1070. sprintf(chip->card->mixername, "%s AC97", chip->card->driver);
  1071. }
  1072. return 0;
  1073. }
  1074. /*
  1075. * See if the signature left by the NM256 BIOS is intact; if so, we use
  1076. * the associated address as the end of our audio buffer in the video
  1077. * RAM.
  1078. */
  1079. static int __devinit
  1080. snd_nm256_peek_for_sig(nm256_t *chip)
  1081. {
  1082. /* The signature is located 1K below the end of video RAM. */
  1083. void __iomem *temp;
  1084. /* Default buffer end is 5120 bytes below the top of RAM. */
  1085. unsigned long pointer_found = chip->buffer_end - 0x1400;
  1086. u32 sig;
  1087. temp = ioremap_nocache(chip->buffer_addr + chip->buffer_end - 0x400, 16);
  1088. if (temp == NULL) {
  1089. snd_printk("Unable to scan for card signature in video RAM\n");
  1090. return -EBUSY;
  1091. }
  1092. sig = readl(temp);
  1093. if ((sig & NM_SIG_MASK) == NM_SIGNATURE) {
  1094. u32 pointer = readl(temp + 4);
  1095. /*
  1096. * If it's obviously invalid, don't use it
  1097. */
  1098. if (pointer == 0xffffffff ||
  1099. pointer < chip->buffer_size ||
  1100. pointer > chip->buffer_end) {
  1101. snd_printk("invalid signature found: 0x%x\n", pointer);
  1102. iounmap(temp);
  1103. return -ENODEV;
  1104. } else {
  1105. pointer_found = pointer;
  1106. printk(KERN_INFO "nm256: found card signature in video RAM: 0x%x\n", pointer);
  1107. }
  1108. }
  1109. iounmap(temp);
  1110. chip->buffer_end = pointer_found;
  1111. return 0;
  1112. }
  1113. #ifdef CONFIG_PM
  1114. /*
  1115. * APM event handler, so the card is properly reinitialized after a power
  1116. * event.
  1117. */
  1118. static int nm256_suspend(snd_card_t *card, pm_message_t state)
  1119. {
  1120. nm256_t *chip = card->pm_private_data;
  1121. snd_pcm_suspend_all(chip->pcm);
  1122. snd_ac97_suspend(chip->ac97);
  1123. chip->coeffs_current = 0;
  1124. pci_disable_device(chip->pci);
  1125. return 0;
  1126. }
  1127. static int nm256_resume(snd_card_t *card)
  1128. {
  1129. nm256_t *chip = card->pm_private_data;
  1130. int i;
  1131. /* Perform a full reset on the hardware */
  1132. pci_enable_device(chip->pci);
  1133. snd_nm256_init_chip(chip);
  1134. /* restore ac97 */
  1135. snd_ac97_resume(chip->ac97);
  1136. for (i = 0; i < 2; i++) {
  1137. nm256_stream_t *s = &chip->streams[i];
  1138. if (s->substream && s->suspended) {
  1139. spin_lock_irq(&chip->reg_lock);
  1140. snd_nm256_set_format(chip, s, s->substream);
  1141. spin_unlock_irq(&chip->reg_lock);
  1142. }
  1143. }
  1144. return 0;
  1145. }
  1146. #endif /* CONFIG_PM */
  1147. static int snd_nm256_free(nm256_t *chip)
  1148. {
  1149. if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
  1150. snd_nm256_playback_stop(chip);
  1151. if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
  1152. snd_nm256_capture_stop(chip);
  1153. if (chip->irq >= 0)
  1154. synchronize_irq(chip->irq);
  1155. if (chip->cport)
  1156. iounmap(chip->cport);
  1157. if (chip->buffer)
  1158. iounmap(chip->buffer);
  1159. release_and_free_resource(chip->res_cport);
  1160. release_and_free_resource(chip->res_buffer);
  1161. if (chip->irq >= 0)
  1162. free_irq(chip->irq, (void*)chip);
  1163. pci_disable_device(chip->pci);
  1164. kfree(chip);
  1165. return 0;
  1166. }
  1167. static int snd_nm256_dev_free(snd_device_t *device)
  1168. {
  1169. nm256_t *chip = device->device_data;
  1170. return snd_nm256_free(chip);
  1171. }
  1172. static int __devinit
  1173. snd_nm256_create(snd_card_t *card, struct pci_dev *pci,
  1174. int play_bufsize, int capt_bufsize,
  1175. int force_load,
  1176. u32 buffertop,
  1177. int usecache,
  1178. nm256_t **chip_ret)
  1179. {
  1180. nm256_t *chip;
  1181. int err, pval;
  1182. static snd_device_ops_t ops = {
  1183. .dev_free = snd_nm256_dev_free,
  1184. };
  1185. u32 addr;
  1186. *chip_ret = NULL;
  1187. if ((err = pci_enable_device(pci)) < 0)
  1188. return err;
  1189. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  1190. if (chip == NULL) {
  1191. pci_disable_device(pci);
  1192. return -ENOMEM;
  1193. }
  1194. chip->card = card;
  1195. chip->pci = pci;
  1196. chip->use_cache = usecache;
  1197. spin_lock_init(&chip->reg_lock);
  1198. chip->irq = -1;
  1199. init_MUTEX(&chip->irq_mutex);
  1200. chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize = play_bufsize;
  1201. chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize = capt_bufsize;
  1202. /*
  1203. * The NM256 has two memory ports. The first port is nothing
  1204. * more than a chunk of video RAM, which is used as the I/O ring
  1205. * buffer. The second port has the actual juicy stuff (like the
  1206. * mixer and the playback engine control registers).
  1207. */
  1208. chip->buffer_addr = pci_resource_start(pci, 0);
  1209. chip->cport_addr = pci_resource_start(pci, 1);
  1210. /* Init the memory port info. */
  1211. /* remap control port (#2) */
  1212. chip->res_cport = request_mem_region(chip->cport_addr, NM_PORT2_SIZE,
  1213. card->driver);
  1214. if (chip->res_cport == NULL) {
  1215. snd_printk("memory region 0x%lx (size 0x%x) busy\n",
  1216. chip->cport_addr, NM_PORT2_SIZE);
  1217. err = -EBUSY;
  1218. goto __error;
  1219. }
  1220. chip->cport = ioremap_nocache(chip->cport_addr, NM_PORT2_SIZE);
  1221. if (chip->cport == NULL) {
  1222. snd_printk("unable to map control port %lx\n", chip->cport_addr);
  1223. err = -ENOMEM;
  1224. goto __error;
  1225. }
  1226. if (!strcmp(card->driver, "NM256AV")) {
  1227. /* Ok, try to see if this is a non-AC97 version of the hardware. */
  1228. pval = snd_nm256_readw(chip, NM_MIXER_PRESENCE);
  1229. if ((pval & NM_PRESENCE_MASK) != NM_PRESENCE_VALUE) {
  1230. if (! force_load) {
  1231. printk(KERN_ERR "nm256: no ac97 is found!\n");
  1232. printk(KERN_ERR " force the driver to load by passing in the module parameter\n");
  1233. printk(KERN_ERR " force_ac97=1\n");
  1234. printk(KERN_ERR " or try sb16 or cs423x drivers instead.\n");
  1235. err = -ENXIO;
  1236. goto __error;
  1237. }
  1238. }
  1239. chip->buffer_end = 2560 * 1024;
  1240. chip->interrupt = snd_nm256_interrupt;
  1241. chip->mixer_status_offset = NM_MIXER_STATUS_OFFSET;
  1242. chip->mixer_status_mask = NM_MIXER_READY_MASK;
  1243. } else {
  1244. /* Not sure if there is any relevant detect for the ZX or not. */
  1245. if (snd_nm256_readb(chip, 0xa0b) != 0)
  1246. chip->buffer_end = 6144 * 1024;
  1247. else
  1248. chip->buffer_end = 4096 * 1024;
  1249. chip->interrupt = snd_nm256_interrupt_zx;
  1250. chip->mixer_status_offset = NM2_MIXER_STATUS_OFFSET;
  1251. chip->mixer_status_mask = NM2_MIXER_READY_MASK;
  1252. }
  1253. chip->buffer_size = chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize + chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
  1254. if (chip->use_cache)
  1255. chip->buffer_size += NM_TOTAL_COEFF_COUNT * 4;
  1256. else
  1257. chip->buffer_size += NM_MAX_PLAYBACK_COEF_SIZE + NM_MAX_RECORD_COEF_SIZE;
  1258. if (buffertop >= chip->buffer_size && buffertop < chip->buffer_end)
  1259. chip->buffer_end = buffertop;
  1260. else {
  1261. /* get buffer end pointer from signature */
  1262. if ((err = snd_nm256_peek_for_sig(chip)) < 0)
  1263. goto __error;
  1264. }
  1265. chip->buffer_start = chip->buffer_end - chip->buffer_size;
  1266. chip->buffer_addr += chip->buffer_start;
  1267. printk(KERN_INFO "nm256: Mapping port 1 from 0x%x - 0x%x\n",
  1268. chip->buffer_start, chip->buffer_end);
  1269. chip->res_buffer = request_mem_region(chip->buffer_addr,
  1270. chip->buffer_size,
  1271. card->driver);
  1272. if (chip->res_buffer == NULL) {
  1273. snd_printk("nm256: buffer 0x%lx (size 0x%x) busy\n",
  1274. chip->buffer_addr, chip->buffer_size);
  1275. err = -EBUSY;
  1276. goto __error;
  1277. }
  1278. chip->buffer = ioremap_nocache(chip->buffer_addr, chip->buffer_size);
  1279. if (chip->buffer == NULL) {
  1280. err = -ENOMEM;
  1281. snd_printk("unable to map ring buffer at %lx\n", chip->buffer_addr);
  1282. goto __error;
  1283. }
  1284. /* set offsets */
  1285. addr = chip->buffer_start;
  1286. chip->streams[SNDRV_PCM_STREAM_PLAYBACK].buf = addr;
  1287. addr += chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize;
  1288. chip->streams[SNDRV_PCM_STREAM_CAPTURE].buf = addr;
  1289. addr += chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
  1290. if (chip->use_cache) {
  1291. chip->all_coeff_buf = addr;
  1292. } else {
  1293. chip->coeff_buf[SNDRV_PCM_STREAM_PLAYBACK] = addr;
  1294. addr += NM_MAX_PLAYBACK_COEF_SIZE;
  1295. chip->coeff_buf[SNDRV_PCM_STREAM_CAPTURE] = addr;
  1296. }
  1297. /* Fixed setting. */
  1298. chip->mixer_base = NM_MIXER_OFFSET;
  1299. chip->coeffs_current = 0;
  1300. snd_nm256_init_chip(chip);
  1301. // pci_set_master(pci); /* needed? */
  1302. snd_card_set_pm_callback(card, nm256_suspend, nm256_resume, chip);
  1303. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0)
  1304. goto __error;
  1305. snd_card_set_dev(card, &pci->dev);
  1306. *chip_ret = chip;
  1307. return 0;
  1308. __error:
  1309. snd_nm256_free(chip);
  1310. return err;
  1311. }
  1312. struct nm256_quirk {
  1313. unsigned short vendor;
  1314. unsigned short device;
  1315. int type;
  1316. };
  1317. enum { NM_BLACKLISTED, NM_RESET_WORKAROUND, NM_RESET_WORKAROUND_2 };
  1318. static struct nm256_quirk nm256_quirks[] __devinitdata = {
  1319. /* HP omnibook 4150 has cs4232 codec internally */
  1320. { .vendor = 0x103c, .device = 0x0007, .type = NM_BLACKLISTED },
  1321. /* Sony PCG-F305 */
  1322. { .vendor = 0x104d, .device = 0x8041, .type = NM_RESET_WORKAROUND },
  1323. /* Dell Latitude LS */
  1324. { .vendor = 0x1028, .device = 0x0080, .type = NM_RESET_WORKAROUND },
  1325. /* Dell Latitude CSx */
  1326. { .vendor = 0x1028, .device = 0x0091, .type = NM_RESET_WORKAROUND_2 },
  1327. { } /* terminator */
  1328. };
  1329. static int __devinit snd_nm256_probe(struct pci_dev *pci,
  1330. const struct pci_device_id *pci_id)
  1331. {
  1332. snd_card_t *card;
  1333. nm256_t *chip;
  1334. int err;
  1335. unsigned int xbuffer_top;
  1336. struct nm256_quirk *q;
  1337. u16 subsystem_vendor, subsystem_device;
  1338. pci_read_config_word(pci, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vendor);
  1339. pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &subsystem_device);
  1340. for (q = nm256_quirks; q->vendor; q++) {
  1341. if (q->vendor == subsystem_vendor && q->device == subsystem_device) {
  1342. switch (q->type) {
  1343. case NM_BLACKLISTED:
  1344. printk(KERN_INFO "nm256: The device is blacklisted. Loading stopped\n");
  1345. return -ENODEV;
  1346. case NM_RESET_WORKAROUND_2:
  1347. reset_workaround_2 = 1;
  1348. /* Fall-through */
  1349. case NM_RESET_WORKAROUND:
  1350. reset_workaround = 1;
  1351. break;
  1352. }
  1353. }
  1354. }
  1355. card = snd_card_new(index, id, THIS_MODULE, 0);
  1356. if (card == NULL)
  1357. return -ENOMEM;
  1358. switch (pci->device) {
  1359. case PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO:
  1360. strcpy(card->driver, "NM256AV");
  1361. break;
  1362. case PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO:
  1363. strcpy(card->driver, "NM256ZX");
  1364. break;
  1365. case PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO:
  1366. strcpy(card->driver, "NM256XL+");
  1367. break;
  1368. default:
  1369. snd_printk("invalid device id 0x%x\n", pci->device);
  1370. snd_card_free(card);
  1371. return -EINVAL;
  1372. }
  1373. if (vaio_hack)
  1374. xbuffer_top = 0x25a800; /* this avoids conflicts with XFree86 server */
  1375. else
  1376. xbuffer_top = buffer_top;
  1377. if (playback_bufsize < 4)
  1378. playback_bufsize = 4;
  1379. if (playback_bufsize > 128)
  1380. playback_bufsize = 128;
  1381. if (capture_bufsize < 4)
  1382. capture_bufsize = 4;
  1383. if (capture_bufsize > 128)
  1384. capture_bufsize = 128;
  1385. if ((err = snd_nm256_create(card, pci,
  1386. playback_bufsize * 1024, /* in bytes */
  1387. capture_bufsize * 1024, /* in bytes */
  1388. force_ac97,
  1389. xbuffer_top,
  1390. use_cache,
  1391. &chip)) < 0) {
  1392. snd_card_free(card);
  1393. return err;
  1394. }
  1395. if (reset_workaround) {
  1396. snd_printdd(KERN_INFO "nm256: reset_workaround activated\n");
  1397. chip->reset_workaround = 1;
  1398. }
  1399. if (reset_workaround_2) {
  1400. snd_printdd(KERN_INFO "nm256: reset_workaround_2 activated\n");
  1401. chip->reset_workaround_2 = 1;
  1402. }
  1403. if ((err = snd_nm256_pcm(chip, 0)) < 0 ||
  1404. (err = snd_nm256_mixer(chip)) < 0) {
  1405. snd_card_free(card);
  1406. return err;
  1407. }
  1408. sprintf(card->shortname, "NeoMagic %s", card->driver);
  1409. sprintf(card->longname, "%s at 0x%lx & 0x%lx, irq %d",
  1410. card->shortname,
  1411. chip->buffer_addr, chip->cport_addr, chip->irq);
  1412. if ((err = snd_card_register(card)) < 0) {
  1413. snd_card_free(card);
  1414. return err;
  1415. }
  1416. pci_set_drvdata(pci, card);
  1417. return 0;
  1418. }
  1419. static void __devexit snd_nm256_remove(struct pci_dev *pci)
  1420. {
  1421. snd_card_free(pci_get_drvdata(pci));
  1422. pci_set_drvdata(pci, NULL);
  1423. }
  1424. static struct pci_driver driver = {
  1425. .name = "NeoMagic 256",
  1426. .owner = THIS_MODULE,
  1427. .id_table = snd_nm256_ids,
  1428. .probe = snd_nm256_probe,
  1429. .remove = __devexit_p(snd_nm256_remove),
  1430. SND_PCI_PM_CALLBACKS
  1431. };
  1432. static int __init alsa_card_nm256_init(void)
  1433. {
  1434. return pci_register_driver(&driver);
  1435. }
  1436. static void __exit alsa_card_nm256_exit(void)
  1437. {
  1438. pci_unregister_driver(&driver);
  1439. }
  1440. module_init(alsa_card_nm256_init)
  1441. module_exit(alsa_card_nm256_exit)