mpc5200_dma.c 13 KB

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  1. /*
  2. * Freescale MPC5200 PSC DMA
  3. * ALSA SoC Platform driver
  4. *
  5. * Copyright (C) 2008 Secret Lab Technologies Ltd.
  6. */
  7. #include <linux/init.h>
  8. #include <linux/module.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/device.h>
  11. #include <linux/delay.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_platform.h>
  14. #include <linux/dma-mapping.h>
  15. #include <sound/core.h>
  16. #include <sound/pcm.h>
  17. #include <sound/pcm_params.h>
  18. #include <sound/initval.h>
  19. #include <sound/soc.h>
  20. #include <sound/soc-of-simple.h>
  21. #include <sysdev/bestcomm/bestcomm.h>
  22. #include <sysdev/bestcomm/gen_bd.h>
  23. #include <asm/mpc52xx_psc.h>
  24. #include "mpc5200_dma.h"
  25. MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
  26. MODULE_DESCRIPTION("Freescale MPC5200 PSC in DMA mode ASoC Driver");
  27. MODULE_LICENSE("GPL");
  28. /*
  29. * Interrupt handlers
  30. */
  31. static irqreturn_t psc_i2s_status_irq(int irq, void *_psc_i2s)
  32. {
  33. struct psc_i2s *psc_i2s = _psc_i2s;
  34. struct mpc52xx_psc __iomem *regs = psc_i2s->psc_regs;
  35. u16 isr;
  36. isr = in_be16(&regs->mpc52xx_psc_isr);
  37. /* Playback underrun error */
  38. if (psc_i2s->playback.active && (isr & MPC52xx_PSC_IMR_TXEMP))
  39. psc_i2s->stats.underrun_count++;
  40. /* Capture overrun error */
  41. if (psc_i2s->capture.active && (isr & MPC52xx_PSC_IMR_ORERR))
  42. psc_i2s->stats.overrun_count++;
  43. out_8(&regs->command, 4 << 4); /* reset the error status */
  44. return IRQ_HANDLED;
  45. }
  46. /**
  47. * psc_i2s_bcom_enqueue_next_buffer - Enqueue another audio buffer
  48. * @s: pointer to stream private data structure
  49. *
  50. * Enqueues another audio period buffer into the bestcomm queue.
  51. *
  52. * Note: The routine must only be called when there is space available in
  53. * the queue. Otherwise the enqueue will fail and the audio ring buffer
  54. * will get out of sync
  55. */
  56. static void psc_i2s_bcom_enqueue_next_buffer(struct psc_i2s_stream *s)
  57. {
  58. struct bcom_bd *bd;
  59. /* Prepare and enqueue the next buffer descriptor */
  60. bd = bcom_prepare_next_buffer(s->bcom_task);
  61. bd->status = s->period_bytes;
  62. bd->data[0] = s->period_next_pt;
  63. bcom_submit_next_buffer(s->bcom_task, NULL);
  64. /* Update for next period */
  65. s->period_next_pt += s->period_bytes;
  66. if (s->period_next_pt >= s->period_end)
  67. s->period_next_pt = s->period_start;
  68. }
  69. /* Bestcomm DMA irq handler */
  70. static irqreturn_t psc_i2s_bcom_irq(int irq, void *_psc_i2s_stream)
  71. {
  72. struct psc_i2s_stream *s = _psc_i2s_stream;
  73. /* For each finished period, dequeue the completed period buffer
  74. * and enqueue a new one in it's place. */
  75. while (bcom_buffer_done(s->bcom_task)) {
  76. bcom_retrieve_buffer(s->bcom_task, NULL, NULL);
  77. s->period_current_pt += s->period_bytes;
  78. if (s->period_current_pt >= s->period_end)
  79. s->period_current_pt = s->period_start;
  80. psc_i2s_bcom_enqueue_next_buffer(s);
  81. bcom_enable(s->bcom_task);
  82. }
  83. /* If the stream is active, then also inform the PCM middle layer
  84. * of the period finished event. */
  85. if (s->active)
  86. snd_pcm_period_elapsed(s->stream);
  87. return IRQ_HANDLED;
  88. }
  89. /**
  90. * psc_i2s_startup: create a new substream
  91. *
  92. * This is the first function called when a stream is opened.
  93. *
  94. * If this is the first stream open, then grab the IRQ and program most of
  95. * the PSC registers.
  96. */
  97. int psc_i2s_startup(struct snd_pcm_substream *substream,
  98. struct snd_soc_dai *dai)
  99. {
  100. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  101. struct psc_i2s *psc_i2s = rtd->dai->cpu_dai->private_data;
  102. int rc;
  103. dev_dbg(psc_i2s->dev, "psc_i2s_startup(substream=%p)\n", substream);
  104. if (!psc_i2s->playback.active &&
  105. !psc_i2s->capture.active) {
  106. /* Setup the IRQs */
  107. rc = request_irq(psc_i2s->irq, &psc_i2s_status_irq, IRQF_SHARED,
  108. "psc-i2s-status", psc_i2s);
  109. rc |= request_irq(psc_i2s->capture.irq,
  110. &psc_i2s_bcom_irq, IRQF_SHARED,
  111. "psc-i2s-capture", &psc_i2s->capture);
  112. rc |= request_irq(psc_i2s->playback.irq,
  113. &psc_i2s_bcom_irq, IRQF_SHARED,
  114. "psc-i2s-playback", &psc_i2s->playback);
  115. if (rc) {
  116. free_irq(psc_i2s->irq, psc_i2s);
  117. free_irq(psc_i2s->capture.irq,
  118. &psc_i2s->capture);
  119. free_irq(psc_i2s->playback.irq,
  120. &psc_i2s->playback);
  121. return -ENODEV;
  122. }
  123. }
  124. return 0;
  125. }
  126. int psc_i2s_hw_free(struct snd_pcm_substream *substream,
  127. struct snd_soc_dai *dai)
  128. {
  129. snd_pcm_set_runtime_buffer(substream, NULL);
  130. return 0;
  131. }
  132. /**
  133. * psc_i2s_trigger: start and stop the DMA transfer.
  134. *
  135. * This function is called by ALSA to start, stop, pause, and resume the DMA
  136. * transfer of data.
  137. */
  138. int psc_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
  139. struct snd_soc_dai *dai)
  140. {
  141. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  142. struct psc_i2s *psc_i2s = rtd->dai->cpu_dai->private_data;
  143. struct snd_pcm_runtime *runtime = substream->runtime;
  144. struct psc_i2s_stream *s;
  145. struct mpc52xx_psc __iomem *regs = psc_i2s->psc_regs;
  146. u16 imr;
  147. u8 psc_cmd;
  148. unsigned long flags;
  149. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  150. s = &psc_i2s->capture;
  151. else
  152. s = &psc_i2s->playback;
  153. dev_dbg(psc_i2s->dev, "psc_i2s_trigger(substream=%p, cmd=%i)"
  154. " stream_id=%i\n",
  155. substream, cmd, substream->pstr->stream);
  156. switch (cmd) {
  157. case SNDRV_PCM_TRIGGER_START:
  158. s->period_bytes = frames_to_bytes(runtime,
  159. runtime->period_size);
  160. s->period_start = virt_to_phys(runtime->dma_area);
  161. s->period_end = s->period_start +
  162. (s->period_bytes * runtime->periods);
  163. s->period_next_pt = s->period_start;
  164. s->period_current_pt = s->period_start;
  165. s->active = 1;
  166. /* First; reset everything */
  167. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) {
  168. out_8(&regs->command, MPC52xx_PSC_RST_RX);
  169. out_8(&regs->command, MPC52xx_PSC_RST_ERR_STAT);
  170. } else {
  171. out_8(&regs->command, MPC52xx_PSC_RST_TX);
  172. out_8(&regs->command, MPC52xx_PSC_RST_ERR_STAT);
  173. }
  174. /* Next, fill up the bestcomm bd queue and enable DMA.
  175. * This will begin filling the PSC's fifo. */
  176. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  177. bcom_gen_bd_rx_reset(s->bcom_task);
  178. else
  179. bcom_gen_bd_tx_reset(s->bcom_task);
  180. while (!bcom_queue_full(s->bcom_task))
  181. psc_i2s_bcom_enqueue_next_buffer(s);
  182. bcom_enable(s->bcom_task);
  183. /* Due to errata in the i2s mode; need to line up enabling
  184. * the transmitter with a transition on the frame sync
  185. * line */
  186. spin_lock_irqsave(&psc_i2s->lock, flags);
  187. /* first make sure it is low */
  188. while ((in_8(&regs->ipcr_acr.ipcr) & 0x80) != 0)
  189. ;
  190. /* then wait for the transition to high */
  191. while ((in_8(&regs->ipcr_acr.ipcr) & 0x80) == 0)
  192. ;
  193. /* Finally, enable the PSC.
  194. * Receiver must always be enabled; even when we only want
  195. * transmit. (see 15.3.2.3 of MPC5200B User's Guide) */
  196. psc_cmd = MPC52xx_PSC_RX_ENABLE;
  197. if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK)
  198. psc_cmd |= MPC52xx_PSC_TX_ENABLE;
  199. out_8(&regs->command, psc_cmd);
  200. spin_unlock_irqrestore(&psc_i2s->lock, flags);
  201. break;
  202. case SNDRV_PCM_TRIGGER_STOP:
  203. /* Turn off the PSC */
  204. s->active = 0;
  205. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) {
  206. if (!psc_i2s->playback.active) {
  207. out_8(&regs->command, 2 << 4); /* reset rx */
  208. out_8(&regs->command, 3 << 4); /* reset tx */
  209. out_8(&regs->command, 4 << 4); /* reset err */
  210. }
  211. } else {
  212. out_8(&regs->command, 3 << 4); /* reset tx */
  213. out_8(&regs->command, 4 << 4); /* reset err */
  214. if (!psc_i2s->capture.active)
  215. out_8(&regs->command, 2 << 4); /* reset rx */
  216. }
  217. bcom_disable(s->bcom_task);
  218. while (!bcom_queue_empty(s->bcom_task))
  219. bcom_retrieve_buffer(s->bcom_task, NULL, NULL);
  220. break;
  221. default:
  222. dev_dbg(psc_i2s->dev, "invalid command\n");
  223. return -EINVAL;
  224. }
  225. /* Update interrupt enable settings */
  226. imr = 0;
  227. if (psc_i2s->playback.active)
  228. imr |= MPC52xx_PSC_IMR_TXEMP;
  229. if (psc_i2s->capture.active)
  230. imr |= MPC52xx_PSC_IMR_ORERR;
  231. out_be16(&regs->isr_imr.imr, imr);
  232. return 0;
  233. }
  234. /**
  235. * psc_i2s_shutdown: shutdown the data transfer on a stream
  236. *
  237. * Shutdown the PSC if there are no other substreams open.
  238. */
  239. void psc_i2s_shutdown(struct snd_pcm_substream *substream,
  240. struct snd_soc_dai *dai)
  241. {
  242. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  243. struct psc_i2s *psc_i2s = rtd->dai->cpu_dai->private_data;
  244. dev_dbg(psc_i2s->dev, "psc_i2s_shutdown(substream=%p)\n", substream);
  245. /*
  246. * If this is the last active substream, disable the PSC and release
  247. * the IRQ.
  248. */
  249. if (!psc_i2s->playback.active &&
  250. !psc_i2s->capture.active) {
  251. /* Disable all interrupts and reset the PSC */
  252. out_be16(&psc_i2s->psc_regs->isr_imr.imr, 0);
  253. out_8(&psc_i2s->psc_regs->command, 3 << 4); /* reset tx */
  254. out_8(&psc_i2s->psc_regs->command, 2 << 4); /* reset rx */
  255. out_8(&psc_i2s->psc_regs->command, 1 << 4); /* reset mode */
  256. out_8(&psc_i2s->psc_regs->command, 4 << 4); /* reset error */
  257. /* Release irqs */
  258. free_irq(psc_i2s->irq, psc_i2s);
  259. free_irq(psc_i2s->capture.irq, &psc_i2s->capture);
  260. free_irq(psc_i2s->playback.irq, &psc_i2s->playback);
  261. }
  262. }
  263. /* ---------------------------------------------------------------------
  264. * The PSC DMA 'ASoC platform' driver
  265. *
  266. * Can be referenced by an 'ASoC machine' driver
  267. * This driver only deals with the audio bus; it doesn't have any
  268. * interaction with the attached codec
  269. */
  270. static const struct snd_pcm_hardware psc_i2s_pcm_hardware = {
  271. .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  272. SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
  273. SNDRV_PCM_INFO_BATCH,
  274. .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE |
  275. SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE,
  276. .rate_min = 8000,
  277. .rate_max = 48000,
  278. .channels_min = 2,
  279. .channels_max = 2,
  280. .period_bytes_max = 1024 * 1024,
  281. .period_bytes_min = 32,
  282. .periods_min = 2,
  283. .periods_max = 256,
  284. .buffer_bytes_max = 2 * 1024 * 1024,
  285. .fifo_size = 0,
  286. };
  287. static int psc_i2s_pcm_open(struct snd_pcm_substream *substream)
  288. {
  289. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  290. struct psc_i2s *psc_i2s = rtd->dai->cpu_dai->private_data;
  291. struct psc_i2s_stream *s;
  292. dev_dbg(psc_i2s->dev, "psc_i2s_pcm_open(substream=%p)\n", substream);
  293. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  294. s = &psc_i2s->capture;
  295. else
  296. s = &psc_i2s->playback;
  297. snd_soc_set_runtime_hwparams(substream, &psc_i2s_pcm_hardware);
  298. s->stream = substream;
  299. return 0;
  300. }
  301. static int psc_i2s_pcm_close(struct snd_pcm_substream *substream)
  302. {
  303. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  304. struct psc_i2s *psc_i2s = rtd->dai->cpu_dai->private_data;
  305. struct psc_i2s_stream *s;
  306. dev_dbg(psc_i2s->dev, "psc_i2s_pcm_close(substream=%p)\n", substream);
  307. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  308. s = &psc_i2s->capture;
  309. else
  310. s = &psc_i2s->playback;
  311. s->stream = NULL;
  312. return 0;
  313. }
  314. static snd_pcm_uframes_t
  315. psc_i2s_pcm_pointer(struct snd_pcm_substream *substream)
  316. {
  317. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  318. struct psc_i2s *psc_i2s = rtd->dai->cpu_dai->private_data;
  319. struct psc_i2s_stream *s;
  320. dma_addr_t count;
  321. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  322. s = &psc_i2s->capture;
  323. else
  324. s = &psc_i2s->playback;
  325. count = s->period_current_pt - s->period_start;
  326. return bytes_to_frames(substream->runtime, count);
  327. }
  328. static struct snd_pcm_ops psc_i2s_pcm_ops = {
  329. .open = psc_i2s_pcm_open,
  330. .close = psc_i2s_pcm_close,
  331. .ioctl = snd_pcm_lib_ioctl,
  332. .pointer = psc_i2s_pcm_pointer,
  333. };
  334. static u64 psc_i2s_pcm_dmamask = 0xffffffff;
  335. static int psc_i2s_pcm_new(struct snd_card *card, struct snd_soc_dai *dai,
  336. struct snd_pcm *pcm)
  337. {
  338. struct snd_soc_pcm_runtime *rtd = pcm->private_data;
  339. size_t size = psc_i2s_pcm_hardware.buffer_bytes_max;
  340. int rc = 0;
  341. dev_dbg(rtd->socdev->dev, "psc_i2s_pcm_new(card=%p, dai=%p, pcm=%p)\n",
  342. card, dai, pcm);
  343. if (!card->dev->dma_mask)
  344. card->dev->dma_mask = &psc_i2s_pcm_dmamask;
  345. if (!card->dev->coherent_dma_mask)
  346. card->dev->coherent_dma_mask = 0xffffffff;
  347. if (pcm->streams[0].substream) {
  348. rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->dev, size,
  349. &pcm->streams[0].substream->dma_buffer);
  350. if (rc)
  351. goto playback_alloc_err;
  352. }
  353. if (pcm->streams[1].substream) {
  354. rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->dev, size,
  355. &pcm->streams[1].substream->dma_buffer);
  356. if (rc)
  357. goto capture_alloc_err;
  358. }
  359. return 0;
  360. capture_alloc_err:
  361. if (pcm->streams[0].substream)
  362. snd_dma_free_pages(&pcm->streams[0].substream->dma_buffer);
  363. playback_alloc_err:
  364. dev_err(card->dev, "Cannot allocate buffer(s)\n");
  365. return -ENOMEM;
  366. }
  367. static void psc_i2s_pcm_free(struct snd_pcm *pcm)
  368. {
  369. struct snd_soc_pcm_runtime *rtd = pcm->private_data;
  370. struct snd_pcm_substream *substream;
  371. int stream;
  372. dev_dbg(rtd->socdev->dev, "psc_i2s_pcm_free(pcm=%p)\n", pcm);
  373. for (stream = 0; stream < 2; stream++) {
  374. substream = pcm->streams[stream].substream;
  375. if (substream) {
  376. snd_dma_free_pages(&substream->dma_buffer);
  377. substream->dma_buffer.area = NULL;
  378. substream->dma_buffer.addr = 0;
  379. }
  380. }
  381. }
  382. struct snd_soc_platform psc_i2s_pcm_soc_platform = {
  383. .name = "mpc5200-psc-audio",
  384. .pcm_ops = &psc_i2s_pcm_ops,
  385. .pcm_new = &psc_i2s_pcm_new,
  386. .pcm_free = &psc_i2s_pcm_free,
  387. };