qlcnic_init.c 42 KB

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  1. /*
  2. * Copyright (C) 2009 - QLogic Corporation.
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
  18. * MA 02111-1307, USA.
  19. *
  20. * The full GNU General Public License is included in this distribution
  21. * in the file called "COPYING".
  22. *
  23. */
  24. #include <linux/netdevice.h>
  25. #include <linux/delay.h>
  26. #include <linux/slab.h>
  27. #include <linux/if_vlan.h>
  28. #include "qlcnic.h"
  29. struct crb_addr_pair {
  30. u32 addr;
  31. u32 data;
  32. };
  33. #define QLCNIC_MAX_CRB_XFORM 60
  34. static unsigned int crb_addr_xform[QLCNIC_MAX_CRB_XFORM];
  35. #define crb_addr_transform(name) \
  36. (crb_addr_xform[QLCNIC_HW_PX_MAP_CRB_##name] = \
  37. QLCNIC_HW_CRB_HUB_AGT_ADR_##name << 20)
  38. #define QLCNIC_ADDR_ERROR (0xffffffff)
  39. static void
  40. qlcnic_post_rx_buffers_nodb(struct qlcnic_adapter *adapter,
  41. struct qlcnic_host_rds_ring *rds_ring);
  42. static int
  43. qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter);
  44. static void crb_addr_transform_setup(void)
  45. {
  46. crb_addr_transform(XDMA);
  47. crb_addr_transform(TIMR);
  48. crb_addr_transform(SRE);
  49. crb_addr_transform(SQN3);
  50. crb_addr_transform(SQN2);
  51. crb_addr_transform(SQN1);
  52. crb_addr_transform(SQN0);
  53. crb_addr_transform(SQS3);
  54. crb_addr_transform(SQS2);
  55. crb_addr_transform(SQS1);
  56. crb_addr_transform(SQS0);
  57. crb_addr_transform(RPMX7);
  58. crb_addr_transform(RPMX6);
  59. crb_addr_transform(RPMX5);
  60. crb_addr_transform(RPMX4);
  61. crb_addr_transform(RPMX3);
  62. crb_addr_transform(RPMX2);
  63. crb_addr_transform(RPMX1);
  64. crb_addr_transform(RPMX0);
  65. crb_addr_transform(ROMUSB);
  66. crb_addr_transform(SN);
  67. crb_addr_transform(QMN);
  68. crb_addr_transform(QMS);
  69. crb_addr_transform(PGNI);
  70. crb_addr_transform(PGND);
  71. crb_addr_transform(PGN3);
  72. crb_addr_transform(PGN2);
  73. crb_addr_transform(PGN1);
  74. crb_addr_transform(PGN0);
  75. crb_addr_transform(PGSI);
  76. crb_addr_transform(PGSD);
  77. crb_addr_transform(PGS3);
  78. crb_addr_transform(PGS2);
  79. crb_addr_transform(PGS1);
  80. crb_addr_transform(PGS0);
  81. crb_addr_transform(PS);
  82. crb_addr_transform(PH);
  83. crb_addr_transform(NIU);
  84. crb_addr_transform(I2Q);
  85. crb_addr_transform(EG);
  86. crb_addr_transform(MN);
  87. crb_addr_transform(MS);
  88. crb_addr_transform(CAS2);
  89. crb_addr_transform(CAS1);
  90. crb_addr_transform(CAS0);
  91. crb_addr_transform(CAM);
  92. crb_addr_transform(C2C1);
  93. crb_addr_transform(C2C0);
  94. crb_addr_transform(SMB);
  95. crb_addr_transform(OCM0);
  96. crb_addr_transform(I2C0);
  97. }
  98. void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter)
  99. {
  100. struct qlcnic_recv_context *recv_ctx;
  101. struct qlcnic_host_rds_ring *rds_ring;
  102. struct qlcnic_rx_buffer *rx_buf;
  103. int i, ring;
  104. recv_ctx = &adapter->recv_ctx;
  105. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  106. rds_ring = &recv_ctx->rds_rings[ring];
  107. for (i = 0; i < rds_ring->num_desc; ++i) {
  108. rx_buf = &(rds_ring->rx_buf_arr[i]);
  109. if (rx_buf->skb == NULL)
  110. continue;
  111. pci_unmap_single(adapter->pdev,
  112. rx_buf->dma,
  113. rds_ring->dma_size,
  114. PCI_DMA_FROMDEVICE);
  115. dev_kfree_skb_any(rx_buf->skb);
  116. }
  117. }
  118. }
  119. void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter)
  120. {
  121. struct qlcnic_recv_context *recv_ctx;
  122. struct qlcnic_host_rds_ring *rds_ring;
  123. struct qlcnic_rx_buffer *rx_buf;
  124. int i, ring;
  125. recv_ctx = &adapter->recv_ctx;
  126. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  127. rds_ring = &recv_ctx->rds_rings[ring];
  128. INIT_LIST_HEAD(&rds_ring->free_list);
  129. rx_buf = rds_ring->rx_buf_arr;
  130. for (i = 0; i < rds_ring->num_desc; i++) {
  131. list_add_tail(&rx_buf->list,
  132. &rds_ring->free_list);
  133. rx_buf++;
  134. }
  135. }
  136. }
  137. void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter)
  138. {
  139. struct qlcnic_cmd_buffer *cmd_buf;
  140. struct qlcnic_skb_frag *buffrag;
  141. int i, j;
  142. struct qlcnic_host_tx_ring *tx_ring = adapter->tx_ring;
  143. cmd_buf = tx_ring->cmd_buf_arr;
  144. for (i = 0; i < tx_ring->num_desc; i++) {
  145. buffrag = cmd_buf->frag_array;
  146. if (buffrag->dma) {
  147. pci_unmap_single(adapter->pdev, buffrag->dma,
  148. buffrag->length, PCI_DMA_TODEVICE);
  149. buffrag->dma = 0ULL;
  150. }
  151. for (j = 0; j < cmd_buf->frag_count; j++) {
  152. buffrag++;
  153. if (buffrag->dma) {
  154. pci_unmap_page(adapter->pdev, buffrag->dma,
  155. buffrag->length,
  156. PCI_DMA_TODEVICE);
  157. buffrag->dma = 0ULL;
  158. }
  159. }
  160. if (cmd_buf->skb) {
  161. dev_kfree_skb_any(cmd_buf->skb);
  162. cmd_buf->skb = NULL;
  163. }
  164. cmd_buf++;
  165. }
  166. }
  167. void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter)
  168. {
  169. struct qlcnic_recv_context *recv_ctx;
  170. struct qlcnic_host_rds_ring *rds_ring;
  171. struct qlcnic_host_tx_ring *tx_ring;
  172. int ring;
  173. recv_ctx = &adapter->recv_ctx;
  174. if (recv_ctx->rds_rings == NULL)
  175. goto skip_rds;
  176. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  177. rds_ring = &recv_ctx->rds_rings[ring];
  178. vfree(rds_ring->rx_buf_arr);
  179. rds_ring->rx_buf_arr = NULL;
  180. }
  181. kfree(recv_ctx->rds_rings);
  182. skip_rds:
  183. if (adapter->tx_ring == NULL)
  184. return;
  185. tx_ring = adapter->tx_ring;
  186. vfree(tx_ring->cmd_buf_arr);
  187. tx_ring->cmd_buf_arr = NULL;
  188. kfree(adapter->tx_ring);
  189. adapter->tx_ring = NULL;
  190. }
  191. int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter)
  192. {
  193. struct qlcnic_recv_context *recv_ctx;
  194. struct qlcnic_host_rds_ring *rds_ring;
  195. struct qlcnic_host_sds_ring *sds_ring;
  196. struct qlcnic_host_tx_ring *tx_ring;
  197. struct qlcnic_rx_buffer *rx_buf;
  198. int ring, i, size;
  199. struct qlcnic_cmd_buffer *cmd_buf_arr;
  200. struct net_device *netdev = adapter->netdev;
  201. size = sizeof(struct qlcnic_host_tx_ring);
  202. tx_ring = kzalloc(size, GFP_KERNEL);
  203. if (tx_ring == NULL) {
  204. dev_err(&netdev->dev, "failed to allocate tx ring struct\n");
  205. return -ENOMEM;
  206. }
  207. adapter->tx_ring = tx_ring;
  208. tx_ring->num_desc = adapter->num_txd;
  209. tx_ring->txq = netdev_get_tx_queue(netdev, 0);
  210. cmd_buf_arr = vzalloc(TX_BUFF_RINGSIZE(tx_ring));
  211. if (cmd_buf_arr == NULL) {
  212. dev_err(&netdev->dev, "failed to allocate cmd buffer ring\n");
  213. goto err_out;
  214. }
  215. tx_ring->cmd_buf_arr = cmd_buf_arr;
  216. recv_ctx = &adapter->recv_ctx;
  217. size = adapter->max_rds_rings * sizeof(struct qlcnic_host_rds_ring);
  218. rds_ring = kzalloc(size, GFP_KERNEL);
  219. if (rds_ring == NULL) {
  220. dev_err(&netdev->dev, "failed to allocate rds ring struct\n");
  221. goto err_out;
  222. }
  223. recv_ctx->rds_rings = rds_ring;
  224. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  225. rds_ring = &recv_ctx->rds_rings[ring];
  226. switch (ring) {
  227. case RCV_RING_NORMAL:
  228. rds_ring->num_desc = adapter->num_rxd;
  229. rds_ring->dma_size = QLCNIC_P3P_RX_BUF_MAX_LEN;
  230. rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
  231. break;
  232. case RCV_RING_JUMBO:
  233. rds_ring->num_desc = adapter->num_jumbo_rxd;
  234. rds_ring->dma_size =
  235. QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN;
  236. if (adapter->capabilities & QLCNIC_FW_CAPABILITY_HW_LRO)
  237. rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA;
  238. rds_ring->skb_size =
  239. rds_ring->dma_size + NET_IP_ALIGN;
  240. break;
  241. }
  242. rds_ring->rx_buf_arr = (struct qlcnic_rx_buffer *)
  243. vzalloc(RCV_BUFF_RINGSIZE(rds_ring));
  244. if (rds_ring->rx_buf_arr == NULL) {
  245. dev_err(&netdev->dev, "Failed to allocate "
  246. "rx buffer ring %d\n", ring);
  247. goto err_out;
  248. }
  249. INIT_LIST_HEAD(&rds_ring->free_list);
  250. /*
  251. * Now go through all of them, set reference handles
  252. * and put them in the queues.
  253. */
  254. rx_buf = rds_ring->rx_buf_arr;
  255. for (i = 0; i < rds_ring->num_desc; i++) {
  256. list_add_tail(&rx_buf->list,
  257. &rds_ring->free_list);
  258. rx_buf->ref_handle = i;
  259. rx_buf++;
  260. }
  261. spin_lock_init(&rds_ring->lock);
  262. }
  263. for (ring = 0; ring < adapter->max_sds_rings; ring++) {
  264. sds_ring = &recv_ctx->sds_rings[ring];
  265. sds_ring->irq = adapter->msix_entries[ring].vector;
  266. sds_ring->adapter = adapter;
  267. sds_ring->num_desc = adapter->num_rxd;
  268. for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
  269. INIT_LIST_HEAD(&sds_ring->free_list[i]);
  270. }
  271. return 0;
  272. err_out:
  273. qlcnic_free_sw_resources(adapter);
  274. return -ENOMEM;
  275. }
  276. /*
  277. * Utility to translate from internal Phantom CRB address
  278. * to external PCI CRB address.
  279. */
  280. static u32 qlcnic_decode_crb_addr(u32 addr)
  281. {
  282. int i;
  283. u32 base_addr, offset, pci_base;
  284. crb_addr_transform_setup();
  285. pci_base = QLCNIC_ADDR_ERROR;
  286. base_addr = addr & 0xfff00000;
  287. offset = addr & 0x000fffff;
  288. for (i = 0; i < QLCNIC_MAX_CRB_XFORM; i++) {
  289. if (crb_addr_xform[i] == base_addr) {
  290. pci_base = i << 20;
  291. break;
  292. }
  293. }
  294. if (pci_base == QLCNIC_ADDR_ERROR)
  295. return pci_base;
  296. else
  297. return pci_base + offset;
  298. }
  299. #define QLCNIC_MAX_ROM_WAIT_USEC 100
  300. static int qlcnic_wait_rom_done(struct qlcnic_adapter *adapter)
  301. {
  302. long timeout = 0;
  303. long done = 0;
  304. cond_resched();
  305. while (done == 0) {
  306. done = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_STATUS);
  307. done &= 2;
  308. if (++timeout >= QLCNIC_MAX_ROM_WAIT_USEC) {
  309. dev_err(&adapter->pdev->dev,
  310. "Timeout reached waiting for rom done");
  311. return -EIO;
  312. }
  313. udelay(1);
  314. }
  315. return 0;
  316. }
  317. static int do_rom_fast_read(struct qlcnic_adapter *adapter,
  318. int addr, int *valp)
  319. {
  320. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ADDRESS, addr);
  321. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  322. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 3);
  323. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_INSTR_OPCODE, 0xb);
  324. if (qlcnic_wait_rom_done(adapter)) {
  325. dev_err(&adapter->pdev->dev, "Error waiting for rom done\n");
  326. return -EIO;
  327. }
  328. /* reset abyte_cnt and dummy_byte_cnt */
  329. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 0);
  330. udelay(10);
  331. QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
  332. *valp = QLCRD32(adapter, QLCNIC_ROMUSB_ROM_RDATA);
  333. return 0;
  334. }
  335. static int do_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
  336. u8 *bytes, size_t size)
  337. {
  338. int addridx;
  339. int ret = 0;
  340. for (addridx = addr; addridx < (addr + size); addridx += 4) {
  341. int v;
  342. ret = do_rom_fast_read(adapter, addridx, &v);
  343. if (ret != 0)
  344. break;
  345. *(__le32 *)bytes = cpu_to_le32(v);
  346. bytes += 4;
  347. }
  348. return ret;
  349. }
  350. int
  351. qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
  352. u8 *bytes, size_t size)
  353. {
  354. int ret;
  355. ret = qlcnic_rom_lock(adapter);
  356. if (ret < 0)
  357. return ret;
  358. ret = do_rom_fast_read_words(adapter, addr, bytes, size);
  359. qlcnic_rom_unlock(adapter);
  360. return ret;
  361. }
  362. int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, int addr, int *valp)
  363. {
  364. int ret;
  365. if (qlcnic_rom_lock(adapter) != 0)
  366. return -EIO;
  367. ret = do_rom_fast_read(adapter, addr, valp);
  368. qlcnic_rom_unlock(adapter);
  369. return ret;
  370. }
  371. int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter)
  372. {
  373. int addr, val;
  374. int i, n, init_delay;
  375. struct crb_addr_pair *buf;
  376. unsigned offset;
  377. u32 off;
  378. struct pci_dev *pdev = adapter->pdev;
  379. QLCWR32(adapter, CRB_CMDPEG_STATE, 0);
  380. QLCWR32(adapter, CRB_RCVPEG_STATE, 0);
  381. qlcnic_rom_lock(adapter);
  382. QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0xfeffffff);
  383. qlcnic_rom_unlock(adapter);
  384. /* Init HW CRB block */
  385. if (qlcnic_rom_fast_read(adapter, 0, &n) != 0 || (n != 0xcafecafe) ||
  386. qlcnic_rom_fast_read(adapter, 4, &n) != 0) {
  387. dev_err(&pdev->dev, "ERROR Reading crb_init area: val:%x\n", n);
  388. return -EIO;
  389. }
  390. offset = n & 0xffffU;
  391. n = (n >> 16) & 0xffffU;
  392. if (n >= 1024) {
  393. dev_err(&pdev->dev, "QLOGIC card flash not initialized.\n");
  394. return -EIO;
  395. }
  396. buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
  397. if (buf == NULL) {
  398. dev_err(&pdev->dev, "Unable to calloc memory for rom read.\n");
  399. return -ENOMEM;
  400. }
  401. for (i = 0; i < n; i++) {
  402. if (qlcnic_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
  403. qlcnic_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
  404. kfree(buf);
  405. return -EIO;
  406. }
  407. buf[i].addr = addr;
  408. buf[i].data = val;
  409. }
  410. for (i = 0; i < n; i++) {
  411. off = qlcnic_decode_crb_addr(buf[i].addr);
  412. if (off == QLCNIC_ADDR_ERROR) {
  413. dev_err(&pdev->dev, "CRB init value out of range %x\n",
  414. buf[i].addr);
  415. continue;
  416. }
  417. off += QLCNIC_PCI_CRBSPACE;
  418. if (off & 1)
  419. continue;
  420. /* skipping cold reboot MAGIC */
  421. if (off == QLCNIC_CAM_RAM(0x1fc))
  422. continue;
  423. if (off == (QLCNIC_CRB_I2C0 + 0x1c))
  424. continue;
  425. if (off == (ROMUSB_GLB + 0xbc)) /* do not reset PCI */
  426. continue;
  427. if (off == (ROMUSB_GLB + 0xa8))
  428. continue;
  429. if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
  430. continue;
  431. if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
  432. continue;
  433. if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
  434. continue;
  435. if ((off & 0x0ff00000) == QLCNIC_CRB_DDR_NET)
  436. continue;
  437. /* skip the function enable register */
  438. if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION))
  439. continue;
  440. if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION2))
  441. continue;
  442. if ((off & 0x0ff00000) == QLCNIC_CRB_SMB)
  443. continue;
  444. init_delay = 1;
  445. /* After writing this register, HW needs time for CRB */
  446. /* to quiet down (else crb_window returns 0xffffffff) */
  447. if (off == QLCNIC_ROMUSB_GLB_SW_RESET)
  448. init_delay = 1000;
  449. QLCWR32(adapter, off, buf[i].data);
  450. msleep(init_delay);
  451. }
  452. kfree(buf);
  453. /* Initialize protocol process engine */
  454. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0xec, 0x1e);
  455. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0x4c, 8);
  456. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_I + 0x4c, 8);
  457. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x8, 0);
  458. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0xc, 0);
  459. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x8, 0);
  460. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0xc, 0);
  461. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x8, 0);
  462. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0xc, 0);
  463. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x8, 0);
  464. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0xc, 0);
  465. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x8, 0);
  466. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0xc, 0);
  467. msleep(1);
  468. QLCWR32(adapter, QLCNIC_PEG_HALT_STATUS1, 0);
  469. QLCWR32(adapter, QLCNIC_PEG_HALT_STATUS2, 0);
  470. return 0;
  471. }
  472. static int qlcnic_cmd_peg_ready(struct qlcnic_adapter *adapter)
  473. {
  474. u32 val;
  475. int retries = QLCNIC_CMDPEG_CHECK_RETRY_COUNT;
  476. do {
  477. val = QLCRD32(adapter, CRB_CMDPEG_STATE);
  478. switch (val) {
  479. case PHAN_INITIALIZE_COMPLETE:
  480. case PHAN_INITIALIZE_ACK:
  481. return 0;
  482. case PHAN_INITIALIZE_FAILED:
  483. goto out_err;
  484. default:
  485. break;
  486. }
  487. msleep(QLCNIC_CMDPEG_CHECK_DELAY);
  488. } while (--retries);
  489. QLCWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED);
  490. out_err:
  491. dev_err(&adapter->pdev->dev, "Command Peg initialization not "
  492. "complete, state: 0x%x.\n", val);
  493. return -EIO;
  494. }
  495. static int
  496. qlcnic_receive_peg_ready(struct qlcnic_adapter *adapter)
  497. {
  498. u32 val;
  499. int retries = QLCNIC_RCVPEG_CHECK_RETRY_COUNT;
  500. do {
  501. val = QLCRD32(adapter, CRB_RCVPEG_STATE);
  502. if (val == PHAN_PEG_RCV_INITIALIZED)
  503. return 0;
  504. msleep(QLCNIC_RCVPEG_CHECK_DELAY);
  505. } while (--retries);
  506. if (!retries) {
  507. dev_err(&adapter->pdev->dev, "Receive Peg initialization not "
  508. "complete, state: 0x%x.\n", val);
  509. return -EIO;
  510. }
  511. return 0;
  512. }
  513. int
  514. qlcnic_check_fw_status(struct qlcnic_adapter *adapter)
  515. {
  516. int err;
  517. err = qlcnic_cmd_peg_ready(adapter);
  518. if (err)
  519. return err;
  520. err = qlcnic_receive_peg_ready(adapter);
  521. if (err)
  522. return err;
  523. QLCWR32(adapter, CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
  524. return err;
  525. }
  526. int
  527. qlcnic_setup_idc_param(struct qlcnic_adapter *adapter) {
  528. int timeo;
  529. u32 val;
  530. val = QLCRD32(adapter, QLCNIC_CRB_DEV_PARTITION_INFO);
  531. val = QLC_DEV_GET_DRV(val, adapter->portnum);
  532. if ((val & 0x3) != QLCNIC_TYPE_NIC) {
  533. dev_err(&adapter->pdev->dev,
  534. "Not an Ethernet NIC func=%u\n", val);
  535. return -EIO;
  536. }
  537. adapter->physical_port = (val >> 2);
  538. if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DEV_INIT_TIMEOUT, &timeo))
  539. timeo = QLCNIC_INIT_TIMEOUT_SECS;
  540. adapter->dev_init_timeo = timeo;
  541. if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DRV_RESET_TIMEOUT, &timeo))
  542. timeo = QLCNIC_RESET_TIMEOUT_SECS;
  543. adapter->reset_ack_timeo = timeo;
  544. return 0;
  545. }
  546. int
  547. qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter)
  548. {
  549. u32 ver = -1, min_ver;
  550. qlcnic_rom_fast_read(adapter, QLCNIC_FW_VERSION_OFFSET, (int *)&ver);
  551. ver = QLCNIC_DECODE_VERSION(ver);
  552. min_ver = QLCNIC_MIN_FW_VERSION;
  553. if (ver < min_ver) {
  554. dev_err(&adapter->pdev->dev,
  555. "firmware version %d.%d.%d unsupported."
  556. "Min supported version %d.%d.%d\n",
  557. _major(ver), _minor(ver), _build(ver),
  558. _major(min_ver), _minor(min_ver), _build(min_ver));
  559. return -EINVAL;
  560. }
  561. return 0;
  562. }
  563. static int
  564. qlcnic_has_mn(struct qlcnic_adapter *adapter)
  565. {
  566. u32 capability;
  567. capability = 0;
  568. capability = QLCRD32(adapter, QLCNIC_PEG_TUNE_CAPABILITY);
  569. if (capability & QLCNIC_PEG_TUNE_MN_PRESENT)
  570. return 1;
  571. return 0;
  572. }
  573. static
  574. struct uni_table_desc *qlcnic_get_table_desc(const u8 *unirom, int section)
  575. {
  576. u32 i;
  577. struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
  578. __le32 entries = cpu_to_le32(directory->num_entries);
  579. for (i = 0; i < entries; i++) {
  580. __le32 offs = cpu_to_le32(directory->findex) +
  581. (i * cpu_to_le32(directory->entry_size));
  582. __le32 tab_type = cpu_to_le32(*((u32 *)&unirom[offs] + 8));
  583. if (tab_type == section)
  584. return (struct uni_table_desc *) &unirom[offs];
  585. }
  586. return NULL;
  587. }
  588. #define FILEHEADER_SIZE (14 * 4)
  589. static int
  590. qlcnic_validate_header(struct qlcnic_adapter *adapter)
  591. {
  592. const u8 *unirom = adapter->fw->data;
  593. struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
  594. __le32 fw_file_size = adapter->fw->size;
  595. __le32 entries;
  596. __le32 entry_size;
  597. __le32 tab_size;
  598. if (fw_file_size < FILEHEADER_SIZE)
  599. return -EINVAL;
  600. entries = cpu_to_le32(directory->num_entries);
  601. entry_size = cpu_to_le32(directory->entry_size);
  602. tab_size = cpu_to_le32(directory->findex) + (entries * entry_size);
  603. if (fw_file_size < tab_size)
  604. return -EINVAL;
  605. return 0;
  606. }
  607. static int
  608. qlcnic_validate_bootld(struct qlcnic_adapter *adapter)
  609. {
  610. struct uni_table_desc *tab_desc;
  611. struct uni_data_desc *descr;
  612. const u8 *unirom = adapter->fw->data;
  613. int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
  614. QLCNIC_UNI_BOOTLD_IDX_OFF));
  615. __le32 offs;
  616. __le32 tab_size;
  617. __le32 data_size;
  618. tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_BOOTLD);
  619. if (!tab_desc)
  620. return -EINVAL;
  621. tab_size = cpu_to_le32(tab_desc->findex) +
  622. (cpu_to_le32(tab_desc->entry_size) * (idx + 1));
  623. if (adapter->fw->size < tab_size)
  624. return -EINVAL;
  625. offs = cpu_to_le32(tab_desc->findex) +
  626. (cpu_to_le32(tab_desc->entry_size) * (idx));
  627. descr = (struct uni_data_desc *)&unirom[offs];
  628. data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size);
  629. if (adapter->fw->size < data_size)
  630. return -EINVAL;
  631. return 0;
  632. }
  633. static int
  634. qlcnic_validate_fw(struct qlcnic_adapter *adapter)
  635. {
  636. struct uni_table_desc *tab_desc;
  637. struct uni_data_desc *descr;
  638. const u8 *unirom = adapter->fw->data;
  639. int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
  640. QLCNIC_UNI_FIRMWARE_IDX_OFF));
  641. __le32 offs;
  642. __le32 tab_size;
  643. __le32 data_size;
  644. tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_FW);
  645. if (!tab_desc)
  646. return -EINVAL;
  647. tab_size = cpu_to_le32(tab_desc->findex) +
  648. (cpu_to_le32(tab_desc->entry_size) * (idx + 1));
  649. if (adapter->fw->size < tab_size)
  650. return -EINVAL;
  651. offs = cpu_to_le32(tab_desc->findex) +
  652. (cpu_to_le32(tab_desc->entry_size) * (idx));
  653. descr = (struct uni_data_desc *)&unirom[offs];
  654. data_size = cpu_to_le32(descr->findex) + cpu_to_le32(descr->size);
  655. if (adapter->fw->size < data_size)
  656. return -EINVAL;
  657. return 0;
  658. }
  659. static int
  660. qlcnic_validate_product_offs(struct qlcnic_adapter *adapter)
  661. {
  662. struct uni_table_desc *ptab_descr;
  663. const u8 *unirom = adapter->fw->data;
  664. int mn_present = qlcnic_has_mn(adapter);
  665. __le32 entries;
  666. __le32 entry_size;
  667. __le32 tab_size;
  668. u32 i;
  669. ptab_descr = qlcnic_get_table_desc(unirom,
  670. QLCNIC_UNI_DIR_SECT_PRODUCT_TBL);
  671. if (!ptab_descr)
  672. return -EINVAL;
  673. entries = cpu_to_le32(ptab_descr->num_entries);
  674. entry_size = cpu_to_le32(ptab_descr->entry_size);
  675. tab_size = cpu_to_le32(ptab_descr->findex) + (entries * entry_size);
  676. if (adapter->fw->size < tab_size)
  677. return -EINVAL;
  678. nomn:
  679. for (i = 0; i < entries; i++) {
  680. __le32 flags, file_chiprev, offs;
  681. u8 chiprev = adapter->ahw.revision_id;
  682. u32 flagbit;
  683. offs = cpu_to_le32(ptab_descr->findex) +
  684. (i * cpu_to_le32(ptab_descr->entry_size));
  685. flags = cpu_to_le32(*((int *)&unirom[offs] +
  686. QLCNIC_UNI_FLAGS_OFF));
  687. file_chiprev = cpu_to_le32(*((int *)&unirom[offs] +
  688. QLCNIC_UNI_CHIP_REV_OFF));
  689. flagbit = mn_present ? 1 : 2;
  690. if ((chiprev == file_chiprev) &&
  691. ((1ULL << flagbit) & flags)) {
  692. adapter->file_prd_off = offs;
  693. return 0;
  694. }
  695. }
  696. if (mn_present) {
  697. mn_present = 0;
  698. goto nomn;
  699. }
  700. return -EINVAL;
  701. }
  702. static int
  703. qlcnic_validate_unified_romimage(struct qlcnic_adapter *adapter)
  704. {
  705. if (qlcnic_validate_header(adapter)) {
  706. dev_err(&adapter->pdev->dev,
  707. "unified image: header validation failed\n");
  708. return -EINVAL;
  709. }
  710. if (qlcnic_validate_product_offs(adapter)) {
  711. dev_err(&adapter->pdev->dev,
  712. "unified image: product validation failed\n");
  713. return -EINVAL;
  714. }
  715. if (qlcnic_validate_bootld(adapter)) {
  716. dev_err(&adapter->pdev->dev,
  717. "unified image: bootld validation failed\n");
  718. return -EINVAL;
  719. }
  720. if (qlcnic_validate_fw(adapter)) {
  721. dev_err(&adapter->pdev->dev,
  722. "unified image: firmware validation failed\n");
  723. return -EINVAL;
  724. }
  725. return 0;
  726. }
  727. static
  728. struct uni_data_desc *qlcnic_get_data_desc(struct qlcnic_adapter *adapter,
  729. u32 section, u32 idx_offset)
  730. {
  731. const u8 *unirom = adapter->fw->data;
  732. int idx = cpu_to_le32(*((int *)&unirom[adapter->file_prd_off] +
  733. idx_offset));
  734. struct uni_table_desc *tab_desc;
  735. __le32 offs;
  736. tab_desc = qlcnic_get_table_desc(unirom, section);
  737. if (tab_desc == NULL)
  738. return NULL;
  739. offs = cpu_to_le32(tab_desc->findex) +
  740. (cpu_to_le32(tab_desc->entry_size) * idx);
  741. return (struct uni_data_desc *)&unirom[offs];
  742. }
  743. static u8 *
  744. qlcnic_get_bootld_offs(struct qlcnic_adapter *adapter)
  745. {
  746. u32 offs = QLCNIC_BOOTLD_START;
  747. if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
  748. offs = cpu_to_le32((qlcnic_get_data_desc(adapter,
  749. QLCNIC_UNI_DIR_SECT_BOOTLD,
  750. QLCNIC_UNI_BOOTLD_IDX_OFF))->findex);
  751. return (u8 *)&adapter->fw->data[offs];
  752. }
  753. static u8 *
  754. qlcnic_get_fw_offs(struct qlcnic_adapter *adapter)
  755. {
  756. u32 offs = QLCNIC_IMAGE_START;
  757. if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
  758. offs = cpu_to_le32((qlcnic_get_data_desc(adapter,
  759. QLCNIC_UNI_DIR_SECT_FW,
  760. QLCNIC_UNI_FIRMWARE_IDX_OFF))->findex);
  761. return (u8 *)&adapter->fw->data[offs];
  762. }
  763. static __le32
  764. qlcnic_get_fw_size(struct qlcnic_adapter *adapter)
  765. {
  766. if (adapter->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
  767. return cpu_to_le32((qlcnic_get_data_desc(adapter,
  768. QLCNIC_UNI_DIR_SECT_FW,
  769. QLCNIC_UNI_FIRMWARE_IDX_OFF))->size);
  770. else
  771. return cpu_to_le32(
  772. *(u32 *)&adapter->fw->data[QLCNIC_FW_SIZE_OFFSET]);
  773. }
  774. static __le32
  775. qlcnic_get_fw_version(struct qlcnic_adapter *adapter)
  776. {
  777. struct uni_data_desc *fw_data_desc;
  778. const struct firmware *fw = adapter->fw;
  779. __le32 major, minor, sub;
  780. const u8 *ver_str;
  781. int i, ret;
  782. if (adapter->fw_type != QLCNIC_UNIFIED_ROMIMAGE)
  783. return cpu_to_le32(*(u32 *)&fw->data[QLCNIC_FW_VERSION_OFFSET]);
  784. fw_data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
  785. QLCNIC_UNI_FIRMWARE_IDX_OFF);
  786. ver_str = fw->data + cpu_to_le32(fw_data_desc->findex) +
  787. cpu_to_le32(fw_data_desc->size) - 17;
  788. for (i = 0; i < 12; i++) {
  789. if (!strncmp(&ver_str[i], "REV=", 4)) {
  790. ret = sscanf(&ver_str[i+4], "%u.%u.%u ",
  791. &major, &minor, &sub);
  792. if (ret != 3)
  793. return 0;
  794. else
  795. return major + (minor << 8) + (sub << 16);
  796. }
  797. }
  798. return 0;
  799. }
  800. static __le32
  801. qlcnic_get_bios_version(struct qlcnic_adapter *adapter)
  802. {
  803. const struct firmware *fw = adapter->fw;
  804. __le32 bios_ver, prd_off = adapter->file_prd_off;
  805. if (adapter->fw_type != QLCNIC_UNIFIED_ROMIMAGE)
  806. return cpu_to_le32(
  807. *(u32 *)&fw->data[QLCNIC_BIOS_VERSION_OFFSET]);
  808. bios_ver = cpu_to_le32(*((u32 *) (&fw->data[prd_off])
  809. + QLCNIC_UNI_BIOS_VERSION_OFF));
  810. return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + (bios_ver >> 24);
  811. }
  812. static void qlcnic_rom_lock_recovery(struct qlcnic_adapter *adapter)
  813. {
  814. if (qlcnic_pcie_sem_lock(adapter, 2, QLCNIC_ROM_LOCK_ID))
  815. dev_info(&adapter->pdev->dev, "Resetting rom_lock\n");
  816. qlcnic_pcie_sem_unlock(adapter, 2);
  817. }
  818. static int
  819. qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter)
  820. {
  821. u32 heartbeat, ret = -EIO;
  822. int retries = QLCNIC_HEARTBEAT_CHECK_RETRY_COUNT;
  823. adapter->heartbeat = QLCRD32(adapter, QLCNIC_PEG_ALIVE_COUNTER);
  824. do {
  825. msleep(QLCNIC_HEARTBEAT_PERIOD_MSECS);
  826. heartbeat = QLCRD32(adapter, QLCNIC_PEG_ALIVE_COUNTER);
  827. if (heartbeat != adapter->heartbeat) {
  828. ret = QLCNIC_RCODE_SUCCESS;
  829. break;
  830. }
  831. } while (--retries);
  832. return ret;
  833. }
  834. int
  835. qlcnic_need_fw_reset(struct qlcnic_adapter *adapter)
  836. {
  837. if (qlcnic_check_fw_hearbeat(adapter)) {
  838. qlcnic_rom_lock_recovery(adapter);
  839. return 1;
  840. }
  841. if (adapter->need_fw_reset)
  842. return 1;
  843. if (adapter->fw)
  844. return 1;
  845. return 0;
  846. }
  847. static const char *fw_name[] = {
  848. QLCNIC_UNIFIED_ROMIMAGE_NAME,
  849. QLCNIC_FLASH_ROMIMAGE_NAME,
  850. };
  851. int
  852. qlcnic_load_firmware(struct qlcnic_adapter *adapter)
  853. {
  854. u64 *ptr64;
  855. u32 i, flashaddr, size;
  856. const struct firmware *fw = adapter->fw;
  857. struct pci_dev *pdev = adapter->pdev;
  858. dev_info(&pdev->dev, "loading firmware from %s\n",
  859. fw_name[adapter->fw_type]);
  860. if (fw) {
  861. __le64 data;
  862. size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
  863. ptr64 = (u64 *)qlcnic_get_bootld_offs(adapter);
  864. flashaddr = QLCNIC_BOOTLD_START;
  865. for (i = 0; i < size; i++) {
  866. data = cpu_to_le64(ptr64[i]);
  867. if (qlcnic_pci_mem_write_2M(adapter, flashaddr, data))
  868. return -EIO;
  869. flashaddr += 8;
  870. }
  871. size = (__force u32)qlcnic_get_fw_size(adapter) / 8;
  872. ptr64 = (u64 *)qlcnic_get_fw_offs(adapter);
  873. flashaddr = QLCNIC_IMAGE_START;
  874. for (i = 0; i < size; i++) {
  875. data = cpu_to_le64(ptr64[i]);
  876. if (qlcnic_pci_mem_write_2M(adapter,
  877. flashaddr, data))
  878. return -EIO;
  879. flashaddr += 8;
  880. }
  881. size = (__force u32)qlcnic_get_fw_size(adapter) % 8;
  882. if (size) {
  883. data = cpu_to_le64(ptr64[i]);
  884. if (qlcnic_pci_mem_write_2M(adapter,
  885. flashaddr, data))
  886. return -EIO;
  887. }
  888. } else {
  889. u64 data;
  890. u32 hi, lo;
  891. size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
  892. flashaddr = QLCNIC_BOOTLD_START;
  893. for (i = 0; i < size; i++) {
  894. if (qlcnic_rom_fast_read(adapter,
  895. flashaddr, (int *)&lo) != 0)
  896. return -EIO;
  897. if (qlcnic_rom_fast_read(adapter,
  898. flashaddr + 4, (int *)&hi) != 0)
  899. return -EIO;
  900. data = (((u64)hi << 32) | lo);
  901. if (qlcnic_pci_mem_write_2M(adapter,
  902. flashaddr, data))
  903. return -EIO;
  904. flashaddr += 8;
  905. }
  906. }
  907. msleep(1);
  908. QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x18, 0x1020);
  909. QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0x80001e);
  910. return 0;
  911. }
  912. static int
  913. qlcnic_validate_firmware(struct qlcnic_adapter *adapter)
  914. {
  915. __le32 val;
  916. u32 ver, bios, min_size;
  917. struct pci_dev *pdev = adapter->pdev;
  918. const struct firmware *fw = adapter->fw;
  919. u8 fw_type = adapter->fw_type;
  920. if (fw_type == QLCNIC_UNIFIED_ROMIMAGE) {
  921. if (qlcnic_validate_unified_romimage(adapter))
  922. return -EINVAL;
  923. min_size = QLCNIC_UNI_FW_MIN_SIZE;
  924. } else {
  925. val = cpu_to_le32(*(u32 *)&fw->data[QLCNIC_FW_MAGIC_OFFSET]);
  926. if ((__force u32)val != QLCNIC_BDINFO_MAGIC)
  927. return -EINVAL;
  928. min_size = QLCNIC_FW_MIN_SIZE;
  929. }
  930. if (fw->size < min_size)
  931. return -EINVAL;
  932. val = qlcnic_get_fw_version(adapter);
  933. ver = QLCNIC_DECODE_VERSION(val);
  934. if (ver < QLCNIC_MIN_FW_VERSION) {
  935. dev_err(&pdev->dev,
  936. "%s: firmware version %d.%d.%d unsupported\n",
  937. fw_name[fw_type], _major(ver), _minor(ver), _build(ver));
  938. return -EINVAL;
  939. }
  940. val = qlcnic_get_bios_version(adapter);
  941. qlcnic_rom_fast_read(adapter, QLCNIC_BIOS_VERSION_OFFSET, (int *)&bios);
  942. if ((__force u32)val != bios) {
  943. dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
  944. fw_name[fw_type]);
  945. return -EINVAL;
  946. }
  947. QLCWR32(adapter, QLCNIC_CAM_RAM(0x1fc), QLCNIC_BDINFO_MAGIC);
  948. return 0;
  949. }
  950. static void
  951. qlcnic_get_next_fwtype(struct qlcnic_adapter *adapter)
  952. {
  953. u8 fw_type;
  954. switch (adapter->fw_type) {
  955. case QLCNIC_UNKNOWN_ROMIMAGE:
  956. fw_type = QLCNIC_UNIFIED_ROMIMAGE;
  957. break;
  958. case QLCNIC_UNIFIED_ROMIMAGE:
  959. default:
  960. fw_type = QLCNIC_FLASH_ROMIMAGE;
  961. break;
  962. }
  963. adapter->fw_type = fw_type;
  964. }
  965. void qlcnic_request_firmware(struct qlcnic_adapter *adapter)
  966. {
  967. struct pci_dev *pdev = adapter->pdev;
  968. int rc;
  969. adapter->fw_type = QLCNIC_UNKNOWN_ROMIMAGE;
  970. next:
  971. qlcnic_get_next_fwtype(adapter);
  972. if (adapter->fw_type == QLCNIC_FLASH_ROMIMAGE) {
  973. adapter->fw = NULL;
  974. } else {
  975. rc = request_firmware(&adapter->fw,
  976. fw_name[adapter->fw_type], &pdev->dev);
  977. if (rc != 0)
  978. goto next;
  979. rc = qlcnic_validate_firmware(adapter);
  980. if (rc != 0) {
  981. release_firmware(adapter->fw);
  982. msleep(1);
  983. goto next;
  984. }
  985. }
  986. }
  987. void
  988. qlcnic_release_firmware(struct qlcnic_adapter *adapter)
  989. {
  990. if (adapter->fw)
  991. release_firmware(adapter->fw);
  992. adapter->fw = NULL;
  993. }
  994. static void
  995. qlcnic_handle_linkevent(struct qlcnic_adapter *adapter,
  996. struct qlcnic_fw_msg *msg)
  997. {
  998. u32 cable_OUI;
  999. u16 cable_len;
  1000. u16 link_speed;
  1001. u8 link_status, module, duplex, autoneg;
  1002. struct net_device *netdev = adapter->netdev;
  1003. adapter->has_link_events = 1;
  1004. cable_OUI = msg->body[1] & 0xffffffff;
  1005. cable_len = (msg->body[1] >> 32) & 0xffff;
  1006. link_speed = (msg->body[1] >> 48) & 0xffff;
  1007. link_status = msg->body[2] & 0xff;
  1008. duplex = (msg->body[2] >> 16) & 0xff;
  1009. autoneg = (msg->body[2] >> 24) & 0xff;
  1010. module = (msg->body[2] >> 8) & 0xff;
  1011. if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE)
  1012. dev_info(&netdev->dev, "unsupported cable: OUI 0x%x, "
  1013. "length %d\n", cable_OUI, cable_len);
  1014. else if (module == LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN)
  1015. dev_info(&netdev->dev, "unsupported cable length %d\n",
  1016. cable_len);
  1017. qlcnic_advert_link_change(adapter, link_status);
  1018. if (duplex == LINKEVENT_FULL_DUPLEX)
  1019. adapter->link_duplex = DUPLEX_FULL;
  1020. else
  1021. adapter->link_duplex = DUPLEX_HALF;
  1022. adapter->module_type = module;
  1023. adapter->link_autoneg = autoneg;
  1024. adapter->link_speed = link_speed;
  1025. }
  1026. static void
  1027. qlcnic_handle_fw_message(int desc_cnt, int index,
  1028. struct qlcnic_host_sds_ring *sds_ring)
  1029. {
  1030. struct qlcnic_fw_msg msg;
  1031. struct status_desc *desc;
  1032. int i = 0, opcode;
  1033. while (desc_cnt > 0 && i < 8) {
  1034. desc = &sds_ring->desc_head[index];
  1035. msg.words[i++] = le64_to_cpu(desc->status_desc_data[0]);
  1036. msg.words[i++] = le64_to_cpu(desc->status_desc_data[1]);
  1037. index = get_next_index(index, sds_ring->num_desc);
  1038. desc_cnt--;
  1039. }
  1040. opcode = qlcnic_get_nic_msg_opcode(msg.body[0]);
  1041. switch (opcode) {
  1042. case QLCNIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE:
  1043. qlcnic_handle_linkevent(sds_ring->adapter, &msg);
  1044. break;
  1045. default:
  1046. break;
  1047. }
  1048. }
  1049. static int
  1050. qlcnic_alloc_rx_skb(struct qlcnic_adapter *adapter,
  1051. struct qlcnic_host_rds_ring *rds_ring,
  1052. struct qlcnic_rx_buffer *buffer)
  1053. {
  1054. struct sk_buff *skb;
  1055. dma_addr_t dma;
  1056. struct pci_dev *pdev = adapter->pdev;
  1057. skb = dev_alloc_skb(rds_ring->skb_size);
  1058. if (!skb) {
  1059. adapter->stats.skb_alloc_failure++;
  1060. return -ENOMEM;
  1061. }
  1062. skb_reserve(skb, NET_IP_ALIGN);
  1063. dma = pci_map_single(pdev, skb->data,
  1064. rds_ring->dma_size, PCI_DMA_FROMDEVICE);
  1065. if (pci_dma_mapping_error(pdev, dma)) {
  1066. adapter->stats.rx_dma_map_error++;
  1067. dev_kfree_skb_any(skb);
  1068. return -ENOMEM;
  1069. }
  1070. buffer->skb = skb;
  1071. buffer->dma = dma;
  1072. return 0;
  1073. }
  1074. static struct sk_buff *qlcnic_process_rxbuf(struct qlcnic_adapter *adapter,
  1075. struct qlcnic_host_rds_ring *rds_ring, u16 index, u16 cksum)
  1076. {
  1077. struct qlcnic_rx_buffer *buffer;
  1078. struct sk_buff *skb;
  1079. buffer = &rds_ring->rx_buf_arr[index];
  1080. if (unlikely(buffer->skb == NULL)) {
  1081. WARN_ON(1);
  1082. return NULL;
  1083. }
  1084. pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size,
  1085. PCI_DMA_FROMDEVICE);
  1086. skb = buffer->skb;
  1087. if (likely(adapter->rx_csum && (cksum == STATUS_CKSUM_OK ||
  1088. cksum == STATUS_CKSUM_LOOP))) {
  1089. adapter->stats.csummed++;
  1090. skb->ip_summed = CHECKSUM_UNNECESSARY;
  1091. } else {
  1092. skb_checksum_none_assert(skb);
  1093. }
  1094. skb->dev = adapter->netdev;
  1095. buffer->skb = NULL;
  1096. return skb;
  1097. }
  1098. static int
  1099. qlcnic_check_rx_tagging(struct qlcnic_adapter *adapter, struct sk_buff *skb,
  1100. u16 *vlan_tag)
  1101. {
  1102. struct ethhdr *eth_hdr;
  1103. if (!__vlan_get_tag(skb, vlan_tag)) {
  1104. eth_hdr = (struct ethhdr *) skb->data;
  1105. memmove(skb->data + VLAN_HLEN, eth_hdr, ETH_ALEN * 2);
  1106. skb_pull(skb, VLAN_HLEN);
  1107. }
  1108. if (!adapter->pvid)
  1109. return 0;
  1110. if (*vlan_tag == adapter->pvid) {
  1111. /* Outer vlan tag. Packet should follow non-vlan path */
  1112. *vlan_tag = 0xffff;
  1113. return 0;
  1114. }
  1115. if (adapter->flags & QLCNIC_TAGGING_ENABLED)
  1116. return 0;
  1117. return -EINVAL;
  1118. }
  1119. static struct qlcnic_rx_buffer *
  1120. qlcnic_process_rcv(struct qlcnic_adapter *adapter,
  1121. struct qlcnic_host_sds_ring *sds_ring,
  1122. int ring, u64 sts_data0)
  1123. {
  1124. struct net_device *netdev = adapter->netdev;
  1125. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  1126. struct qlcnic_rx_buffer *buffer;
  1127. struct sk_buff *skb;
  1128. struct qlcnic_host_rds_ring *rds_ring;
  1129. int index, length, cksum, pkt_offset;
  1130. u16 vid = 0xffff;
  1131. if (unlikely(ring >= adapter->max_rds_rings))
  1132. return NULL;
  1133. rds_ring = &recv_ctx->rds_rings[ring];
  1134. index = qlcnic_get_sts_refhandle(sts_data0);
  1135. if (unlikely(index >= rds_ring->num_desc))
  1136. return NULL;
  1137. buffer = &rds_ring->rx_buf_arr[index];
  1138. length = qlcnic_get_sts_totallength(sts_data0);
  1139. cksum = qlcnic_get_sts_status(sts_data0);
  1140. pkt_offset = qlcnic_get_sts_pkt_offset(sts_data0);
  1141. skb = qlcnic_process_rxbuf(adapter, rds_ring, index, cksum);
  1142. if (!skb)
  1143. return buffer;
  1144. if (length > rds_ring->skb_size)
  1145. skb_put(skb, rds_ring->skb_size);
  1146. else
  1147. skb_put(skb, length);
  1148. if (pkt_offset)
  1149. skb_pull(skb, pkt_offset);
  1150. if (unlikely(qlcnic_check_rx_tagging(adapter, skb, &vid))) {
  1151. adapter->stats.rxdropped++;
  1152. dev_kfree_skb(skb);
  1153. return buffer;
  1154. }
  1155. skb->protocol = eth_type_trans(skb, netdev);
  1156. if ((vid != 0xffff) && adapter->vlgrp)
  1157. vlan_gro_receive(&sds_ring->napi, adapter->vlgrp, vid, skb);
  1158. else
  1159. napi_gro_receive(&sds_ring->napi, skb);
  1160. adapter->stats.rx_pkts++;
  1161. adapter->stats.rxbytes += length;
  1162. return buffer;
  1163. }
  1164. #define QLC_TCP_HDR_SIZE 20
  1165. #define QLC_TCP_TS_OPTION_SIZE 12
  1166. #define QLC_TCP_TS_HDR_SIZE (QLC_TCP_HDR_SIZE + QLC_TCP_TS_OPTION_SIZE)
  1167. static struct qlcnic_rx_buffer *
  1168. qlcnic_process_lro(struct qlcnic_adapter *adapter,
  1169. struct qlcnic_host_sds_ring *sds_ring,
  1170. int ring, u64 sts_data0, u64 sts_data1)
  1171. {
  1172. struct net_device *netdev = adapter->netdev;
  1173. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  1174. struct qlcnic_rx_buffer *buffer;
  1175. struct sk_buff *skb;
  1176. struct qlcnic_host_rds_ring *rds_ring;
  1177. struct iphdr *iph;
  1178. struct tcphdr *th;
  1179. bool push, timestamp;
  1180. int l2_hdr_offset, l4_hdr_offset;
  1181. int index;
  1182. u16 lro_length, length, data_offset;
  1183. u32 seq_number;
  1184. u16 vid = 0xffff;
  1185. if (unlikely(ring > adapter->max_rds_rings))
  1186. return NULL;
  1187. rds_ring = &recv_ctx->rds_rings[ring];
  1188. index = qlcnic_get_lro_sts_refhandle(sts_data0);
  1189. if (unlikely(index > rds_ring->num_desc))
  1190. return NULL;
  1191. buffer = &rds_ring->rx_buf_arr[index];
  1192. timestamp = qlcnic_get_lro_sts_timestamp(sts_data0);
  1193. lro_length = qlcnic_get_lro_sts_length(sts_data0);
  1194. l2_hdr_offset = qlcnic_get_lro_sts_l2_hdr_offset(sts_data0);
  1195. l4_hdr_offset = qlcnic_get_lro_sts_l4_hdr_offset(sts_data0);
  1196. push = qlcnic_get_lro_sts_push_flag(sts_data0);
  1197. seq_number = qlcnic_get_lro_sts_seq_number(sts_data1);
  1198. skb = qlcnic_process_rxbuf(adapter, rds_ring, index, STATUS_CKSUM_OK);
  1199. if (!skb)
  1200. return buffer;
  1201. if (timestamp)
  1202. data_offset = l4_hdr_offset + QLC_TCP_TS_HDR_SIZE;
  1203. else
  1204. data_offset = l4_hdr_offset + QLC_TCP_HDR_SIZE;
  1205. skb_put(skb, lro_length + data_offset);
  1206. skb_pull(skb, l2_hdr_offset);
  1207. if (unlikely(qlcnic_check_rx_tagging(adapter, skb, &vid))) {
  1208. adapter->stats.rxdropped++;
  1209. dev_kfree_skb(skb);
  1210. return buffer;
  1211. }
  1212. skb->protocol = eth_type_trans(skb, netdev);
  1213. iph = (struct iphdr *)skb->data;
  1214. th = (struct tcphdr *)(skb->data + (iph->ihl << 2));
  1215. length = (iph->ihl << 2) + (th->doff << 2) + lro_length;
  1216. iph->tot_len = htons(length);
  1217. iph->check = 0;
  1218. iph->check = ip_fast_csum((unsigned char *)iph, iph->ihl);
  1219. th->psh = push;
  1220. th->seq = htonl(seq_number);
  1221. length = skb->len;
  1222. if ((vid != 0xffff) && adapter->vlgrp)
  1223. vlan_hwaccel_receive_skb(skb, adapter->vlgrp, vid);
  1224. else
  1225. netif_receive_skb(skb);
  1226. adapter->stats.lro_pkts++;
  1227. adapter->stats.lrobytes += length;
  1228. return buffer;
  1229. }
  1230. int
  1231. qlcnic_process_rcv_ring(struct qlcnic_host_sds_ring *sds_ring, int max)
  1232. {
  1233. struct qlcnic_adapter *adapter = sds_ring->adapter;
  1234. struct list_head *cur;
  1235. struct status_desc *desc;
  1236. struct qlcnic_rx_buffer *rxbuf;
  1237. u64 sts_data0, sts_data1;
  1238. int count = 0;
  1239. int opcode, ring, desc_cnt;
  1240. u32 consumer = sds_ring->consumer;
  1241. while (count < max) {
  1242. desc = &sds_ring->desc_head[consumer];
  1243. sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
  1244. if (!(sts_data0 & STATUS_OWNER_HOST))
  1245. break;
  1246. desc_cnt = qlcnic_get_sts_desc_cnt(sts_data0);
  1247. opcode = qlcnic_get_sts_opcode(sts_data0);
  1248. switch (opcode) {
  1249. case QLCNIC_RXPKT_DESC:
  1250. case QLCNIC_OLD_RXPKT_DESC:
  1251. case QLCNIC_SYN_OFFLOAD:
  1252. ring = qlcnic_get_sts_type(sts_data0);
  1253. rxbuf = qlcnic_process_rcv(adapter, sds_ring,
  1254. ring, sts_data0);
  1255. break;
  1256. case QLCNIC_LRO_DESC:
  1257. ring = qlcnic_get_lro_sts_type(sts_data0);
  1258. sts_data1 = le64_to_cpu(desc->status_desc_data[1]);
  1259. rxbuf = qlcnic_process_lro(adapter, sds_ring,
  1260. ring, sts_data0, sts_data1);
  1261. break;
  1262. case QLCNIC_RESPONSE_DESC:
  1263. qlcnic_handle_fw_message(desc_cnt, consumer, sds_ring);
  1264. default:
  1265. goto skip;
  1266. }
  1267. WARN_ON(desc_cnt > 1);
  1268. if (likely(rxbuf))
  1269. list_add_tail(&rxbuf->list, &sds_ring->free_list[ring]);
  1270. else
  1271. adapter->stats.null_rxbuf++;
  1272. skip:
  1273. for (; desc_cnt > 0; desc_cnt--) {
  1274. desc = &sds_ring->desc_head[consumer];
  1275. desc->status_desc_data[0] =
  1276. cpu_to_le64(STATUS_OWNER_PHANTOM);
  1277. consumer = get_next_index(consumer, sds_ring->num_desc);
  1278. }
  1279. count++;
  1280. }
  1281. for (ring = 0; ring < adapter->max_rds_rings; ring++) {
  1282. struct qlcnic_host_rds_ring *rds_ring =
  1283. &adapter->recv_ctx.rds_rings[ring];
  1284. if (!list_empty(&sds_ring->free_list[ring])) {
  1285. list_for_each(cur, &sds_ring->free_list[ring]) {
  1286. rxbuf = list_entry(cur,
  1287. struct qlcnic_rx_buffer, list);
  1288. qlcnic_alloc_rx_skb(adapter, rds_ring, rxbuf);
  1289. }
  1290. spin_lock(&rds_ring->lock);
  1291. list_splice_tail_init(&sds_ring->free_list[ring],
  1292. &rds_ring->free_list);
  1293. spin_unlock(&rds_ring->lock);
  1294. }
  1295. qlcnic_post_rx_buffers_nodb(adapter, rds_ring);
  1296. }
  1297. if (count) {
  1298. sds_ring->consumer = consumer;
  1299. writel(consumer, sds_ring->crb_sts_consumer);
  1300. }
  1301. return count;
  1302. }
  1303. void
  1304. qlcnic_post_rx_buffers(struct qlcnic_adapter *adapter, u32 ringid,
  1305. struct qlcnic_host_rds_ring *rds_ring)
  1306. {
  1307. struct rcv_desc *pdesc;
  1308. struct qlcnic_rx_buffer *buffer;
  1309. int producer, count = 0;
  1310. struct list_head *head;
  1311. producer = rds_ring->producer;
  1312. head = &rds_ring->free_list;
  1313. while (!list_empty(head)) {
  1314. buffer = list_entry(head->next, struct qlcnic_rx_buffer, list);
  1315. if (!buffer->skb) {
  1316. if (qlcnic_alloc_rx_skb(adapter, rds_ring, buffer))
  1317. break;
  1318. }
  1319. count++;
  1320. list_del(&buffer->list);
  1321. /* make a rcv descriptor */
  1322. pdesc = &rds_ring->desc_head[producer];
  1323. pdesc->addr_buffer = cpu_to_le64(buffer->dma);
  1324. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1325. pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
  1326. producer = get_next_index(producer, rds_ring->num_desc);
  1327. }
  1328. if (count) {
  1329. rds_ring->producer = producer;
  1330. writel((producer-1) & (rds_ring->num_desc-1),
  1331. rds_ring->crb_rcv_producer);
  1332. }
  1333. }
  1334. static void
  1335. qlcnic_post_rx_buffers_nodb(struct qlcnic_adapter *adapter,
  1336. struct qlcnic_host_rds_ring *rds_ring)
  1337. {
  1338. struct rcv_desc *pdesc;
  1339. struct qlcnic_rx_buffer *buffer;
  1340. int producer, count = 0;
  1341. struct list_head *head;
  1342. if (!spin_trylock(&rds_ring->lock))
  1343. return;
  1344. producer = rds_ring->producer;
  1345. head = &rds_ring->free_list;
  1346. while (!list_empty(head)) {
  1347. buffer = list_entry(head->next, struct qlcnic_rx_buffer, list);
  1348. if (!buffer->skb) {
  1349. if (qlcnic_alloc_rx_skb(adapter, rds_ring, buffer))
  1350. break;
  1351. }
  1352. count++;
  1353. list_del(&buffer->list);
  1354. /* make a rcv descriptor */
  1355. pdesc = &rds_ring->desc_head[producer];
  1356. pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
  1357. pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
  1358. pdesc->addr_buffer = cpu_to_le64(buffer->dma);
  1359. producer = get_next_index(producer, rds_ring->num_desc);
  1360. }
  1361. if (count) {
  1362. rds_ring->producer = producer;
  1363. writel((producer - 1) & (rds_ring->num_desc - 1),
  1364. rds_ring->crb_rcv_producer);
  1365. }
  1366. spin_unlock(&rds_ring->lock);
  1367. }
  1368. static void dump_skb(struct sk_buff *skb)
  1369. {
  1370. int i;
  1371. unsigned char *data = skb->data;
  1372. for (i = 0; i < skb->len; i++) {
  1373. printk("%02x ", data[i]);
  1374. if ((i & 0x0f) == 8)
  1375. printk("\n");
  1376. }
  1377. }
  1378. static struct qlcnic_rx_buffer *
  1379. qlcnic_process_rcv_diag(struct qlcnic_adapter *adapter,
  1380. struct qlcnic_host_sds_ring *sds_ring,
  1381. int ring, u64 sts_data0)
  1382. {
  1383. struct qlcnic_recv_context *recv_ctx = &adapter->recv_ctx;
  1384. struct qlcnic_rx_buffer *buffer;
  1385. struct sk_buff *skb;
  1386. struct qlcnic_host_rds_ring *rds_ring;
  1387. int index, length, cksum, pkt_offset;
  1388. if (unlikely(ring >= adapter->max_rds_rings))
  1389. return NULL;
  1390. rds_ring = &recv_ctx->rds_rings[ring];
  1391. index = qlcnic_get_sts_refhandle(sts_data0);
  1392. if (unlikely(index >= rds_ring->num_desc))
  1393. return NULL;
  1394. buffer = &rds_ring->rx_buf_arr[index];
  1395. length = qlcnic_get_sts_totallength(sts_data0);
  1396. cksum = qlcnic_get_sts_status(sts_data0);
  1397. pkt_offset = qlcnic_get_sts_pkt_offset(sts_data0);
  1398. skb = qlcnic_process_rxbuf(adapter, rds_ring, index, cksum);
  1399. if (!skb)
  1400. return buffer;
  1401. if (length > rds_ring->skb_size)
  1402. skb_put(skb, rds_ring->skb_size);
  1403. else
  1404. skb_put(skb, length);
  1405. if (pkt_offset)
  1406. skb_pull(skb, pkt_offset);
  1407. if (!qlcnic_check_loopback_buff(skb->data))
  1408. adapter->diag_cnt++;
  1409. else
  1410. dump_skb(skb);
  1411. dev_kfree_skb_any(skb);
  1412. adapter->stats.rx_pkts++;
  1413. adapter->stats.rxbytes += length;
  1414. return buffer;
  1415. }
  1416. void
  1417. qlcnic_process_rcv_ring_diag(struct qlcnic_host_sds_ring *sds_ring)
  1418. {
  1419. struct qlcnic_adapter *adapter = sds_ring->adapter;
  1420. struct status_desc *desc;
  1421. struct qlcnic_rx_buffer *rxbuf;
  1422. u64 sts_data0;
  1423. int opcode, ring, desc_cnt;
  1424. u32 consumer = sds_ring->consumer;
  1425. desc = &sds_ring->desc_head[consumer];
  1426. sts_data0 = le64_to_cpu(desc->status_desc_data[0]);
  1427. if (!(sts_data0 & STATUS_OWNER_HOST))
  1428. return;
  1429. desc_cnt = qlcnic_get_sts_desc_cnt(sts_data0);
  1430. opcode = qlcnic_get_sts_opcode(sts_data0);
  1431. ring = qlcnic_get_sts_type(sts_data0);
  1432. rxbuf = qlcnic_process_rcv_diag(adapter, sds_ring,
  1433. ring, sts_data0);
  1434. desc->status_desc_data[0] = cpu_to_le64(STATUS_OWNER_PHANTOM);
  1435. consumer = get_next_index(consumer, sds_ring->num_desc);
  1436. sds_ring->consumer = consumer;
  1437. writel(consumer, sds_ring->crb_sts_consumer);
  1438. }
  1439. void
  1440. qlcnic_fetch_mac(struct qlcnic_adapter *adapter, u32 off1, u32 off2,
  1441. u8 alt_mac, u8 *mac)
  1442. {
  1443. u32 mac_low, mac_high;
  1444. int i;
  1445. mac_low = QLCRD32(adapter, off1);
  1446. mac_high = QLCRD32(adapter, off2);
  1447. if (alt_mac) {
  1448. mac_low |= (mac_low >> 16) | (mac_high << 16);
  1449. mac_high >>= 16;
  1450. }
  1451. for (i = 0; i < 2; i++)
  1452. mac[i] = (u8)(mac_high >> ((1 - i) * 8));
  1453. for (i = 2; i < 6; i++)
  1454. mac[i] = (u8)(mac_low >> ((5 - i) * 8));
  1455. }