em28xx-core.c 16 KB

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  1. /*
  2. em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
  3. Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
  4. Markus Rechberger <mrechberger@gmail.com>
  5. Mauro Carvalho Chehab <mchehab@infradead.org>
  6. Sascha Sommer <saschasommer@freenet.de>
  7. This program is free software; you can redistribute it and/or modify
  8. it under the terms of the GNU General Public License as published by
  9. the Free Software Foundation; either version 2 of the License, or
  10. (at your option) any later version.
  11. This program is distributed in the hope that it will be useful,
  12. but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. GNU General Public License for more details.
  15. You should have received a copy of the GNU General Public License
  16. along with this program; if not, write to the Free Software
  17. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. */
  19. #include <linux/init.h>
  20. #include <linux/list.h>
  21. #include <linux/module.h>
  22. #include <linux/usb.h>
  23. #include <linux/vmalloc.h>
  24. #include "em28xx.h"
  25. /* #define ENABLE_DEBUG_ISOC_FRAMES */
  26. static unsigned int core_debug;
  27. module_param(core_debug,int,0644);
  28. MODULE_PARM_DESC(core_debug,"enable debug messages [core]");
  29. #define em28xx_coredbg(fmt, arg...) do {\
  30. if (core_debug) \
  31. printk(KERN_INFO "%s %s :"fmt, \
  32. dev->name, __func__ , ##arg); } while (0)
  33. static unsigned int reg_debug;
  34. module_param(reg_debug,int,0644);
  35. MODULE_PARM_DESC(reg_debug,"enable debug messages [URB reg]");
  36. #define em28xx_regdbg(fmt, arg...) do {\
  37. if (reg_debug) \
  38. printk(KERN_INFO "%s %s :"fmt, \
  39. dev->name, __func__ , ##arg); } while (0)
  40. static int alt = EM28XX_PINOUT;
  41. module_param(alt, int, 0644);
  42. MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
  43. /* FIXME */
  44. #define em28xx_isocdbg(fmt, arg...) do {\
  45. if (core_debug) \
  46. printk(KERN_INFO "%s %s :"fmt, \
  47. dev->name, __func__ , ##arg); } while (0)
  48. /*
  49. * em28xx_read_reg_req()
  50. * reads data from the usb device specifying bRequest
  51. */
  52. int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
  53. char *buf, int len)
  54. {
  55. int ret, byte;
  56. if (dev->state & DEV_DISCONNECTED)
  57. return(-ENODEV);
  58. em28xx_regdbg("req=%02x, reg=%02x ", req, reg);
  59. ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), req,
  60. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  61. 0x0000, reg, buf, len, HZ);
  62. if (reg_debug) {
  63. printk(ret < 0 ? " failed!\n" : "%02x values: ", ret);
  64. for (byte = 0; byte < len; byte++)
  65. printk(KERN_INFO " %02x", (unsigned char)buf[byte]);
  66. printk(KERN_INFO "\n");
  67. }
  68. return ret;
  69. }
  70. /*
  71. * em28xx_read_reg_req()
  72. * reads data from the usb device specifying bRequest
  73. */
  74. int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
  75. {
  76. u8 val;
  77. int ret;
  78. if (dev->state & DEV_DISCONNECTED)
  79. return(-ENODEV);
  80. em28xx_regdbg("req=%02x, reg=%02x:", req, reg);
  81. ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), req,
  82. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  83. 0x0000, reg, &val, 1, HZ);
  84. if (reg_debug)
  85. printk(ret < 0 ? " failed!\n" :
  86. "%02x\n", (unsigned char) val);
  87. if (ret < 0)
  88. return ret;
  89. return val;
  90. }
  91. int em28xx_read_reg(struct em28xx *dev, u16 reg)
  92. {
  93. return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
  94. }
  95. /*
  96. * em28xx_write_regs_req()
  97. * sends data to the usb device, specifying bRequest
  98. */
  99. int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
  100. int len)
  101. {
  102. int ret;
  103. /*usb_control_msg seems to expect a kmalloced buffer */
  104. unsigned char *bufs;
  105. if (dev->state & DEV_DISCONNECTED)
  106. return(-ENODEV);
  107. bufs = kmalloc(len, GFP_KERNEL);
  108. em28xx_regdbg("req=%02x reg=%02x:", req, reg);
  109. if (reg_debug) {
  110. int i;
  111. for (i = 0; i < len; ++i)
  112. printk(KERN_INFO " %02x", (unsigned char)buf[i]);
  113. printk(KERN_INFO "\n");
  114. }
  115. if (!bufs)
  116. return -ENOMEM;
  117. memcpy(bufs, buf, len);
  118. ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), req,
  119. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  120. 0x0000, reg, bufs, len, HZ);
  121. if (dev->wait_after_write)
  122. msleep(dev->wait_after_write);
  123. kfree(bufs);
  124. return ret;
  125. }
  126. int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)
  127. {
  128. return em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);
  129. }
  130. /*
  131. * em28xx_write_reg_bits()
  132. * sets only some bits (specified by bitmask) of a register, by first reading
  133. * the actual value
  134. */
  135. static int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
  136. u8 bitmask)
  137. {
  138. int oldval;
  139. u8 newval;
  140. oldval = em28xx_read_reg(dev, reg);
  141. if (oldval < 0)
  142. return oldval;
  143. newval = (((u8) oldval) & ~bitmask) | (val & bitmask);
  144. return em28xx_write_regs(dev, reg, &newval, 1);
  145. }
  146. /*
  147. * em28xx_write_ac97()
  148. * write a 16 bit value to the specified AC97 address (LSB first!)
  149. */
  150. static int em28xx_write_ac97(struct em28xx *dev, u8 reg, u8 *val)
  151. {
  152. int ret, i;
  153. u8 addr = reg & 0x7f;
  154. ret = em28xx_write_regs(dev, AC97LSB_REG, val, 2);
  155. if (ret < 0)
  156. return ret;
  157. ret = em28xx_write_regs(dev, AC97ADDR_REG, &addr, 1);
  158. if (ret < 0)
  159. return ret;
  160. /* Wait up to 50 ms for AC97 command to complete */
  161. for (i = 0; i < 10; i++) {
  162. ret = em28xx_read_reg(dev, AC97BUSY_REG);
  163. if (ret < 0)
  164. return ret;
  165. if (!(ret & 0x01))
  166. return 0;
  167. msleep(5);
  168. }
  169. em28xx_warn("AC97 command still being executed: not handled properly!\n");
  170. return 0;
  171. }
  172. static int em28xx_set_audio_source(struct em28xx *dev)
  173. {
  174. static char *enable = "\x08\x08";
  175. static char *disable = "\x08\x88";
  176. char *video = enable, *line = disable;
  177. int ret;
  178. u8 input;
  179. if (dev->is_em2800) {
  180. if (dev->ctl_ainput)
  181. input = EM2800_AUDIO_SRC_LINE;
  182. else
  183. input = EM2800_AUDIO_SRC_TUNER;
  184. ret = em28xx_write_regs(dev, EM2800_AUDIOSRC_REG, &input, 1);
  185. if (ret < 0)
  186. return ret;
  187. }
  188. if (dev->has_msp34xx)
  189. input = EM28XX_AUDIO_SRC_TUNER;
  190. else {
  191. switch (dev->ctl_ainput) {
  192. case EM28XX_AMUX_VIDEO:
  193. input = EM28XX_AUDIO_SRC_TUNER;
  194. break;
  195. case EM28XX_AMUX_LINE_IN:
  196. input = EM28XX_AUDIO_SRC_LINE;
  197. break;
  198. case EM28XX_AMUX_AC97_VIDEO:
  199. input = EM28XX_AUDIO_SRC_LINE;
  200. break;
  201. case EM28XX_AMUX_AC97_LINE_IN:
  202. input = EM28XX_AUDIO_SRC_LINE;
  203. video = disable;
  204. line = enable;
  205. break;
  206. }
  207. }
  208. ret = em28xx_write_reg_bits(dev, AUDIOSRC_REG, input, 0xc0);
  209. if (ret < 0)
  210. return ret;
  211. msleep(5);
  212. /* Sets AC97 mixer registers
  213. This is seems to be needed, even for non-ac97 configs
  214. */
  215. ret = em28xx_write_ac97(dev, VIDEO_AC97, video);
  216. if (ret < 0)
  217. return ret;
  218. ret = em28xx_write_ac97(dev, LINE_IN_AC97, line);
  219. return ret;
  220. }
  221. int em28xx_audio_analog_set(struct em28xx *dev)
  222. {
  223. int ret;
  224. char s[2] = { 0x00, 0x00 };
  225. u8 xclk = 0x07;
  226. s[0] |= 0x1f - dev->volume;
  227. s[1] |= 0x1f - dev->volume;
  228. /* Mute */
  229. s[1] |= 0x80;
  230. ret = em28xx_write_ac97(dev, MASTER_AC97, s);
  231. if (ret < 0)
  232. return ret;
  233. if (dev->has_12mhz_i2s)
  234. xclk |= 0x20;
  235. if (!dev->mute)
  236. xclk |= 0x80;
  237. ret = em28xx_write_reg_bits(dev, XCLK_REG, xclk, 0xa7);
  238. if (ret < 0)
  239. return ret;
  240. msleep(10);
  241. /* Selects the proper audio input */
  242. ret = em28xx_set_audio_source(dev);
  243. /* Unmute device */
  244. if (!dev->mute)
  245. s[1] &= ~0x80;
  246. ret = em28xx_write_ac97(dev, MASTER_AC97, s);
  247. return ret;
  248. }
  249. EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);
  250. int em28xx_colorlevels_set_default(struct em28xx *dev)
  251. {
  252. em28xx_write_regs(dev, YGAIN_REG, "\x10", 1); /* contrast */
  253. em28xx_write_regs(dev, YOFFSET_REG, "\x00", 1); /* brightness */
  254. em28xx_write_regs(dev, UVGAIN_REG, "\x10", 1); /* saturation */
  255. em28xx_write_regs(dev, UOFFSET_REG, "\x00", 1);
  256. em28xx_write_regs(dev, VOFFSET_REG, "\x00", 1);
  257. em28xx_write_regs(dev, SHARPNESS_REG, "\x00", 1);
  258. em28xx_write_regs(dev, GAMMA_REG, "\x20", 1);
  259. em28xx_write_regs(dev, RGAIN_REG, "\x20", 1);
  260. em28xx_write_regs(dev, GGAIN_REG, "\x20", 1);
  261. em28xx_write_regs(dev, BGAIN_REG, "\x20", 1);
  262. em28xx_write_regs(dev, ROFFSET_REG, "\x00", 1);
  263. em28xx_write_regs(dev, GOFFSET_REG, "\x00", 1);
  264. return em28xx_write_regs(dev, BOFFSET_REG, "\x00", 1);
  265. }
  266. int em28xx_capture_start(struct em28xx *dev, int start)
  267. {
  268. int rc;
  269. /* FIXME: which is the best order? */
  270. /* video registers are sampled by VREF */
  271. rc = em28xx_write_reg_bits(dev, USBSUSP_REG,
  272. start ? 0x10 : 0x00, 0x10);
  273. if (rc < 0)
  274. return rc;
  275. if (!start) {
  276. /* disable video capture */
  277. rc = em28xx_write_regs(dev, VINENABLE_REG, "\x27", 1);
  278. return rc;
  279. }
  280. /* enable video capture */
  281. rc = em28xx_write_regs_req(dev, 0x00, 0x48, "\x00", 1);
  282. if (dev->mode == EM28XX_ANALOG_MODE)
  283. rc = em28xx_write_regs(dev, VINENABLE_REG, "\x67", 1);
  284. else
  285. rc = em28xx_write_regs(dev, VINENABLE_REG, "\x37", 1);
  286. msleep(6);
  287. return rc;
  288. }
  289. int em28xx_outfmt_set_yuv422(struct em28xx *dev)
  290. {
  291. em28xx_write_regs(dev, OUTFMT_REG, "\x34", 1);
  292. em28xx_write_regs(dev, VINMODE_REG, "\x10", 1);
  293. return em28xx_write_regs(dev, VINCTRL_REG, "\x11", 1);
  294. }
  295. static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax,
  296. u8 ymin, u8 ymax)
  297. {
  298. em28xx_coredbg("em28xx Scale: (%d,%d)-(%d,%d)\n",
  299. xmin, ymin, xmax, ymax);
  300. em28xx_write_regs(dev, XMIN_REG, &xmin, 1);
  301. em28xx_write_regs(dev, XMAX_REG, &xmax, 1);
  302. em28xx_write_regs(dev, YMIN_REG, &ymin, 1);
  303. return em28xx_write_regs(dev, YMAX_REG, &ymax, 1);
  304. }
  305. static int em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart,
  306. u16 width, u16 height)
  307. {
  308. u8 cwidth = width;
  309. u8 cheight = height;
  310. u8 overflow = (height >> 7 & 0x02) | (width >> 8 & 0x01);
  311. em28xx_coredbg("em28xx Area Set: (%d,%d)\n",
  312. (width | (overflow & 2) << 7),
  313. (height | (overflow & 1) << 8));
  314. em28xx_write_regs(dev, HSTART_REG, &hstart, 1);
  315. em28xx_write_regs(dev, VSTART_REG, &vstart, 1);
  316. em28xx_write_regs(dev, CWIDTH_REG, &cwidth, 1);
  317. em28xx_write_regs(dev, CHEIGHT_REG, &cheight, 1);
  318. return em28xx_write_regs(dev, OFLOW_REG, &overflow, 1);
  319. }
  320. static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v)
  321. {
  322. u8 mode;
  323. /* the em2800 scaler only supports scaling down to 50% */
  324. if (dev->is_em2800)
  325. mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00);
  326. else {
  327. u8 buf[2];
  328. buf[0] = h;
  329. buf[1] = h >> 8;
  330. em28xx_write_regs(dev, HSCALELOW_REG, (char *)buf, 2);
  331. buf[0] = v;
  332. buf[1] = v >> 8;
  333. em28xx_write_regs(dev, VSCALELOW_REG, (char *)buf, 2);
  334. /* it seems that both H and V scalers must be active
  335. to work correctly */
  336. mode = (h || v)? 0x30: 0x00;
  337. }
  338. return em28xx_write_reg_bits(dev, COMPR_REG, mode, 0x30);
  339. }
  340. /* FIXME: this only function read values from dev */
  341. int em28xx_resolution_set(struct em28xx *dev)
  342. {
  343. int width, height;
  344. width = norm_maxw(dev);
  345. height = norm_maxh(dev) >> 1;
  346. em28xx_outfmt_set_yuv422(dev);
  347. em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2);
  348. em28xx_capture_area_set(dev, 0, 0, width >> 2, height >> 2);
  349. return em28xx_scaler_set(dev, dev->hscale, dev->vscale);
  350. }
  351. int em28xx_set_alternate(struct em28xx *dev)
  352. {
  353. int errCode, prev_alt = dev->alt;
  354. int i;
  355. unsigned int min_pkt_size = dev->width * 2 + 4;
  356. /* When image size is bigger than a certain value,
  357. the frame size should be increased, otherwise, only
  358. green screen will be received.
  359. */
  360. if (dev->width * 2 * dev->height > 720 * 240 * 2)
  361. min_pkt_size *= 2;
  362. for (i = 0; i < dev->num_alt; i++) {
  363. /* stop when the selected alt setting offers enough bandwidth */
  364. if (dev->alt_max_pkt_size[i] >= min_pkt_size) {
  365. dev->alt = i;
  366. break;
  367. /* otherwise make sure that we end up with the maximum bandwidth
  368. because the min_pkt_size equation might be wrong...
  369. */
  370. } else if (dev->alt_max_pkt_size[i] >
  371. dev->alt_max_pkt_size[dev->alt])
  372. dev->alt = i;
  373. }
  374. if (dev->alt != prev_alt) {
  375. em28xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
  376. min_pkt_size, dev->alt);
  377. dev->max_pkt_size = dev->alt_max_pkt_size[dev->alt];
  378. em28xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
  379. dev->alt, dev->max_pkt_size);
  380. errCode = usb_set_interface(dev->udev, 0, dev->alt);
  381. if (errCode < 0) {
  382. em28xx_errdev("cannot change alternate number to %d (error=%i)\n",
  383. dev->alt, errCode);
  384. return errCode;
  385. }
  386. }
  387. return 0;
  388. }
  389. /* ------------------------------------------------------------------
  390. URB control
  391. ------------------------------------------------------------------*/
  392. /*
  393. * IRQ callback, called by URB callback
  394. */
  395. static void em28xx_irq_callback(struct urb *urb)
  396. {
  397. struct em28xx_dmaqueue *dma_q = urb->context;
  398. struct em28xx *dev = container_of(dma_q, struct em28xx, vidq);
  399. int rc, i;
  400. /* Copy data from URB */
  401. spin_lock(&dev->slock);
  402. rc = dev->isoc_ctl.isoc_copy(dev, urb);
  403. spin_unlock(&dev->slock);
  404. /* Reset urb buffers */
  405. for (i = 0; i < urb->number_of_packets; i++) {
  406. urb->iso_frame_desc[i].status = 0;
  407. urb->iso_frame_desc[i].actual_length = 0;
  408. }
  409. urb->status = 0;
  410. urb->status = usb_submit_urb(urb, GFP_ATOMIC);
  411. if (urb->status) {
  412. em28xx_err("urb resubmit failed (error=%i)\n",
  413. urb->status);
  414. }
  415. }
  416. /*
  417. * Stop and Deallocate URBs
  418. */
  419. void em28xx_uninit_isoc(struct em28xx *dev)
  420. {
  421. struct urb *urb;
  422. int i;
  423. em28xx_isocdbg("em28xx: called em28xx_uninit_isoc\n");
  424. dev->isoc_ctl.nfields = -1;
  425. for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
  426. urb = dev->isoc_ctl.urb[i];
  427. if (urb) {
  428. usb_kill_urb(urb);
  429. usb_unlink_urb(urb);
  430. if (dev->isoc_ctl.transfer_buffer[i]) {
  431. usb_buffer_free(dev->udev,
  432. urb->transfer_buffer_length,
  433. dev->isoc_ctl.transfer_buffer[i],
  434. urb->transfer_dma);
  435. }
  436. usb_free_urb(urb);
  437. dev->isoc_ctl.urb[i] = NULL;
  438. }
  439. dev->isoc_ctl.transfer_buffer[i] = NULL;
  440. }
  441. kfree(dev->isoc_ctl.urb);
  442. kfree(dev->isoc_ctl.transfer_buffer);
  443. dev->isoc_ctl.urb = NULL;
  444. dev->isoc_ctl.transfer_buffer = NULL;
  445. dev->isoc_ctl.num_bufs = 0;
  446. em28xx_capture_start(dev, 0);
  447. }
  448. EXPORT_SYMBOL_GPL(em28xx_uninit_isoc);
  449. /*
  450. * Allocate URBs and start IRQ
  451. */
  452. int em28xx_init_isoc(struct em28xx *dev, int max_packets,
  453. int num_bufs, int max_pkt_size,
  454. int (*isoc_copy) (struct em28xx *dev, struct urb *urb),
  455. int cap_type)
  456. {
  457. struct em28xx_dmaqueue *dma_q = &dev->vidq;
  458. int i;
  459. int sb_size, pipe;
  460. struct urb *urb;
  461. int j, k;
  462. int rc;
  463. em28xx_isocdbg("em28xx: called em28xx_prepare_isoc\n");
  464. /* De-allocates all pending stuff */
  465. em28xx_uninit_isoc(dev);
  466. dev->isoc_ctl.isoc_copy = isoc_copy;
  467. dev->isoc_ctl.num_bufs = num_bufs;
  468. dev->isoc_ctl.urb = kzalloc(sizeof(void *)*num_bufs, GFP_KERNEL);
  469. if (!dev->isoc_ctl.urb) {
  470. em28xx_errdev("cannot alloc memory for usb buffers\n");
  471. return -ENOMEM;
  472. }
  473. dev->isoc_ctl.transfer_buffer = kzalloc(sizeof(void *)*num_bufs,
  474. GFP_KERNEL);
  475. if (!dev->isoc_ctl.urb) {
  476. em28xx_errdev("cannot allocate memory for usbtransfer\n");
  477. kfree(dev->isoc_ctl.urb);
  478. return -ENOMEM;
  479. }
  480. dev->isoc_ctl.max_pkt_size = max_pkt_size;
  481. dev->isoc_ctl.buf = NULL;
  482. sb_size = max_packets * dev->isoc_ctl.max_pkt_size;
  483. /* allocate urbs and transfer buffers */
  484. for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
  485. urb = usb_alloc_urb(max_packets, GFP_KERNEL);
  486. if (!urb) {
  487. em28xx_err("cannot alloc isoc_ctl.urb %i\n", i);
  488. em28xx_uninit_isoc(dev);
  489. return -ENOMEM;
  490. }
  491. dev->isoc_ctl.urb[i] = urb;
  492. dev->isoc_ctl.transfer_buffer[i] = usb_buffer_alloc(dev->udev,
  493. sb_size, GFP_KERNEL, &urb->transfer_dma);
  494. if (!dev->isoc_ctl.transfer_buffer[i]) {
  495. em28xx_err("unable to allocate %i bytes for transfer"
  496. " buffer %i%s\n",
  497. sb_size, i,
  498. in_interrupt()?" while in int":"");
  499. em28xx_uninit_isoc(dev);
  500. return -ENOMEM;
  501. }
  502. memset(dev->isoc_ctl.transfer_buffer[i], 0, sb_size);
  503. /* FIXME: this is a hack - should be
  504. 'desc.bEndpointAddress & USB_ENDPOINT_NUMBER_MASK'
  505. should also be using 'desc.bInterval'
  506. */
  507. pipe = usb_rcvisocpipe(dev->udev,
  508. cap_type == EM28XX_ANALOG_CAPTURE ? 0x82 : 0x84);
  509. usb_fill_int_urb(urb, dev->udev, pipe,
  510. dev->isoc_ctl.transfer_buffer[i], sb_size,
  511. em28xx_irq_callback, dma_q, 1);
  512. urb->number_of_packets = max_packets;
  513. urb->transfer_flags = URB_ISO_ASAP;
  514. k = 0;
  515. for (j = 0; j < max_packets; j++) {
  516. urb->iso_frame_desc[j].offset = k;
  517. urb->iso_frame_desc[j].length =
  518. dev->isoc_ctl.max_pkt_size;
  519. k += dev->isoc_ctl.max_pkt_size;
  520. }
  521. }
  522. init_waitqueue_head(&dma_q->wq);
  523. em28xx_capture_start(dev, cap_type);
  524. /* submit urbs and enables IRQ */
  525. for (i = 0; i < dev->isoc_ctl.num_bufs; i++) {
  526. rc = usb_submit_urb(dev->isoc_ctl.urb[i], GFP_ATOMIC);
  527. if (rc) {
  528. em28xx_err("submit of urb %i failed (error=%i)\n", i,
  529. rc);
  530. em28xx_uninit_isoc(dev);
  531. return rc;
  532. }
  533. }
  534. return 0;
  535. }
  536. EXPORT_SYMBOL_GPL(em28xx_init_isoc);