omapdss.h 16 KB

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  1. /*
  2. * Copyright (C) 2008 Nokia Corporation
  3. * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #ifndef __OMAP_OMAPDSS_H
  18. #define __OMAP_OMAPDSS_H
  19. #include <linux/list.h>
  20. #include <linux/kobject.h>
  21. #include <linux/device.h>
  22. #include <linux/platform_device.h>
  23. #include <asm/atomic.h>
  24. #define DISPC_IRQ_FRAMEDONE (1 << 0)
  25. #define DISPC_IRQ_VSYNC (1 << 1)
  26. #define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
  27. #define DISPC_IRQ_EVSYNC_ODD (1 << 3)
  28. #define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
  29. #define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
  30. #define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
  31. #define DISPC_IRQ_GFX_END_WIN (1 << 7)
  32. #define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
  33. #define DISPC_IRQ_OCP_ERR (1 << 9)
  34. #define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
  35. #define DISPC_IRQ_VID1_END_WIN (1 << 11)
  36. #define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
  37. #define DISPC_IRQ_VID2_END_WIN (1 << 13)
  38. #define DISPC_IRQ_SYNC_LOST (1 << 14)
  39. #define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
  40. #define DISPC_IRQ_WAKEUP (1 << 16)
  41. #define DISPC_IRQ_SYNC_LOST2 (1 << 17)
  42. #define DISPC_IRQ_VSYNC2 (1 << 18)
  43. #define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21)
  44. #define DISPC_IRQ_FRAMEDONE2 (1 << 22)
  45. struct omap_dss_device;
  46. struct omap_overlay_manager;
  47. enum omap_display_type {
  48. OMAP_DISPLAY_TYPE_NONE = 0,
  49. OMAP_DISPLAY_TYPE_DPI = 1 << 0,
  50. OMAP_DISPLAY_TYPE_DBI = 1 << 1,
  51. OMAP_DISPLAY_TYPE_SDI = 1 << 2,
  52. OMAP_DISPLAY_TYPE_DSI = 1 << 3,
  53. OMAP_DISPLAY_TYPE_VENC = 1 << 4,
  54. OMAP_DISPLAY_TYPE_HDMI = 1 << 5,
  55. };
  56. enum omap_plane {
  57. OMAP_DSS_GFX = 0,
  58. OMAP_DSS_VIDEO1 = 1,
  59. OMAP_DSS_VIDEO2 = 2
  60. };
  61. enum omap_channel {
  62. OMAP_DSS_CHANNEL_LCD = 0,
  63. OMAP_DSS_CHANNEL_DIGIT = 1,
  64. OMAP_DSS_CHANNEL_LCD2 = 2,
  65. };
  66. enum omap_color_mode {
  67. OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
  68. OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
  69. OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
  70. OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
  71. OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
  72. OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
  73. OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
  74. OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
  75. OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
  76. OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
  77. OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
  78. OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
  79. OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
  80. OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
  81. };
  82. enum omap_lcd_display_type {
  83. OMAP_DSS_LCD_DISPLAY_STN,
  84. OMAP_DSS_LCD_DISPLAY_TFT,
  85. };
  86. enum omap_dss_load_mode {
  87. OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
  88. OMAP_DSS_LOAD_CLUT_ONLY = 1,
  89. OMAP_DSS_LOAD_FRAME_ONLY = 2,
  90. OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
  91. };
  92. enum omap_dss_trans_key_type {
  93. OMAP_DSS_COLOR_KEY_GFX_DST = 0,
  94. OMAP_DSS_COLOR_KEY_VID_SRC = 1,
  95. };
  96. enum omap_rfbi_te_mode {
  97. OMAP_DSS_RFBI_TE_MODE_1 = 1,
  98. OMAP_DSS_RFBI_TE_MODE_2 = 2,
  99. };
  100. enum omap_panel_config {
  101. OMAP_DSS_LCD_IVS = 1<<0,
  102. OMAP_DSS_LCD_IHS = 1<<1,
  103. OMAP_DSS_LCD_IPC = 1<<2,
  104. OMAP_DSS_LCD_IEO = 1<<3,
  105. OMAP_DSS_LCD_RF = 1<<4,
  106. OMAP_DSS_LCD_ONOFF = 1<<5,
  107. OMAP_DSS_LCD_TFT = 1<<20,
  108. };
  109. enum omap_dss_venc_type {
  110. OMAP_DSS_VENC_TYPE_COMPOSITE,
  111. OMAP_DSS_VENC_TYPE_SVIDEO,
  112. };
  113. enum omap_display_caps {
  114. OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
  115. OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
  116. };
  117. enum omap_dss_update_mode {
  118. OMAP_DSS_UPDATE_DISABLED = 0,
  119. OMAP_DSS_UPDATE_AUTO,
  120. OMAP_DSS_UPDATE_MANUAL,
  121. };
  122. enum omap_dss_display_state {
  123. OMAP_DSS_DISPLAY_DISABLED = 0,
  124. OMAP_DSS_DISPLAY_ACTIVE,
  125. OMAP_DSS_DISPLAY_SUSPENDED,
  126. };
  127. /* XXX perhaps this should be removed */
  128. enum omap_dss_overlay_managers {
  129. OMAP_DSS_OVL_MGR_LCD,
  130. OMAP_DSS_OVL_MGR_TV,
  131. OMAP_DSS_OVL_MGR_LCD2,
  132. };
  133. enum omap_dss_rotation_type {
  134. OMAP_DSS_ROT_DMA = 0,
  135. OMAP_DSS_ROT_VRFB = 1,
  136. };
  137. /* clockwise rotation angle */
  138. enum omap_dss_rotation_angle {
  139. OMAP_DSS_ROT_0 = 0,
  140. OMAP_DSS_ROT_90 = 1,
  141. OMAP_DSS_ROT_180 = 2,
  142. OMAP_DSS_ROT_270 = 3,
  143. };
  144. enum omap_overlay_caps {
  145. OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
  146. OMAP_DSS_OVL_CAP_DISPC = 1 << 1,
  147. };
  148. enum omap_overlay_manager_caps {
  149. OMAP_DSS_OVL_MGR_CAP_DISPC = 1 << 0,
  150. };
  151. enum omap_dss_clk_source {
  152. OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK
  153. * OMAP4: DSS_FCLK */
  154. OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* OMAP3: DSI1_PLL_FCLK
  155. * OMAP4: PLL1_CLK1 */
  156. OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
  157. * OMAP4: PLL1_CLK2 */
  158. };
  159. /* RFBI */
  160. struct rfbi_timings {
  161. int cs_on_time;
  162. int cs_off_time;
  163. int we_on_time;
  164. int we_off_time;
  165. int re_on_time;
  166. int re_off_time;
  167. int we_cycle_time;
  168. int re_cycle_time;
  169. int cs_pulse_width;
  170. int access_time;
  171. int clk_div;
  172. u32 tim[5]; /* set by rfbi_convert_timings() */
  173. int converted;
  174. };
  175. void omap_rfbi_write_command(const void *buf, u32 len);
  176. void omap_rfbi_read_data(void *buf, u32 len);
  177. void omap_rfbi_write_data(const void *buf, u32 len);
  178. void omap_rfbi_write_pixels(const void __iomem *buf, int scr_width,
  179. u16 x, u16 y,
  180. u16 w, u16 h);
  181. int omap_rfbi_enable_te(bool enable, unsigned line);
  182. int omap_rfbi_setup_te(enum omap_rfbi_te_mode mode,
  183. unsigned hs_pulse_time, unsigned vs_pulse_time,
  184. int hs_pol_inv, int vs_pol_inv, int extif_div);
  185. /* DSI */
  186. void dsi_bus_lock(void);
  187. void dsi_bus_unlock(void);
  188. int dsi_vc_dcs_write(int channel, u8 *data, int len);
  189. int dsi_vc_dcs_write_0(int channel, u8 dcs_cmd);
  190. int dsi_vc_dcs_write_1(int channel, u8 dcs_cmd, u8 param);
  191. int dsi_vc_dcs_write_nosync(int channel, u8 *data, int len);
  192. int dsi_vc_dcs_read(int channel, u8 dcs_cmd, u8 *buf, int buflen);
  193. int dsi_vc_dcs_read_1(int channel, u8 dcs_cmd, u8 *data);
  194. int dsi_vc_dcs_read_2(int channel, u8 dcs_cmd, u8 *data1, u8 *data2);
  195. int dsi_vc_set_max_rx_packet_size(int channel, u16 len);
  196. int dsi_vc_send_null(int channel);
  197. int dsi_vc_send_bta_sync(int channel);
  198. /* Board specific data */
  199. struct omap_dss_board_info {
  200. int (*get_last_off_on_transaction_id)(struct device *dev);
  201. int num_devices;
  202. struct omap_dss_device **devices;
  203. struct omap_dss_device *default_device;
  204. };
  205. #if defined(CONFIG_OMAP2_DSS_MODULE) || defined(CONFIG_OMAP2_DSS)
  206. /* Init with the board info */
  207. extern int omap_display_init(struct omap_dss_board_info *board_data);
  208. #else
  209. static inline int omap_display_init(struct omap_dss_board_info *board_data)
  210. {
  211. return 0;
  212. }
  213. #endif
  214. struct omap_display_platform_data {
  215. struct omap_dss_board_info *board_data;
  216. /* TODO: Additional members to be added when PM is considered */
  217. bool (*opt_clock_available)(const char *clk_role);
  218. };
  219. struct omap_video_timings {
  220. /* Unit: pixels */
  221. u16 x_res;
  222. /* Unit: pixels */
  223. u16 y_res;
  224. /* Unit: KHz */
  225. u32 pixel_clock;
  226. /* Unit: pixel clocks */
  227. u16 hsw; /* Horizontal synchronization pulse width */
  228. /* Unit: pixel clocks */
  229. u16 hfp; /* Horizontal front porch */
  230. /* Unit: pixel clocks */
  231. u16 hbp; /* Horizontal back porch */
  232. /* Unit: line clocks */
  233. u16 vsw; /* Vertical synchronization pulse width */
  234. /* Unit: line clocks */
  235. u16 vfp; /* Vertical front porch */
  236. /* Unit: line clocks */
  237. u16 vbp; /* Vertical back porch */
  238. };
  239. #ifdef CONFIG_OMAP2_DSS_VENC
  240. /* Hardcoded timings for tv modes. Venc only uses these to
  241. * identify the mode, and does not actually use the configs
  242. * itself. However, the configs should be something that
  243. * a normal monitor can also show */
  244. extern const struct omap_video_timings omap_dss_pal_timings;
  245. extern const struct omap_video_timings omap_dss_ntsc_timings;
  246. #endif
  247. struct omap_overlay_info {
  248. bool enabled;
  249. u32 paddr;
  250. void __iomem *vaddr;
  251. u16 screen_width;
  252. u16 width;
  253. u16 height;
  254. enum omap_color_mode color_mode;
  255. u8 rotation;
  256. enum omap_dss_rotation_type rotation_type;
  257. bool mirror;
  258. u16 pos_x;
  259. u16 pos_y;
  260. u16 out_width; /* if 0, out_width == width */
  261. u16 out_height; /* if 0, out_height == height */
  262. u8 global_alpha;
  263. u8 pre_mult_alpha;
  264. };
  265. struct omap_overlay {
  266. struct kobject kobj;
  267. struct list_head list;
  268. /* static fields */
  269. const char *name;
  270. int id;
  271. enum omap_color_mode supported_modes;
  272. enum omap_overlay_caps caps;
  273. /* dynamic fields */
  274. struct omap_overlay_manager *manager;
  275. struct omap_overlay_info info;
  276. /* if true, info has been changed, but not applied() yet */
  277. bool info_dirty;
  278. int (*set_manager)(struct omap_overlay *ovl,
  279. struct omap_overlay_manager *mgr);
  280. int (*unset_manager)(struct omap_overlay *ovl);
  281. int (*set_overlay_info)(struct omap_overlay *ovl,
  282. struct omap_overlay_info *info);
  283. void (*get_overlay_info)(struct omap_overlay *ovl,
  284. struct omap_overlay_info *info);
  285. int (*wait_for_go)(struct omap_overlay *ovl);
  286. };
  287. struct omap_overlay_manager_info {
  288. u32 default_color;
  289. enum omap_dss_trans_key_type trans_key_type;
  290. u32 trans_key;
  291. bool trans_enabled;
  292. bool alpha_enabled;
  293. };
  294. struct omap_overlay_manager {
  295. struct kobject kobj;
  296. struct list_head list;
  297. /* static fields */
  298. const char *name;
  299. int id;
  300. enum omap_overlay_manager_caps caps;
  301. int num_overlays;
  302. struct omap_overlay **overlays;
  303. enum omap_display_type supported_displays;
  304. /* dynamic fields */
  305. struct omap_dss_device *device;
  306. struct omap_overlay_manager_info info;
  307. bool device_changed;
  308. /* if true, info has been changed but not applied() yet */
  309. bool info_dirty;
  310. int (*set_device)(struct omap_overlay_manager *mgr,
  311. struct omap_dss_device *dssdev);
  312. int (*unset_device)(struct omap_overlay_manager *mgr);
  313. int (*set_manager_info)(struct omap_overlay_manager *mgr,
  314. struct omap_overlay_manager_info *info);
  315. void (*get_manager_info)(struct omap_overlay_manager *mgr,
  316. struct omap_overlay_manager_info *info);
  317. int (*apply)(struct omap_overlay_manager *mgr);
  318. int (*wait_for_go)(struct omap_overlay_manager *mgr);
  319. int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
  320. int (*enable)(struct omap_overlay_manager *mgr);
  321. int (*disable)(struct omap_overlay_manager *mgr);
  322. };
  323. struct omap_dss_device {
  324. struct device dev;
  325. enum omap_display_type type;
  326. enum omap_channel channel;
  327. union {
  328. struct {
  329. u8 data_lines;
  330. } dpi;
  331. struct {
  332. u8 channel;
  333. u8 data_lines;
  334. } rfbi;
  335. struct {
  336. u8 datapairs;
  337. } sdi;
  338. struct {
  339. u8 clk_lane;
  340. u8 clk_pol;
  341. u8 data1_lane;
  342. u8 data1_pol;
  343. u8 data2_lane;
  344. u8 data2_pol;
  345. bool ext_te;
  346. u8 ext_te_gpio;
  347. } dsi;
  348. struct {
  349. enum omap_dss_venc_type type;
  350. bool invert_polarity;
  351. } venc;
  352. } phy;
  353. struct {
  354. struct {
  355. u16 lck_div;
  356. u16 pck_div;
  357. } dispc;
  358. struct {
  359. u16 regn;
  360. u16 regm;
  361. u16 regm_dispc;
  362. u16 regm_dsi;
  363. u16 lp_clk_div;
  364. } dsi;
  365. } clocks;
  366. struct {
  367. struct omap_video_timings timings;
  368. int acbi; /* ac-bias pin transitions per interrupt */
  369. /* Unit: line clocks */
  370. int acb; /* ac-bias pin frequency */
  371. enum omap_panel_config config;
  372. } panel;
  373. struct {
  374. u8 pixel_size;
  375. struct rfbi_timings rfbi_timings;
  376. } ctrl;
  377. int reset_gpio;
  378. int max_backlight_level;
  379. const char *name;
  380. /* used to match device to driver */
  381. const char *driver_name;
  382. void *data;
  383. struct omap_dss_driver *driver;
  384. /* helper variable for driver suspend/resume */
  385. bool activate_after_resume;
  386. enum omap_display_caps caps;
  387. struct omap_overlay_manager *manager;
  388. enum omap_dss_display_state state;
  389. /* platform specific */
  390. int (*platform_enable)(struct omap_dss_device *dssdev);
  391. void (*platform_disable)(struct omap_dss_device *dssdev);
  392. int (*set_backlight)(struct omap_dss_device *dssdev, int level);
  393. int (*get_backlight)(struct omap_dss_device *dssdev);
  394. };
  395. struct omap_dss_driver {
  396. struct device_driver driver;
  397. int (*probe)(struct omap_dss_device *);
  398. void (*remove)(struct omap_dss_device *);
  399. int (*enable)(struct omap_dss_device *display);
  400. void (*disable)(struct omap_dss_device *display);
  401. int (*suspend)(struct omap_dss_device *display);
  402. int (*resume)(struct omap_dss_device *display);
  403. int (*run_test)(struct omap_dss_device *display, int test);
  404. int (*set_update_mode)(struct omap_dss_device *dssdev,
  405. enum omap_dss_update_mode);
  406. enum omap_dss_update_mode (*get_update_mode)(
  407. struct omap_dss_device *dssdev);
  408. int (*update)(struct omap_dss_device *dssdev,
  409. u16 x, u16 y, u16 w, u16 h);
  410. int (*sync)(struct omap_dss_device *dssdev);
  411. int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
  412. int (*get_te)(struct omap_dss_device *dssdev);
  413. u8 (*get_rotate)(struct omap_dss_device *dssdev);
  414. int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
  415. bool (*get_mirror)(struct omap_dss_device *dssdev);
  416. int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
  417. int (*memory_read)(struct omap_dss_device *dssdev,
  418. void *buf, size_t size,
  419. u16 x, u16 y, u16 w, u16 h);
  420. void (*get_resolution)(struct omap_dss_device *dssdev,
  421. u16 *xres, u16 *yres);
  422. void (*get_dimensions)(struct omap_dss_device *dssdev,
  423. u32 *width, u32 *height);
  424. int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
  425. int (*check_timings)(struct omap_dss_device *dssdev,
  426. struct omap_video_timings *timings);
  427. void (*set_timings)(struct omap_dss_device *dssdev,
  428. struct omap_video_timings *timings);
  429. void (*get_timings)(struct omap_dss_device *dssdev,
  430. struct omap_video_timings *timings);
  431. int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
  432. u32 (*get_wss)(struct omap_dss_device *dssdev);
  433. };
  434. int omap_dss_register_driver(struct omap_dss_driver *);
  435. void omap_dss_unregister_driver(struct omap_dss_driver *);
  436. void omap_dss_get_device(struct omap_dss_device *dssdev);
  437. void omap_dss_put_device(struct omap_dss_device *dssdev);
  438. #define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
  439. struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
  440. struct omap_dss_device *omap_dss_find_device(void *data,
  441. int (*match)(struct omap_dss_device *dssdev, void *data));
  442. int omap_dss_start_device(struct omap_dss_device *dssdev);
  443. void omap_dss_stop_device(struct omap_dss_device *dssdev);
  444. int omap_dss_get_num_overlay_managers(void);
  445. struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
  446. int omap_dss_get_num_overlays(void);
  447. struct omap_overlay *omap_dss_get_overlay(int num);
  448. void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
  449. u16 *xres, u16 *yres);
  450. int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
  451. typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
  452. int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
  453. int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
  454. int omap_dispc_wait_for_irq_timeout(u32 irqmask, unsigned long timeout);
  455. int omap_dispc_wait_for_irq_interruptible_timeout(u32 irqmask,
  456. unsigned long timeout);
  457. #define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
  458. #define to_dss_device(x) container_of((x), struct omap_dss_device, dev)
  459. void omapdss_dsi_vc_enable_hs(int channel, bool enable);
  460. int omapdss_dsi_enable_te(struct omap_dss_device *dssdev, bool enable);
  461. int omap_dsi_prepare_update(struct omap_dss_device *dssdev,
  462. u16 *x, u16 *y, u16 *w, u16 *h,
  463. bool enlarge_update_area);
  464. int omap_dsi_update(struct omap_dss_device *dssdev,
  465. int channel,
  466. u16 x, u16 y, u16 w, u16 h,
  467. void (*callback)(int, void *), void *data);
  468. int omap_dsi_request_vc(struct omap_dss_device *dssdev, int *channel);
  469. int omap_dsi_set_vc_id(struct omap_dss_device *dssdev, int channel, int vc_id);
  470. void omap_dsi_release_vc(struct omap_dss_device *dssdev, int channel);
  471. int omapdss_dsi_display_enable(struct omap_dss_device *dssdev);
  472. void omapdss_dsi_display_disable(struct omap_dss_device *dssdev);
  473. int omapdss_dpi_display_enable(struct omap_dss_device *dssdev);
  474. void omapdss_dpi_display_disable(struct omap_dss_device *dssdev);
  475. void dpi_set_timings(struct omap_dss_device *dssdev,
  476. struct omap_video_timings *timings);
  477. int dpi_check_timings(struct omap_dss_device *dssdev,
  478. struct omap_video_timings *timings);
  479. int omapdss_sdi_display_enable(struct omap_dss_device *dssdev);
  480. void omapdss_sdi_display_disable(struct omap_dss_device *dssdev);
  481. int omapdss_rfbi_display_enable(struct omap_dss_device *dssdev);
  482. void omapdss_rfbi_display_disable(struct omap_dss_device *dssdev);
  483. int omap_rfbi_prepare_update(struct omap_dss_device *dssdev,
  484. u16 *x, u16 *y, u16 *w, u16 *h);
  485. int omap_rfbi_update(struct omap_dss_device *dssdev,
  486. u16 x, u16 y, u16 w, u16 h,
  487. void (*callback)(void *), void *data);
  488. #endif