rt2800pci.c 20 KB

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  1. /*
  2. Copyright (C) 2009 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
  3. Copyright (C) 2009 Alban Browaeys <prahal@yahoo.com>
  4. Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
  5. Copyright (C) 2009 Luis Correia <luis.f.correia@gmail.com>
  6. Copyright (C) 2009 Mattias Nissler <mattias.nissler@gmx.de>
  7. Copyright (C) 2009 Mark Asselstine <asselsm@gmail.com>
  8. Copyright (C) 2009 Xose Vazquez Perez <xose.vazquez@gmail.com>
  9. Copyright (C) 2009 Bart Zolnierkiewicz <bzolnier@gmail.com>
  10. <http://rt2x00.serialmonkey.com>
  11. This program is free software; you can redistribute it and/or modify
  12. it under the terms of the GNU General Public License as published by
  13. the Free Software Foundation; either version 2 of the License, or
  14. (at your option) any later version.
  15. This program is distributed in the hope that it will be useful,
  16. but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. GNU General Public License for more details.
  19. You should have received a copy of the GNU General Public License
  20. along with this program; if not, write to the
  21. Free Software Foundation, Inc.,
  22. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  23. */
  24. /*
  25. Module: rt2800pci
  26. Abstract: rt2800pci device specific routines.
  27. Supported chipsets: RT2800E & RT2800ED.
  28. */
  29. #include <linux/delay.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/init.h>
  32. #include <linux/kernel.h>
  33. #include <linux/module.h>
  34. #include <linux/pci.h>
  35. #include <linux/platform_device.h>
  36. #include <linux/eeprom_93cx6.h>
  37. #include "rt2x00.h"
  38. #include "rt2x00mmio.h"
  39. #include "rt2x00pci.h"
  40. #include "rt2x00soc.h"
  41. #include "rt2800lib.h"
  42. #include "rt2800mmio.h"
  43. #include "rt2800.h"
  44. #include "rt2800pci.h"
  45. /*
  46. * Allow hardware encryption to be disabled.
  47. */
  48. static bool modparam_nohwcrypt = false;
  49. module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO);
  50. MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption.");
  51. static bool rt2800pci_hwcrypt_disabled(struct rt2x00_dev *rt2x00dev)
  52. {
  53. return modparam_nohwcrypt;
  54. }
  55. static void rt2800pci_mcu_status(struct rt2x00_dev *rt2x00dev, const u8 token)
  56. {
  57. unsigned int i;
  58. u32 reg;
  59. /*
  60. * SOC devices don't support MCU requests.
  61. */
  62. if (rt2x00_is_soc(rt2x00dev))
  63. return;
  64. for (i = 0; i < 200; i++) {
  65. rt2x00mmio_register_read(rt2x00dev, H2M_MAILBOX_CID, &reg);
  66. if ((rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD0) == token) ||
  67. (rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD1) == token) ||
  68. (rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD2) == token) ||
  69. (rt2x00_get_field32(reg, H2M_MAILBOX_CID_CMD3) == token))
  70. break;
  71. udelay(REGISTER_BUSY_DELAY);
  72. }
  73. if (i == 200)
  74. rt2x00_err(rt2x00dev, "MCU request failed, no response from hardware\n");
  75. rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0);
  76. rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0);
  77. }
  78. #ifdef CONFIG_PCI
  79. static void rt2800pci_eepromregister_read(struct eeprom_93cx6 *eeprom)
  80. {
  81. struct rt2x00_dev *rt2x00dev = eeprom->data;
  82. u32 reg;
  83. rt2x00mmio_register_read(rt2x00dev, E2PROM_CSR, &reg);
  84. eeprom->reg_data_in = !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_IN);
  85. eeprom->reg_data_out = !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_OUT);
  86. eeprom->reg_data_clock =
  87. !!rt2x00_get_field32(reg, E2PROM_CSR_DATA_CLOCK);
  88. eeprom->reg_chip_select =
  89. !!rt2x00_get_field32(reg, E2PROM_CSR_CHIP_SELECT);
  90. }
  91. static void rt2800pci_eepromregister_write(struct eeprom_93cx6 *eeprom)
  92. {
  93. struct rt2x00_dev *rt2x00dev = eeprom->data;
  94. u32 reg = 0;
  95. rt2x00_set_field32(&reg, E2PROM_CSR_DATA_IN, !!eeprom->reg_data_in);
  96. rt2x00_set_field32(&reg, E2PROM_CSR_DATA_OUT, !!eeprom->reg_data_out);
  97. rt2x00_set_field32(&reg, E2PROM_CSR_DATA_CLOCK,
  98. !!eeprom->reg_data_clock);
  99. rt2x00_set_field32(&reg, E2PROM_CSR_CHIP_SELECT,
  100. !!eeprom->reg_chip_select);
  101. rt2x00mmio_register_write(rt2x00dev, E2PROM_CSR, reg);
  102. }
  103. static int rt2800pci_read_eeprom_pci(struct rt2x00_dev *rt2x00dev)
  104. {
  105. struct eeprom_93cx6 eeprom;
  106. u32 reg;
  107. rt2x00mmio_register_read(rt2x00dev, E2PROM_CSR, &reg);
  108. eeprom.data = rt2x00dev;
  109. eeprom.register_read = rt2800pci_eepromregister_read;
  110. eeprom.register_write = rt2800pci_eepromregister_write;
  111. switch (rt2x00_get_field32(reg, E2PROM_CSR_TYPE))
  112. {
  113. case 0:
  114. eeprom.width = PCI_EEPROM_WIDTH_93C46;
  115. break;
  116. case 1:
  117. eeprom.width = PCI_EEPROM_WIDTH_93C66;
  118. break;
  119. default:
  120. eeprom.width = PCI_EEPROM_WIDTH_93C86;
  121. break;
  122. }
  123. eeprom.reg_data_in = 0;
  124. eeprom.reg_data_out = 0;
  125. eeprom.reg_data_clock = 0;
  126. eeprom.reg_chip_select = 0;
  127. eeprom_93cx6_multiread(&eeprom, EEPROM_BASE, rt2x00dev->eeprom,
  128. EEPROM_SIZE / sizeof(u16));
  129. return 0;
  130. }
  131. static int rt2800pci_efuse_detect(struct rt2x00_dev *rt2x00dev)
  132. {
  133. return rt2800_efuse_detect(rt2x00dev);
  134. }
  135. static inline int rt2800pci_read_eeprom_efuse(struct rt2x00_dev *rt2x00dev)
  136. {
  137. return rt2800_read_eeprom_efuse(rt2x00dev);
  138. }
  139. /*
  140. * Firmware functions
  141. */
  142. static char *rt2800pci_get_firmware_name(struct rt2x00_dev *rt2x00dev)
  143. {
  144. /*
  145. * Chip rt3290 use specific 4KB firmware named rt3290.bin.
  146. */
  147. if (rt2x00_rt(rt2x00dev, RT3290))
  148. return FIRMWARE_RT3290;
  149. else
  150. return FIRMWARE_RT2860;
  151. }
  152. static int rt2800pci_write_firmware(struct rt2x00_dev *rt2x00dev,
  153. const u8 *data, const size_t len)
  154. {
  155. u32 reg;
  156. /*
  157. * enable Host program ram write selection
  158. */
  159. reg = 0;
  160. rt2x00_set_field32(&reg, PBF_SYS_CTRL_HOST_RAM_WRITE, 1);
  161. rt2x00mmio_register_write(rt2x00dev, PBF_SYS_CTRL, reg);
  162. /*
  163. * Write firmware to device.
  164. */
  165. rt2x00mmio_register_multiwrite(rt2x00dev, FIRMWARE_IMAGE_BASE,
  166. data, len);
  167. rt2x00mmio_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00000);
  168. rt2x00mmio_register_write(rt2x00dev, PBF_SYS_CTRL, 0x00001);
  169. rt2x00mmio_register_write(rt2x00dev, H2M_BBP_AGENT, 0);
  170. rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_CSR, 0);
  171. return 0;
  172. }
  173. #endif /* CONFIG_PCI */
  174. /*
  175. * Device state switch handlers.
  176. */
  177. static int rt2800pci_enable_radio(struct rt2x00_dev *rt2x00dev)
  178. {
  179. int retval;
  180. /* Wait for DMA, ignore error until we initialize queues. */
  181. rt2800_wait_wpdma_ready(rt2x00dev);
  182. if (unlikely(rt2800mmio_init_queues(rt2x00dev)))
  183. return -EIO;
  184. retval = rt2800_enable_radio(rt2x00dev);
  185. if (retval)
  186. return retval;
  187. /* After resume MCU_BOOT_SIGNAL will trash these. */
  188. rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_STATUS, ~0);
  189. rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_CID, ~0);
  190. rt2800_mcu_request(rt2x00dev, MCU_SLEEP, TOKEN_RADIO_OFF, 0xff, 0x02);
  191. rt2800pci_mcu_status(rt2x00dev, TOKEN_RADIO_OFF);
  192. rt2800_mcu_request(rt2x00dev, MCU_WAKEUP, TOKEN_WAKEUP, 0, 0);
  193. rt2800pci_mcu_status(rt2x00dev, TOKEN_WAKEUP);
  194. return retval;
  195. }
  196. static void rt2800pci_disable_radio(struct rt2x00_dev *rt2x00dev)
  197. {
  198. if (rt2x00_is_soc(rt2x00dev)) {
  199. rt2800_disable_radio(rt2x00dev);
  200. rt2x00mmio_register_write(rt2x00dev, PWR_PIN_CFG, 0);
  201. rt2x00mmio_register_write(rt2x00dev, TX_PIN_CFG, 0);
  202. }
  203. }
  204. static int rt2800pci_set_state(struct rt2x00_dev *rt2x00dev,
  205. enum dev_state state)
  206. {
  207. if (state == STATE_AWAKE) {
  208. rt2800_mcu_request(rt2x00dev, MCU_WAKEUP, TOKEN_WAKEUP,
  209. 0, 0x02);
  210. rt2800pci_mcu_status(rt2x00dev, TOKEN_WAKEUP);
  211. } else if (state == STATE_SLEEP) {
  212. rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_STATUS,
  213. 0xffffffff);
  214. rt2x00mmio_register_write(rt2x00dev, H2M_MAILBOX_CID,
  215. 0xffffffff);
  216. rt2800_mcu_request(rt2x00dev, MCU_SLEEP, TOKEN_SLEEP,
  217. 0xff, 0x01);
  218. }
  219. return 0;
  220. }
  221. static int rt2800pci_set_device_state(struct rt2x00_dev *rt2x00dev,
  222. enum dev_state state)
  223. {
  224. int retval = 0;
  225. switch (state) {
  226. case STATE_RADIO_ON:
  227. retval = rt2800pci_enable_radio(rt2x00dev);
  228. break;
  229. case STATE_RADIO_OFF:
  230. /*
  231. * After the radio has been disabled, the device should
  232. * be put to sleep for powersaving.
  233. */
  234. rt2800pci_disable_radio(rt2x00dev);
  235. rt2800pci_set_state(rt2x00dev, STATE_SLEEP);
  236. break;
  237. case STATE_RADIO_IRQ_ON:
  238. case STATE_RADIO_IRQ_OFF:
  239. rt2800mmio_toggle_irq(rt2x00dev, state);
  240. break;
  241. case STATE_DEEP_SLEEP:
  242. case STATE_SLEEP:
  243. case STATE_STANDBY:
  244. case STATE_AWAKE:
  245. retval = rt2800pci_set_state(rt2x00dev, state);
  246. break;
  247. default:
  248. retval = -ENOTSUPP;
  249. break;
  250. }
  251. if (unlikely(retval))
  252. rt2x00_err(rt2x00dev, "Device failed to enter state %d (%d)\n",
  253. state, retval);
  254. return retval;
  255. }
  256. #ifdef CONFIG_PCI
  257. /*
  258. * Device probe functions.
  259. */
  260. static int rt2800pci_read_eeprom(struct rt2x00_dev *rt2x00dev)
  261. {
  262. int retval;
  263. if (rt2800pci_efuse_detect(rt2x00dev))
  264. retval = rt2800pci_read_eeprom_efuse(rt2x00dev);
  265. else
  266. retval = rt2800pci_read_eeprom_pci(rt2x00dev);
  267. return retval;
  268. }
  269. static const struct ieee80211_ops rt2800pci_mac80211_ops = {
  270. .tx = rt2x00mac_tx,
  271. .start = rt2x00mac_start,
  272. .stop = rt2x00mac_stop,
  273. .add_interface = rt2x00mac_add_interface,
  274. .remove_interface = rt2x00mac_remove_interface,
  275. .config = rt2x00mac_config,
  276. .configure_filter = rt2x00mac_configure_filter,
  277. .set_key = rt2x00mac_set_key,
  278. .sw_scan_start = rt2x00mac_sw_scan_start,
  279. .sw_scan_complete = rt2x00mac_sw_scan_complete,
  280. .get_stats = rt2x00mac_get_stats,
  281. .get_tkip_seq = rt2800_get_tkip_seq,
  282. .set_rts_threshold = rt2800_set_rts_threshold,
  283. .sta_add = rt2x00mac_sta_add,
  284. .sta_remove = rt2x00mac_sta_remove,
  285. .bss_info_changed = rt2x00mac_bss_info_changed,
  286. .conf_tx = rt2800_conf_tx,
  287. .get_tsf = rt2800_get_tsf,
  288. .rfkill_poll = rt2x00mac_rfkill_poll,
  289. .ampdu_action = rt2800_ampdu_action,
  290. .flush = rt2x00mac_flush,
  291. .get_survey = rt2800_get_survey,
  292. .get_ringparam = rt2x00mac_get_ringparam,
  293. .tx_frames_pending = rt2x00mac_tx_frames_pending,
  294. };
  295. static const struct rt2800_ops rt2800pci_rt2800_ops = {
  296. .register_read = rt2x00mmio_register_read,
  297. .register_read_lock = rt2x00mmio_register_read, /* same for PCI */
  298. .register_write = rt2x00mmio_register_write,
  299. .register_write_lock = rt2x00mmio_register_write, /* same for PCI */
  300. .register_multiread = rt2x00mmio_register_multiread,
  301. .register_multiwrite = rt2x00mmio_register_multiwrite,
  302. .regbusy_read = rt2x00mmio_regbusy_read,
  303. .read_eeprom = rt2800pci_read_eeprom,
  304. .hwcrypt_disabled = rt2800pci_hwcrypt_disabled,
  305. .drv_write_firmware = rt2800pci_write_firmware,
  306. .drv_init_registers = rt2800mmio_init_registers,
  307. .drv_get_txwi = rt2800mmio_get_txwi,
  308. };
  309. static const struct rt2x00lib_ops rt2800pci_rt2x00_ops = {
  310. .irq_handler = rt2800mmio_interrupt,
  311. .txstatus_tasklet = rt2800mmio_txstatus_tasklet,
  312. .pretbtt_tasklet = rt2800mmio_pretbtt_tasklet,
  313. .tbtt_tasklet = rt2800mmio_tbtt_tasklet,
  314. .rxdone_tasklet = rt2800mmio_rxdone_tasklet,
  315. .autowake_tasklet = rt2800mmio_autowake_tasklet,
  316. .probe_hw = rt2800_probe_hw,
  317. .get_firmware_name = rt2800pci_get_firmware_name,
  318. .check_firmware = rt2800_check_firmware,
  319. .load_firmware = rt2800_load_firmware,
  320. .initialize = rt2x00mmio_initialize,
  321. .uninitialize = rt2x00mmio_uninitialize,
  322. .get_entry_state = rt2800mmio_get_entry_state,
  323. .clear_entry = rt2800mmio_clear_entry,
  324. .set_device_state = rt2800pci_set_device_state,
  325. .rfkill_poll = rt2800_rfkill_poll,
  326. .link_stats = rt2800_link_stats,
  327. .reset_tuner = rt2800_reset_tuner,
  328. .link_tuner = rt2800_link_tuner,
  329. .gain_calibration = rt2800_gain_calibration,
  330. .vco_calibration = rt2800_vco_calibration,
  331. .start_queue = rt2800mmio_start_queue,
  332. .kick_queue = rt2800mmio_kick_queue,
  333. .stop_queue = rt2800mmio_stop_queue,
  334. .flush_queue = rt2x00mmio_flush_queue,
  335. .write_tx_desc = rt2800mmio_write_tx_desc,
  336. .write_tx_data = rt2800_write_tx_data,
  337. .write_beacon = rt2800_write_beacon,
  338. .clear_beacon = rt2800_clear_beacon,
  339. .fill_rxdone = rt2800mmio_fill_rxdone,
  340. .config_shared_key = rt2800_config_shared_key,
  341. .config_pairwise_key = rt2800_config_pairwise_key,
  342. .config_filter = rt2800_config_filter,
  343. .config_intf = rt2800_config_intf,
  344. .config_erp = rt2800_config_erp,
  345. .config_ant = rt2800_config_ant,
  346. .config = rt2800_config,
  347. .sta_add = rt2800_sta_add,
  348. .sta_remove = rt2800_sta_remove,
  349. };
  350. static const struct rt2x00_ops rt2800pci_ops = {
  351. .name = KBUILD_MODNAME,
  352. .drv_data_size = sizeof(struct rt2800_drv_data),
  353. .max_ap_intf = 8,
  354. .eeprom_size = EEPROM_SIZE,
  355. .rf_size = RF_SIZE,
  356. .tx_queues = NUM_TX_QUEUES,
  357. .queue_init = rt2800mmio_queue_init,
  358. .lib = &rt2800pci_rt2x00_ops,
  359. .drv = &rt2800pci_rt2800_ops,
  360. .hw = &rt2800pci_mac80211_ops,
  361. #ifdef CONFIG_RT2X00_LIB_DEBUGFS
  362. .debugfs = &rt2800_rt2x00debug,
  363. #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
  364. };
  365. /*
  366. * RT2800pci module information.
  367. */
  368. static DEFINE_PCI_DEVICE_TABLE(rt2800pci_device_table) = {
  369. { PCI_DEVICE(0x1814, 0x0601) },
  370. { PCI_DEVICE(0x1814, 0x0681) },
  371. { PCI_DEVICE(0x1814, 0x0701) },
  372. { PCI_DEVICE(0x1814, 0x0781) },
  373. { PCI_DEVICE(0x1814, 0x3090) },
  374. { PCI_DEVICE(0x1814, 0x3091) },
  375. { PCI_DEVICE(0x1814, 0x3092) },
  376. { PCI_DEVICE(0x1432, 0x7708) },
  377. { PCI_DEVICE(0x1432, 0x7727) },
  378. { PCI_DEVICE(0x1432, 0x7728) },
  379. { PCI_DEVICE(0x1432, 0x7738) },
  380. { PCI_DEVICE(0x1432, 0x7748) },
  381. { PCI_DEVICE(0x1432, 0x7758) },
  382. { PCI_DEVICE(0x1432, 0x7768) },
  383. { PCI_DEVICE(0x1462, 0x891a) },
  384. { PCI_DEVICE(0x1a3b, 0x1059) },
  385. #ifdef CONFIG_RT2800PCI_RT3290
  386. { PCI_DEVICE(0x1814, 0x3290) },
  387. #endif
  388. #ifdef CONFIG_RT2800PCI_RT33XX
  389. { PCI_DEVICE(0x1814, 0x3390) },
  390. #endif
  391. #ifdef CONFIG_RT2800PCI_RT35XX
  392. { PCI_DEVICE(0x1432, 0x7711) },
  393. { PCI_DEVICE(0x1432, 0x7722) },
  394. { PCI_DEVICE(0x1814, 0x3060) },
  395. { PCI_DEVICE(0x1814, 0x3062) },
  396. { PCI_DEVICE(0x1814, 0x3562) },
  397. { PCI_DEVICE(0x1814, 0x3592) },
  398. { PCI_DEVICE(0x1814, 0x3593) },
  399. { PCI_DEVICE(0x1814, 0x359f) },
  400. #endif
  401. #ifdef CONFIG_RT2800PCI_RT53XX
  402. { PCI_DEVICE(0x1814, 0x5360) },
  403. { PCI_DEVICE(0x1814, 0x5362) },
  404. { PCI_DEVICE(0x1814, 0x5390) },
  405. { PCI_DEVICE(0x1814, 0x5392) },
  406. { PCI_DEVICE(0x1814, 0x539a) },
  407. { PCI_DEVICE(0x1814, 0x539b) },
  408. { PCI_DEVICE(0x1814, 0x539f) },
  409. #endif
  410. { 0, }
  411. };
  412. #endif /* CONFIG_PCI */
  413. MODULE_AUTHOR(DRV_PROJECT);
  414. MODULE_VERSION(DRV_VERSION);
  415. MODULE_DESCRIPTION("Ralink RT2800 PCI & PCMCIA Wireless LAN driver.");
  416. MODULE_SUPPORTED_DEVICE("Ralink RT2860 PCI & PCMCIA chipset based cards");
  417. #ifdef CONFIG_PCI
  418. MODULE_FIRMWARE(FIRMWARE_RT2860);
  419. MODULE_DEVICE_TABLE(pci, rt2800pci_device_table);
  420. #endif /* CONFIG_PCI */
  421. MODULE_LICENSE("GPL");
  422. #if defined(CONFIG_SOC_RT288X) || defined(CONFIG_SOC_RT305X)
  423. static int rt2800soc_read_eeprom(struct rt2x00_dev *rt2x00dev)
  424. {
  425. void __iomem *base_addr = ioremap(0x1F040000, EEPROM_SIZE);
  426. if (!base_addr)
  427. return -ENOMEM;
  428. memcpy_fromio(rt2x00dev->eeprom, base_addr, EEPROM_SIZE);
  429. iounmap(base_addr);
  430. return 0;
  431. }
  432. /* Firmware functions */
  433. static char *rt2800soc_get_firmware_name(struct rt2x00_dev *rt2x00dev)
  434. {
  435. WARN_ON_ONCE(1);
  436. return NULL;
  437. }
  438. static int rt2800soc_load_firmware(struct rt2x00_dev *rt2x00dev,
  439. const u8 *data, const size_t len)
  440. {
  441. WARN_ON_ONCE(1);
  442. return 0;
  443. }
  444. static int rt2800soc_check_firmware(struct rt2x00_dev *rt2x00dev,
  445. const u8 *data, const size_t len)
  446. {
  447. WARN_ON_ONCE(1);
  448. return 0;
  449. }
  450. static int rt2800soc_write_firmware(struct rt2x00_dev *rt2x00dev,
  451. const u8 *data, const size_t len)
  452. {
  453. WARN_ON_ONCE(1);
  454. return 0;
  455. }
  456. static const struct ieee80211_ops rt2800soc_mac80211_ops = {
  457. .tx = rt2x00mac_tx,
  458. .start = rt2x00mac_start,
  459. .stop = rt2x00mac_stop,
  460. .add_interface = rt2x00mac_add_interface,
  461. .remove_interface = rt2x00mac_remove_interface,
  462. .config = rt2x00mac_config,
  463. .configure_filter = rt2x00mac_configure_filter,
  464. .set_key = rt2x00mac_set_key,
  465. .sw_scan_start = rt2x00mac_sw_scan_start,
  466. .sw_scan_complete = rt2x00mac_sw_scan_complete,
  467. .get_stats = rt2x00mac_get_stats,
  468. .get_tkip_seq = rt2800_get_tkip_seq,
  469. .set_rts_threshold = rt2800_set_rts_threshold,
  470. .sta_add = rt2x00mac_sta_add,
  471. .sta_remove = rt2x00mac_sta_remove,
  472. .bss_info_changed = rt2x00mac_bss_info_changed,
  473. .conf_tx = rt2800_conf_tx,
  474. .get_tsf = rt2800_get_tsf,
  475. .rfkill_poll = rt2x00mac_rfkill_poll,
  476. .ampdu_action = rt2800_ampdu_action,
  477. .flush = rt2x00mac_flush,
  478. .get_survey = rt2800_get_survey,
  479. .get_ringparam = rt2x00mac_get_ringparam,
  480. .tx_frames_pending = rt2x00mac_tx_frames_pending,
  481. };
  482. static const struct rt2800_ops rt2800soc_rt2800_ops = {
  483. .register_read = rt2x00mmio_register_read,
  484. .register_read_lock = rt2x00mmio_register_read, /* same for SoCs */
  485. .register_write = rt2x00mmio_register_write,
  486. .register_write_lock = rt2x00mmio_register_write, /* same for SoCs */
  487. .register_multiread = rt2x00mmio_register_multiread,
  488. .register_multiwrite = rt2x00mmio_register_multiwrite,
  489. .regbusy_read = rt2x00mmio_regbusy_read,
  490. .read_eeprom = rt2800soc_read_eeprom,
  491. .hwcrypt_disabled = rt2800pci_hwcrypt_disabled,
  492. .drv_write_firmware = rt2800soc_write_firmware,
  493. .drv_init_registers = rt2800mmio_init_registers,
  494. .drv_get_txwi = rt2800mmio_get_txwi,
  495. };
  496. static const struct rt2x00lib_ops rt2800soc_rt2x00_ops = {
  497. .irq_handler = rt2800mmio_interrupt,
  498. .txstatus_tasklet = rt2800mmio_txstatus_tasklet,
  499. .pretbtt_tasklet = rt2800mmio_pretbtt_tasklet,
  500. .tbtt_tasklet = rt2800mmio_tbtt_tasklet,
  501. .rxdone_tasklet = rt2800mmio_rxdone_tasklet,
  502. .autowake_tasklet = rt2800mmio_autowake_tasklet,
  503. .probe_hw = rt2800_probe_hw,
  504. .get_firmware_name = rt2800soc_get_firmware_name,
  505. .check_firmware = rt2800soc_check_firmware,
  506. .load_firmware = rt2800soc_load_firmware,
  507. .initialize = rt2x00mmio_initialize,
  508. .uninitialize = rt2x00mmio_uninitialize,
  509. .get_entry_state = rt2800mmio_get_entry_state,
  510. .clear_entry = rt2800mmio_clear_entry,
  511. .set_device_state = rt2800pci_set_device_state,
  512. .rfkill_poll = rt2800_rfkill_poll,
  513. .link_stats = rt2800_link_stats,
  514. .reset_tuner = rt2800_reset_tuner,
  515. .link_tuner = rt2800_link_tuner,
  516. .gain_calibration = rt2800_gain_calibration,
  517. .vco_calibration = rt2800_vco_calibration,
  518. .start_queue = rt2800mmio_start_queue,
  519. .kick_queue = rt2800mmio_kick_queue,
  520. .stop_queue = rt2800mmio_stop_queue,
  521. .flush_queue = rt2x00mmio_flush_queue,
  522. .write_tx_desc = rt2800mmio_write_tx_desc,
  523. .write_tx_data = rt2800_write_tx_data,
  524. .write_beacon = rt2800_write_beacon,
  525. .clear_beacon = rt2800_clear_beacon,
  526. .fill_rxdone = rt2800mmio_fill_rxdone,
  527. .config_shared_key = rt2800_config_shared_key,
  528. .config_pairwise_key = rt2800_config_pairwise_key,
  529. .config_filter = rt2800_config_filter,
  530. .config_intf = rt2800_config_intf,
  531. .config_erp = rt2800_config_erp,
  532. .config_ant = rt2800_config_ant,
  533. .config = rt2800_config,
  534. .sta_add = rt2800_sta_add,
  535. .sta_remove = rt2800_sta_remove,
  536. };
  537. static const struct rt2x00_ops rt2800soc_ops = {
  538. .name = KBUILD_MODNAME,
  539. .drv_data_size = sizeof(struct rt2800_drv_data),
  540. .max_ap_intf = 8,
  541. .eeprom_size = EEPROM_SIZE,
  542. .rf_size = RF_SIZE,
  543. .tx_queues = NUM_TX_QUEUES,
  544. .queue_init = rt2800mmio_queue_init,
  545. .lib = &rt2800soc_rt2x00_ops,
  546. .drv = &rt2800soc_rt2800_ops,
  547. .hw = &rt2800soc_mac80211_ops,
  548. #ifdef CONFIG_RT2X00_LIB_DEBUGFS
  549. .debugfs = &rt2800_rt2x00debug,
  550. #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
  551. };
  552. static int rt2800soc_probe(struct platform_device *pdev)
  553. {
  554. return rt2x00soc_probe(pdev, &rt2800soc_ops);
  555. }
  556. static struct platform_driver rt2800soc_driver = {
  557. .driver = {
  558. .name = "rt2800_wmac",
  559. .owner = THIS_MODULE,
  560. .mod_name = KBUILD_MODNAME,
  561. },
  562. .probe = rt2800soc_probe,
  563. .remove = rt2x00soc_remove,
  564. .suspend = rt2x00soc_suspend,
  565. .resume = rt2x00soc_resume,
  566. };
  567. #endif /* CONFIG_SOC_RT288X || CONFIG_SOC_RT305X */
  568. #ifdef CONFIG_PCI
  569. static int rt2800pci_probe(struct pci_dev *pci_dev,
  570. const struct pci_device_id *id)
  571. {
  572. return rt2x00pci_probe(pci_dev, &rt2800pci_ops);
  573. }
  574. static struct pci_driver rt2800pci_driver = {
  575. .name = KBUILD_MODNAME,
  576. .id_table = rt2800pci_device_table,
  577. .probe = rt2800pci_probe,
  578. .remove = rt2x00pci_remove,
  579. .suspend = rt2x00pci_suspend,
  580. .resume = rt2x00pci_resume,
  581. };
  582. #endif /* CONFIG_PCI */
  583. static int __init rt2800pci_init(void)
  584. {
  585. int ret = 0;
  586. #if defined(CONFIG_SOC_RT288X) || defined(CONFIG_SOC_RT305X)
  587. ret = platform_driver_register(&rt2800soc_driver);
  588. if (ret)
  589. return ret;
  590. #endif
  591. #ifdef CONFIG_PCI
  592. ret = pci_register_driver(&rt2800pci_driver);
  593. if (ret) {
  594. #if defined(CONFIG_SOC_RT288X) || defined(CONFIG_SOC_RT305X)
  595. platform_driver_unregister(&rt2800soc_driver);
  596. #endif
  597. return ret;
  598. }
  599. #endif
  600. return ret;
  601. }
  602. static void __exit rt2800pci_exit(void)
  603. {
  604. #ifdef CONFIG_PCI
  605. pci_unregister_driver(&rt2800pci_driver);
  606. #endif
  607. #if defined(CONFIG_SOC_RT288X) || defined(CONFIG_SOC_RT305X)
  608. platform_driver_unregister(&rt2800soc_driver);
  609. #endif
  610. }
  611. module_init(rt2800pci_init);
  612. module_exit(rt2800pci_exit);