main.c 55 KB

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  1. /*
  2. * Copyright (c) 2008-2009 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include "ath9k.h"
  18. #include "btcoex.h"
  19. static void ath_cache_conf_rate(struct ath_softc *sc,
  20. struct ieee80211_conf *conf)
  21. {
  22. switch (conf->channel->band) {
  23. case IEEE80211_BAND_2GHZ:
  24. if (conf_is_ht20(conf))
  25. sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
  26. else if (conf_is_ht40_minus(conf))
  27. sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
  28. else if (conf_is_ht40_plus(conf))
  29. sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
  30. else
  31. sc->cur_rate_mode = ATH9K_MODE_11G;
  32. break;
  33. case IEEE80211_BAND_5GHZ:
  34. if (conf_is_ht20(conf))
  35. sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
  36. else if (conf_is_ht40_minus(conf))
  37. sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
  38. else if (conf_is_ht40_plus(conf))
  39. sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
  40. else
  41. sc->cur_rate_mode = ATH9K_MODE_11A;
  42. break;
  43. default:
  44. BUG_ON(1);
  45. break;
  46. }
  47. }
  48. static void ath_update_txpow(struct ath_softc *sc)
  49. {
  50. struct ath_hw *ah = sc->sc_ah;
  51. if (sc->curtxpow != sc->config.txpowlimit) {
  52. ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  53. /* read back in case value is clamped */
  54. sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  55. }
  56. }
  57. static u8 parse_mpdudensity(u8 mpdudensity)
  58. {
  59. /*
  60. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  61. * 0 for no restriction
  62. * 1 for 1/4 us
  63. * 2 for 1/2 us
  64. * 3 for 1 us
  65. * 4 for 2 us
  66. * 5 for 4 us
  67. * 6 for 8 us
  68. * 7 for 16 us
  69. */
  70. switch (mpdudensity) {
  71. case 0:
  72. return 0;
  73. case 1:
  74. case 2:
  75. case 3:
  76. /* Our lower layer calculations limit our precision to
  77. 1 microsecond */
  78. return 1;
  79. case 4:
  80. return 2;
  81. case 5:
  82. return 4;
  83. case 6:
  84. return 8;
  85. case 7:
  86. return 16;
  87. default:
  88. return 0;
  89. }
  90. }
  91. static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  92. struct ieee80211_hw *hw)
  93. {
  94. struct ieee80211_channel *curchan = hw->conf.channel;
  95. struct ath9k_channel *channel;
  96. u8 chan_idx;
  97. chan_idx = curchan->hw_value;
  98. channel = &sc->sc_ah->channels[chan_idx];
  99. ath9k_update_ichannel(sc, hw, channel);
  100. return channel;
  101. }
  102. bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  103. {
  104. unsigned long flags;
  105. bool ret;
  106. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  107. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  108. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  109. return ret;
  110. }
  111. void ath9k_ps_wakeup(struct ath_softc *sc)
  112. {
  113. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  114. unsigned long flags;
  115. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  116. if (++sc->ps_usecount != 1)
  117. goto unlock;
  118. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  119. /*
  120. * While the hardware is asleep, the cycle counters contain no
  121. * useful data. Better clear them now so that they don't mess up
  122. * survey data results.
  123. */
  124. spin_lock(&common->cc_lock);
  125. ath_hw_cycle_counters_update(common);
  126. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  127. spin_unlock(&common->cc_lock);
  128. unlock:
  129. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  130. }
  131. void ath9k_ps_restore(struct ath_softc *sc)
  132. {
  133. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  134. unsigned long flags;
  135. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  136. if (--sc->ps_usecount != 0)
  137. goto unlock;
  138. spin_lock(&common->cc_lock);
  139. ath_hw_cycle_counters_update(common);
  140. spin_unlock(&common->cc_lock);
  141. if (sc->ps_idle)
  142. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
  143. else if (sc->ps_enabled &&
  144. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  145. PS_WAIT_FOR_CAB |
  146. PS_WAIT_FOR_PSPOLL_DATA |
  147. PS_WAIT_FOR_TX_ACK)))
  148. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
  149. unlock:
  150. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  151. }
  152. static void ath_start_ani(struct ath_common *common)
  153. {
  154. struct ath_hw *ah = common->ah;
  155. unsigned long timestamp = jiffies_to_msecs(jiffies);
  156. struct ath_softc *sc = (struct ath_softc *) common->priv;
  157. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  158. return;
  159. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  160. return;
  161. common->ani.longcal_timer = timestamp;
  162. common->ani.shortcal_timer = timestamp;
  163. common->ani.checkani_timer = timestamp;
  164. mod_timer(&common->ani.timer,
  165. jiffies +
  166. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  167. }
  168. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  169. {
  170. struct ath_hw *ah = sc->sc_ah;
  171. struct ath9k_channel *chan = &ah->channels[channel];
  172. struct survey_info *survey = &sc->survey[channel];
  173. if (chan->noisefloor) {
  174. survey->filled |= SURVEY_INFO_NOISE_DBM;
  175. survey->noise = chan->noisefloor;
  176. }
  177. }
  178. static void ath_update_survey_stats(struct ath_softc *sc)
  179. {
  180. struct ath_hw *ah = sc->sc_ah;
  181. struct ath_common *common = ath9k_hw_common(ah);
  182. int pos = ah->curchan - &ah->channels[0];
  183. struct survey_info *survey = &sc->survey[pos];
  184. struct ath_cycle_counters *cc = &common->cc_survey;
  185. unsigned int div = common->clockrate * 1000;
  186. if (ah->power_mode == ATH9K_PM_AWAKE)
  187. ath_hw_cycle_counters_update(common);
  188. if (cc->cycles > 0) {
  189. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  190. SURVEY_INFO_CHANNEL_TIME_BUSY |
  191. SURVEY_INFO_CHANNEL_TIME_RX |
  192. SURVEY_INFO_CHANNEL_TIME_TX;
  193. survey->channel_time += cc->cycles / div;
  194. survey->channel_time_busy += cc->rx_busy / div;
  195. survey->channel_time_rx += cc->rx_frame / div;
  196. survey->channel_time_tx += cc->tx_frame / div;
  197. }
  198. memset(cc, 0, sizeof(*cc));
  199. ath_update_survey_nf(sc, pos);
  200. }
  201. /*
  202. * Set/change channels. If the channel is really being changed, it's done
  203. * by reseting the chip. To accomplish this we must first cleanup any pending
  204. * DMA, then restart stuff.
  205. */
  206. int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  207. struct ath9k_channel *hchan)
  208. {
  209. struct ath_wiphy *aphy = hw->priv;
  210. struct ath_hw *ah = sc->sc_ah;
  211. struct ath_common *common = ath9k_hw_common(ah);
  212. struct ieee80211_conf *conf = &common->hw->conf;
  213. bool fastcc = true, stopped;
  214. struct ieee80211_channel *channel = hw->conf.channel;
  215. struct ath9k_hw_cal_data *caldata = NULL;
  216. int r;
  217. if (sc->sc_flags & SC_OP_INVALID)
  218. return -EIO;
  219. del_timer_sync(&common->ani.timer);
  220. cancel_work_sync(&sc->paprd_work);
  221. cancel_work_sync(&sc->hw_check_work);
  222. cancel_delayed_work_sync(&sc->tx_complete_work);
  223. ath9k_ps_wakeup(sc);
  224. /*
  225. * This is only performed if the channel settings have
  226. * actually changed.
  227. *
  228. * To switch channels clear any pending DMA operations;
  229. * wait long enough for the RX fifo to drain, reset the
  230. * hardware at the new frequency, and then re-enable
  231. * the relevant bits of the h/w.
  232. */
  233. ath9k_hw_set_interrupts(ah, 0);
  234. ath_drain_all_txq(sc, false);
  235. stopped = ath_stoprecv(sc);
  236. /* XXX: do not flush receive queue here. We don't want
  237. * to flush data frames already in queue because of
  238. * changing channel. */
  239. if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
  240. fastcc = false;
  241. if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
  242. caldata = &aphy->caldata;
  243. ath_print(common, ATH_DBG_CONFIG,
  244. "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
  245. sc->sc_ah->curchan->channel,
  246. channel->center_freq, conf_is_ht40(conf),
  247. fastcc);
  248. spin_lock_bh(&sc->sc_resetlock);
  249. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  250. if (r) {
  251. ath_print(common, ATH_DBG_FATAL,
  252. "Unable to reset channel (%u MHz), "
  253. "reset status %d\n",
  254. channel->center_freq, r);
  255. spin_unlock_bh(&sc->sc_resetlock);
  256. goto ps_restore;
  257. }
  258. spin_unlock_bh(&sc->sc_resetlock);
  259. if (ath_startrecv(sc) != 0) {
  260. ath_print(common, ATH_DBG_FATAL,
  261. "Unable to restart recv logic\n");
  262. r = -EIO;
  263. goto ps_restore;
  264. }
  265. ath_cache_conf_rate(sc, &hw->conf);
  266. ath_update_txpow(sc);
  267. ath9k_hw_set_interrupts(ah, ah->imask);
  268. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
  269. ath_beacon_config(sc, NULL);
  270. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  271. ath_start_ani(common);
  272. }
  273. ps_restore:
  274. ath9k_ps_restore(sc);
  275. return r;
  276. }
  277. static void ath_paprd_activate(struct ath_softc *sc)
  278. {
  279. struct ath_hw *ah = sc->sc_ah;
  280. struct ath9k_hw_cal_data *caldata = ah->caldata;
  281. struct ath_common *common = ath9k_hw_common(ah);
  282. int chain;
  283. if (!caldata || !caldata->paprd_done)
  284. return;
  285. ath9k_ps_wakeup(sc);
  286. ar9003_paprd_enable(ah, false);
  287. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  288. if (!(common->tx_chainmask & BIT(chain)))
  289. continue;
  290. ar9003_paprd_populate_single_table(ah, caldata, chain);
  291. }
  292. ar9003_paprd_enable(ah, true);
  293. ath9k_ps_restore(sc);
  294. }
  295. void ath_paprd_calibrate(struct work_struct *work)
  296. {
  297. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  298. struct ieee80211_hw *hw = sc->hw;
  299. struct ath_hw *ah = sc->sc_ah;
  300. struct ieee80211_hdr *hdr;
  301. struct sk_buff *skb = NULL;
  302. struct ieee80211_tx_info *tx_info;
  303. int band = hw->conf.channel->band;
  304. struct ieee80211_supported_band *sband = &sc->sbands[band];
  305. struct ath_tx_control txctl;
  306. struct ath9k_hw_cal_data *caldata = ah->caldata;
  307. struct ath_common *common = ath9k_hw_common(ah);
  308. int qnum, ftype;
  309. int chain_ok = 0;
  310. int chain;
  311. int len = 1800;
  312. int time_left;
  313. int i;
  314. if (!caldata)
  315. return;
  316. skb = alloc_skb(len, GFP_KERNEL);
  317. if (!skb)
  318. return;
  319. tx_info = IEEE80211_SKB_CB(skb);
  320. skb_put(skb, len);
  321. memset(skb->data, 0, len);
  322. hdr = (struct ieee80211_hdr *)skb->data;
  323. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  324. hdr->frame_control = cpu_to_le16(ftype);
  325. hdr->duration_id = cpu_to_le16(10);
  326. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  327. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  328. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  329. memset(&txctl, 0, sizeof(txctl));
  330. qnum = sc->tx.hwq_map[WME_AC_BE];
  331. txctl.txq = &sc->tx.txq[qnum];
  332. ath9k_ps_wakeup(sc);
  333. ar9003_paprd_init_table(ah);
  334. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  335. if (!(common->tx_chainmask & BIT(chain)))
  336. continue;
  337. chain_ok = 0;
  338. memset(tx_info, 0, sizeof(*tx_info));
  339. tx_info->band = band;
  340. for (i = 0; i < 4; i++) {
  341. tx_info->control.rates[i].idx = sband->n_bitrates - 1;
  342. tx_info->control.rates[i].count = 6;
  343. }
  344. init_completion(&sc->paprd_complete);
  345. ar9003_paprd_setup_gain_table(ah, chain);
  346. txctl.paprd = BIT(chain);
  347. if (ath_tx_start(hw, skb, &txctl) != 0)
  348. break;
  349. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  350. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  351. if (!time_left) {
  352. ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
  353. "Timeout waiting for paprd training on "
  354. "TX chain %d\n",
  355. chain);
  356. goto fail_paprd;
  357. }
  358. if (!ar9003_paprd_is_done(ah))
  359. break;
  360. if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
  361. break;
  362. chain_ok = 1;
  363. }
  364. kfree_skb(skb);
  365. if (chain_ok) {
  366. caldata->paprd_done = true;
  367. ath_paprd_activate(sc);
  368. }
  369. fail_paprd:
  370. ath9k_ps_restore(sc);
  371. }
  372. /*
  373. * This routine performs the periodic noise floor calibration function
  374. * that is used to adjust and optimize the chip performance. This
  375. * takes environmental changes (location, temperature) into account.
  376. * When the task is complete, it reschedules itself depending on the
  377. * appropriate interval that was calculated.
  378. */
  379. void ath_ani_calibrate(unsigned long data)
  380. {
  381. struct ath_softc *sc = (struct ath_softc *)data;
  382. struct ath_hw *ah = sc->sc_ah;
  383. struct ath_common *common = ath9k_hw_common(ah);
  384. bool longcal = false;
  385. bool shortcal = false;
  386. bool aniflag = false;
  387. unsigned int timestamp = jiffies_to_msecs(jiffies);
  388. u32 cal_interval, short_cal_interval, long_cal_interval;
  389. unsigned long flags;
  390. if (ah->caldata && ah->caldata->nfcal_interference)
  391. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  392. else
  393. long_cal_interval = ATH_LONG_CALINTERVAL;
  394. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  395. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  396. /* Only calibrate if awake */
  397. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  398. goto set_timer;
  399. ath9k_ps_wakeup(sc);
  400. /* Long calibration runs independently of short calibration. */
  401. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  402. longcal = true;
  403. ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
  404. common->ani.longcal_timer = timestamp;
  405. }
  406. /* Short calibration applies only while caldone is false */
  407. if (!common->ani.caldone) {
  408. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  409. shortcal = true;
  410. ath_print(common, ATH_DBG_ANI,
  411. "shortcal @%lu\n", jiffies);
  412. common->ani.shortcal_timer = timestamp;
  413. common->ani.resetcal_timer = timestamp;
  414. }
  415. } else {
  416. if ((timestamp - common->ani.resetcal_timer) >=
  417. ATH_RESTART_CALINTERVAL) {
  418. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  419. if (common->ani.caldone)
  420. common->ani.resetcal_timer = timestamp;
  421. }
  422. }
  423. /* Verify whether we must check ANI */
  424. if ((timestamp - common->ani.checkani_timer) >=
  425. ah->config.ani_poll_interval) {
  426. aniflag = true;
  427. common->ani.checkani_timer = timestamp;
  428. }
  429. /* Skip all processing if there's nothing to do. */
  430. if (longcal || shortcal || aniflag) {
  431. /* Call ANI routine if necessary */
  432. if (aniflag) {
  433. spin_lock_irqsave(&common->cc_lock, flags);
  434. ath9k_hw_ani_monitor(ah, ah->curchan);
  435. ath_update_survey_stats(sc);
  436. spin_unlock_irqrestore(&common->cc_lock, flags);
  437. }
  438. /* Perform calibration if necessary */
  439. if (longcal || shortcal) {
  440. common->ani.caldone =
  441. ath9k_hw_calibrate(ah,
  442. ah->curchan,
  443. common->rx_chainmask,
  444. longcal);
  445. }
  446. }
  447. ath9k_ps_restore(sc);
  448. set_timer:
  449. /*
  450. * Set timer interval based on previous results.
  451. * The interval must be the shortest necessary to satisfy ANI,
  452. * short calibration and long calibration.
  453. */
  454. cal_interval = ATH_LONG_CALINTERVAL;
  455. if (sc->sc_ah->config.enable_ani)
  456. cal_interval = min(cal_interval,
  457. (u32)ah->config.ani_poll_interval);
  458. if (!common->ani.caldone)
  459. cal_interval = min(cal_interval, (u32)short_cal_interval);
  460. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  461. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  462. if (!ah->caldata->paprd_done)
  463. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  464. else
  465. ath_paprd_activate(sc);
  466. }
  467. }
  468. /*
  469. * Update tx/rx chainmask. For legacy association,
  470. * hard code chainmask to 1x1, for 11n association, use
  471. * the chainmask configuration, for bt coexistence, use
  472. * the chainmask configuration even in legacy mode.
  473. */
  474. void ath_update_chainmask(struct ath_softc *sc, int is_ht)
  475. {
  476. struct ath_hw *ah = sc->sc_ah;
  477. struct ath_common *common = ath9k_hw_common(ah);
  478. if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
  479. (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
  480. common->tx_chainmask = ah->caps.tx_chainmask;
  481. common->rx_chainmask = ah->caps.rx_chainmask;
  482. } else {
  483. common->tx_chainmask = 1;
  484. common->rx_chainmask = 1;
  485. }
  486. ath_print(common, ATH_DBG_CONFIG,
  487. "tx chmask: %d, rx chmask: %d\n",
  488. common->tx_chainmask,
  489. common->rx_chainmask);
  490. }
  491. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
  492. {
  493. struct ath_node *an;
  494. an = (struct ath_node *)sta->drv_priv;
  495. if (sc->sc_flags & SC_OP_TXAGGR) {
  496. ath_tx_node_init(sc, an);
  497. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  498. sta->ht_cap.ampdu_factor);
  499. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  500. an->last_rssi = ATH_RSSI_DUMMY_MARKER;
  501. }
  502. }
  503. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  504. {
  505. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  506. if (sc->sc_flags & SC_OP_TXAGGR)
  507. ath_tx_node_cleanup(sc, an);
  508. }
  509. void ath_hw_check(struct work_struct *work)
  510. {
  511. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  512. int i;
  513. ath9k_ps_wakeup(sc);
  514. for (i = 0; i < 3; i++) {
  515. if (ath9k_hw_check_alive(sc->sc_ah))
  516. goto out;
  517. msleep(1);
  518. }
  519. ath_reset(sc, false);
  520. out:
  521. ath9k_ps_restore(sc);
  522. }
  523. void ath9k_tasklet(unsigned long data)
  524. {
  525. struct ath_softc *sc = (struct ath_softc *)data;
  526. struct ath_hw *ah = sc->sc_ah;
  527. struct ath_common *common = ath9k_hw_common(ah);
  528. u32 status = sc->intrstatus;
  529. u32 rxmask;
  530. ath9k_ps_wakeup(sc);
  531. if (status & ATH9K_INT_FATAL) {
  532. ath_reset(sc, false);
  533. ath9k_ps_restore(sc);
  534. return;
  535. }
  536. if (!ath9k_hw_check_alive(ah))
  537. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  538. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  539. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  540. ATH9K_INT_RXORN);
  541. else
  542. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  543. if (status & rxmask) {
  544. spin_lock_bh(&sc->rx.rxflushlock);
  545. /* Check for high priority Rx first */
  546. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  547. (status & ATH9K_INT_RXHP))
  548. ath_rx_tasklet(sc, 0, true);
  549. ath_rx_tasklet(sc, 0, false);
  550. spin_unlock_bh(&sc->rx.rxflushlock);
  551. }
  552. if (status & ATH9K_INT_TX) {
  553. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  554. ath_tx_edma_tasklet(sc);
  555. else
  556. ath_tx_tasklet(sc);
  557. }
  558. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  559. /*
  560. * TSF sync does not look correct; remain awake to sync with
  561. * the next Beacon.
  562. */
  563. ath_print(common, ATH_DBG_PS,
  564. "TSFOOR - Sync with next Beacon\n");
  565. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  566. }
  567. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  568. if (status & ATH9K_INT_GENTIMER)
  569. ath_gen_timer_isr(sc->sc_ah);
  570. /* re-enable hardware interrupt */
  571. ath9k_hw_set_interrupts(ah, ah->imask);
  572. ath9k_ps_restore(sc);
  573. }
  574. irqreturn_t ath_isr(int irq, void *dev)
  575. {
  576. #define SCHED_INTR ( \
  577. ATH9K_INT_FATAL | \
  578. ATH9K_INT_RXORN | \
  579. ATH9K_INT_RXEOL | \
  580. ATH9K_INT_RX | \
  581. ATH9K_INT_RXLP | \
  582. ATH9K_INT_RXHP | \
  583. ATH9K_INT_TX | \
  584. ATH9K_INT_BMISS | \
  585. ATH9K_INT_CST | \
  586. ATH9K_INT_TSFOOR | \
  587. ATH9K_INT_GENTIMER)
  588. struct ath_softc *sc = dev;
  589. struct ath_hw *ah = sc->sc_ah;
  590. struct ath_common *common = ath9k_hw_common(ah);
  591. enum ath9k_int status;
  592. bool sched = false;
  593. /*
  594. * The hardware is not ready/present, don't
  595. * touch anything. Note this can happen early
  596. * on if the IRQ is shared.
  597. */
  598. if (sc->sc_flags & SC_OP_INVALID)
  599. return IRQ_NONE;
  600. /* shared irq, not for us */
  601. if (!ath9k_hw_intrpend(ah))
  602. return IRQ_NONE;
  603. /*
  604. * Figure out the reason(s) for the interrupt. Note
  605. * that the hal returns a pseudo-ISR that may include
  606. * bits we haven't explicitly enabled so we mask the
  607. * value to insure we only process bits we requested.
  608. */
  609. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  610. status &= ah->imask; /* discard unasked-for bits */
  611. /*
  612. * If there are no status bits set, then this interrupt was not
  613. * for me (should have been caught above).
  614. */
  615. if (!status)
  616. return IRQ_NONE;
  617. /* Cache the status */
  618. sc->intrstatus = status;
  619. if (status & SCHED_INTR)
  620. sched = true;
  621. /*
  622. * If a FATAL or RXORN interrupt is received, we have to reset the
  623. * chip immediately.
  624. */
  625. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  626. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  627. goto chip_reset;
  628. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  629. (status & ATH9K_INT_BB_WATCHDOG)) {
  630. spin_lock(&common->cc_lock);
  631. ath_hw_cycle_counters_update(common);
  632. ar9003_hw_bb_watchdog_dbg_info(ah);
  633. spin_unlock(&common->cc_lock);
  634. goto chip_reset;
  635. }
  636. if (status & ATH9K_INT_SWBA)
  637. tasklet_schedule(&sc->bcon_tasklet);
  638. if (status & ATH9K_INT_TXURN)
  639. ath9k_hw_updatetxtriglevel(ah, true);
  640. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  641. if (status & ATH9K_INT_RXEOL) {
  642. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  643. ath9k_hw_set_interrupts(ah, ah->imask);
  644. }
  645. }
  646. if (status & ATH9K_INT_MIB) {
  647. /*
  648. * Disable interrupts until we service the MIB
  649. * interrupt; otherwise it will continue to
  650. * fire.
  651. */
  652. ath9k_hw_set_interrupts(ah, 0);
  653. /*
  654. * Let the hal handle the event. We assume
  655. * it will clear whatever condition caused
  656. * the interrupt.
  657. */
  658. ath9k_hw_proc_mib_event(ah);
  659. ath9k_hw_set_interrupts(ah, ah->imask);
  660. }
  661. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  662. if (status & ATH9K_INT_TIM_TIMER) {
  663. /* Clear RxAbort bit so that we can
  664. * receive frames */
  665. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  666. ath9k_hw_setrxabort(sc->sc_ah, 0);
  667. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  668. }
  669. chip_reset:
  670. ath_debug_stat_interrupt(sc, status);
  671. if (sched) {
  672. /* turn off every interrupt except SWBA */
  673. ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
  674. tasklet_schedule(&sc->intr_tq);
  675. }
  676. return IRQ_HANDLED;
  677. #undef SCHED_INTR
  678. }
  679. static u32 ath_get_extchanmode(struct ath_softc *sc,
  680. struct ieee80211_channel *chan,
  681. enum nl80211_channel_type channel_type)
  682. {
  683. u32 chanmode = 0;
  684. switch (chan->band) {
  685. case IEEE80211_BAND_2GHZ:
  686. switch(channel_type) {
  687. case NL80211_CHAN_NO_HT:
  688. case NL80211_CHAN_HT20:
  689. chanmode = CHANNEL_G_HT20;
  690. break;
  691. case NL80211_CHAN_HT40PLUS:
  692. chanmode = CHANNEL_G_HT40PLUS;
  693. break;
  694. case NL80211_CHAN_HT40MINUS:
  695. chanmode = CHANNEL_G_HT40MINUS;
  696. break;
  697. }
  698. break;
  699. case IEEE80211_BAND_5GHZ:
  700. switch(channel_type) {
  701. case NL80211_CHAN_NO_HT:
  702. case NL80211_CHAN_HT20:
  703. chanmode = CHANNEL_A_HT20;
  704. break;
  705. case NL80211_CHAN_HT40PLUS:
  706. chanmode = CHANNEL_A_HT40PLUS;
  707. break;
  708. case NL80211_CHAN_HT40MINUS:
  709. chanmode = CHANNEL_A_HT40MINUS;
  710. break;
  711. }
  712. break;
  713. default:
  714. break;
  715. }
  716. return chanmode;
  717. }
  718. static void ath9k_bss_assoc_info(struct ath_softc *sc,
  719. struct ieee80211_vif *vif,
  720. struct ieee80211_bss_conf *bss_conf)
  721. {
  722. struct ath_hw *ah = sc->sc_ah;
  723. struct ath_common *common = ath9k_hw_common(ah);
  724. if (bss_conf->assoc) {
  725. ath_print(common, ATH_DBG_CONFIG,
  726. "Bss Info ASSOC %d, bssid: %pM\n",
  727. bss_conf->aid, common->curbssid);
  728. /* New association, store aid */
  729. common->curaid = bss_conf->aid;
  730. ath9k_hw_write_associd(ah);
  731. /*
  732. * Request a re-configuration of Beacon related timers
  733. * on the receipt of the first Beacon frame (i.e.,
  734. * after time sync with the AP).
  735. */
  736. sc->ps_flags |= PS_BEACON_SYNC;
  737. /* Configure the beacon */
  738. ath_beacon_config(sc, vif);
  739. /* Reset rssi stats */
  740. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  741. sc->sc_flags |= SC_OP_ANI_RUN;
  742. ath_start_ani(common);
  743. } else {
  744. ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
  745. common->curaid = 0;
  746. /* Stop ANI */
  747. sc->sc_flags &= ~SC_OP_ANI_RUN;
  748. del_timer_sync(&common->ani.timer);
  749. }
  750. }
  751. void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
  752. {
  753. struct ath_hw *ah = sc->sc_ah;
  754. struct ath_common *common = ath9k_hw_common(ah);
  755. struct ieee80211_channel *channel = hw->conf.channel;
  756. int r;
  757. ath9k_ps_wakeup(sc);
  758. ath9k_hw_configpcipowersave(ah, 0, 0);
  759. if (!ah->curchan)
  760. ah->curchan = ath_get_curchannel(sc, sc->hw);
  761. spin_lock_bh(&sc->sc_resetlock);
  762. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  763. if (r) {
  764. ath_print(common, ATH_DBG_FATAL,
  765. "Unable to reset channel (%u MHz), "
  766. "reset status %d\n",
  767. channel->center_freq, r);
  768. }
  769. spin_unlock_bh(&sc->sc_resetlock);
  770. ath_update_txpow(sc);
  771. if (ath_startrecv(sc) != 0) {
  772. ath_print(common, ATH_DBG_FATAL,
  773. "Unable to restart recv logic\n");
  774. return;
  775. }
  776. if (sc->sc_flags & SC_OP_BEACONS)
  777. ath_beacon_config(sc, NULL); /* restart beacons */
  778. /* Re-Enable interrupts */
  779. ath9k_hw_set_interrupts(ah, ah->imask);
  780. /* Enable LED */
  781. ath9k_hw_cfg_output(ah, ah->led_pin,
  782. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  783. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  784. ieee80211_wake_queues(hw);
  785. ath9k_ps_restore(sc);
  786. }
  787. void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
  788. {
  789. struct ath_hw *ah = sc->sc_ah;
  790. struct ieee80211_channel *channel = hw->conf.channel;
  791. int r;
  792. ath9k_ps_wakeup(sc);
  793. ieee80211_stop_queues(hw);
  794. /*
  795. * Keep the LED on when the radio is disabled
  796. * during idle unassociated state.
  797. */
  798. if (!sc->ps_idle) {
  799. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  800. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  801. }
  802. /* Disable interrupts */
  803. ath9k_hw_set_interrupts(ah, 0);
  804. ath_drain_all_txq(sc, false); /* clear pending tx frames */
  805. ath_stoprecv(sc); /* turn off frame recv */
  806. ath_flushrecv(sc); /* flush recv queue */
  807. if (!ah->curchan)
  808. ah->curchan = ath_get_curchannel(sc, hw);
  809. spin_lock_bh(&sc->sc_resetlock);
  810. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  811. if (r) {
  812. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
  813. "Unable to reset channel (%u MHz), "
  814. "reset status %d\n",
  815. channel->center_freq, r);
  816. }
  817. spin_unlock_bh(&sc->sc_resetlock);
  818. ath9k_hw_phy_disable(ah);
  819. ath9k_hw_configpcipowersave(ah, 1, 1);
  820. ath9k_ps_restore(sc);
  821. ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
  822. }
  823. int ath_reset(struct ath_softc *sc, bool retry_tx)
  824. {
  825. struct ath_hw *ah = sc->sc_ah;
  826. struct ath_common *common = ath9k_hw_common(ah);
  827. struct ieee80211_hw *hw = sc->hw;
  828. int r;
  829. /* Stop ANI */
  830. del_timer_sync(&common->ani.timer);
  831. ieee80211_stop_queues(hw);
  832. ath9k_hw_set_interrupts(ah, 0);
  833. ath_drain_all_txq(sc, retry_tx);
  834. ath_stoprecv(sc);
  835. ath_flushrecv(sc);
  836. spin_lock_bh(&sc->sc_resetlock);
  837. r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
  838. if (r)
  839. ath_print(common, ATH_DBG_FATAL,
  840. "Unable to reset hardware; reset status %d\n", r);
  841. spin_unlock_bh(&sc->sc_resetlock);
  842. if (ath_startrecv(sc) != 0)
  843. ath_print(common, ATH_DBG_FATAL,
  844. "Unable to start recv logic\n");
  845. /*
  846. * We may be doing a reset in response to a request
  847. * that changes the channel so update any state that
  848. * might change as a result.
  849. */
  850. ath_cache_conf_rate(sc, &hw->conf);
  851. ath_update_txpow(sc);
  852. if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
  853. ath_beacon_config(sc, NULL); /* restart beacons */
  854. ath9k_hw_set_interrupts(ah, ah->imask);
  855. if (retry_tx) {
  856. int i;
  857. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  858. if (ATH_TXQ_SETUP(sc, i)) {
  859. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  860. ath_txq_schedule(sc, &sc->tx.txq[i]);
  861. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  862. }
  863. }
  864. }
  865. ieee80211_wake_queues(hw);
  866. /* Start ANI */
  867. ath_start_ani(common);
  868. return r;
  869. }
  870. static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
  871. {
  872. int qnum;
  873. switch (queue) {
  874. case 0:
  875. qnum = sc->tx.hwq_map[WME_AC_VO];
  876. break;
  877. case 1:
  878. qnum = sc->tx.hwq_map[WME_AC_VI];
  879. break;
  880. case 2:
  881. qnum = sc->tx.hwq_map[WME_AC_BE];
  882. break;
  883. case 3:
  884. qnum = sc->tx.hwq_map[WME_AC_BK];
  885. break;
  886. default:
  887. qnum = sc->tx.hwq_map[WME_AC_BE];
  888. break;
  889. }
  890. return qnum;
  891. }
  892. int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
  893. {
  894. int qnum;
  895. switch (queue) {
  896. case WME_AC_VO:
  897. qnum = 0;
  898. break;
  899. case WME_AC_VI:
  900. qnum = 1;
  901. break;
  902. case WME_AC_BE:
  903. qnum = 2;
  904. break;
  905. case WME_AC_BK:
  906. qnum = 3;
  907. break;
  908. default:
  909. qnum = -1;
  910. break;
  911. }
  912. return qnum;
  913. }
  914. /* XXX: Remove me once we don't depend on ath9k_channel for all
  915. * this redundant data */
  916. void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
  917. struct ath9k_channel *ichan)
  918. {
  919. struct ieee80211_channel *chan = hw->conf.channel;
  920. struct ieee80211_conf *conf = &hw->conf;
  921. ichan->channel = chan->center_freq;
  922. ichan->chan = chan;
  923. if (chan->band == IEEE80211_BAND_2GHZ) {
  924. ichan->chanmode = CHANNEL_G;
  925. ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
  926. } else {
  927. ichan->chanmode = CHANNEL_A;
  928. ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
  929. }
  930. if (conf_is_ht(conf))
  931. ichan->chanmode = ath_get_extchanmode(sc, chan,
  932. conf->channel_type);
  933. }
  934. /**********************/
  935. /* mac80211 callbacks */
  936. /**********************/
  937. static int ath9k_start(struct ieee80211_hw *hw)
  938. {
  939. struct ath_wiphy *aphy = hw->priv;
  940. struct ath_softc *sc = aphy->sc;
  941. struct ath_hw *ah = sc->sc_ah;
  942. struct ath_common *common = ath9k_hw_common(ah);
  943. struct ieee80211_channel *curchan = hw->conf.channel;
  944. struct ath9k_channel *init_channel;
  945. int r;
  946. ath_print(common, ATH_DBG_CONFIG,
  947. "Starting driver with initial channel: %d MHz\n",
  948. curchan->center_freq);
  949. mutex_lock(&sc->mutex);
  950. if (ath9k_wiphy_started(sc)) {
  951. if (sc->chan_idx == curchan->hw_value) {
  952. /*
  953. * Already on the operational channel, the new wiphy
  954. * can be marked active.
  955. */
  956. aphy->state = ATH_WIPHY_ACTIVE;
  957. ieee80211_wake_queues(hw);
  958. } else {
  959. /*
  960. * Another wiphy is on another channel, start the new
  961. * wiphy in paused state.
  962. */
  963. aphy->state = ATH_WIPHY_PAUSED;
  964. ieee80211_stop_queues(hw);
  965. }
  966. mutex_unlock(&sc->mutex);
  967. return 0;
  968. }
  969. aphy->state = ATH_WIPHY_ACTIVE;
  970. /* setup initial channel */
  971. sc->chan_idx = curchan->hw_value;
  972. init_channel = ath_get_curchannel(sc, hw);
  973. /* Reset SERDES registers */
  974. ath9k_hw_configpcipowersave(ah, 0, 0);
  975. /*
  976. * The basic interface to setting the hardware in a good
  977. * state is ``reset''. On return the hardware is known to
  978. * be powered up and with interrupts disabled. This must
  979. * be followed by initialization of the appropriate bits
  980. * and then setup of the interrupt mask.
  981. */
  982. spin_lock_bh(&sc->sc_resetlock);
  983. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  984. if (r) {
  985. ath_print(common, ATH_DBG_FATAL,
  986. "Unable to reset hardware; reset status %d "
  987. "(freq %u MHz)\n", r,
  988. curchan->center_freq);
  989. spin_unlock_bh(&sc->sc_resetlock);
  990. goto mutex_unlock;
  991. }
  992. spin_unlock_bh(&sc->sc_resetlock);
  993. /*
  994. * This is needed only to setup initial state
  995. * but it's best done after a reset.
  996. */
  997. ath_update_txpow(sc);
  998. /*
  999. * Setup the hardware after reset:
  1000. * The receive engine is set going.
  1001. * Frame transmit is handled entirely
  1002. * in the frame output path; there's nothing to do
  1003. * here except setup the interrupt mask.
  1004. */
  1005. if (ath_startrecv(sc) != 0) {
  1006. ath_print(common, ATH_DBG_FATAL,
  1007. "Unable to start recv logic\n");
  1008. r = -EIO;
  1009. goto mutex_unlock;
  1010. }
  1011. /* Setup our intr mask. */
  1012. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  1013. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  1014. ATH9K_INT_GLOBAL;
  1015. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  1016. ah->imask |= ATH9K_INT_RXHP |
  1017. ATH9K_INT_RXLP |
  1018. ATH9K_INT_BB_WATCHDOG;
  1019. else
  1020. ah->imask |= ATH9K_INT_RX;
  1021. ah->imask |= ATH9K_INT_GTT;
  1022. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  1023. ah->imask |= ATH9K_INT_CST;
  1024. ath_cache_conf_rate(sc, &hw->conf);
  1025. sc->sc_flags &= ~SC_OP_INVALID;
  1026. /* Disable BMISS interrupt when we're not associated */
  1027. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  1028. ath9k_hw_set_interrupts(ah, ah->imask);
  1029. ieee80211_wake_queues(hw);
  1030. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  1031. if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
  1032. !ah->btcoex_hw.enabled) {
  1033. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  1034. AR_STOMP_LOW_WLAN_WGHT);
  1035. ath9k_hw_btcoex_enable(ah);
  1036. if (common->bus_ops->bt_coex_prep)
  1037. common->bus_ops->bt_coex_prep(common);
  1038. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1039. ath9k_btcoex_timer_resume(sc);
  1040. }
  1041. mutex_unlock:
  1042. mutex_unlock(&sc->mutex);
  1043. return r;
  1044. }
  1045. static int ath9k_tx(struct ieee80211_hw *hw,
  1046. struct sk_buff *skb)
  1047. {
  1048. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  1049. struct ath_wiphy *aphy = hw->priv;
  1050. struct ath_softc *sc = aphy->sc;
  1051. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1052. struct ath_tx_control txctl;
  1053. int padpos, padsize;
  1054. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  1055. int qnum;
  1056. if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
  1057. ath_print(common, ATH_DBG_XMIT,
  1058. "ath9k: %s: TX in unexpected wiphy state "
  1059. "%d\n", wiphy_name(hw->wiphy), aphy->state);
  1060. goto exit;
  1061. }
  1062. if (sc->ps_enabled) {
  1063. /*
  1064. * mac80211 does not set PM field for normal data frames, so we
  1065. * need to update that based on the current PS mode.
  1066. */
  1067. if (ieee80211_is_data(hdr->frame_control) &&
  1068. !ieee80211_is_nullfunc(hdr->frame_control) &&
  1069. !ieee80211_has_pm(hdr->frame_control)) {
  1070. ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
  1071. "while in PS mode\n");
  1072. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  1073. }
  1074. }
  1075. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  1076. /*
  1077. * We are using PS-Poll and mac80211 can request TX while in
  1078. * power save mode. Need to wake up hardware for the TX to be
  1079. * completed and if needed, also for RX of buffered frames.
  1080. */
  1081. ath9k_ps_wakeup(sc);
  1082. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  1083. ath9k_hw_setrxabort(sc->sc_ah, 0);
  1084. if (ieee80211_is_pspoll(hdr->frame_control)) {
  1085. ath_print(common, ATH_DBG_PS,
  1086. "Sending PS-Poll to pick a buffered frame\n");
  1087. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  1088. } else {
  1089. ath_print(common, ATH_DBG_PS,
  1090. "Wake up to complete TX\n");
  1091. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  1092. }
  1093. /*
  1094. * The actual restore operation will happen only after
  1095. * the sc_flags bit is cleared. We are just dropping
  1096. * the ps_usecount here.
  1097. */
  1098. ath9k_ps_restore(sc);
  1099. }
  1100. memset(&txctl, 0, sizeof(struct ath_tx_control));
  1101. /*
  1102. * As a temporary workaround, assign seq# here; this will likely need
  1103. * to be cleaned up to work better with Beacon transmission and virtual
  1104. * BSSes.
  1105. */
  1106. if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1107. if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
  1108. sc->tx.seq_no += 0x10;
  1109. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1110. hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
  1111. }
  1112. /* Add the padding after the header if this is not already done */
  1113. padpos = ath9k_cmn_padpos(hdr->frame_control);
  1114. padsize = padpos & 3;
  1115. if (padsize && skb->len>padpos) {
  1116. if (skb_headroom(skb) < padsize)
  1117. return -1;
  1118. skb_push(skb, padsize);
  1119. memmove(skb->data, skb->data + padsize, padpos);
  1120. }
  1121. qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
  1122. txctl.txq = &sc->tx.txq[qnum];
  1123. ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
  1124. if (ath_tx_start(hw, skb, &txctl) != 0) {
  1125. ath_print(common, ATH_DBG_XMIT, "TX failed\n");
  1126. goto exit;
  1127. }
  1128. return 0;
  1129. exit:
  1130. dev_kfree_skb_any(skb);
  1131. return 0;
  1132. }
  1133. static void ath9k_stop(struct ieee80211_hw *hw)
  1134. {
  1135. struct ath_wiphy *aphy = hw->priv;
  1136. struct ath_softc *sc = aphy->sc;
  1137. struct ath_hw *ah = sc->sc_ah;
  1138. struct ath_common *common = ath9k_hw_common(ah);
  1139. int i;
  1140. mutex_lock(&sc->mutex);
  1141. aphy->state = ATH_WIPHY_INACTIVE;
  1142. if (led_blink)
  1143. cancel_delayed_work_sync(&sc->ath_led_blink_work);
  1144. cancel_delayed_work_sync(&sc->tx_complete_work);
  1145. cancel_work_sync(&sc->paprd_work);
  1146. cancel_work_sync(&sc->hw_check_work);
  1147. for (i = 0; i < sc->num_sec_wiphy; i++) {
  1148. if (sc->sec_wiphy[i])
  1149. break;
  1150. }
  1151. if (i == sc->num_sec_wiphy) {
  1152. cancel_delayed_work_sync(&sc->wiphy_work);
  1153. cancel_work_sync(&sc->chan_work);
  1154. }
  1155. if (sc->sc_flags & SC_OP_INVALID) {
  1156. ath_print(common, ATH_DBG_ANY, "Device not present\n");
  1157. mutex_unlock(&sc->mutex);
  1158. return;
  1159. }
  1160. if (ath9k_wiphy_started(sc)) {
  1161. mutex_unlock(&sc->mutex);
  1162. return; /* another wiphy still in use */
  1163. }
  1164. /* Ensure HW is awake when we try to shut it down. */
  1165. ath9k_ps_wakeup(sc);
  1166. if (ah->btcoex_hw.enabled) {
  1167. ath9k_hw_btcoex_disable(ah);
  1168. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1169. ath9k_btcoex_timer_pause(sc);
  1170. }
  1171. /* make sure h/w will not generate any interrupt
  1172. * before setting the invalid flag. */
  1173. ath9k_hw_set_interrupts(ah, 0);
  1174. if (!(sc->sc_flags & SC_OP_INVALID)) {
  1175. ath_drain_all_txq(sc, false);
  1176. ath_stoprecv(sc);
  1177. ath9k_hw_phy_disable(ah);
  1178. } else
  1179. sc->rx.rxlink = NULL;
  1180. /* disable HAL and put h/w to sleep */
  1181. ath9k_hw_disable(ah);
  1182. ath9k_hw_configpcipowersave(ah, 1, 1);
  1183. ath9k_ps_restore(sc);
  1184. /* Finally, put the chip in FULL SLEEP mode */
  1185. ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
  1186. sc->sc_flags |= SC_OP_INVALID;
  1187. mutex_unlock(&sc->mutex);
  1188. ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
  1189. }
  1190. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1191. struct ieee80211_vif *vif)
  1192. {
  1193. struct ath_wiphy *aphy = hw->priv;
  1194. struct ath_softc *sc = aphy->sc;
  1195. struct ath_hw *ah = sc->sc_ah;
  1196. struct ath_common *common = ath9k_hw_common(ah);
  1197. struct ath_vif *avp = (void *)vif->drv_priv;
  1198. enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
  1199. int ret = 0;
  1200. mutex_lock(&sc->mutex);
  1201. switch (vif->type) {
  1202. case NL80211_IFTYPE_STATION:
  1203. ic_opmode = NL80211_IFTYPE_STATION;
  1204. break;
  1205. case NL80211_IFTYPE_WDS:
  1206. ic_opmode = NL80211_IFTYPE_WDS;
  1207. break;
  1208. case NL80211_IFTYPE_ADHOC:
  1209. case NL80211_IFTYPE_AP:
  1210. case NL80211_IFTYPE_MESH_POINT:
  1211. if (sc->nbcnvifs >= ATH_BCBUF) {
  1212. ret = -ENOBUFS;
  1213. goto out;
  1214. }
  1215. ic_opmode = vif->type;
  1216. break;
  1217. default:
  1218. ath_print(common, ATH_DBG_FATAL,
  1219. "Interface type %d not yet supported\n", vif->type);
  1220. ret = -EOPNOTSUPP;
  1221. goto out;
  1222. }
  1223. ath_print(common, ATH_DBG_CONFIG,
  1224. "Attach a VIF of type: %d\n", ic_opmode);
  1225. /* Set the VIF opmode */
  1226. avp->av_opmode = ic_opmode;
  1227. avp->av_bslot = -1;
  1228. sc->nvifs++;
  1229. ath9k_set_bssid_mask(hw, vif);
  1230. if (sc->nvifs > 1)
  1231. goto out; /* skip global settings for secondary vif */
  1232. if (ic_opmode == NL80211_IFTYPE_AP) {
  1233. ath9k_hw_set_tsfadjust(ah, 1);
  1234. sc->sc_flags |= SC_OP_TSF_RESET;
  1235. }
  1236. /* Set the device opmode */
  1237. ah->opmode = ic_opmode;
  1238. /*
  1239. * Enable MIB interrupts when there are hardware phy counters.
  1240. * Note we only do this (at the moment) for station mode.
  1241. */
  1242. if ((vif->type == NL80211_IFTYPE_STATION) ||
  1243. (vif->type == NL80211_IFTYPE_ADHOC) ||
  1244. (vif->type == NL80211_IFTYPE_MESH_POINT)) {
  1245. if (ah->config.enable_ani)
  1246. ah->imask |= ATH9K_INT_MIB;
  1247. ah->imask |= ATH9K_INT_TSFOOR;
  1248. }
  1249. ath9k_hw_set_interrupts(ah, ah->imask);
  1250. if (vif->type == NL80211_IFTYPE_AP ||
  1251. vif->type == NL80211_IFTYPE_ADHOC ||
  1252. vif->type == NL80211_IFTYPE_MONITOR) {
  1253. sc->sc_flags |= SC_OP_ANI_RUN;
  1254. ath_start_ani(common);
  1255. }
  1256. out:
  1257. mutex_unlock(&sc->mutex);
  1258. return ret;
  1259. }
  1260. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1261. struct ieee80211_vif *vif)
  1262. {
  1263. struct ath_wiphy *aphy = hw->priv;
  1264. struct ath_softc *sc = aphy->sc;
  1265. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1266. struct ath_vif *avp = (void *)vif->drv_priv;
  1267. int i;
  1268. ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
  1269. mutex_lock(&sc->mutex);
  1270. /* Stop ANI */
  1271. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1272. del_timer_sync(&common->ani.timer);
  1273. /* Reclaim beacon resources */
  1274. if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
  1275. (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1276. (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
  1277. ath9k_ps_wakeup(sc);
  1278. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1279. ath9k_ps_restore(sc);
  1280. }
  1281. ath_beacon_return(sc, avp);
  1282. sc->sc_flags &= ~SC_OP_BEACONS;
  1283. for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
  1284. if (sc->beacon.bslot[i] == vif) {
  1285. printk(KERN_DEBUG "%s: vif had allocated beacon "
  1286. "slot\n", __func__);
  1287. sc->beacon.bslot[i] = NULL;
  1288. sc->beacon.bslot_aphy[i] = NULL;
  1289. }
  1290. }
  1291. sc->nvifs--;
  1292. mutex_unlock(&sc->mutex);
  1293. }
  1294. static void ath9k_enable_ps(struct ath_softc *sc)
  1295. {
  1296. struct ath_hw *ah = sc->sc_ah;
  1297. sc->ps_enabled = true;
  1298. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1299. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1300. ah->imask |= ATH9K_INT_TIM_TIMER;
  1301. ath9k_hw_set_interrupts(ah, ah->imask);
  1302. }
  1303. ath9k_hw_setrxabort(ah, 1);
  1304. }
  1305. }
  1306. static void ath9k_disable_ps(struct ath_softc *sc)
  1307. {
  1308. struct ath_hw *ah = sc->sc_ah;
  1309. sc->ps_enabled = false;
  1310. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1311. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1312. ath9k_hw_setrxabort(ah, 0);
  1313. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1314. PS_WAIT_FOR_CAB |
  1315. PS_WAIT_FOR_PSPOLL_DATA |
  1316. PS_WAIT_FOR_TX_ACK);
  1317. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1318. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1319. ath9k_hw_set_interrupts(ah, ah->imask);
  1320. }
  1321. }
  1322. }
  1323. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1324. {
  1325. struct ath_wiphy *aphy = hw->priv;
  1326. struct ath_softc *sc = aphy->sc;
  1327. struct ath_hw *ah = sc->sc_ah;
  1328. struct ath_common *common = ath9k_hw_common(ah);
  1329. struct ieee80211_conf *conf = &hw->conf;
  1330. bool disable_radio;
  1331. mutex_lock(&sc->mutex);
  1332. /*
  1333. * Leave this as the first check because we need to turn on the
  1334. * radio if it was disabled before prior to processing the rest
  1335. * of the changes. Likewise we must only disable the radio towards
  1336. * the end.
  1337. */
  1338. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1339. bool enable_radio;
  1340. bool all_wiphys_idle;
  1341. bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1342. spin_lock_bh(&sc->wiphy_lock);
  1343. all_wiphys_idle = ath9k_all_wiphys_idle(sc);
  1344. ath9k_set_wiphy_idle(aphy, idle);
  1345. enable_radio = (!idle && all_wiphys_idle);
  1346. /*
  1347. * After we unlock here its possible another wiphy
  1348. * can be re-renabled so to account for that we will
  1349. * only disable the radio toward the end of this routine
  1350. * if by then all wiphys are still idle.
  1351. */
  1352. spin_unlock_bh(&sc->wiphy_lock);
  1353. if (enable_radio) {
  1354. sc->ps_idle = false;
  1355. ath_radio_enable(sc, hw);
  1356. ath_print(common, ATH_DBG_CONFIG,
  1357. "not-idle: enabling radio\n");
  1358. }
  1359. }
  1360. /*
  1361. * We just prepare to enable PS. We have to wait until our AP has
  1362. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1363. * those ACKs and end up retransmitting the same null data frames.
  1364. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1365. */
  1366. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1367. unsigned long flags;
  1368. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1369. if (conf->flags & IEEE80211_CONF_PS)
  1370. ath9k_enable_ps(sc);
  1371. else
  1372. ath9k_disable_ps(sc);
  1373. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1374. }
  1375. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1376. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1377. ath_print(common, ATH_DBG_CONFIG,
  1378. "HW opmode set to Monitor mode\n");
  1379. sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
  1380. }
  1381. }
  1382. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1383. struct ieee80211_channel *curchan = hw->conf.channel;
  1384. int pos = curchan->hw_value;
  1385. int old_pos = -1;
  1386. unsigned long flags;
  1387. if (ah->curchan)
  1388. old_pos = ah->curchan - &ah->channels[0];
  1389. aphy->chan_idx = pos;
  1390. aphy->chan_is_ht = conf_is_ht(conf);
  1391. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1392. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1393. else
  1394. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1395. if (aphy->state == ATH_WIPHY_SCAN ||
  1396. aphy->state == ATH_WIPHY_ACTIVE)
  1397. ath9k_wiphy_pause_all_forced(sc, aphy);
  1398. else {
  1399. /*
  1400. * Do not change operational channel based on a paused
  1401. * wiphy changes.
  1402. */
  1403. goto skip_chan_change;
  1404. }
  1405. ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
  1406. curchan->center_freq);
  1407. /* XXX: remove me eventualy */
  1408. ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
  1409. ath_update_chainmask(sc, conf_is_ht(conf));
  1410. /* update survey stats for the old channel before switching */
  1411. spin_lock_irqsave(&common->cc_lock, flags);
  1412. ath_update_survey_stats(sc);
  1413. spin_unlock_irqrestore(&common->cc_lock, flags);
  1414. /*
  1415. * If the operating channel changes, change the survey in-use flags
  1416. * along with it.
  1417. * Reset the survey data for the new channel, unless we're switching
  1418. * back to the operating channel from an off-channel operation.
  1419. */
  1420. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1421. sc->cur_survey != &sc->survey[pos]) {
  1422. if (sc->cur_survey)
  1423. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1424. sc->cur_survey = &sc->survey[pos];
  1425. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1426. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1427. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1428. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1429. }
  1430. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1431. ath_print(common, ATH_DBG_FATAL,
  1432. "Unable to set channel\n");
  1433. mutex_unlock(&sc->mutex);
  1434. return -EINVAL;
  1435. }
  1436. /*
  1437. * The most recent snapshot of channel->noisefloor for the old
  1438. * channel is only available after the hardware reset. Copy it to
  1439. * the survey stats now.
  1440. */
  1441. if (old_pos >= 0)
  1442. ath_update_survey_nf(sc, old_pos);
  1443. }
  1444. skip_chan_change:
  1445. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1446. sc->config.txpowlimit = 2 * conf->power_level;
  1447. ath_update_txpow(sc);
  1448. }
  1449. spin_lock_bh(&sc->wiphy_lock);
  1450. disable_radio = ath9k_all_wiphys_idle(sc);
  1451. spin_unlock_bh(&sc->wiphy_lock);
  1452. if (disable_radio) {
  1453. ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
  1454. sc->ps_idle = true;
  1455. ath_radio_disable(sc, hw);
  1456. }
  1457. mutex_unlock(&sc->mutex);
  1458. return 0;
  1459. }
  1460. #define SUPPORTED_FILTERS \
  1461. (FIF_PROMISC_IN_BSS | \
  1462. FIF_ALLMULTI | \
  1463. FIF_CONTROL | \
  1464. FIF_PSPOLL | \
  1465. FIF_OTHER_BSS | \
  1466. FIF_BCN_PRBRESP_PROMISC | \
  1467. FIF_PROBE_REQ | \
  1468. FIF_FCSFAIL)
  1469. /* FIXME: sc->sc_full_reset ? */
  1470. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1471. unsigned int changed_flags,
  1472. unsigned int *total_flags,
  1473. u64 multicast)
  1474. {
  1475. struct ath_wiphy *aphy = hw->priv;
  1476. struct ath_softc *sc = aphy->sc;
  1477. u32 rfilt;
  1478. changed_flags &= SUPPORTED_FILTERS;
  1479. *total_flags &= SUPPORTED_FILTERS;
  1480. sc->rx.rxfilter = *total_flags;
  1481. ath9k_ps_wakeup(sc);
  1482. rfilt = ath_calcrxfilter(sc);
  1483. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1484. ath9k_ps_restore(sc);
  1485. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
  1486. "Set HW RX filter: 0x%x\n", rfilt);
  1487. }
  1488. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1489. struct ieee80211_vif *vif,
  1490. struct ieee80211_sta *sta)
  1491. {
  1492. struct ath_wiphy *aphy = hw->priv;
  1493. struct ath_softc *sc = aphy->sc;
  1494. ath_node_attach(sc, sta);
  1495. return 0;
  1496. }
  1497. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1498. struct ieee80211_vif *vif,
  1499. struct ieee80211_sta *sta)
  1500. {
  1501. struct ath_wiphy *aphy = hw->priv;
  1502. struct ath_softc *sc = aphy->sc;
  1503. ath_node_detach(sc, sta);
  1504. return 0;
  1505. }
  1506. static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1507. const struct ieee80211_tx_queue_params *params)
  1508. {
  1509. struct ath_wiphy *aphy = hw->priv;
  1510. struct ath_softc *sc = aphy->sc;
  1511. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1512. struct ath9k_tx_queue_info qi;
  1513. int ret = 0, qnum;
  1514. if (queue >= WME_NUM_AC)
  1515. return 0;
  1516. mutex_lock(&sc->mutex);
  1517. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1518. qi.tqi_aifs = params->aifs;
  1519. qi.tqi_cwmin = params->cw_min;
  1520. qi.tqi_cwmax = params->cw_max;
  1521. qi.tqi_burstTime = params->txop;
  1522. qnum = ath_get_hal_qnum(queue, sc);
  1523. ath_print(common, ATH_DBG_CONFIG,
  1524. "Configure tx [queue/halq] [%d/%d], "
  1525. "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1526. queue, qnum, params->aifs, params->cw_min,
  1527. params->cw_max, params->txop);
  1528. ret = ath_txq_update(sc, qnum, &qi);
  1529. if (ret)
  1530. ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
  1531. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1532. if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
  1533. ath_beaconq_config(sc);
  1534. mutex_unlock(&sc->mutex);
  1535. return ret;
  1536. }
  1537. static int ath9k_set_key(struct ieee80211_hw *hw,
  1538. enum set_key_cmd cmd,
  1539. struct ieee80211_vif *vif,
  1540. struct ieee80211_sta *sta,
  1541. struct ieee80211_key_conf *key)
  1542. {
  1543. struct ath_wiphy *aphy = hw->priv;
  1544. struct ath_softc *sc = aphy->sc;
  1545. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1546. int ret = 0;
  1547. if (modparam_nohwcrypt)
  1548. return -ENOSPC;
  1549. mutex_lock(&sc->mutex);
  1550. ath9k_ps_wakeup(sc);
  1551. ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
  1552. switch (cmd) {
  1553. case SET_KEY:
  1554. ret = ath_key_config(common, vif, sta, key);
  1555. if (ret >= 0) {
  1556. key->hw_key_idx = ret;
  1557. /* push IV and Michael MIC generation to stack */
  1558. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1559. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1560. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1561. if (sc->sc_ah->sw_mgmt_crypto &&
  1562. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1563. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1564. ret = 0;
  1565. }
  1566. break;
  1567. case DISABLE_KEY:
  1568. ath_key_delete(common, key);
  1569. break;
  1570. default:
  1571. ret = -EINVAL;
  1572. }
  1573. ath9k_ps_restore(sc);
  1574. mutex_unlock(&sc->mutex);
  1575. return ret;
  1576. }
  1577. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1578. struct ieee80211_vif *vif,
  1579. struct ieee80211_bss_conf *bss_conf,
  1580. u32 changed)
  1581. {
  1582. struct ath_wiphy *aphy = hw->priv;
  1583. struct ath_softc *sc = aphy->sc;
  1584. struct ath_hw *ah = sc->sc_ah;
  1585. struct ath_common *common = ath9k_hw_common(ah);
  1586. struct ath_vif *avp = (void *)vif->drv_priv;
  1587. int slottime;
  1588. int error;
  1589. mutex_lock(&sc->mutex);
  1590. if (changed & BSS_CHANGED_BSSID) {
  1591. /* Set BSSID */
  1592. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1593. memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
  1594. common->curaid = 0;
  1595. ath9k_hw_write_associd(ah);
  1596. /* Set aggregation protection mode parameters */
  1597. sc->config.ath_aggr_prot = 0;
  1598. /* Only legacy IBSS for now */
  1599. if (vif->type == NL80211_IFTYPE_ADHOC)
  1600. ath_update_chainmask(sc, 0);
  1601. ath_print(common, ATH_DBG_CONFIG,
  1602. "BSSID: %pM aid: 0x%x\n",
  1603. common->curbssid, common->curaid);
  1604. /* need to reconfigure the beacon */
  1605. sc->sc_flags &= ~SC_OP_BEACONS ;
  1606. }
  1607. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1608. if ((changed & BSS_CHANGED_BEACON) ||
  1609. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1610. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1611. error = ath_beacon_alloc(aphy, vif);
  1612. if (!error)
  1613. ath_beacon_config(sc, vif);
  1614. }
  1615. if (changed & BSS_CHANGED_ERP_SLOT) {
  1616. if (bss_conf->use_short_slot)
  1617. slottime = 9;
  1618. else
  1619. slottime = 20;
  1620. if (vif->type == NL80211_IFTYPE_AP) {
  1621. /*
  1622. * Defer update, so that connected stations can adjust
  1623. * their settings at the same time.
  1624. * See beacon.c for more details
  1625. */
  1626. sc->beacon.slottime = slottime;
  1627. sc->beacon.updateslot = UPDATE;
  1628. } else {
  1629. ah->slottime = slottime;
  1630. ath9k_hw_init_global_settings(ah);
  1631. }
  1632. }
  1633. /* Disable transmission of beacons */
  1634. if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
  1635. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1636. if (changed & BSS_CHANGED_BEACON_INT) {
  1637. sc->beacon_interval = bss_conf->beacon_int;
  1638. /*
  1639. * In case of AP mode, the HW TSF has to be reset
  1640. * when the beacon interval changes.
  1641. */
  1642. if (vif->type == NL80211_IFTYPE_AP) {
  1643. sc->sc_flags |= SC_OP_TSF_RESET;
  1644. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1645. error = ath_beacon_alloc(aphy, vif);
  1646. if (!error)
  1647. ath_beacon_config(sc, vif);
  1648. } else {
  1649. ath_beacon_config(sc, vif);
  1650. }
  1651. }
  1652. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1653. ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
  1654. bss_conf->use_short_preamble);
  1655. if (bss_conf->use_short_preamble)
  1656. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1657. else
  1658. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1659. }
  1660. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1661. ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
  1662. bss_conf->use_cts_prot);
  1663. if (bss_conf->use_cts_prot &&
  1664. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1665. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1666. else
  1667. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1668. }
  1669. if (changed & BSS_CHANGED_ASSOC) {
  1670. ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
  1671. bss_conf->assoc);
  1672. ath9k_bss_assoc_info(sc, vif, bss_conf);
  1673. }
  1674. mutex_unlock(&sc->mutex);
  1675. }
  1676. static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
  1677. {
  1678. u64 tsf;
  1679. struct ath_wiphy *aphy = hw->priv;
  1680. struct ath_softc *sc = aphy->sc;
  1681. mutex_lock(&sc->mutex);
  1682. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1683. mutex_unlock(&sc->mutex);
  1684. return tsf;
  1685. }
  1686. static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
  1687. {
  1688. struct ath_wiphy *aphy = hw->priv;
  1689. struct ath_softc *sc = aphy->sc;
  1690. mutex_lock(&sc->mutex);
  1691. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1692. mutex_unlock(&sc->mutex);
  1693. }
  1694. static void ath9k_reset_tsf(struct ieee80211_hw *hw)
  1695. {
  1696. struct ath_wiphy *aphy = hw->priv;
  1697. struct ath_softc *sc = aphy->sc;
  1698. mutex_lock(&sc->mutex);
  1699. ath9k_ps_wakeup(sc);
  1700. ath9k_hw_reset_tsf(sc->sc_ah);
  1701. ath9k_ps_restore(sc);
  1702. mutex_unlock(&sc->mutex);
  1703. }
  1704. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1705. struct ieee80211_vif *vif,
  1706. enum ieee80211_ampdu_mlme_action action,
  1707. struct ieee80211_sta *sta,
  1708. u16 tid, u16 *ssn)
  1709. {
  1710. struct ath_wiphy *aphy = hw->priv;
  1711. struct ath_softc *sc = aphy->sc;
  1712. int ret = 0;
  1713. local_bh_disable();
  1714. switch (action) {
  1715. case IEEE80211_AMPDU_RX_START:
  1716. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1717. ret = -ENOTSUPP;
  1718. break;
  1719. case IEEE80211_AMPDU_RX_STOP:
  1720. break;
  1721. case IEEE80211_AMPDU_TX_START:
  1722. ath9k_ps_wakeup(sc);
  1723. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1724. if (!ret)
  1725. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1726. ath9k_ps_restore(sc);
  1727. break;
  1728. case IEEE80211_AMPDU_TX_STOP:
  1729. ath9k_ps_wakeup(sc);
  1730. ath_tx_aggr_stop(sc, sta, tid);
  1731. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1732. ath9k_ps_restore(sc);
  1733. break;
  1734. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1735. ath9k_ps_wakeup(sc);
  1736. ath_tx_aggr_resume(sc, sta, tid);
  1737. ath9k_ps_restore(sc);
  1738. break;
  1739. default:
  1740. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
  1741. "Unknown AMPDU action\n");
  1742. }
  1743. local_bh_enable();
  1744. return ret;
  1745. }
  1746. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1747. struct survey_info *survey)
  1748. {
  1749. struct ath_wiphy *aphy = hw->priv;
  1750. struct ath_softc *sc = aphy->sc;
  1751. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1752. struct ieee80211_supported_band *sband;
  1753. struct ieee80211_channel *chan;
  1754. unsigned long flags;
  1755. int pos;
  1756. spin_lock_irqsave(&common->cc_lock, flags);
  1757. if (idx == 0)
  1758. ath_update_survey_stats(sc);
  1759. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1760. if (sband && idx >= sband->n_channels) {
  1761. idx -= sband->n_channels;
  1762. sband = NULL;
  1763. }
  1764. if (!sband)
  1765. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1766. if (!sband || idx >= sband->n_channels) {
  1767. spin_unlock_irqrestore(&common->cc_lock, flags);
  1768. return -ENOENT;
  1769. }
  1770. chan = &sband->channels[idx];
  1771. pos = chan->hw_value;
  1772. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1773. survey->channel = chan;
  1774. spin_unlock_irqrestore(&common->cc_lock, flags);
  1775. return 0;
  1776. }
  1777. static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
  1778. {
  1779. struct ath_wiphy *aphy = hw->priv;
  1780. struct ath_softc *sc = aphy->sc;
  1781. mutex_lock(&sc->mutex);
  1782. if (ath9k_wiphy_scanning(sc)) {
  1783. /*
  1784. * There is a race here in mac80211 but fixing it requires
  1785. * we revisit how we handle the scan complete callback.
  1786. * After mac80211 fixes we will not have configured hardware
  1787. * to the home channel nor would we have configured the RX
  1788. * filter yet.
  1789. */
  1790. mutex_unlock(&sc->mutex);
  1791. return;
  1792. }
  1793. aphy->state = ATH_WIPHY_SCAN;
  1794. ath9k_wiphy_pause_all_forced(sc, aphy);
  1795. mutex_unlock(&sc->mutex);
  1796. }
  1797. /*
  1798. * XXX: this requires a revisit after the driver
  1799. * scan_complete gets moved to another place/removed in mac80211.
  1800. */
  1801. static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
  1802. {
  1803. struct ath_wiphy *aphy = hw->priv;
  1804. struct ath_softc *sc = aphy->sc;
  1805. mutex_lock(&sc->mutex);
  1806. aphy->state = ATH_WIPHY_ACTIVE;
  1807. mutex_unlock(&sc->mutex);
  1808. }
  1809. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1810. {
  1811. struct ath_wiphy *aphy = hw->priv;
  1812. struct ath_softc *sc = aphy->sc;
  1813. struct ath_hw *ah = sc->sc_ah;
  1814. mutex_lock(&sc->mutex);
  1815. ah->coverage_class = coverage_class;
  1816. ath9k_hw_init_global_settings(ah);
  1817. mutex_unlock(&sc->mutex);
  1818. }
  1819. struct ieee80211_ops ath9k_ops = {
  1820. .tx = ath9k_tx,
  1821. .start = ath9k_start,
  1822. .stop = ath9k_stop,
  1823. .add_interface = ath9k_add_interface,
  1824. .remove_interface = ath9k_remove_interface,
  1825. .config = ath9k_config,
  1826. .configure_filter = ath9k_configure_filter,
  1827. .sta_add = ath9k_sta_add,
  1828. .sta_remove = ath9k_sta_remove,
  1829. .conf_tx = ath9k_conf_tx,
  1830. .bss_info_changed = ath9k_bss_info_changed,
  1831. .set_key = ath9k_set_key,
  1832. .get_tsf = ath9k_get_tsf,
  1833. .set_tsf = ath9k_set_tsf,
  1834. .reset_tsf = ath9k_reset_tsf,
  1835. .ampdu_action = ath9k_ampdu_action,
  1836. .get_survey = ath9k_get_survey,
  1837. .sw_scan_start = ath9k_sw_scan_start,
  1838. .sw_scan_complete = ath9k_sw_scan_complete,
  1839. .rfkill_poll = ath9k_rfkill_poll_state,
  1840. .set_coverage_class = ath9k_set_coverage_class,
  1841. };