marvell.c 6.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315
  1. /*
  2. * drivers/net/phy/marvell.c
  3. *
  4. * Driver for Marvell PHYs
  5. *
  6. * Author: Andy Fleming
  7. *
  8. * Copyright (c) 2004 Freescale Semiconductor, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License as published by the
  12. * Free Software Foundation; either version 2 of the License, or (at your
  13. * option) any later version.
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/string.h>
  18. #include <linux/errno.h>
  19. #include <linux/unistd.h>
  20. #include <linux/slab.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/init.h>
  23. #include <linux/delay.h>
  24. #include <linux/netdevice.h>
  25. #include <linux/etherdevice.h>
  26. #include <linux/skbuff.h>
  27. #include <linux/spinlock.h>
  28. #include <linux/mm.h>
  29. #include <linux/module.h>
  30. #include <linux/mii.h>
  31. #include <linux/ethtool.h>
  32. #include <linux/phy.h>
  33. #include <asm/io.h>
  34. #include <asm/irq.h>
  35. #include <asm/uaccess.h>
  36. #define MII_M1011_IEVENT 0x13
  37. #define MII_M1011_IEVENT_CLEAR 0x0000
  38. #define MII_M1011_IMASK 0x12
  39. #define MII_M1011_IMASK_INIT 0x6400
  40. #define MII_M1011_IMASK_CLEAR 0x0000
  41. #define MII_M1011_PHY_SCR 0x10
  42. #define MII_M1011_PHY_SCR_AUTO_CROSS 0x0060
  43. #define MII_M1145_PHY_EXT_CR 0x14
  44. #define MII_M1145_RGMII_RX_DELAY 0x0080
  45. #define MII_M1145_RGMII_TX_DELAY 0x0002
  46. #define M1145_DEV_FLAGS_RESISTANCE 0x00000001
  47. #define MII_M1111_PHY_LED_CONTROL 0x18
  48. #define MII_M1111_PHY_LED_DIRECT 0x4100
  49. #define MII_M1111_PHY_LED_COMBINE 0x411c
  50. #define MII_M1111_PHY_EXT_CR 0x14
  51. #define MII_M1111_RX_DELAY 0x80
  52. #define MII_M1111_TX_DELAY 0x2
  53. #define MII_M1111_PHY_EXT_SR 0x1b
  54. #define MII_M1111_HWCFG_MODE_MASK 0xf
  55. #define MII_M1111_HWCFG_MODE_RGMII 0xb
  56. MODULE_DESCRIPTION("Marvell PHY driver");
  57. MODULE_AUTHOR("Andy Fleming");
  58. MODULE_LICENSE("GPL");
  59. static int marvell_ack_interrupt(struct phy_device *phydev)
  60. {
  61. int err;
  62. /* Clear the interrupts by reading the reg */
  63. err = phy_read(phydev, MII_M1011_IEVENT);
  64. if (err < 0)
  65. return err;
  66. return 0;
  67. }
  68. static int marvell_config_intr(struct phy_device *phydev)
  69. {
  70. int err;
  71. if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
  72. err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_INIT);
  73. else
  74. err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_CLEAR);
  75. return err;
  76. }
  77. static int marvell_config_aneg(struct phy_device *phydev)
  78. {
  79. int err;
  80. /* The Marvell PHY has an errata which requires
  81. * that certain registers get written in order
  82. * to restart autonegotiation */
  83. err = phy_write(phydev, MII_BMCR, BMCR_RESET);
  84. if (err < 0)
  85. return err;
  86. err = phy_write(phydev, 0x1d, 0x1f);
  87. if (err < 0)
  88. return err;
  89. err = phy_write(phydev, 0x1e, 0x200c);
  90. if (err < 0)
  91. return err;
  92. err = phy_write(phydev, 0x1d, 0x5);
  93. if (err < 0)
  94. return err;
  95. err = phy_write(phydev, 0x1e, 0);
  96. if (err < 0)
  97. return err;
  98. err = phy_write(phydev, 0x1e, 0x100);
  99. if (err < 0)
  100. return err;
  101. err = phy_write(phydev, MII_M1011_PHY_SCR,
  102. MII_M1011_PHY_SCR_AUTO_CROSS);
  103. if (err < 0)
  104. return err;
  105. err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
  106. MII_M1111_PHY_LED_DIRECT);
  107. if (err < 0)
  108. return err;
  109. err = genphy_config_aneg(phydev);
  110. return err;
  111. }
  112. static int m88e1111_config_init(struct phy_device *phydev)
  113. {
  114. int err;
  115. if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) ||
  116. (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)) {
  117. int temp;
  118. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
  119. temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
  120. if (temp < 0)
  121. return temp;
  122. temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
  123. err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
  124. if (err < 0)
  125. return err;
  126. }
  127. temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  128. if (temp < 0)
  129. return temp;
  130. temp &= ~(MII_M1111_HWCFG_MODE_MASK);
  131. temp |= MII_M1111_HWCFG_MODE_RGMII;
  132. err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
  133. if (err < 0)
  134. return err;
  135. }
  136. err = phy_write(phydev, MII_BMCR, BMCR_RESET);
  137. if (err < 0)
  138. return err;
  139. return 0;
  140. }
  141. static int m88e1145_config_init(struct phy_device *phydev)
  142. {
  143. int err;
  144. /* Take care of errata E0 & E1 */
  145. err = phy_write(phydev, 0x1d, 0x001b);
  146. if (err < 0)
  147. return err;
  148. err = phy_write(phydev, 0x1e, 0x418f);
  149. if (err < 0)
  150. return err;
  151. err = phy_write(phydev, 0x1d, 0x0016);
  152. if (err < 0)
  153. return err;
  154. err = phy_write(phydev, 0x1e, 0xa2da);
  155. if (err < 0)
  156. return err;
  157. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
  158. int temp = phy_read(phydev, MII_M1145_PHY_EXT_CR);
  159. if (temp < 0)
  160. return temp;
  161. temp |= (MII_M1145_RGMII_RX_DELAY | MII_M1145_RGMII_TX_DELAY);
  162. err = phy_write(phydev, MII_M1145_PHY_EXT_CR, temp);
  163. if (err < 0)
  164. return err;
  165. if (phydev->dev_flags & M1145_DEV_FLAGS_RESISTANCE) {
  166. err = phy_write(phydev, 0x1d, 0x0012);
  167. if (err < 0)
  168. return err;
  169. temp = phy_read(phydev, 0x1e);
  170. if (temp < 0)
  171. return temp;
  172. temp &= 0xf03f;
  173. temp |= 2 << 9; /* 36 ohm */
  174. temp |= 2 << 6; /* 39 ohm */
  175. err = phy_write(phydev, 0x1e, temp);
  176. if (err < 0)
  177. return err;
  178. err = phy_write(phydev, 0x1d, 0x3);
  179. if (err < 0)
  180. return err;
  181. err = phy_write(phydev, 0x1e, 0x8000);
  182. if (err < 0)
  183. return err;
  184. }
  185. }
  186. return 0;
  187. }
  188. static struct phy_driver m88e1101_driver = {
  189. .phy_id = 0x01410c60,
  190. .phy_id_mask = 0xfffffff0,
  191. .name = "Marvell 88E1101",
  192. .features = PHY_GBIT_FEATURES,
  193. .flags = PHY_HAS_INTERRUPT,
  194. .config_aneg = &marvell_config_aneg,
  195. .read_status = &genphy_read_status,
  196. .ack_interrupt = &marvell_ack_interrupt,
  197. .config_intr = &marvell_config_intr,
  198. .driver = {.owner = THIS_MODULE,},
  199. };
  200. static struct phy_driver m88e1111_driver = {
  201. .phy_id = 0x01410cc0,
  202. .phy_id_mask = 0xfffffff0,
  203. .name = "Marvell 88E1111",
  204. .features = PHY_GBIT_FEATURES,
  205. .flags = PHY_HAS_INTERRUPT,
  206. .config_aneg = &marvell_config_aneg,
  207. .read_status = &genphy_read_status,
  208. .ack_interrupt = &marvell_ack_interrupt,
  209. .config_intr = &marvell_config_intr,
  210. .config_init = &m88e1111_config_init,
  211. .driver = {.owner = THIS_MODULE,},
  212. };
  213. static struct phy_driver m88e1145_driver = {
  214. .phy_id = 0x01410cd0,
  215. .phy_id_mask = 0xfffffff0,
  216. .name = "Marvell 88E1145",
  217. .features = PHY_GBIT_FEATURES,
  218. .flags = PHY_HAS_INTERRUPT,
  219. .config_init = &m88e1145_config_init,
  220. .config_aneg = &marvell_config_aneg,
  221. .read_status = &genphy_read_status,
  222. .ack_interrupt = &marvell_ack_interrupt,
  223. .config_intr = &marvell_config_intr,
  224. .driver = {.owner = THIS_MODULE,},
  225. };
  226. static int __init marvell_init(void)
  227. {
  228. int ret;
  229. ret = phy_driver_register(&m88e1101_driver);
  230. if (ret)
  231. return ret;
  232. ret = phy_driver_register(&m88e1111_driver);
  233. if (ret)
  234. goto err1111;
  235. ret = phy_driver_register(&m88e1145_driver);
  236. if (ret)
  237. goto err1145;
  238. return 0;
  239. err1145:
  240. phy_driver_unregister(&m88e1111_driver);
  241. err1111:
  242. phy_driver_unregister(&m88e1101_driver);
  243. return ret;
  244. }
  245. static void __exit marvell_exit(void)
  246. {
  247. phy_driver_unregister(&m88e1101_driver);
  248. phy_driver_unregister(&m88e1111_driver);
  249. phy_driver_unregister(&m88e1145_driver);
  250. }
  251. module_init(marvell_init);
  252. module_exit(marvell_exit);