iwl-agn-ucode.c 19 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/sched.h>
  33. #include "iwl-dev.h"
  34. #include "iwl-core.h"
  35. #include "iwl-io.h"
  36. #include "iwl-agn-hw.h"
  37. #include "iwl-agn.h"
  38. #include "iwl-agn-calib.h"
  39. #include "iwl-trans.h"
  40. #include "iwl-fh.h"
  41. static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
  42. {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
  43. 0, COEX_UNASSOC_IDLE_FLAGS},
  44. {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
  45. 0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
  46. {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
  47. 0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
  48. {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
  49. 0, COEX_CALIBRATION_FLAGS},
  50. {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
  51. 0, COEX_PERIODIC_CALIBRATION_FLAGS},
  52. {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
  53. 0, COEX_CONNECTION_ESTAB_FLAGS},
  54. {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
  55. 0, COEX_ASSOCIATED_IDLE_FLAGS},
  56. {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
  57. 0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
  58. {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
  59. 0, COEX_ASSOC_AUTO_SCAN_FLAGS},
  60. {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
  61. 0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
  62. {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
  63. {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
  64. {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
  65. 0, COEX_STAND_ALONE_DEBUG_FLAGS},
  66. {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
  67. 0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
  68. {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
  69. {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
  70. };
  71. /*
  72. * ucode
  73. */
  74. static int iwlagn_load_section(struct iwl_trans *trans, const char *name,
  75. struct fw_desc *image, u32 dst_addr)
  76. {
  77. struct iwl_bus *bus = bus(trans);
  78. dma_addr_t phy_addr = image->p_addr;
  79. u32 byte_cnt = image->len;
  80. int ret;
  81. trans->ucode_write_complete = 0;
  82. iwl_write_direct32(bus,
  83. FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
  84. FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE);
  85. iwl_write_direct32(bus,
  86. FH_SRVC_CHNL_SRAM_ADDR_REG(FH_SRVC_CHNL), dst_addr);
  87. iwl_write_direct32(bus,
  88. FH_TFDIB_CTRL0_REG(FH_SRVC_CHNL),
  89. phy_addr & FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK);
  90. iwl_write_direct32(bus,
  91. FH_TFDIB_CTRL1_REG(FH_SRVC_CHNL),
  92. (iwl_get_dma_hi_addr(phy_addr)
  93. << FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_cnt);
  94. iwl_write_direct32(bus,
  95. FH_TCSR_CHNL_TX_BUF_STS_REG(FH_SRVC_CHNL),
  96. 1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM |
  97. 1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX |
  98. FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID);
  99. iwl_write_direct32(bus,
  100. FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
  101. FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
  102. FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE |
  103. FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_ENDTFD);
  104. IWL_DEBUG_FW(bus, "%s uCode section being loaded...\n", name);
  105. ret = wait_event_timeout(trans->shrd->wait_command_queue,
  106. trans->ucode_write_complete, 5 * HZ);
  107. if (!ret) {
  108. IWL_ERR(trans, "Could not load the %s uCode section\n",
  109. name);
  110. return -ETIMEDOUT;
  111. }
  112. return 0;
  113. }
  114. static inline struct fw_img *iwl_get_ucode_image(struct iwl_priv *priv,
  115. enum iwlagn_ucode_type ucode_type)
  116. {
  117. switch (ucode_type) {
  118. case IWL_UCODE_INIT:
  119. return &priv->ucode_init;
  120. case IWL_UCODE_WOWLAN:
  121. return &priv->ucode_wowlan;
  122. case IWL_UCODE_REGULAR:
  123. return &priv->ucode_rt;
  124. case IWL_UCODE_NONE:
  125. break;
  126. }
  127. return NULL;
  128. }
  129. static int iwlagn_load_given_ucode(struct iwl_priv *priv,
  130. struct fw_img *image)
  131. {
  132. int ret = 0;
  133. ret = iwlagn_load_section(trans(priv), "INST", &image->code,
  134. IWLAGN_RTC_INST_LOWER_BOUND);
  135. if (ret)
  136. return ret;
  137. return iwlagn_load_section(trans(priv), "DATA", &image->data,
  138. IWLAGN_RTC_DATA_LOWER_BOUND);
  139. }
  140. /*
  141. * Calibration
  142. */
  143. static int iwlagn_set_Xtal_calib(struct iwl_priv *priv)
  144. {
  145. struct iwl_calib_xtal_freq_cmd cmd;
  146. __le16 *xtal_calib =
  147. (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_XTAL);
  148. iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_CRYSTAL_FRQ_CMD);
  149. cmd.cap_pin1 = le16_to_cpu(xtal_calib[0]);
  150. cmd.cap_pin2 = le16_to_cpu(xtal_calib[1]);
  151. return iwl_calib_set(&priv->calib_results[IWL_CALIB_XTAL],
  152. (u8 *)&cmd, sizeof(cmd));
  153. }
  154. static int iwlagn_set_temperature_offset_calib(struct iwl_priv *priv)
  155. {
  156. struct iwl_calib_temperature_offset_cmd cmd;
  157. __le16 *offset_calib =
  158. (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_RAW_TEMPERATURE);
  159. memset(&cmd, 0, sizeof(cmd));
  160. iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
  161. memcpy(&cmd.radio_sensor_offset, offset_calib, sizeof(*offset_calib));
  162. if (!(cmd.radio_sensor_offset))
  163. cmd.radio_sensor_offset = DEFAULT_RADIO_SENSOR_OFFSET;
  164. IWL_DEBUG_CALIB(priv, "Radio sensor offset: %d\n",
  165. le16_to_cpu(cmd.radio_sensor_offset));
  166. return iwl_calib_set(&priv->calib_results[IWL_CALIB_TEMP_OFFSET],
  167. (u8 *)&cmd, sizeof(cmd));
  168. }
  169. static int iwlagn_set_temperature_offset_calib_v2(struct iwl_priv *priv)
  170. {
  171. struct iwl_calib_temperature_offset_v2_cmd cmd;
  172. __le16 *offset_calib_high = (__le16 *)iwl_eeprom_query_addr(priv,
  173. EEPROM_KELVIN_TEMPERATURE);
  174. __le16 *offset_calib_low =
  175. (__le16 *)iwl_eeprom_query_addr(priv, EEPROM_RAW_TEMPERATURE);
  176. struct iwl_eeprom_calib_hdr *hdr;
  177. memset(&cmd, 0, sizeof(cmd));
  178. iwl_set_calib_hdr(&cmd.hdr, IWL_PHY_CALIBRATE_TEMP_OFFSET_CMD);
  179. hdr = (struct iwl_eeprom_calib_hdr *)iwl_eeprom_query_addr(priv,
  180. EEPROM_CALIB_ALL);
  181. memcpy(&cmd.radio_sensor_offset_high, offset_calib_high,
  182. sizeof(*offset_calib_high));
  183. memcpy(&cmd.radio_sensor_offset_low, offset_calib_low,
  184. sizeof(*offset_calib_low));
  185. if (!(cmd.radio_sensor_offset_low)) {
  186. IWL_DEBUG_CALIB(priv, "no info in EEPROM, use default\n");
  187. cmd.radio_sensor_offset_low = DEFAULT_RADIO_SENSOR_OFFSET;
  188. cmd.radio_sensor_offset_high = DEFAULT_RADIO_SENSOR_OFFSET;
  189. }
  190. memcpy(&cmd.burntVoltageRef, &hdr->voltage,
  191. sizeof(hdr->voltage));
  192. IWL_DEBUG_CALIB(priv, "Radio sensor offset high: %d\n",
  193. le16_to_cpu(cmd.radio_sensor_offset_high));
  194. IWL_DEBUG_CALIB(priv, "Radio sensor offset low: %d\n",
  195. le16_to_cpu(cmd.radio_sensor_offset_low));
  196. IWL_DEBUG_CALIB(priv, "Voltage Ref: %d\n",
  197. le16_to_cpu(cmd.burntVoltageRef));
  198. return iwl_calib_set(&priv->calib_results[IWL_CALIB_TEMP_OFFSET],
  199. (u8 *)&cmd, sizeof(cmd));
  200. }
  201. static int iwlagn_send_calib_cfg(struct iwl_priv *priv)
  202. {
  203. struct iwl_calib_cfg_cmd calib_cfg_cmd;
  204. struct iwl_host_cmd cmd = {
  205. .id = CALIBRATION_CFG_CMD,
  206. .len = { sizeof(struct iwl_calib_cfg_cmd), },
  207. .data = { &calib_cfg_cmd, },
  208. };
  209. memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
  210. calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
  211. calib_cfg_cmd.ucd_calib_cfg.once.start = IWL_CALIB_INIT_CFG_ALL;
  212. calib_cfg_cmd.ucd_calib_cfg.once.send_res = IWL_CALIB_INIT_CFG_ALL;
  213. calib_cfg_cmd.ucd_calib_cfg.flags =
  214. IWL_CALIB_CFG_FLAG_SEND_COMPLETE_NTFY_MSK;
  215. return iwl_trans_send_cmd(trans(priv), &cmd);
  216. }
  217. int iwlagn_rx_calib_result(struct iwl_priv *priv,
  218. struct iwl_rx_mem_buffer *rxb,
  219. struct iwl_device_cmd *cmd)
  220. {
  221. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  222. struct iwl_calib_hdr *hdr = (struct iwl_calib_hdr *)pkt->u.raw;
  223. int len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  224. int index;
  225. /* reduce the size of the length field itself */
  226. len -= 4;
  227. /* Define the order in which the results will be sent to the runtime
  228. * uCode. iwl_send_calib_results sends them in a row according to
  229. * their index. We sort them here
  230. */
  231. switch (hdr->op_code) {
  232. case IWL_PHY_CALIBRATE_DC_CMD:
  233. index = IWL_CALIB_DC;
  234. break;
  235. case IWL_PHY_CALIBRATE_LO_CMD:
  236. index = IWL_CALIB_LO;
  237. break;
  238. case IWL_PHY_CALIBRATE_TX_IQ_CMD:
  239. index = IWL_CALIB_TX_IQ;
  240. break;
  241. case IWL_PHY_CALIBRATE_TX_IQ_PERD_CMD:
  242. index = IWL_CALIB_TX_IQ_PERD;
  243. break;
  244. case IWL_PHY_CALIBRATE_BASE_BAND_CMD:
  245. index = IWL_CALIB_BASE_BAND;
  246. break;
  247. default:
  248. IWL_ERR(priv, "Unknown calibration notification %d\n",
  249. hdr->op_code);
  250. return -1;
  251. }
  252. iwl_calib_set(&priv->calib_results[index], pkt->u.raw, len);
  253. return 0;
  254. }
  255. int iwlagn_init_alive_start(struct iwl_priv *priv)
  256. {
  257. int ret;
  258. if (priv->cfg->bt_params &&
  259. priv->cfg->bt_params->advanced_bt_coexist) {
  260. /*
  261. * Tell uCode we are ready to perform calibration
  262. * need to perform this before any calibration
  263. * no need to close the envlope since we are going
  264. * to load the runtime uCode later.
  265. */
  266. ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN,
  267. BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
  268. if (ret)
  269. return ret;
  270. }
  271. ret = iwlagn_send_calib_cfg(priv);
  272. if (ret)
  273. return ret;
  274. /**
  275. * temperature offset calibration is only needed for runtime ucode,
  276. * so prepare the value now.
  277. */
  278. if (priv->cfg->need_temp_offset_calib) {
  279. if (priv->cfg->temp_offset_v2)
  280. return iwlagn_set_temperature_offset_calib_v2(priv);
  281. else
  282. return iwlagn_set_temperature_offset_calib(priv);
  283. }
  284. return 0;
  285. }
  286. static int iwlagn_send_wimax_coex(struct iwl_priv *priv)
  287. {
  288. struct iwl_wimax_coex_cmd coex_cmd;
  289. if (priv->cfg->base_params->support_wimax_coexist) {
  290. /* UnMask wake up src at associated sleep */
  291. coex_cmd.flags = COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
  292. /* UnMask wake up src at unassociated sleep */
  293. coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
  294. memcpy(coex_cmd.sta_prio, cu_priorities,
  295. sizeof(struct iwl_wimax_coex_event_entry) *
  296. COEX_NUM_OF_EVENTS);
  297. /* enabling the coexistence feature */
  298. coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
  299. /* enabling the priorities tables */
  300. coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
  301. } else {
  302. /* coexistence is disabled */
  303. memset(&coex_cmd, 0, sizeof(coex_cmd));
  304. }
  305. return iwl_trans_send_cmd_pdu(trans(priv),
  306. COEX_PRIORITY_TABLE_CMD, CMD_SYNC,
  307. sizeof(coex_cmd), &coex_cmd);
  308. }
  309. static const u8 iwlagn_bt_prio_tbl[BT_COEX_PRIO_TBL_EVT_MAX] = {
  310. ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
  311. (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
  312. ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
  313. (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
  314. ((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
  315. (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
  316. ((BT_COEX_PRIO_TBL_PRIO_LOW << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
  317. (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
  318. ((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
  319. (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
  320. ((BT_COEX_PRIO_TBL_PRIO_HIGH << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
  321. (1 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
  322. ((BT_COEX_PRIO_TBL_PRIO_BYPASS << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
  323. (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
  324. ((BT_COEX_PRIO_TBL_PRIO_COEX_OFF << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
  325. (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
  326. ((BT_COEX_PRIO_TBL_PRIO_COEX_ON << IWL_BT_COEX_PRIO_TBL_PRIO_POS) |
  327. (0 << IWL_BT_COEX_PRIO_TBL_SHARED_ANTENNA_POS)),
  328. 0, 0, 0, 0, 0, 0, 0
  329. };
  330. void iwlagn_send_prio_tbl(struct iwl_priv *priv)
  331. {
  332. struct iwl_bt_coex_prio_table_cmd prio_tbl_cmd;
  333. memcpy(prio_tbl_cmd.prio_tbl, iwlagn_bt_prio_tbl,
  334. sizeof(iwlagn_bt_prio_tbl));
  335. if (iwl_trans_send_cmd_pdu(trans(priv),
  336. REPLY_BT_COEX_PRIO_TABLE, CMD_SYNC,
  337. sizeof(prio_tbl_cmd), &prio_tbl_cmd))
  338. IWL_ERR(priv, "failed to send BT prio tbl command\n");
  339. }
  340. int iwlagn_send_bt_env(struct iwl_priv *priv, u8 action, u8 type)
  341. {
  342. struct iwl_bt_coex_prot_env_cmd env_cmd;
  343. int ret;
  344. env_cmd.action = action;
  345. env_cmd.type = type;
  346. ret = iwl_trans_send_cmd_pdu(trans(priv),
  347. REPLY_BT_COEX_PROT_ENV, CMD_SYNC,
  348. sizeof(env_cmd), &env_cmd);
  349. if (ret)
  350. IWL_ERR(priv, "failed to send BT env command\n");
  351. return ret;
  352. }
  353. static int iwlagn_alive_notify(struct iwl_priv *priv)
  354. {
  355. struct iwl_rxon_context *ctx;
  356. int ret;
  357. if (!priv->tx_cmd_pool)
  358. priv->tx_cmd_pool =
  359. kmem_cache_create("iwlagn_dev_cmd",
  360. sizeof(struct iwl_device_cmd),
  361. sizeof(void *), 0, NULL);
  362. if (!priv->tx_cmd_pool)
  363. return -ENOMEM;
  364. iwl_trans_tx_start(trans(priv));
  365. for_each_context(priv, ctx)
  366. ctx->last_tx_rejected = false;
  367. ret = iwlagn_send_wimax_coex(priv);
  368. if (ret)
  369. return ret;
  370. ret = iwlagn_set_Xtal_calib(priv);
  371. if (ret)
  372. return ret;
  373. return iwl_send_calib_results(priv);
  374. }
  375. /**
  376. * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
  377. * using sample data 100 bytes apart. If these sample points are good,
  378. * it's a pretty good bet that everything between them is good, too.
  379. */
  380. static int iwl_verify_inst_sparse(struct iwl_priv *priv,
  381. struct fw_desc *fw_desc)
  382. {
  383. __le32 *image = (__le32 *)fw_desc->v_addr;
  384. u32 len = fw_desc->len;
  385. u32 val;
  386. u32 i;
  387. IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len);
  388. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  389. /* read data comes through single port, auto-incr addr */
  390. /* NOTE: Use the debugless read so we don't flood kernel log
  391. * if IWL_DL_IO is set */
  392. iwl_write_direct32(bus(priv), HBUS_TARG_MEM_RADDR,
  393. i + IWLAGN_RTC_INST_LOWER_BOUND);
  394. val = iwl_read32(bus(priv), HBUS_TARG_MEM_RDAT);
  395. if (val != le32_to_cpu(*image))
  396. return -EIO;
  397. }
  398. return 0;
  399. }
  400. static void iwl_print_mismatch_inst(struct iwl_priv *priv,
  401. struct fw_desc *fw_desc)
  402. {
  403. __le32 *image = (__le32 *)fw_desc->v_addr;
  404. u32 len = fw_desc->len;
  405. u32 val;
  406. u32 offs;
  407. int errors = 0;
  408. IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len);
  409. iwl_write_direct32(bus(priv), HBUS_TARG_MEM_RADDR,
  410. IWLAGN_RTC_INST_LOWER_BOUND);
  411. for (offs = 0;
  412. offs < len && errors < 20;
  413. offs += sizeof(u32), image++) {
  414. /* read data comes through single port, auto-incr addr */
  415. val = iwl_read32(bus(priv), HBUS_TARG_MEM_RDAT);
  416. if (val != le32_to_cpu(*image)) {
  417. IWL_ERR(priv, "uCode INST section at "
  418. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  419. offs, val, le32_to_cpu(*image));
  420. errors++;
  421. }
  422. }
  423. }
  424. /**
  425. * iwl_verify_ucode - determine which instruction image is in SRAM,
  426. * and verify its contents
  427. */
  428. static int iwl_verify_ucode(struct iwl_priv *priv, struct fw_img *img)
  429. {
  430. if (!iwl_verify_inst_sparse(priv, &img->code)) {
  431. IWL_DEBUG_FW(priv, "uCode is good in inst SRAM\n");
  432. return 0;
  433. }
  434. IWL_ERR(priv, "UCODE IMAGE IN INSTRUCTION SRAM NOT VALID!!\n");
  435. iwl_print_mismatch_inst(priv, &img->code);
  436. return -EIO;
  437. }
  438. struct iwlagn_alive_data {
  439. bool valid;
  440. u8 subtype;
  441. };
  442. static void iwlagn_alive_fn(struct iwl_priv *priv,
  443. struct iwl_rx_packet *pkt,
  444. void *data)
  445. {
  446. struct iwlagn_alive_data *alive_data = data;
  447. struct iwl_alive_resp *palive;
  448. palive = &pkt->u.alive_frame;
  449. IWL_DEBUG_FW(priv, "Alive ucode status 0x%08X revision "
  450. "0x%01X 0x%01X\n",
  451. palive->is_valid, palive->ver_type,
  452. palive->ver_subtype);
  453. priv->device_pointers.error_event_table =
  454. le32_to_cpu(palive->error_event_table_ptr);
  455. priv->device_pointers.log_event_table =
  456. le32_to_cpu(palive->log_event_table_ptr);
  457. alive_data->subtype = palive->ver_subtype;
  458. alive_data->valid = palive->is_valid == UCODE_VALID_OK;
  459. }
  460. #define UCODE_ALIVE_TIMEOUT HZ
  461. #define UCODE_CALIB_TIMEOUT (2*HZ)
  462. int iwlagn_load_ucode_wait_alive(struct iwl_priv *priv,
  463. enum iwlagn_ucode_type ucode_type)
  464. {
  465. struct iwl_notification_wait alive_wait;
  466. struct iwlagn_alive_data alive_data;
  467. int ret;
  468. enum iwlagn_ucode_type old_type;
  469. struct fw_img *image = iwl_get_ucode_image(priv, ucode_type);
  470. if (!image) {
  471. IWL_ERR(priv, "Invalid ucode requested (%d)\n", ucode_type);
  472. return -EINVAL;
  473. }
  474. ret = iwl_trans_start_device(trans(priv));
  475. if (ret)
  476. return ret;
  477. iwlagn_init_notification_wait(priv, &alive_wait, REPLY_ALIVE,
  478. iwlagn_alive_fn, &alive_data);
  479. old_type = priv->ucode_type;
  480. priv->ucode_type = ucode_type;
  481. ret = iwlagn_load_given_ucode(priv, image);
  482. if (ret) {
  483. priv->ucode_type = old_type;
  484. iwlagn_remove_notification(priv, &alive_wait);
  485. return ret;
  486. }
  487. iwl_trans_kick_nic(trans(priv));
  488. /*
  489. * Some things may run in the background now, but we
  490. * just wait for the ALIVE notification here.
  491. */
  492. ret = iwlagn_wait_notification(priv, &alive_wait, UCODE_ALIVE_TIMEOUT);
  493. if (ret) {
  494. priv->ucode_type = old_type;
  495. return ret;
  496. }
  497. if (!alive_data.valid) {
  498. IWL_ERR(priv, "Loaded ucode is not valid!\n");
  499. priv->ucode_type = old_type;
  500. return -EIO;
  501. }
  502. /*
  503. * This step takes a long time (60-80ms!!) and
  504. * WoWLAN image should be loaded quickly, so
  505. * skip it for WoWLAN.
  506. */
  507. if (ucode_type != IWL_UCODE_WOWLAN) {
  508. ret = iwl_verify_ucode(priv, image);
  509. if (ret) {
  510. priv->ucode_type = old_type;
  511. return ret;
  512. }
  513. /* delay a bit to give rfkill time to run */
  514. msleep(5);
  515. }
  516. ret = iwlagn_alive_notify(priv);
  517. if (ret) {
  518. IWL_WARN(priv,
  519. "Could not complete ALIVE transition: %d\n", ret);
  520. priv->ucode_type = old_type;
  521. return ret;
  522. }
  523. return 0;
  524. }
  525. int iwlagn_run_init_ucode(struct iwl_priv *priv)
  526. {
  527. struct iwl_notification_wait calib_wait;
  528. int ret;
  529. lockdep_assert_held(&priv->shrd->mutex);
  530. /* No init ucode required? Curious, but maybe ok */
  531. if (!priv->ucode_init.code.len)
  532. return 0;
  533. if (priv->ucode_type != IWL_UCODE_NONE)
  534. return 0;
  535. iwlagn_init_notification_wait(priv, &calib_wait,
  536. CALIBRATION_COMPLETE_NOTIFICATION,
  537. NULL, NULL);
  538. /* Will also start the device */
  539. ret = iwlagn_load_ucode_wait_alive(priv, IWL_UCODE_INIT);
  540. if (ret)
  541. goto error;
  542. ret = iwlagn_init_alive_start(priv);
  543. if (ret)
  544. goto error;
  545. /*
  546. * Some things may run in the background now, but we
  547. * just wait for the calibration complete notification.
  548. */
  549. ret = iwlagn_wait_notification(priv, &calib_wait, UCODE_CALIB_TIMEOUT);
  550. goto out;
  551. error:
  552. iwlagn_remove_notification(priv, &calib_wait);
  553. out:
  554. /* Whatever happened, stop the device */
  555. iwl_trans_stop_device(trans(priv));
  556. return ret;
  557. }