fimc-capture.c 49 KB

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  1. /*
  2. * Samsung S5P/EXYNOS4 SoC series camera interface (camera capture) driver
  3. *
  4. * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.
  5. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/errno.h>
  15. #include <linux/bug.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/device.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/list.h>
  20. #include <linux/slab.h>
  21. #include <linux/videodev2.h>
  22. #include <media/v4l2-device.h>
  23. #include <media/v4l2-ioctl.h>
  24. #include <media/v4l2-mem2mem.h>
  25. #include <media/videobuf2-core.h>
  26. #include <media/videobuf2-dma-contig.h>
  27. #include "fimc-mdevice.h"
  28. #include "fimc-core.h"
  29. #include "fimc-reg.h"
  30. static int fimc_capture_hw_init(struct fimc_dev *fimc)
  31. {
  32. struct fimc_source_info *si = &fimc->vid_cap.source_config;
  33. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  34. int ret;
  35. unsigned long flags;
  36. if (ctx == NULL || ctx->s_frame.fmt == NULL)
  37. return -EINVAL;
  38. if (si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) {
  39. ret = fimc_hw_camblk_cfg_writeback(fimc);
  40. if (ret < 0)
  41. return ret;
  42. }
  43. spin_lock_irqsave(&fimc->slock, flags);
  44. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  45. fimc_set_yuv_order(ctx);
  46. fimc_hw_set_camera_polarity(fimc, si);
  47. fimc_hw_set_camera_type(fimc, si);
  48. fimc_hw_set_camera_source(fimc, si);
  49. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  50. ret = fimc_set_scaler_info(ctx);
  51. if (!ret) {
  52. fimc_hw_set_input_path(ctx);
  53. fimc_hw_set_prescaler(ctx);
  54. fimc_hw_set_mainscaler(ctx);
  55. fimc_hw_set_target_format(ctx);
  56. fimc_hw_set_rotation(ctx);
  57. fimc_hw_set_effect(ctx);
  58. fimc_hw_set_output_path(ctx);
  59. fimc_hw_set_out_dma(ctx);
  60. if (fimc->drv_data->alpha_color)
  61. fimc_hw_set_rgb_alpha(ctx);
  62. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  63. }
  64. spin_unlock_irqrestore(&fimc->slock, flags);
  65. return ret;
  66. }
  67. /*
  68. * Reinitialize the driver so it is ready to start the streaming again.
  69. * Set fimc->state to indicate stream off and the hardware shut down state.
  70. * If not suspending (@suspend is false), return any buffers to videobuf2.
  71. * Otherwise put any owned buffers onto the pending buffers queue, so they
  72. * can be re-spun when the device is being resumed. Also perform FIMC
  73. * software reset and disable streaming on the whole pipeline if required.
  74. */
  75. static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)
  76. {
  77. struct fimc_vid_cap *cap = &fimc->vid_cap;
  78. struct fimc_vid_buffer *buf;
  79. unsigned long flags;
  80. bool streaming;
  81. spin_lock_irqsave(&fimc->slock, flags);
  82. streaming = fimc->state & (1 << ST_CAPT_ISP_STREAM);
  83. fimc->state &= ~(1 << ST_CAPT_RUN | 1 << ST_CAPT_SHUT |
  84. 1 << ST_CAPT_STREAM | 1 << ST_CAPT_ISP_STREAM);
  85. if (suspend)
  86. fimc->state |= (1 << ST_CAPT_SUSPENDED);
  87. else
  88. fimc->state &= ~(1 << ST_CAPT_PEND | 1 << ST_CAPT_SUSPENDED);
  89. /* Release unused buffers */
  90. while (!suspend && !list_empty(&cap->pending_buf_q)) {
  91. buf = fimc_pending_queue_pop(cap);
  92. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  93. }
  94. /* If suspending put unused buffers onto pending queue */
  95. while (!list_empty(&cap->active_buf_q)) {
  96. buf = fimc_active_queue_pop(cap);
  97. if (suspend)
  98. fimc_pending_queue_add(cap, buf);
  99. else
  100. vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
  101. }
  102. fimc_hw_reset(fimc);
  103. cap->buf_index = 0;
  104. spin_unlock_irqrestore(&fimc->slock, flags);
  105. if (streaming)
  106. return fimc_pipeline_call(fimc, set_stream,
  107. &fimc->pipeline, 0);
  108. else
  109. return 0;
  110. }
  111. static int fimc_stop_capture(struct fimc_dev *fimc, bool suspend)
  112. {
  113. unsigned long flags;
  114. if (!fimc_capture_active(fimc))
  115. return 0;
  116. spin_lock_irqsave(&fimc->slock, flags);
  117. set_bit(ST_CAPT_SHUT, &fimc->state);
  118. fimc_deactivate_capture(fimc);
  119. spin_unlock_irqrestore(&fimc->slock, flags);
  120. wait_event_timeout(fimc->irq_queue,
  121. !test_bit(ST_CAPT_SHUT, &fimc->state),
  122. (2*HZ/10)); /* 200 ms */
  123. return fimc_capture_state_cleanup(fimc, suspend);
  124. }
  125. /**
  126. * fimc_capture_config_update - apply the camera interface configuration
  127. *
  128. * To be called from within the interrupt handler with fimc.slock
  129. * spinlock held. It updates the camera pixel crop, rotation and
  130. * image flip in H/W.
  131. */
  132. static int fimc_capture_config_update(struct fimc_ctx *ctx)
  133. {
  134. struct fimc_dev *fimc = ctx->fimc_dev;
  135. int ret;
  136. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  137. ret = fimc_set_scaler_info(ctx);
  138. if (ret)
  139. return ret;
  140. fimc_hw_set_prescaler(ctx);
  141. fimc_hw_set_mainscaler(ctx);
  142. fimc_hw_set_target_format(ctx);
  143. fimc_hw_set_rotation(ctx);
  144. fimc_hw_set_effect(ctx);
  145. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  146. fimc_hw_set_out_dma(ctx);
  147. if (fimc->drv_data->alpha_color)
  148. fimc_hw_set_rgb_alpha(ctx);
  149. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  150. return ret;
  151. }
  152. void fimc_capture_irq_handler(struct fimc_dev *fimc, int deq_buf)
  153. {
  154. struct v4l2_subdev *csis = fimc->pipeline.subdevs[IDX_CSIS];
  155. struct fimc_vid_cap *cap = &fimc->vid_cap;
  156. struct fimc_frame *f = &cap->ctx->d_frame;
  157. struct fimc_vid_buffer *v_buf;
  158. struct timeval *tv;
  159. struct timespec ts;
  160. if (test_and_clear_bit(ST_CAPT_SHUT, &fimc->state)) {
  161. wake_up(&fimc->irq_queue);
  162. goto done;
  163. }
  164. if (!list_empty(&cap->active_buf_q) &&
  165. test_bit(ST_CAPT_RUN, &fimc->state) && deq_buf) {
  166. ktime_get_real_ts(&ts);
  167. v_buf = fimc_active_queue_pop(cap);
  168. tv = &v_buf->vb.v4l2_buf.timestamp;
  169. tv->tv_sec = ts.tv_sec;
  170. tv->tv_usec = ts.tv_nsec / NSEC_PER_USEC;
  171. v_buf->vb.v4l2_buf.sequence = cap->frame_count++;
  172. vb2_buffer_done(&v_buf->vb, VB2_BUF_STATE_DONE);
  173. }
  174. if (!list_empty(&cap->pending_buf_q)) {
  175. v_buf = fimc_pending_queue_pop(cap);
  176. fimc_hw_set_output_addr(fimc, &v_buf->paddr, cap->buf_index);
  177. v_buf->index = cap->buf_index;
  178. /* Move the buffer to the capture active queue */
  179. fimc_active_queue_add(cap, v_buf);
  180. dbg("next frame: %d, done frame: %d",
  181. fimc_hw_get_frame_index(fimc), v_buf->index);
  182. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  183. cap->buf_index = 0;
  184. }
  185. /*
  186. * Set up a buffer at MIPI-CSIS if current image format
  187. * requires the frame embedded data capture.
  188. */
  189. if (f->fmt->mdataplanes && !list_empty(&cap->active_buf_q)) {
  190. unsigned int plane = ffs(f->fmt->mdataplanes) - 1;
  191. unsigned int size = f->payload[plane];
  192. s32 index = fimc_hw_get_frame_index(fimc);
  193. void *vaddr;
  194. list_for_each_entry(v_buf, &cap->active_buf_q, list) {
  195. if (v_buf->index != index)
  196. continue;
  197. vaddr = vb2_plane_vaddr(&v_buf->vb, plane);
  198. v4l2_subdev_call(csis, video, s_rx_buffer,
  199. vaddr, &size);
  200. break;
  201. }
  202. }
  203. if (cap->active_buf_cnt == 0) {
  204. if (deq_buf)
  205. clear_bit(ST_CAPT_RUN, &fimc->state);
  206. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  207. cap->buf_index = 0;
  208. } else {
  209. set_bit(ST_CAPT_RUN, &fimc->state);
  210. }
  211. if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state))
  212. fimc_capture_config_update(cap->ctx);
  213. done:
  214. if (cap->active_buf_cnt == 1) {
  215. fimc_deactivate_capture(fimc);
  216. clear_bit(ST_CAPT_STREAM, &fimc->state);
  217. }
  218. dbg("frame: %d, active_buf_cnt: %d",
  219. fimc_hw_get_frame_index(fimc), cap->active_buf_cnt);
  220. }
  221. static int start_streaming(struct vb2_queue *q, unsigned int count)
  222. {
  223. struct fimc_ctx *ctx = q->drv_priv;
  224. struct fimc_dev *fimc = ctx->fimc_dev;
  225. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  226. int min_bufs;
  227. int ret;
  228. vid_cap->frame_count = 0;
  229. ret = fimc_capture_hw_init(fimc);
  230. if (ret) {
  231. fimc_capture_state_cleanup(fimc, false);
  232. return ret;
  233. }
  234. set_bit(ST_CAPT_PEND, &fimc->state);
  235. min_bufs = fimc->vid_cap.reqbufs_count > 1 ? 2 : 1;
  236. if (vid_cap->active_buf_cnt >= min_bufs &&
  237. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  238. fimc_activate_capture(ctx);
  239. if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  240. return fimc_pipeline_call(fimc, set_stream,
  241. &fimc->pipeline, 1);
  242. }
  243. return 0;
  244. }
  245. static int stop_streaming(struct vb2_queue *q)
  246. {
  247. struct fimc_ctx *ctx = q->drv_priv;
  248. struct fimc_dev *fimc = ctx->fimc_dev;
  249. if (!fimc_capture_active(fimc))
  250. return -EINVAL;
  251. return fimc_stop_capture(fimc, false);
  252. }
  253. int fimc_capture_suspend(struct fimc_dev *fimc)
  254. {
  255. bool suspend = fimc_capture_busy(fimc);
  256. int ret = fimc_stop_capture(fimc, suspend);
  257. if (ret)
  258. return ret;
  259. return fimc_pipeline_call(fimc, close, &fimc->pipeline);
  260. }
  261. static void buffer_queue(struct vb2_buffer *vb);
  262. int fimc_capture_resume(struct fimc_dev *fimc)
  263. {
  264. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  265. struct fimc_vid_buffer *buf;
  266. int i;
  267. if (!test_and_clear_bit(ST_CAPT_SUSPENDED, &fimc->state))
  268. return 0;
  269. INIT_LIST_HEAD(&fimc->vid_cap.active_buf_q);
  270. vid_cap->buf_index = 0;
  271. fimc_pipeline_call(fimc, open, &fimc->pipeline,
  272. &vid_cap->vfd.entity, false);
  273. fimc_capture_hw_init(fimc);
  274. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  275. for (i = 0; i < vid_cap->reqbufs_count; i++) {
  276. if (list_empty(&vid_cap->pending_buf_q))
  277. break;
  278. buf = fimc_pending_queue_pop(vid_cap);
  279. buffer_queue(&buf->vb);
  280. }
  281. return 0;
  282. }
  283. static int queue_setup(struct vb2_queue *vq, const struct v4l2_format *pfmt,
  284. unsigned int *num_buffers, unsigned int *num_planes,
  285. unsigned int sizes[], void *allocators[])
  286. {
  287. const struct v4l2_pix_format_mplane *pixm = NULL;
  288. struct fimc_ctx *ctx = vq->drv_priv;
  289. struct fimc_frame *frame = &ctx->d_frame;
  290. struct fimc_fmt *fmt = frame->fmt;
  291. unsigned long wh;
  292. int i;
  293. if (pfmt) {
  294. pixm = &pfmt->fmt.pix_mp;
  295. fmt = fimc_find_format(&pixm->pixelformat, NULL,
  296. FMT_FLAGS_CAM | FMT_FLAGS_M2M, -1);
  297. wh = pixm->width * pixm->height;
  298. } else {
  299. wh = frame->f_width * frame->f_height;
  300. }
  301. if (fmt == NULL)
  302. return -EINVAL;
  303. *num_planes = fmt->memplanes;
  304. for (i = 0; i < fmt->memplanes; i++) {
  305. unsigned int size = (wh * fmt->depth[i]) / 8;
  306. if (pixm)
  307. sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
  308. else if (fimc_fmt_is_user_defined(fmt->color))
  309. sizes[i] = frame->payload[i];
  310. else
  311. sizes[i] = max_t(u32, size, frame->payload[i]);
  312. allocators[i] = ctx->fimc_dev->alloc_ctx;
  313. }
  314. return 0;
  315. }
  316. static int buffer_prepare(struct vb2_buffer *vb)
  317. {
  318. struct vb2_queue *vq = vb->vb2_queue;
  319. struct fimc_ctx *ctx = vq->drv_priv;
  320. int i;
  321. if (ctx->d_frame.fmt == NULL)
  322. return -EINVAL;
  323. for (i = 0; i < ctx->d_frame.fmt->memplanes; i++) {
  324. unsigned long size = ctx->d_frame.payload[i];
  325. if (vb2_plane_size(vb, i) < size) {
  326. v4l2_err(&ctx->fimc_dev->vid_cap.vfd,
  327. "User buffer too small (%ld < %ld)\n",
  328. vb2_plane_size(vb, i), size);
  329. return -EINVAL;
  330. }
  331. vb2_set_plane_payload(vb, i, size);
  332. }
  333. return 0;
  334. }
  335. static void buffer_queue(struct vb2_buffer *vb)
  336. {
  337. struct fimc_vid_buffer *buf
  338. = container_of(vb, struct fimc_vid_buffer, vb);
  339. struct fimc_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  340. struct fimc_dev *fimc = ctx->fimc_dev;
  341. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  342. unsigned long flags;
  343. int min_bufs;
  344. spin_lock_irqsave(&fimc->slock, flags);
  345. fimc_prepare_addr(ctx, &buf->vb, &ctx->d_frame, &buf->paddr);
  346. if (!test_bit(ST_CAPT_SUSPENDED, &fimc->state) &&
  347. !test_bit(ST_CAPT_STREAM, &fimc->state) &&
  348. vid_cap->active_buf_cnt < FIMC_MAX_OUT_BUFS) {
  349. /* Setup the buffer directly for processing. */
  350. int buf_id = (vid_cap->reqbufs_count == 1) ? -1 :
  351. vid_cap->buf_index;
  352. fimc_hw_set_output_addr(fimc, &buf->paddr, buf_id);
  353. buf->index = vid_cap->buf_index;
  354. fimc_active_queue_add(vid_cap, buf);
  355. if (++vid_cap->buf_index >= FIMC_MAX_OUT_BUFS)
  356. vid_cap->buf_index = 0;
  357. } else {
  358. fimc_pending_queue_add(vid_cap, buf);
  359. }
  360. min_bufs = vid_cap->reqbufs_count > 1 ? 2 : 1;
  361. if (vb2_is_streaming(&vid_cap->vbq) &&
  362. vid_cap->active_buf_cnt >= min_bufs &&
  363. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  364. int ret;
  365. fimc_activate_capture(ctx);
  366. spin_unlock_irqrestore(&fimc->slock, flags);
  367. if (test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  368. return;
  369. ret = fimc_pipeline_call(fimc, set_stream, &fimc->pipeline, 1);
  370. if (ret < 0)
  371. v4l2_err(&vid_cap->vfd, "stream on failed: %d\n", ret);
  372. return;
  373. }
  374. spin_unlock_irqrestore(&fimc->slock, flags);
  375. }
  376. static struct vb2_ops fimc_capture_qops = {
  377. .queue_setup = queue_setup,
  378. .buf_prepare = buffer_prepare,
  379. .buf_queue = buffer_queue,
  380. .wait_prepare = vb2_ops_wait_prepare,
  381. .wait_finish = vb2_ops_wait_finish,
  382. .start_streaming = start_streaming,
  383. .stop_streaming = stop_streaming,
  384. };
  385. /**
  386. * fimc_capture_ctrls_create - initialize the control handler
  387. * Initialize the capture video node control handler and fill it
  388. * with the FIMC controls. Inherit any sensor's controls if the
  389. * 'user_subdev_api' flag is false (default behaviour).
  390. * This function need to be called with the graph mutex held.
  391. */
  392. int fimc_capture_ctrls_create(struct fimc_dev *fimc)
  393. {
  394. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  395. struct v4l2_subdev *sensor = fimc->pipeline.subdevs[IDX_SENSOR];
  396. int ret;
  397. if (WARN_ON(vid_cap->ctx == NULL))
  398. return -ENXIO;
  399. if (vid_cap->ctx->ctrls.ready)
  400. return 0;
  401. ret = fimc_ctrls_create(vid_cap->ctx);
  402. if (ret || vid_cap->user_subdev_api || !sensor ||
  403. !vid_cap->ctx->ctrls.ready)
  404. return ret;
  405. return v4l2_ctrl_add_handler(&vid_cap->ctx->ctrls.handler,
  406. sensor->ctrl_handler, NULL);
  407. }
  408. static int fimc_capture_set_default_format(struct fimc_dev *fimc);
  409. static int fimc_capture_open(struct file *file)
  410. {
  411. struct fimc_dev *fimc = video_drvdata(file);
  412. int ret = -EBUSY;
  413. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  414. fimc_md_graph_lock(fimc);
  415. mutex_lock(&fimc->lock);
  416. if (fimc_m2m_active(fimc))
  417. goto unlock;
  418. set_bit(ST_CAPT_BUSY, &fimc->state);
  419. ret = pm_runtime_get_sync(&fimc->pdev->dev);
  420. if (ret < 0)
  421. goto unlock;
  422. ret = v4l2_fh_open(file);
  423. if (ret) {
  424. pm_runtime_put(&fimc->pdev->dev);
  425. goto unlock;
  426. }
  427. if (v4l2_fh_is_singular_file(file)) {
  428. ret = fimc_pipeline_call(fimc, open, &fimc->pipeline,
  429. &fimc->vid_cap.vfd.entity, true);
  430. if (!ret && !fimc->vid_cap.user_subdev_api)
  431. ret = fimc_capture_set_default_format(fimc);
  432. if (!ret)
  433. ret = fimc_capture_ctrls_create(fimc);
  434. if (ret < 0) {
  435. clear_bit(ST_CAPT_BUSY, &fimc->state);
  436. pm_runtime_put_sync(&fimc->pdev->dev);
  437. v4l2_fh_release(file);
  438. } else {
  439. fimc->vid_cap.refcnt++;
  440. }
  441. }
  442. unlock:
  443. mutex_unlock(&fimc->lock);
  444. fimc_md_graph_unlock(fimc);
  445. return ret;
  446. }
  447. static int fimc_capture_release(struct file *file)
  448. {
  449. struct fimc_dev *fimc = video_drvdata(file);
  450. int ret;
  451. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  452. mutex_lock(&fimc->lock);
  453. if (v4l2_fh_is_singular_file(file)) {
  454. clear_bit(ST_CAPT_BUSY, &fimc->state);
  455. fimc_stop_capture(fimc, false);
  456. fimc_pipeline_call(fimc, close, &fimc->pipeline);
  457. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  458. fimc->vid_cap.refcnt--;
  459. }
  460. pm_runtime_put(&fimc->pdev->dev);
  461. if (v4l2_fh_is_singular_file(file))
  462. fimc_ctrls_delete(fimc->vid_cap.ctx);
  463. ret = vb2_fop_release(file);
  464. mutex_unlock(&fimc->lock);
  465. return ret;
  466. }
  467. static const struct v4l2_file_operations fimc_capture_fops = {
  468. .owner = THIS_MODULE,
  469. .open = fimc_capture_open,
  470. .release = fimc_capture_release,
  471. .poll = vb2_fop_poll,
  472. .unlocked_ioctl = video_ioctl2,
  473. .mmap = vb2_fop_mmap,
  474. };
  475. /*
  476. * Format and crop negotiation helpers
  477. */
  478. static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,
  479. u32 *width, u32 *height,
  480. u32 *code, u32 *fourcc, int pad)
  481. {
  482. bool rotation = ctx->rotation == 90 || ctx->rotation == 270;
  483. struct fimc_dev *fimc = ctx->fimc_dev;
  484. const struct fimc_variant *var = fimc->variant;
  485. const struct fimc_pix_limit *pl = var->pix_limit;
  486. struct fimc_frame *dst = &ctx->d_frame;
  487. u32 depth, min_w, max_w, min_h, align_h = 3;
  488. u32 mask = FMT_FLAGS_CAM;
  489. struct fimc_fmt *ffmt;
  490. /* Conversion from/to JPEG or User Defined format is not supported */
  491. if (code && ctx->s_frame.fmt && pad == FIMC_SD_PAD_SOURCE &&
  492. fimc_fmt_is_user_defined(ctx->s_frame.fmt->color))
  493. *code = ctx->s_frame.fmt->mbus_code;
  494. if (fourcc && *fourcc != V4L2_PIX_FMT_JPEG && pad == FIMC_SD_PAD_SOURCE)
  495. mask |= FMT_FLAGS_M2M;
  496. if (pad == FIMC_SD_PAD_SINK_FIFO)
  497. mask = FMT_FLAGS_WRITEBACK;
  498. ffmt = fimc_find_format(fourcc, code, mask, 0);
  499. if (WARN_ON(!ffmt))
  500. return NULL;
  501. if (code)
  502. *code = ffmt->mbus_code;
  503. if (fourcc)
  504. *fourcc = ffmt->fourcc;
  505. if (pad != FIMC_SD_PAD_SOURCE) {
  506. max_w = fimc_fmt_is_user_defined(ffmt->color) ?
  507. pl->scaler_dis_w : pl->scaler_en_w;
  508. /* Apply the camera input interface pixel constraints */
  509. v4l_bound_align_image(width, max_t(u32, *width, 32), max_w, 4,
  510. height, max_t(u32, *height, 32),
  511. FIMC_CAMIF_MAX_HEIGHT,
  512. fimc_fmt_is_user_defined(ffmt->color) ?
  513. 3 : 1,
  514. 0);
  515. return ffmt;
  516. }
  517. /* Can't scale or crop in transparent (JPEG) transfer mode */
  518. if (fimc_fmt_is_user_defined(ffmt->color)) {
  519. *width = ctx->s_frame.f_width;
  520. *height = ctx->s_frame.f_height;
  521. return ffmt;
  522. }
  523. /* Apply the scaler and the output DMA constraints */
  524. max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w;
  525. if (ctx->state & FIMC_COMPOSE) {
  526. min_w = dst->offs_h + dst->width;
  527. min_h = dst->offs_v + dst->height;
  528. } else {
  529. min_w = var->min_out_pixsize;
  530. min_h = var->min_out_pixsize;
  531. }
  532. if (var->min_vsize_align == 1 && !rotation)
  533. align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1;
  534. depth = fimc_get_format_depth(ffmt);
  535. v4l_bound_align_image(width, min_w, max_w,
  536. ffs(var->min_out_pixsize) - 1,
  537. height, min_h, FIMC_CAMIF_MAX_HEIGHT,
  538. align_h,
  539. 64/(ALIGN(depth, 8)));
  540. dbg("pad%d: code: 0x%x, %dx%d. dst fmt: %dx%d",
  541. pad, code ? *code : 0, *width, *height,
  542. dst->f_width, dst->f_height);
  543. return ffmt;
  544. }
  545. static void fimc_capture_try_selection(struct fimc_ctx *ctx,
  546. struct v4l2_rect *r,
  547. int target)
  548. {
  549. bool rotate = ctx->rotation == 90 || ctx->rotation == 270;
  550. struct fimc_dev *fimc = ctx->fimc_dev;
  551. const struct fimc_variant *var = fimc->variant;
  552. const struct fimc_pix_limit *pl = var->pix_limit;
  553. struct fimc_frame *sink = &ctx->s_frame;
  554. u32 max_w, max_h, min_w = 0, min_h = 0, min_sz;
  555. u32 align_sz = 0, align_h = 4;
  556. u32 max_sc_h, max_sc_v;
  557. /* In JPEG transparent transfer mode cropping is not supported */
  558. if (fimc_fmt_is_user_defined(ctx->d_frame.fmt->color)) {
  559. r->width = sink->f_width;
  560. r->height = sink->f_height;
  561. r->left = r->top = 0;
  562. return;
  563. }
  564. if (target == V4L2_SEL_TGT_COMPOSE) {
  565. if (ctx->rotation != 90 && ctx->rotation != 270)
  566. align_h = 1;
  567. max_sc_h = min(SCALER_MAX_HRATIO, 1 << (ffs(sink->width) - 3));
  568. max_sc_v = min(SCALER_MAX_VRATIO, 1 << (ffs(sink->height) - 1));
  569. min_sz = var->min_out_pixsize;
  570. } else {
  571. u32 depth = fimc_get_format_depth(sink->fmt);
  572. align_sz = 64/ALIGN(depth, 8);
  573. min_sz = var->min_inp_pixsize;
  574. min_w = min_h = min_sz;
  575. max_sc_h = max_sc_v = 1;
  576. }
  577. /*
  578. * For the compose rectangle the following constraints must be met:
  579. * - it must fit in the sink pad format rectangle (f_width/f_height);
  580. * - maximum downscaling ratio is 64;
  581. * - maximum crop size depends if the rotator is used or not;
  582. * - the sink pad format width/height must be 4 multiple of the
  583. * prescaler ratios determined by sink pad size and source pad crop,
  584. * the prescaler ratio is returned by fimc_get_scaler_factor().
  585. */
  586. max_w = min_t(u32,
  587. rotate ? pl->out_rot_en_w : pl->out_rot_dis_w,
  588. rotate ? sink->f_height : sink->f_width);
  589. max_h = min_t(u32, FIMC_CAMIF_MAX_HEIGHT, sink->f_height);
  590. if (target == V4L2_SEL_TGT_COMPOSE) {
  591. min_w = min_t(u32, max_w, sink->f_width / max_sc_h);
  592. min_h = min_t(u32, max_h, sink->f_height / max_sc_v);
  593. if (rotate) {
  594. swap(max_sc_h, max_sc_v);
  595. swap(min_w, min_h);
  596. }
  597. }
  598. v4l_bound_align_image(&r->width, min_w, max_w, ffs(min_sz) - 1,
  599. &r->height, min_h, max_h, align_h,
  600. align_sz);
  601. /* Adjust left/top if crop/compose rectangle is out of bounds */
  602. r->left = clamp_t(u32, r->left, 0, sink->f_width - r->width);
  603. r->top = clamp_t(u32, r->top, 0, sink->f_height - r->height);
  604. r->left = round_down(r->left, var->hor_offs_align);
  605. dbg("target %#x: (%d,%d)/%dx%d, sink fmt: %dx%d",
  606. target, r->left, r->top, r->width, r->height,
  607. sink->f_width, sink->f_height);
  608. }
  609. /*
  610. * The video node ioctl operations
  611. */
  612. static int fimc_vidioc_querycap_capture(struct file *file, void *priv,
  613. struct v4l2_capability *cap)
  614. {
  615. struct fimc_dev *fimc = video_drvdata(file);
  616. strncpy(cap->driver, fimc->pdev->name, sizeof(cap->driver) - 1);
  617. strncpy(cap->card, fimc->pdev->name, sizeof(cap->card) - 1);
  618. cap->bus_info[0] = 0;
  619. cap->capabilities = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_CAPTURE_MPLANE;
  620. return 0;
  621. }
  622. static int fimc_cap_enum_fmt_mplane(struct file *file, void *priv,
  623. struct v4l2_fmtdesc *f)
  624. {
  625. struct fimc_fmt *fmt;
  626. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM | FMT_FLAGS_M2M,
  627. f->index);
  628. if (!fmt)
  629. return -EINVAL;
  630. strncpy(f->description, fmt->name, sizeof(f->description) - 1);
  631. f->pixelformat = fmt->fourcc;
  632. if (fmt->fourcc == V4L2_MBUS_FMT_JPEG_1X8)
  633. f->flags |= V4L2_FMT_FLAG_COMPRESSED;
  634. return 0;
  635. }
  636. static struct media_entity *fimc_pipeline_get_head(struct media_entity *me)
  637. {
  638. struct media_pad *pad = &me->pads[0];
  639. while (!(pad->flags & MEDIA_PAD_FL_SOURCE)) {
  640. pad = media_entity_remote_source(pad);
  641. if (!pad)
  642. break;
  643. me = pad->entity;
  644. pad = &me->pads[0];
  645. }
  646. return me;
  647. }
  648. /**
  649. * fimc_pipeline_try_format - negotiate and/or set formats at pipeline
  650. * elements
  651. * @ctx: FIMC capture context
  652. * @tfmt: media bus format to try/set on subdevs
  653. * @fmt_id: fimc pixel format id corresponding to returned @tfmt (output)
  654. * @set: true to set format on subdevs, false to try only
  655. */
  656. static int fimc_pipeline_try_format(struct fimc_ctx *ctx,
  657. struct v4l2_mbus_framefmt *tfmt,
  658. struct fimc_fmt **fmt_id,
  659. bool set)
  660. {
  661. struct fimc_dev *fimc = ctx->fimc_dev;
  662. struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
  663. struct v4l2_subdev_format sfmt;
  664. struct v4l2_mbus_framefmt *mf = &sfmt.format;
  665. struct media_entity *me;
  666. struct fimc_fmt *ffmt;
  667. struct media_pad *pad;
  668. int ret, i = 1;
  669. u32 fcc;
  670. if (WARN_ON(!sd || !tfmt))
  671. return -EINVAL;
  672. memset(&sfmt, 0, sizeof(sfmt));
  673. sfmt.format = *tfmt;
  674. sfmt.which = set ? V4L2_SUBDEV_FORMAT_ACTIVE : V4L2_SUBDEV_FORMAT_TRY;
  675. me = fimc_pipeline_get_head(&sd->entity);
  676. while (1) {
  677. ffmt = fimc_find_format(NULL, mf->code != 0 ? &mf->code : NULL,
  678. FMT_FLAGS_CAM, i++);
  679. if (ffmt == NULL) {
  680. /*
  681. * Notify user-space if common pixel code for
  682. * host and sensor does not exist.
  683. */
  684. return -EINVAL;
  685. }
  686. mf->code = tfmt->code = ffmt->mbus_code;
  687. /* set format on all pipeline subdevs */
  688. while (me != &fimc->vid_cap.subdev.entity) {
  689. sd = media_entity_to_v4l2_subdev(me);
  690. sfmt.pad = 0;
  691. ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sfmt);
  692. if (ret)
  693. return ret;
  694. if (me->pads[0].flags & MEDIA_PAD_FL_SINK) {
  695. sfmt.pad = me->num_pads - 1;
  696. mf->code = tfmt->code;
  697. ret = v4l2_subdev_call(sd, pad, set_fmt, NULL,
  698. &sfmt);
  699. if (ret)
  700. return ret;
  701. }
  702. pad = media_entity_remote_source(&me->pads[sfmt.pad]);
  703. if (!pad)
  704. return -EINVAL;
  705. me = pad->entity;
  706. }
  707. if (mf->code != tfmt->code)
  708. continue;
  709. fcc = ffmt->fourcc;
  710. tfmt->width = mf->width;
  711. tfmt->height = mf->height;
  712. ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
  713. NULL, &fcc, FIMC_SD_PAD_SINK_CAM);
  714. ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
  715. NULL, &fcc, FIMC_SD_PAD_SOURCE);
  716. if (ffmt && ffmt->mbus_code)
  717. mf->code = ffmt->mbus_code;
  718. if (mf->width != tfmt->width || mf->height != tfmt->height)
  719. continue;
  720. tfmt->code = mf->code;
  721. break;
  722. }
  723. if (fmt_id && ffmt)
  724. *fmt_id = ffmt;
  725. *tfmt = *mf;
  726. return 0;
  727. }
  728. /**
  729. * fimc_get_sensor_frame_desc - query the sensor for media bus frame parameters
  730. * @sensor: pointer to the sensor subdev
  731. * @plane_fmt: provides plane sizes corresponding to the frame layout entries
  732. * @try: true to set the frame parameters, false to query only
  733. *
  734. * This function is used by this driver only for compressed/blob data formats.
  735. */
  736. static int fimc_get_sensor_frame_desc(struct v4l2_subdev *sensor,
  737. struct v4l2_plane_pix_format *plane_fmt,
  738. unsigned int num_planes, bool try)
  739. {
  740. struct v4l2_mbus_frame_desc fd;
  741. int i, ret;
  742. int pad;
  743. for (i = 0; i < num_planes; i++)
  744. fd.entry[i].length = plane_fmt[i].sizeimage;
  745. pad = sensor->entity.num_pads - 1;
  746. if (try)
  747. ret = v4l2_subdev_call(sensor, pad, set_frame_desc, pad, &fd);
  748. else
  749. ret = v4l2_subdev_call(sensor, pad, get_frame_desc, pad, &fd);
  750. if (ret < 0)
  751. return ret;
  752. if (num_planes != fd.num_entries)
  753. return -EINVAL;
  754. for (i = 0; i < num_planes; i++)
  755. plane_fmt[i].sizeimage = fd.entry[i].length;
  756. if (fd.entry[0].length > FIMC_MAX_JPEG_BUF_SIZE) {
  757. v4l2_err(sensor->v4l2_dev, "Unsupported buffer size: %u\n",
  758. fd.entry[0].length);
  759. return -EINVAL;
  760. }
  761. return 0;
  762. }
  763. static int fimc_cap_g_fmt_mplane(struct file *file, void *fh,
  764. struct v4l2_format *f)
  765. {
  766. struct fimc_dev *fimc = video_drvdata(file);
  767. __fimc_get_format(&fimc->vid_cap.ctx->d_frame, f);
  768. return 0;
  769. }
  770. static int fimc_cap_try_fmt_mplane(struct file *file, void *fh,
  771. struct v4l2_format *f)
  772. {
  773. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  774. struct fimc_dev *fimc = video_drvdata(file);
  775. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  776. struct v4l2_mbus_framefmt mf;
  777. struct fimc_fmt *ffmt = NULL;
  778. int ret = 0;
  779. fimc_md_graph_lock(fimc);
  780. mutex_lock(&fimc->lock);
  781. if (fimc_jpeg_fourcc(pix->pixelformat)) {
  782. fimc_capture_try_format(ctx, &pix->width, &pix->height,
  783. NULL, &pix->pixelformat,
  784. FIMC_SD_PAD_SINK_CAM);
  785. ctx->s_frame.f_width = pix->width;
  786. ctx->s_frame.f_height = pix->height;
  787. }
  788. ffmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
  789. NULL, &pix->pixelformat,
  790. FIMC_SD_PAD_SOURCE);
  791. if (!ffmt) {
  792. ret = -EINVAL;
  793. goto unlock;
  794. }
  795. if (!fimc->vid_cap.user_subdev_api) {
  796. mf.width = pix->width;
  797. mf.height = pix->height;
  798. mf.code = ffmt->mbus_code;
  799. fimc_pipeline_try_format(ctx, &mf, &ffmt, false);
  800. pix->width = mf.width;
  801. pix->height = mf.height;
  802. if (ffmt)
  803. pix->pixelformat = ffmt->fourcc;
  804. }
  805. fimc_adjust_mplane_format(ffmt, pix->width, pix->height, pix);
  806. if (ffmt->flags & FMT_FLAGS_COMPRESSED)
  807. fimc_get_sensor_frame_desc(fimc->pipeline.subdevs[IDX_SENSOR],
  808. pix->plane_fmt, ffmt->memplanes, true);
  809. unlock:
  810. mutex_unlock(&fimc->lock);
  811. fimc_md_graph_unlock(fimc);
  812. return ret;
  813. }
  814. static void fimc_capture_mark_jpeg_xfer(struct fimc_ctx *ctx,
  815. enum fimc_color_fmt color)
  816. {
  817. bool jpeg = fimc_fmt_is_user_defined(color);
  818. ctx->scaler.enabled = !jpeg;
  819. fimc_ctrls_activate(ctx, !jpeg);
  820. if (jpeg)
  821. set_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  822. else
  823. clear_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  824. }
  825. static int __fimc_capture_set_format(struct fimc_dev *fimc,
  826. struct v4l2_format *f)
  827. {
  828. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  829. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  830. struct v4l2_mbus_framefmt *mf = &fimc->vid_cap.ci_fmt;
  831. struct fimc_frame *ff = &ctx->d_frame;
  832. struct fimc_fmt *s_fmt = NULL;
  833. int ret, i;
  834. if (vb2_is_busy(&fimc->vid_cap.vbq))
  835. return -EBUSY;
  836. /* Pre-configure format at camera interface input, for JPEG only */
  837. if (fimc_jpeg_fourcc(pix->pixelformat)) {
  838. fimc_capture_try_format(ctx, &pix->width, &pix->height,
  839. NULL, &pix->pixelformat,
  840. FIMC_SD_PAD_SINK_CAM);
  841. ctx->s_frame.f_width = pix->width;
  842. ctx->s_frame.f_height = pix->height;
  843. }
  844. /* Try the format at the scaler and the DMA output */
  845. ff->fmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
  846. NULL, &pix->pixelformat,
  847. FIMC_SD_PAD_SOURCE);
  848. if (!ff->fmt)
  849. return -EINVAL;
  850. /* Update RGB Alpha control state and value range */
  851. fimc_alpha_ctrl_update(ctx);
  852. /* Try to match format at the host and the sensor */
  853. if (!fimc->vid_cap.user_subdev_api) {
  854. mf->code = ff->fmt->mbus_code;
  855. mf->width = pix->width;
  856. mf->height = pix->height;
  857. ret = fimc_pipeline_try_format(ctx, mf, &s_fmt, true);
  858. if (ret)
  859. return ret;
  860. pix->width = mf->width;
  861. pix->height = mf->height;
  862. }
  863. fimc_adjust_mplane_format(ff->fmt, pix->width, pix->height, pix);
  864. if (ff->fmt->flags & FMT_FLAGS_COMPRESSED) {
  865. ret = fimc_get_sensor_frame_desc(fimc->pipeline.subdevs[IDX_SENSOR],
  866. pix->plane_fmt, ff->fmt->memplanes,
  867. true);
  868. if (ret < 0)
  869. return ret;
  870. }
  871. for (i = 0; i < ff->fmt->memplanes; i++) {
  872. ff->bytesperline[i] = pix->plane_fmt[i].bytesperline;
  873. ff->payload[i] = pix->plane_fmt[i].sizeimage;
  874. }
  875. set_frame_bounds(ff, pix->width, pix->height);
  876. /* Reset the composition rectangle if not yet configured */
  877. if (!(ctx->state & FIMC_COMPOSE))
  878. set_frame_crop(ff, 0, 0, pix->width, pix->height);
  879. fimc_capture_mark_jpeg_xfer(ctx, ff->fmt->color);
  880. /* Reset cropping and set format at the camera interface input */
  881. if (!fimc->vid_cap.user_subdev_api) {
  882. ctx->s_frame.fmt = s_fmt;
  883. set_frame_bounds(&ctx->s_frame, pix->width, pix->height);
  884. set_frame_crop(&ctx->s_frame, 0, 0, pix->width, pix->height);
  885. }
  886. return ret;
  887. }
  888. static int fimc_cap_s_fmt_mplane(struct file *file, void *priv,
  889. struct v4l2_format *f)
  890. {
  891. struct fimc_dev *fimc = video_drvdata(file);
  892. int ret;
  893. fimc_md_graph_lock(fimc);
  894. mutex_lock(&fimc->lock);
  895. /*
  896. * The graph is walked within __fimc_capture_set_format() to set
  897. * the format at subdevs thus the graph mutex needs to be held at
  898. * this point and acquired before the video mutex, to avoid AB-BA
  899. * deadlock when fimc_md_link_notify() is called by other thread.
  900. * Ideally the graph walking and setting format at the whole pipeline
  901. * should be removed from this driver and handled in userspace only.
  902. */
  903. ret = __fimc_capture_set_format(fimc, f);
  904. mutex_unlock(&fimc->lock);
  905. fimc_md_graph_unlock(fimc);
  906. return ret;
  907. }
  908. static int fimc_cap_enum_input(struct file *file, void *priv,
  909. struct v4l2_input *i)
  910. {
  911. struct fimc_dev *fimc = video_drvdata(file);
  912. struct v4l2_subdev *sd = fimc->pipeline.subdevs[IDX_SENSOR];
  913. if (i->index != 0)
  914. return -EINVAL;
  915. i->type = V4L2_INPUT_TYPE_CAMERA;
  916. if (sd)
  917. strlcpy(i->name, sd->name, sizeof(i->name));
  918. return 0;
  919. }
  920. static int fimc_cap_s_input(struct file *file, void *priv, unsigned int i)
  921. {
  922. return i == 0 ? i : -EINVAL;
  923. }
  924. static int fimc_cap_g_input(struct file *file, void *priv, unsigned int *i)
  925. {
  926. *i = 0;
  927. return 0;
  928. }
  929. /**
  930. * fimc_pipeline_validate - check for formats inconsistencies
  931. * between source and sink pad of each link
  932. *
  933. * Return 0 if all formats match or -EPIPE otherwise.
  934. */
  935. static int fimc_pipeline_validate(struct fimc_dev *fimc)
  936. {
  937. struct v4l2_subdev_format sink_fmt, src_fmt;
  938. struct fimc_vid_cap *vc = &fimc->vid_cap;
  939. struct v4l2_subdev *sd = &vc->subdev;
  940. struct media_pad *sink_pad, *src_pad;
  941. int i, ret;
  942. while (1) {
  943. /*
  944. * Find current entity sink pad and any remote sink pad linked
  945. * to it. We stop if there is no sink pad in current entity or
  946. * it is not linked to any other remote entity.
  947. */
  948. src_pad = NULL;
  949. for (i = 0; i < sd->entity.num_pads; i++) {
  950. struct media_pad *p = &sd->entity.pads[i];
  951. if (p->flags & MEDIA_PAD_FL_SINK) {
  952. sink_pad = p;
  953. src_pad = media_entity_remote_source(sink_pad);
  954. if (src_pad)
  955. break;
  956. }
  957. }
  958. if (src_pad == NULL ||
  959. media_entity_type(src_pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  960. break;
  961. /* Don't call FIMC subdev operation to avoid nested locking */
  962. if (sd == &vc->subdev) {
  963. struct fimc_frame *ff = &vc->ctx->s_frame;
  964. sink_fmt.format.width = ff->f_width;
  965. sink_fmt.format.height = ff->f_height;
  966. sink_fmt.format.code = ff->fmt ? ff->fmt->mbus_code : 0;
  967. } else {
  968. sink_fmt.pad = sink_pad->index;
  969. sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  970. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sink_fmt);
  971. if (ret < 0 && ret != -ENOIOCTLCMD)
  972. return -EPIPE;
  973. }
  974. /* Retrieve format at the source pad */
  975. sd = media_entity_to_v4l2_subdev(src_pad->entity);
  976. src_fmt.pad = src_pad->index;
  977. src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  978. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
  979. if (ret < 0 && ret != -ENOIOCTLCMD)
  980. return -EPIPE;
  981. if (src_fmt.format.width != sink_fmt.format.width ||
  982. src_fmt.format.height != sink_fmt.format.height ||
  983. src_fmt.format.code != sink_fmt.format.code)
  984. return -EPIPE;
  985. if (sd == fimc->pipeline.subdevs[IDX_SENSOR] &&
  986. fimc_user_defined_mbus_fmt(src_fmt.format.code)) {
  987. struct v4l2_plane_pix_format plane_fmt[FIMC_MAX_PLANES];
  988. struct fimc_frame *frame = &vc->ctx->d_frame;
  989. unsigned int i;
  990. ret = fimc_get_sensor_frame_desc(sd, plane_fmt,
  991. frame->fmt->memplanes,
  992. false);
  993. if (ret < 0)
  994. return -EPIPE;
  995. for (i = 0; i < frame->fmt->memplanes; i++)
  996. if (frame->payload[i] < plane_fmt[i].sizeimage)
  997. return -EPIPE;
  998. }
  999. }
  1000. return 0;
  1001. }
  1002. static int fimc_cap_streamon(struct file *file, void *priv,
  1003. enum v4l2_buf_type type)
  1004. {
  1005. struct fimc_dev *fimc = video_drvdata(file);
  1006. struct fimc_pipeline *p = &fimc->pipeline;
  1007. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1008. struct media_entity *entity = &vc->vfd.entity;
  1009. struct fimc_source_info *si = NULL;
  1010. struct v4l2_subdev *sd;
  1011. int ret;
  1012. if (fimc_capture_active(fimc))
  1013. return -EBUSY;
  1014. ret = media_entity_pipeline_start(entity, p->m_pipeline);
  1015. if (ret < 0)
  1016. return ret;
  1017. sd = p->subdevs[IDX_SENSOR];
  1018. if (sd)
  1019. si = v4l2_get_subdev_hostdata(sd);
  1020. if (si == NULL) {
  1021. ret = -EPIPE;
  1022. goto err_p_stop;
  1023. }
  1024. /*
  1025. * Save configuration data related to currently attached image
  1026. * sensor or other data source, e.g. FIMC-IS.
  1027. */
  1028. vc->source_config = *si;
  1029. if (vc->input == GRP_ID_FIMC_IS)
  1030. vc->source_config.fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK;
  1031. if (vc->user_subdev_api) {
  1032. ret = fimc_pipeline_validate(fimc);
  1033. if (ret < 0)
  1034. goto err_p_stop;
  1035. }
  1036. ret = vb2_ioctl_streamon(file, priv, type);
  1037. if (!ret)
  1038. return ret;
  1039. err_p_stop:
  1040. media_entity_pipeline_stop(entity);
  1041. return ret;
  1042. }
  1043. static int fimc_cap_streamoff(struct file *file, void *priv,
  1044. enum v4l2_buf_type type)
  1045. {
  1046. struct fimc_dev *fimc = video_drvdata(file);
  1047. int ret;
  1048. ret = vb2_ioctl_streamoff(file, priv, type);
  1049. if (ret == 0)
  1050. media_entity_pipeline_stop(&fimc->vid_cap.vfd.entity);
  1051. return ret;
  1052. }
  1053. static int fimc_cap_reqbufs(struct file *file, void *priv,
  1054. struct v4l2_requestbuffers *reqbufs)
  1055. {
  1056. struct fimc_dev *fimc = video_drvdata(file);
  1057. int ret;
  1058. ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
  1059. if (!ret)
  1060. fimc->vid_cap.reqbufs_count = reqbufs->count;
  1061. return ret;
  1062. }
  1063. static int fimc_cap_g_selection(struct file *file, void *fh,
  1064. struct v4l2_selection *s)
  1065. {
  1066. struct fimc_dev *fimc = video_drvdata(file);
  1067. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1068. struct fimc_frame *f = &ctx->s_frame;
  1069. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  1070. return -EINVAL;
  1071. switch (s->target) {
  1072. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  1073. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1074. f = &ctx->d_frame;
  1075. case V4L2_SEL_TGT_CROP_BOUNDS:
  1076. case V4L2_SEL_TGT_CROP_DEFAULT:
  1077. s->r.left = 0;
  1078. s->r.top = 0;
  1079. s->r.width = f->o_width;
  1080. s->r.height = f->o_height;
  1081. return 0;
  1082. case V4L2_SEL_TGT_COMPOSE:
  1083. f = &ctx->d_frame;
  1084. case V4L2_SEL_TGT_CROP:
  1085. s->r.left = f->offs_h;
  1086. s->r.top = f->offs_v;
  1087. s->r.width = f->width;
  1088. s->r.height = f->height;
  1089. return 0;
  1090. }
  1091. return -EINVAL;
  1092. }
  1093. /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
  1094. static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
  1095. {
  1096. if (a->left < b->left || a->top < b->top)
  1097. return 0;
  1098. if (a->left + a->width > b->left + b->width)
  1099. return 0;
  1100. if (a->top + a->height > b->top + b->height)
  1101. return 0;
  1102. return 1;
  1103. }
  1104. static int fimc_cap_s_selection(struct file *file, void *fh,
  1105. struct v4l2_selection *s)
  1106. {
  1107. struct fimc_dev *fimc = video_drvdata(file);
  1108. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1109. struct v4l2_rect rect = s->r;
  1110. struct fimc_frame *f;
  1111. unsigned long flags;
  1112. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  1113. return -EINVAL;
  1114. if (s->target == V4L2_SEL_TGT_COMPOSE)
  1115. f = &ctx->d_frame;
  1116. else if (s->target == V4L2_SEL_TGT_CROP)
  1117. f = &ctx->s_frame;
  1118. else
  1119. return -EINVAL;
  1120. fimc_capture_try_selection(ctx, &rect, s->target);
  1121. if (s->flags & V4L2_SEL_FLAG_LE &&
  1122. !enclosed_rectangle(&rect, &s->r))
  1123. return -ERANGE;
  1124. if (s->flags & V4L2_SEL_FLAG_GE &&
  1125. !enclosed_rectangle(&s->r, &rect))
  1126. return -ERANGE;
  1127. s->r = rect;
  1128. spin_lock_irqsave(&fimc->slock, flags);
  1129. set_frame_crop(f, s->r.left, s->r.top, s->r.width,
  1130. s->r.height);
  1131. spin_unlock_irqrestore(&fimc->slock, flags);
  1132. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1133. return 0;
  1134. }
  1135. static const struct v4l2_ioctl_ops fimc_capture_ioctl_ops = {
  1136. .vidioc_querycap = fimc_vidioc_querycap_capture,
  1137. .vidioc_enum_fmt_vid_cap_mplane = fimc_cap_enum_fmt_mplane,
  1138. .vidioc_try_fmt_vid_cap_mplane = fimc_cap_try_fmt_mplane,
  1139. .vidioc_s_fmt_vid_cap_mplane = fimc_cap_s_fmt_mplane,
  1140. .vidioc_g_fmt_vid_cap_mplane = fimc_cap_g_fmt_mplane,
  1141. .vidioc_reqbufs = fimc_cap_reqbufs,
  1142. .vidioc_querybuf = vb2_ioctl_querybuf,
  1143. .vidioc_qbuf = vb2_ioctl_qbuf,
  1144. .vidioc_dqbuf = vb2_ioctl_dqbuf,
  1145. .vidioc_expbuf = vb2_ioctl_expbuf,
  1146. .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
  1147. .vidioc_create_bufs = vb2_ioctl_create_bufs,
  1148. .vidioc_streamon = fimc_cap_streamon,
  1149. .vidioc_streamoff = fimc_cap_streamoff,
  1150. .vidioc_g_selection = fimc_cap_g_selection,
  1151. .vidioc_s_selection = fimc_cap_s_selection,
  1152. .vidioc_enum_input = fimc_cap_enum_input,
  1153. .vidioc_s_input = fimc_cap_s_input,
  1154. .vidioc_g_input = fimc_cap_g_input,
  1155. };
  1156. /* Capture subdev media entity operations */
  1157. static int fimc_link_setup(struct media_entity *entity,
  1158. const struct media_pad *local,
  1159. const struct media_pad *remote, u32 flags)
  1160. {
  1161. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  1162. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1163. if (media_entity_type(remote->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  1164. return -EINVAL;
  1165. if (WARN_ON(fimc == NULL))
  1166. return 0;
  1167. dbg("%s --> %s, flags: 0x%x. input: 0x%x",
  1168. local->entity->name, remote->entity->name, flags,
  1169. fimc->vid_cap.input);
  1170. if (flags & MEDIA_LNK_FL_ENABLED) {
  1171. if (fimc->vid_cap.input != 0)
  1172. return -EBUSY;
  1173. fimc->vid_cap.input = sd->grp_id;
  1174. return 0;
  1175. }
  1176. fimc->vid_cap.input = 0;
  1177. return 0;
  1178. }
  1179. static const struct media_entity_operations fimc_sd_media_ops = {
  1180. .link_setup = fimc_link_setup,
  1181. };
  1182. /**
  1183. * fimc_sensor_notify - v4l2_device notification from a sensor subdev
  1184. * @sd: pointer to a subdev generating the notification
  1185. * @notification: the notification type, must be S5P_FIMC_TX_END_NOTIFY
  1186. * @arg: pointer to an u32 type integer that stores the frame payload value
  1187. *
  1188. * The End Of Frame notification sent by sensor subdev in its still capture
  1189. * mode. If there is only a single VSYNC generated by the sensor at the
  1190. * beginning of a frame transmission, FIMC does not issue the LastIrq
  1191. * (end of frame) interrupt. And this notification is used to complete the
  1192. * frame capture and returning a buffer to user-space. Subdev drivers should
  1193. * call this notification from their last 'End of frame capture' interrupt.
  1194. */
  1195. void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification,
  1196. void *arg)
  1197. {
  1198. struct fimc_sensor_info *sensor;
  1199. struct fimc_vid_buffer *buf;
  1200. struct fimc_md *fmd;
  1201. struct fimc_dev *fimc;
  1202. unsigned long flags;
  1203. if (sd == NULL)
  1204. return;
  1205. sensor = v4l2_get_subdev_hostdata(sd);
  1206. fmd = entity_to_fimc_mdev(&sd->entity);
  1207. spin_lock_irqsave(&fmd->slock, flags);
  1208. fimc = sensor ? sensor->host : NULL;
  1209. if (fimc && arg && notification == S5P_FIMC_TX_END_NOTIFY &&
  1210. test_bit(ST_CAPT_PEND, &fimc->state)) {
  1211. unsigned long irq_flags;
  1212. spin_lock_irqsave(&fimc->slock, irq_flags);
  1213. if (!list_empty(&fimc->vid_cap.active_buf_q)) {
  1214. buf = list_entry(fimc->vid_cap.active_buf_q.next,
  1215. struct fimc_vid_buffer, list);
  1216. vb2_set_plane_payload(&buf->vb, 0, *((u32 *)arg));
  1217. }
  1218. fimc_capture_irq_handler(fimc, 1);
  1219. fimc_deactivate_capture(fimc);
  1220. spin_unlock_irqrestore(&fimc->slock, irq_flags);
  1221. }
  1222. spin_unlock_irqrestore(&fmd->slock, flags);
  1223. }
  1224. static int fimc_subdev_enum_mbus_code(struct v4l2_subdev *sd,
  1225. struct v4l2_subdev_fh *fh,
  1226. struct v4l2_subdev_mbus_code_enum *code)
  1227. {
  1228. struct fimc_fmt *fmt;
  1229. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, code->index);
  1230. if (!fmt)
  1231. return -EINVAL;
  1232. code->code = fmt->mbus_code;
  1233. return 0;
  1234. }
  1235. static int fimc_subdev_get_fmt(struct v4l2_subdev *sd,
  1236. struct v4l2_subdev_fh *fh,
  1237. struct v4l2_subdev_format *fmt)
  1238. {
  1239. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1240. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1241. struct fimc_frame *ff = &ctx->s_frame;
  1242. struct v4l2_mbus_framefmt *mf;
  1243. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1244. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  1245. fmt->format = *mf;
  1246. return 0;
  1247. }
  1248. mf = &fmt->format;
  1249. mutex_lock(&fimc->lock);
  1250. switch (fmt->pad) {
  1251. case FIMC_SD_PAD_SOURCE:
  1252. if (!WARN_ON(ff->fmt == NULL))
  1253. mf->code = ff->fmt->mbus_code;
  1254. /* Sink pads crop rectangle size */
  1255. mf->width = ff->width;
  1256. mf->height = ff->height;
  1257. break;
  1258. case FIMC_SD_PAD_SINK_FIFO:
  1259. *mf = fimc->vid_cap.wb_fmt;
  1260. break;
  1261. case FIMC_SD_PAD_SINK_CAM:
  1262. default:
  1263. *mf = fimc->vid_cap.ci_fmt;
  1264. break;
  1265. }
  1266. mutex_unlock(&fimc->lock);
  1267. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1268. return 0;
  1269. }
  1270. static int fimc_subdev_set_fmt(struct v4l2_subdev *sd,
  1271. struct v4l2_subdev_fh *fh,
  1272. struct v4l2_subdev_format *fmt)
  1273. {
  1274. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1275. struct v4l2_mbus_framefmt *mf = &fmt->format;
  1276. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1277. struct fimc_ctx *ctx = vc->ctx;
  1278. struct fimc_frame *ff;
  1279. struct fimc_fmt *ffmt;
  1280. dbg("pad%d: code: 0x%x, %dx%d",
  1281. fmt->pad, mf->code, mf->width, mf->height);
  1282. if (fmt->pad == FIMC_SD_PAD_SOURCE && vb2_is_busy(&vc->vbq))
  1283. return -EBUSY;
  1284. mutex_lock(&fimc->lock);
  1285. ffmt = fimc_capture_try_format(ctx, &mf->width, &mf->height,
  1286. &mf->code, NULL, fmt->pad);
  1287. mutex_unlock(&fimc->lock);
  1288. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1289. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1290. mf = v4l2_subdev_get_try_format(fh, fmt->pad);
  1291. *mf = fmt->format;
  1292. return 0;
  1293. }
  1294. /* There must be a bug in the driver if this happens */
  1295. if (WARN_ON(ffmt == NULL))
  1296. return -EINVAL;
  1297. /* Update RGB Alpha control state and value range */
  1298. fimc_alpha_ctrl_update(ctx);
  1299. fimc_capture_mark_jpeg_xfer(ctx, ffmt->color);
  1300. if (fmt->pad == FIMC_SD_PAD_SOURCE) {
  1301. ff = &ctx->d_frame;
  1302. /* Sink pads crop rectangle size */
  1303. mf->width = ctx->s_frame.width;
  1304. mf->height = ctx->s_frame.height;
  1305. } else {
  1306. ff = &ctx->s_frame;
  1307. }
  1308. mutex_lock(&fimc->lock);
  1309. set_frame_bounds(ff, mf->width, mf->height);
  1310. if (fmt->pad == FIMC_SD_PAD_SINK_FIFO)
  1311. vc->wb_fmt = *mf;
  1312. else if (fmt->pad == FIMC_SD_PAD_SINK_CAM)
  1313. vc->ci_fmt = *mf;
  1314. ff->fmt = ffmt;
  1315. /* Reset the crop rectangle if required. */
  1316. if (!(fmt->pad == FIMC_SD_PAD_SOURCE && (ctx->state & FIMC_COMPOSE)))
  1317. set_frame_crop(ff, 0, 0, mf->width, mf->height);
  1318. if (fmt->pad != FIMC_SD_PAD_SOURCE)
  1319. ctx->state &= ~FIMC_COMPOSE;
  1320. mutex_unlock(&fimc->lock);
  1321. return 0;
  1322. }
  1323. static int fimc_subdev_get_selection(struct v4l2_subdev *sd,
  1324. struct v4l2_subdev_fh *fh,
  1325. struct v4l2_subdev_selection *sel)
  1326. {
  1327. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1328. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1329. struct fimc_frame *f = &ctx->s_frame;
  1330. struct v4l2_rect *r = &sel->r;
  1331. struct v4l2_rect *try_sel;
  1332. if (sel->pad == FIMC_SD_PAD_SOURCE)
  1333. return -EINVAL;
  1334. mutex_lock(&fimc->lock);
  1335. switch (sel->target) {
  1336. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1337. f = &ctx->d_frame;
  1338. case V4L2_SEL_TGT_CROP_BOUNDS:
  1339. r->width = f->o_width;
  1340. r->height = f->o_height;
  1341. r->left = 0;
  1342. r->top = 0;
  1343. mutex_unlock(&fimc->lock);
  1344. return 0;
  1345. case V4L2_SEL_TGT_CROP:
  1346. try_sel = v4l2_subdev_get_try_crop(fh, sel->pad);
  1347. break;
  1348. case V4L2_SEL_TGT_COMPOSE:
  1349. try_sel = v4l2_subdev_get_try_compose(fh, sel->pad);
  1350. f = &ctx->d_frame;
  1351. break;
  1352. default:
  1353. mutex_unlock(&fimc->lock);
  1354. return -EINVAL;
  1355. }
  1356. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1357. sel->r = *try_sel;
  1358. } else {
  1359. r->left = f->offs_h;
  1360. r->top = f->offs_v;
  1361. r->width = f->width;
  1362. r->height = f->height;
  1363. }
  1364. dbg("target %#x: l:%d, t:%d, %dx%d, f_w: %d, f_h: %d",
  1365. sel->pad, r->left, r->top, r->width, r->height,
  1366. f->f_width, f->f_height);
  1367. mutex_unlock(&fimc->lock);
  1368. return 0;
  1369. }
  1370. static int fimc_subdev_set_selection(struct v4l2_subdev *sd,
  1371. struct v4l2_subdev_fh *fh,
  1372. struct v4l2_subdev_selection *sel)
  1373. {
  1374. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1375. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1376. struct fimc_frame *f = &ctx->s_frame;
  1377. struct v4l2_rect *r = &sel->r;
  1378. struct v4l2_rect *try_sel;
  1379. unsigned long flags;
  1380. if (sel->pad == FIMC_SD_PAD_SOURCE)
  1381. return -EINVAL;
  1382. mutex_lock(&fimc->lock);
  1383. fimc_capture_try_selection(ctx, r, V4L2_SEL_TGT_CROP);
  1384. switch (sel->target) {
  1385. case V4L2_SEL_TGT_CROP:
  1386. try_sel = v4l2_subdev_get_try_crop(fh, sel->pad);
  1387. break;
  1388. case V4L2_SEL_TGT_COMPOSE:
  1389. try_sel = v4l2_subdev_get_try_compose(fh, sel->pad);
  1390. f = &ctx->d_frame;
  1391. break;
  1392. default:
  1393. mutex_unlock(&fimc->lock);
  1394. return -EINVAL;
  1395. }
  1396. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1397. *try_sel = sel->r;
  1398. } else {
  1399. spin_lock_irqsave(&fimc->slock, flags);
  1400. set_frame_crop(f, r->left, r->top, r->width, r->height);
  1401. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1402. if (sel->target == V4L2_SEL_TGT_COMPOSE)
  1403. ctx->state |= FIMC_COMPOSE;
  1404. spin_unlock_irqrestore(&fimc->slock, flags);
  1405. }
  1406. dbg("target %#x: (%d,%d)/%dx%d", sel->target, r->left, r->top,
  1407. r->width, r->height);
  1408. mutex_unlock(&fimc->lock);
  1409. return 0;
  1410. }
  1411. static struct v4l2_subdev_pad_ops fimc_subdev_pad_ops = {
  1412. .enum_mbus_code = fimc_subdev_enum_mbus_code,
  1413. .get_selection = fimc_subdev_get_selection,
  1414. .set_selection = fimc_subdev_set_selection,
  1415. .get_fmt = fimc_subdev_get_fmt,
  1416. .set_fmt = fimc_subdev_set_fmt,
  1417. };
  1418. static struct v4l2_subdev_ops fimc_subdev_ops = {
  1419. .pad = &fimc_subdev_pad_ops,
  1420. };
  1421. /* Set default format at the sensor and host interface */
  1422. static int fimc_capture_set_default_format(struct fimc_dev *fimc)
  1423. {
  1424. struct v4l2_format fmt = {
  1425. .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
  1426. .fmt.pix_mp = {
  1427. .width = 640,
  1428. .height = 480,
  1429. .pixelformat = V4L2_PIX_FMT_YUYV,
  1430. .field = V4L2_FIELD_NONE,
  1431. .colorspace = V4L2_COLORSPACE_JPEG,
  1432. },
  1433. };
  1434. return __fimc_capture_set_format(fimc, &fmt);
  1435. }
  1436. /* fimc->lock must be already initialized */
  1437. static int fimc_register_capture_device(struct fimc_dev *fimc,
  1438. struct v4l2_device *v4l2_dev)
  1439. {
  1440. struct video_device *vfd = &fimc->vid_cap.vfd;
  1441. struct vb2_queue *q = &fimc->vid_cap.vbq;
  1442. struct fimc_ctx *ctx;
  1443. struct fimc_vid_cap *vid_cap;
  1444. int ret = -ENOMEM;
  1445. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  1446. if (!ctx)
  1447. return -ENOMEM;
  1448. ctx->fimc_dev = fimc;
  1449. ctx->in_path = FIMC_IO_CAMERA;
  1450. ctx->out_path = FIMC_IO_DMA;
  1451. ctx->state = FIMC_CTX_CAP;
  1452. ctx->s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
  1453. ctx->d_frame.fmt = ctx->s_frame.fmt;
  1454. memset(vfd, 0, sizeof(*vfd));
  1455. snprintf(vfd->name, sizeof(vfd->name), "fimc.%d.capture", fimc->id);
  1456. vfd->fops = &fimc_capture_fops;
  1457. vfd->ioctl_ops = &fimc_capture_ioctl_ops;
  1458. vfd->v4l2_dev = v4l2_dev;
  1459. vfd->minor = -1;
  1460. vfd->release = video_device_release_empty;
  1461. vfd->queue = q;
  1462. vfd->lock = &fimc->lock;
  1463. video_set_drvdata(vfd, fimc);
  1464. vid_cap = &fimc->vid_cap;
  1465. vid_cap->active_buf_cnt = 0;
  1466. vid_cap->reqbufs_count = 0;
  1467. vid_cap->ctx = ctx;
  1468. INIT_LIST_HEAD(&vid_cap->pending_buf_q);
  1469. INIT_LIST_HEAD(&vid_cap->active_buf_q);
  1470. memset(q, 0, sizeof(*q));
  1471. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1472. q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
  1473. q->drv_priv = ctx;
  1474. q->ops = &fimc_capture_qops;
  1475. q->mem_ops = &vb2_dma_contig_memops;
  1476. q->buf_struct_size = sizeof(struct fimc_vid_buffer);
  1477. q->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1478. q->lock = &fimc->lock;
  1479. ret = vb2_queue_init(q);
  1480. if (ret)
  1481. goto err_ent;
  1482. vid_cap->vd_pad.flags = MEDIA_PAD_FL_SINK;
  1483. ret = media_entity_init(&vfd->entity, 1, &vid_cap->vd_pad, 0);
  1484. if (ret)
  1485. goto err_ent;
  1486. /*
  1487. * For proper order of acquiring/releasing the video
  1488. * and the graph mutex.
  1489. */
  1490. v4l2_disable_ioctl_locking(vfd, VIDIOC_TRY_FMT);
  1491. v4l2_disable_ioctl_locking(vfd, VIDIOC_S_FMT);
  1492. ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
  1493. if (ret)
  1494. goto err_vd;
  1495. v4l2_info(v4l2_dev, "Registered %s as /dev/%s\n",
  1496. vfd->name, video_device_node_name(vfd));
  1497. vfd->ctrl_handler = &ctx->ctrls.handler;
  1498. return 0;
  1499. err_vd:
  1500. media_entity_cleanup(&vfd->entity);
  1501. err_ent:
  1502. kfree(ctx);
  1503. return ret;
  1504. }
  1505. static int fimc_capture_subdev_registered(struct v4l2_subdev *sd)
  1506. {
  1507. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1508. int ret;
  1509. if (fimc == NULL)
  1510. return -ENXIO;
  1511. ret = fimc_register_m2m_device(fimc, sd->v4l2_dev);
  1512. if (ret)
  1513. return ret;
  1514. fimc->pipeline_ops = v4l2_get_subdev_hostdata(sd);
  1515. ret = fimc_register_capture_device(fimc, sd->v4l2_dev);
  1516. if (ret) {
  1517. fimc_unregister_m2m_device(fimc);
  1518. fimc->pipeline_ops = NULL;
  1519. }
  1520. return ret;
  1521. }
  1522. static void fimc_capture_subdev_unregistered(struct v4l2_subdev *sd)
  1523. {
  1524. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1525. if (fimc == NULL)
  1526. return;
  1527. fimc_unregister_m2m_device(fimc);
  1528. if (video_is_registered(&fimc->vid_cap.vfd)) {
  1529. video_unregister_device(&fimc->vid_cap.vfd);
  1530. media_entity_cleanup(&fimc->vid_cap.vfd.entity);
  1531. fimc->pipeline_ops = NULL;
  1532. }
  1533. kfree(fimc->vid_cap.ctx);
  1534. fimc->vid_cap.ctx = NULL;
  1535. }
  1536. static const struct v4l2_subdev_internal_ops fimc_capture_sd_internal_ops = {
  1537. .registered = fimc_capture_subdev_registered,
  1538. .unregistered = fimc_capture_subdev_unregistered,
  1539. };
  1540. int fimc_initialize_capture_subdev(struct fimc_dev *fimc)
  1541. {
  1542. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1543. int ret;
  1544. v4l2_subdev_init(sd, &fimc_subdev_ops);
  1545. sd->flags = V4L2_SUBDEV_FL_HAS_DEVNODE;
  1546. snprintf(sd->name, sizeof(sd->name), "FIMC.%d", fimc->id);
  1547. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_CAM].flags = MEDIA_PAD_FL_SINK;
  1548. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_FIFO].flags = MEDIA_PAD_FL_SINK;
  1549. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
  1550. ret = media_entity_init(&sd->entity, FIMC_SD_PADS_NUM,
  1551. fimc->vid_cap.sd_pads, 0);
  1552. if (ret)
  1553. return ret;
  1554. sd->entity.ops = &fimc_sd_media_ops;
  1555. sd->internal_ops = &fimc_capture_sd_internal_ops;
  1556. v4l2_set_subdevdata(sd, fimc);
  1557. return 0;
  1558. }
  1559. void fimc_unregister_capture_subdev(struct fimc_dev *fimc)
  1560. {
  1561. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1562. v4l2_device_unregister_subdev(sd);
  1563. media_entity_cleanup(&sd->entity);
  1564. v4l2_set_subdevdata(sd, NULL);
  1565. }