tx4938.h 23 KB

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  1. /*
  2. * linux/include/asm-mips/tx4938/tx4938.h
  3. * Definitions for TX4937/TX4938
  4. * Copyright (C) 2000-2001 Toshiba Corporation
  5. *
  6. * 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
  7. * terms of the GNU General Public License version 2. This program is
  8. * licensed "as is" without any warranty of any kind, whether express
  9. * or implied.
  10. *
  11. * Support for TX4938 in 2.6 - Manish Lachwani (mlachwani@mvista.com)
  12. */
  13. #ifndef __ASM_TX_BOARDS_TX4938_H
  14. #define __ASM_TX_BOARDS_TX4938_H
  15. #include <asm/tx4938/tx4938_mips.h>
  16. #define tx4938_read_nfmc(addr) (*(volatile unsigned int *)(addr))
  17. #define tx4938_write_nfmc(b,addr) (*(volatile unsigned int *)(addr)) = (b)
  18. #define TX4938_NR_IRQ_LOCAL TX4938_IRQ_PIC_BEG
  19. #define TX4938_IRQ_IRC_PCIC (TX4938_NR_IRQ_LOCAL + TX4938_IR_PCIC)
  20. #define TX4938_IRQ_IRC_PCIERR (TX4938_NR_IRQ_LOCAL + TX4938_IR_PCIERR)
  21. #define TX4938_PCIIO_0 0x10000000
  22. #define TX4938_PCIIO_1 0x01010000
  23. #define TX4938_PCIMEM_0 0x08000000
  24. #define TX4938_PCIMEM_1 0x11000000
  25. #define TX4938_PCIIO_SIZE_0 0x01000000
  26. #define TX4938_PCIIO_SIZE_1 0x00010000
  27. #define TX4938_PCIMEM_SIZE_0 0x08000000
  28. #define TX4938_PCIMEM_SIZE_1 0x00010000
  29. #define TX4938_REG_BASE 0xff1f0000 /* == TX4937_REG_BASE */
  30. #define TX4938_REG_SIZE 0x00010000 /* == TX4937_REG_SIZE */
  31. /* NDFMC, SRAMC, PCIC1, SPIC: TX4938 only */
  32. #define TX4938_NDFMC_REG (TX4938_REG_BASE + 0x5000)
  33. #define TX4938_SRAMC_REG (TX4938_REG_BASE + 0x6000)
  34. #define TX4938_PCIC1_REG (TX4938_REG_BASE + 0x7000)
  35. #define TX4938_SDRAMC_REG (TX4938_REG_BASE + 0x8000)
  36. #define TX4938_EBUSC_REG (TX4938_REG_BASE + 0x9000)
  37. #define TX4938_DMA_REG(ch) (TX4938_REG_BASE + 0xb000 + (ch) * 0x800)
  38. #define TX4938_PCIC_REG (TX4938_REG_BASE + 0xd000)
  39. #define TX4938_CCFG_REG (TX4938_REG_BASE + 0xe000)
  40. #define TX4938_NR_TMR 3
  41. #define TX4938_TMR_REG(ch) ((TX4938_REG_BASE + 0xf000) + (ch) * 0x100)
  42. #define TX4938_NR_SIO 2
  43. #define TX4938_SIO_REG(ch) ((TX4938_REG_BASE + 0xf300) + (ch) * 0x100)
  44. #define TX4938_PIO_REG (TX4938_REG_BASE + 0xf500)
  45. #define TX4938_IRC_REG (TX4938_REG_BASE + 0xf600)
  46. #define TX4938_ACLC_REG (TX4938_REG_BASE + 0xf700)
  47. #define TX4938_SPI_REG (TX4938_REG_BASE + 0xf800)
  48. #ifndef _LANGUAGE_ASSEMBLY
  49. #include <asm/byteorder.h>
  50. #define TX4938_MKA(x) ((u32)( ((u32)(TX4938_REG_BASE)) | ((u32)(x)) ))
  51. #define TX4938_RD08( reg ) (*(vu08*)(reg))
  52. #define TX4938_WR08( reg, val ) ((*(vu08*)(reg))=(val))
  53. #define TX4938_RD16( reg ) (*(vu16*)(reg))
  54. #define TX4938_WR16( reg, val ) ((*(vu16*)(reg))=(val))
  55. #define TX4938_RD32( reg ) (*(vu32*)(reg))
  56. #define TX4938_WR32( reg, val ) ((*(vu32*)(reg))=(val))
  57. #define TX4938_RD64( reg ) (*(vu64*)(reg))
  58. #define TX4938_WR64( reg, val ) ((*(vu64*)(reg))=(val))
  59. #define TX4938_RD( reg ) TX4938_RD32( reg )
  60. #define TX4938_WR( reg, val ) TX4938_WR32( reg, val )
  61. #endif /* !__ASSEMBLY__ */
  62. #ifdef __ASSEMBLY__
  63. #define _CONST64(c) c
  64. #else
  65. #define _CONST64(c) c##ull
  66. #include <asm/byteorder.h>
  67. #ifdef __BIG_ENDIAN
  68. #define endian_def_l2(e1,e2) \
  69. volatile unsigned long e1,e2
  70. #define endian_def_s2(e1,e2) \
  71. volatile unsigned short e1,e2
  72. #define endian_def_sb2(e1,e2,e3) \
  73. volatile unsigned short e1;volatile unsigned char e2,e3
  74. #define endian_def_b2s(e1,e2,e3) \
  75. volatile unsigned char e1,e2;volatile unsigned short e3
  76. #define endian_def_b4(e1,e2,e3,e4) \
  77. volatile unsigned char e1,e2,e3,e4
  78. #else
  79. #define endian_def_l2(e1,e2) \
  80. volatile unsigned long e2,e1
  81. #define endian_def_s2(e1,e2) \
  82. volatile unsigned short e2,e1
  83. #define endian_def_sb2(e1,e2,e3) \
  84. volatile unsigned char e3,e2;volatile unsigned short e1
  85. #define endian_def_b2s(e1,e2,e3) \
  86. volatile unsigned short e3;volatile unsigned char e2,e1
  87. #define endian_def_b4(e1,e2,e3,e4) \
  88. volatile unsigned char e4,e3,e2,e1
  89. #endif
  90. struct tx4938_sdramc_reg {
  91. volatile unsigned long long cr[4];
  92. volatile unsigned long long unused0[4];
  93. volatile unsigned long long tr;
  94. volatile unsigned long long unused1[2];
  95. volatile unsigned long long cmd;
  96. volatile unsigned long long sfcmd;
  97. };
  98. struct tx4938_ebusc_reg {
  99. volatile unsigned long long cr[8];
  100. };
  101. struct tx4938_dma_reg {
  102. struct tx4938_dma_ch_reg {
  103. volatile unsigned long long cha;
  104. volatile unsigned long long sar;
  105. volatile unsigned long long dar;
  106. endian_def_l2(unused0, cntr);
  107. endian_def_l2(unused1, sair);
  108. endian_def_l2(unused2, dair);
  109. endian_def_l2(unused3, ccr);
  110. endian_def_l2(unused4, csr);
  111. } ch[4];
  112. volatile unsigned long long dbr[8];
  113. volatile unsigned long long tdhr;
  114. volatile unsigned long long midr;
  115. endian_def_l2(unused0, mcr);
  116. };
  117. struct tx4938_pcic_reg {
  118. volatile unsigned long pciid;
  119. volatile unsigned long pcistatus;
  120. volatile unsigned long pciccrev;
  121. volatile unsigned long pcicfg1;
  122. volatile unsigned long p2gm0plbase; /* +10 */
  123. volatile unsigned long p2gm0pubase;
  124. volatile unsigned long p2gm1plbase;
  125. volatile unsigned long p2gm1pubase;
  126. volatile unsigned long p2gm2pbase; /* +20 */
  127. volatile unsigned long p2giopbase;
  128. volatile unsigned long unused0;
  129. volatile unsigned long pcisid;
  130. volatile unsigned long unused1; /* +30 */
  131. volatile unsigned long pcicapptr;
  132. volatile unsigned long unused2;
  133. volatile unsigned long pcicfg2;
  134. volatile unsigned long g2ptocnt; /* +40 */
  135. volatile unsigned long unused3[15];
  136. volatile unsigned long g2pstatus; /* +80 */
  137. volatile unsigned long g2pmask;
  138. volatile unsigned long pcisstatus;
  139. volatile unsigned long pcimask;
  140. volatile unsigned long p2gcfg; /* +90 */
  141. volatile unsigned long p2gstatus;
  142. volatile unsigned long p2gmask;
  143. volatile unsigned long p2gccmd;
  144. volatile unsigned long unused4[24]; /* +a0 */
  145. volatile unsigned long pbareqport; /* +100 */
  146. volatile unsigned long pbacfg;
  147. volatile unsigned long pbastatus;
  148. volatile unsigned long pbamask;
  149. volatile unsigned long pbabm; /* +110 */
  150. volatile unsigned long pbacreq;
  151. volatile unsigned long pbacgnt;
  152. volatile unsigned long pbacstate;
  153. volatile unsigned long long g2pmgbase[3]; /* +120 */
  154. volatile unsigned long long g2piogbase;
  155. volatile unsigned long g2pmmask[3]; /* +140 */
  156. volatile unsigned long g2piomask;
  157. volatile unsigned long long g2pmpbase[3]; /* +150 */
  158. volatile unsigned long long g2piopbase;
  159. volatile unsigned long pciccfg; /* +170 */
  160. volatile unsigned long pcicstatus;
  161. volatile unsigned long pcicmask;
  162. volatile unsigned long unused5;
  163. volatile unsigned long long p2gmgbase[3]; /* +180 */
  164. volatile unsigned long long p2giogbase;
  165. volatile unsigned long g2pcfgadrs; /* +1a0 */
  166. volatile unsigned long g2pcfgdata;
  167. volatile unsigned long unused6[8];
  168. volatile unsigned long g2pintack;
  169. volatile unsigned long g2pspc;
  170. volatile unsigned long unused7[12]; /* +1d0 */
  171. volatile unsigned long long pdmca; /* +200 */
  172. volatile unsigned long long pdmga;
  173. volatile unsigned long long pdmpa;
  174. volatile unsigned long long pdmctr;
  175. volatile unsigned long long pdmcfg; /* +220 */
  176. volatile unsigned long long pdmsts;
  177. };
  178. struct tx4938_aclc_reg {
  179. volatile unsigned long acctlen;
  180. volatile unsigned long acctldis;
  181. volatile unsigned long acregacc;
  182. volatile unsigned long unused0;
  183. volatile unsigned long acintsts;
  184. volatile unsigned long acintmsts;
  185. volatile unsigned long acinten;
  186. volatile unsigned long acintdis;
  187. volatile unsigned long acsemaph;
  188. volatile unsigned long unused1[7];
  189. volatile unsigned long acgpidat;
  190. volatile unsigned long acgpodat;
  191. volatile unsigned long acslten;
  192. volatile unsigned long acsltdis;
  193. volatile unsigned long acfifosts;
  194. volatile unsigned long unused2[11];
  195. volatile unsigned long acdmasts;
  196. volatile unsigned long acdmasel;
  197. volatile unsigned long unused3[6];
  198. volatile unsigned long acaudodat;
  199. volatile unsigned long acsurrdat;
  200. volatile unsigned long accentdat;
  201. volatile unsigned long aclfedat;
  202. volatile unsigned long acaudiat;
  203. volatile unsigned long unused4;
  204. volatile unsigned long acmodoat;
  205. volatile unsigned long acmodidat;
  206. volatile unsigned long unused5[15];
  207. volatile unsigned long acrevid;
  208. };
  209. struct tx4938_tmr_reg {
  210. volatile unsigned long tcr;
  211. volatile unsigned long tisr;
  212. volatile unsigned long cpra;
  213. volatile unsigned long cprb;
  214. volatile unsigned long itmr;
  215. volatile unsigned long unused0[3];
  216. volatile unsigned long ccdr;
  217. volatile unsigned long unused1[3];
  218. volatile unsigned long pgmr;
  219. volatile unsigned long unused2[3];
  220. volatile unsigned long wtmr;
  221. volatile unsigned long unused3[43];
  222. volatile unsigned long trr;
  223. };
  224. struct tx4938_sio_reg {
  225. volatile unsigned long lcr;
  226. volatile unsigned long dicr;
  227. volatile unsigned long disr;
  228. volatile unsigned long cisr;
  229. volatile unsigned long fcr;
  230. volatile unsigned long flcr;
  231. volatile unsigned long bgr;
  232. volatile unsigned long tfifo;
  233. volatile unsigned long rfifo;
  234. };
  235. struct tx4938_pio_reg {
  236. volatile unsigned long dout;
  237. volatile unsigned long din;
  238. volatile unsigned long dir;
  239. volatile unsigned long od;
  240. volatile unsigned long flag[2];
  241. volatile unsigned long pol;
  242. volatile unsigned long intc;
  243. volatile unsigned long maskcpu;
  244. volatile unsigned long maskext;
  245. };
  246. struct tx4938_ndfmc_reg {
  247. endian_def_l2(unused0, dtr);
  248. endian_def_l2(unused1, mcr);
  249. endian_def_l2(unused2, sr);
  250. endian_def_l2(unused3, isr);
  251. endian_def_l2(unused4, imr);
  252. endian_def_l2(unused5, spr);
  253. endian_def_l2(unused6, rstr);
  254. };
  255. struct tx4938_spi_reg {
  256. volatile unsigned long mcr;
  257. volatile unsigned long cr0;
  258. volatile unsigned long cr1;
  259. volatile unsigned long fs;
  260. volatile unsigned long unused1;
  261. volatile unsigned long sr;
  262. volatile unsigned long dr;
  263. volatile unsigned long unused2;
  264. };
  265. struct tx4938_sramc_reg {
  266. volatile unsigned long long cr;
  267. };
  268. struct tx4938_ccfg_reg {
  269. volatile unsigned long long ccfg;
  270. volatile unsigned long long crir;
  271. volatile unsigned long long pcfg;
  272. volatile unsigned long long tear;
  273. volatile unsigned long long clkctr;
  274. volatile unsigned long long unused0;
  275. volatile unsigned long long garbc;
  276. volatile unsigned long long unused1;
  277. volatile unsigned long long unused2;
  278. volatile unsigned long long ramp;
  279. volatile unsigned long long unused3;
  280. volatile unsigned long long jmpadr;
  281. };
  282. #undef endian_def_l2
  283. #undef endian_def_s2
  284. #undef endian_def_sb2
  285. #undef endian_def_b2s
  286. #undef endian_def_b4
  287. #endif /* __ASSEMBLY__ */
  288. /*
  289. * NDFMC
  290. */
  291. /* NDFMCR : NDFMC Mode Control */
  292. #define TX4938_NDFMCR_WE 0x80
  293. #define TX4938_NDFMCR_ECC_ALL 0x60
  294. #define TX4938_NDFMCR_ECC_RESET 0x60
  295. #define TX4938_NDFMCR_ECC_READ 0x40
  296. #define TX4938_NDFMCR_ECC_ON 0x20
  297. #define TX4938_NDFMCR_ECC_OFF 0x00
  298. #define TX4938_NDFMCR_CE 0x10
  299. #define TX4938_NDFMCR_BSPRT 0x04
  300. #define TX4938_NDFMCR_ALE 0x02
  301. #define TX4938_NDFMCR_CLE 0x01
  302. /* NDFMCR : NDFMC Status */
  303. #define TX4938_NDFSR_BUSY 0x80
  304. /* NDFMCR : NDFMC Reset */
  305. #define TX4938_NDFRSTR_RST 0x01
  306. /*
  307. * IRC
  308. */
  309. #define TX4938_IR_ECCERR 0
  310. #define TX4938_IR_WTOERR 1
  311. #define TX4938_NUM_IR_INT 6
  312. #define TX4938_IR_INT(n) (2 + (n))
  313. #define TX4938_NUM_IR_SIO 2
  314. #define TX4938_IR_SIO(n) (8 + (n))
  315. #define TX4938_NUM_IR_DMA 4
  316. #define TX4938_IR_DMA(ch,n) ((ch ? 27 : 10) + (n)) /* 10-13,27-30 */
  317. #define TX4938_IR_PIO 14
  318. #define TX4938_IR_PDMAC 15
  319. #define TX4938_IR_PCIC 16
  320. #define TX4938_NUM_IR_TMR 3
  321. #define TX4938_IR_TMR(n) (17 + (n))
  322. #define TX4938_IR_NDFMC 21
  323. #define TX4938_IR_PCIERR 22
  324. #define TX4938_IR_PCIPME 23
  325. #define TX4938_IR_ACLC 24
  326. #define TX4938_IR_ACLCPME 25
  327. #define TX4938_IR_PCIC1 26
  328. #define TX4938_IR_SPI 31
  329. #define TX4938_NUM_IR 32
  330. /* multiplex */
  331. #define TX4938_IR_ETH0 TX4938_IR_INT(4)
  332. #define TX4938_IR_ETH1 TX4938_IR_INT(3)
  333. /*
  334. * CCFG
  335. */
  336. /* CCFG : Chip Configuration */
  337. #define TX4938_CCFG_WDRST _CONST64(0x0000020000000000)
  338. #define TX4938_CCFG_WDREXEN _CONST64(0x0000010000000000)
  339. #define TX4938_CCFG_BCFG_MASK _CONST64(0x000000ff00000000)
  340. #define TX4938_CCFG_TINTDIS 0x01000000
  341. #define TX4938_CCFG_PCI66 0x00800000
  342. #define TX4938_CCFG_PCIMODE 0x00400000
  343. #define TX4938_CCFG_PCI1_66 0x00200000
  344. #define TX4938_CCFG_DIVMODE_MASK 0x001e0000
  345. #define TX4938_CCFG_DIVMODE_2 (0x4 << 17)
  346. #define TX4938_CCFG_DIVMODE_2_5 (0xf << 17)
  347. #define TX4938_CCFG_DIVMODE_3 (0x5 << 17)
  348. #define TX4938_CCFG_DIVMODE_4 (0x6 << 17)
  349. #define TX4938_CCFG_DIVMODE_4_5 (0xd << 17)
  350. #define TX4938_CCFG_DIVMODE_8 (0x0 << 17)
  351. #define TX4938_CCFG_DIVMODE_10 (0xb << 17)
  352. #define TX4938_CCFG_DIVMODE_12 (0x1 << 17)
  353. #define TX4938_CCFG_DIVMODE_16 (0x2 << 17)
  354. #define TX4938_CCFG_DIVMODE_18 (0x9 << 17)
  355. #define TX4938_CCFG_BEOW 0x00010000
  356. #define TX4938_CCFG_WR 0x00008000
  357. #define TX4938_CCFG_TOE 0x00004000
  358. #define TX4938_CCFG_PCIXARB 0x00002000
  359. #define TX4938_CCFG_PCIDIVMODE_MASK 0x00001c00
  360. #define TX4938_CCFG_PCIDIVMODE_4 (0x1 << 10)
  361. #define TX4938_CCFG_PCIDIVMODE_4_5 (0x3 << 10)
  362. #define TX4938_CCFG_PCIDIVMODE_5 (0x5 << 10)
  363. #define TX4938_CCFG_PCIDIVMODE_5_5 (0x7 << 10)
  364. #define TX4938_CCFG_PCIDIVMODE_8 (0x0 << 10)
  365. #define TX4938_CCFG_PCIDIVMODE_9 (0x2 << 10)
  366. #define TX4938_CCFG_PCIDIVMODE_10 (0x4 << 10)
  367. #define TX4938_CCFG_PCIDIVMODE_11 (0x6 << 10)
  368. #define TX4938_CCFG_PCI1DMD 0x00000100
  369. #define TX4938_CCFG_SYSSP_MASK 0x000000c0
  370. #define TX4938_CCFG_ENDIAN 0x00000004
  371. #define TX4938_CCFG_HALT 0x00000002
  372. #define TX4938_CCFG_ACEHOLD 0x00000001
  373. /* PCFG : Pin Configuration */
  374. #define TX4938_PCFG_ETH0_SEL _CONST64(0x8000000000000000)
  375. #define TX4938_PCFG_ETH1_SEL _CONST64(0x4000000000000000)
  376. #define TX4938_PCFG_ATA_SEL _CONST64(0x2000000000000000)
  377. #define TX4938_PCFG_ISA_SEL _CONST64(0x1000000000000000)
  378. #define TX4938_PCFG_SPI_SEL _CONST64(0x0800000000000000)
  379. #define TX4938_PCFG_NDF_SEL _CONST64(0x0400000000000000)
  380. #define TX4938_PCFG_SDCLKDLY_MASK 0x30000000
  381. #define TX4938_PCFG_SDCLKDLY(d) ((d)<<28)
  382. #define TX4938_PCFG_SYSCLKEN 0x08000000
  383. #define TX4938_PCFG_SDCLKEN_ALL 0x07800000
  384. #define TX4938_PCFG_SDCLKEN(ch) (0x00800000<<(ch))
  385. #define TX4938_PCFG_PCICLKEN_ALL 0x003f0000
  386. #define TX4938_PCFG_PCICLKEN(ch) (0x00010000<<(ch))
  387. #define TX4938_PCFG_SEL2 0x00000200
  388. #define TX4938_PCFG_SEL1 0x00000100
  389. #define TX4938_PCFG_DMASEL_ALL 0x0000000f
  390. #define TX4938_PCFG_DMASEL0_DRQ0 0x00000000
  391. #define TX4938_PCFG_DMASEL0_SIO1 0x00000001
  392. #define TX4938_PCFG_DMASEL1_DRQ1 0x00000000
  393. #define TX4938_PCFG_DMASEL1_SIO1 0x00000002
  394. #define TX4938_PCFG_DMASEL2_DRQ2 0x00000000
  395. #define TX4938_PCFG_DMASEL2_SIO0 0x00000004
  396. #define TX4938_PCFG_DMASEL3_DRQ3 0x00000000
  397. #define TX4938_PCFG_DMASEL3_SIO0 0x00000008
  398. /* CLKCTR : Clock Control */
  399. #define TX4938_CLKCTR_NDFCKD _CONST64(0x0001000000000000)
  400. #define TX4938_CLKCTR_NDFRST _CONST64(0x0000000100000000)
  401. #define TX4938_CLKCTR_ETH1CKD 0x80000000
  402. #define TX4938_CLKCTR_ETH0CKD 0x40000000
  403. #define TX4938_CLKCTR_SPICKD 0x20000000
  404. #define TX4938_CLKCTR_SRAMCKD 0x10000000
  405. #define TX4938_CLKCTR_PCIC1CKD 0x08000000
  406. #define TX4938_CLKCTR_DMA1CKD 0x04000000
  407. #define TX4938_CLKCTR_ACLCKD 0x02000000
  408. #define TX4938_CLKCTR_PIOCKD 0x01000000
  409. #define TX4938_CLKCTR_DMACKD 0x00800000
  410. #define TX4938_CLKCTR_PCICKD 0x00400000
  411. #define TX4938_CLKCTR_TM0CKD 0x00100000
  412. #define TX4938_CLKCTR_TM1CKD 0x00080000
  413. #define TX4938_CLKCTR_TM2CKD 0x00040000
  414. #define TX4938_CLKCTR_SIO0CKD 0x00020000
  415. #define TX4938_CLKCTR_SIO1CKD 0x00010000
  416. #define TX4938_CLKCTR_ETH1RST 0x00008000
  417. #define TX4938_CLKCTR_ETH0RST 0x00004000
  418. #define TX4938_CLKCTR_SPIRST 0x00002000
  419. #define TX4938_CLKCTR_SRAMRST 0x00001000
  420. #define TX4938_CLKCTR_PCIC1RST 0x00000800
  421. #define TX4938_CLKCTR_DMA1RST 0x00000400
  422. #define TX4938_CLKCTR_ACLRST 0x00000200
  423. #define TX4938_CLKCTR_PIORST 0x00000100
  424. #define TX4938_CLKCTR_DMARST 0x00000080
  425. #define TX4938_CLKCTR_PCIRST 0x00000040
  426. #define TX4938_CLKCTR_TM0RST 0x00000010
  427. #define TX4938_CLKCTR_TM1RST 0x00000008
  428. #define TX4938_CLKCTR_TM2RST 0x00000004
  429. #define TX4938_CLKCTR_SIO0RST 0x00000002
  430. #define TX4938_CLKCTR_SIO1RST 0x00000001
  431. /* bits for G2PSTATUS/G2PMASK */
  432. #define TX4938_PCIC_G2PSTATUS_ALL 0x00000003
  433. #define TX4938_PCIC_G2PSTATUS_TTOE 0x00000002
  434. #define TX4938_PCIC_G2PSTATUS_RTOE 0x00000001
  435. /* bits for PCIMASK (see also PCI_STATUS_XXX in linux/pci.h */
  436. #define TX4938_PCIC_PCISTATUS_ALL 0x0000f900
  437. /* bits for PBACFG */
  438. #define TX4938_PCIC_PBACFG_FIXPA 0x00000008
  439. #define TX4938_PCIC_PBACFG_RPBA 0x00000004
  440. #define TX4938_PCIC_PBACFG_PBAEN 0x00000002
  441. #define TX4938_PCIC_PBACFG_BMCEN 0x00000001
  442. /* bits for G2PMnGBASE */
  443. #define TX4938_PCIC_G2PMnGBASE_BSDIS _CONST64(0x0000002000000000)
  444. #define TX4938_PCIC_G2PMnGBASE_ECHG _CONST64(0x0000001000000000)
  445. /* bits for G2PIOGBASE */
  446. #define TX4938_PCIC_G2PIOGBASE_BSDIS _CONST64(0x0000002000000000)
  447. #define TX4938_PCIC_G2PIOGBASE_ECHG _CONST64(0x0000001000000000)
  448. /* bits for PCICSTATUS/PCICMASK */
  449. #define TX4938_PCIC_PCICSTATUS_ALL 0x000007b8
  450. #define TX4938_PCIC_PCICSTATUS_PME 0x00000400
  451. #define TX4938_PCIC_PCICSTATUS_TLB 0x00000200
  452. #define TX4938_PCIC_PCICSTATUS_NIB 0x00000100
  453. #define TX4938_PCIC_PCICSTATUS_ZIB 0x00000080
  454. #define TX4938_PCIC_PCICSTATUS_PERR 0x00000020
  455. #define TX4938_PCIC_PCICSTATUS_SERR 0x00000010
  456. #define TX4938_PCIC_PCICSTATUS_GBE 0x00000008
  457. #define TX4938_PCIC_PCICSTATUS_IWB 0x00000002
  458. #define TX4938_PCIC_PCICSTATUS_E2PDONE 0x00000001
  459. /* bits for PCICCFG */
  460. #define TX4938_PCIC_PCICCFG_GBWC_MASK 0x0fff0000
  461. #define TX4938_PCIC_PCICCFG_HRST 0x00000800
  462. #define TX4938_PCIC_PCICCFG_SRST 0x00000400
  463. #define TX4938_PCIC_PCICCFG_IRBER 0x00000200
  464. #define TX4938_PCIC_PCICCFG_G2PMEN(ch) (0x00000100>>(ch))
  465. #define TX4938_PCIC_PCICCFG_G2PM0EN 0x00000100
  466. #define TX4938_PCIC_PCICCFG_G2PM1EN 0x00000080
  467. #define TX4938_PCIC_PCICCFG_G2PM2EN 0x00000040
  468. #define TX4938_PCIC_PCICCFG_G2PIOEN 0x00000020
  469. #define TX4938_PCIC_PCICCFG_TCAR 0x00000010
  470. #define TX4938_PCIC_PCICCFG_ICAEN 0x00000008
  471. /* bits for P2GMnGBASE */
  472. #define TX4938_PCIC_P2GMnGBASE_TMEMEN _CONST64(0x0000004000000000)
  473. #define TX4938_PCIC_P2GMnGBASE_TBSDIS _CONST64(0x0000002000000000)
  474. #define TX4938_PCIC_P2GMnGBASE_TECHG _CONST64(0x0000001000000000)
  475. /* bits for P2GIOGBASE */
  476. #define TX4938_PCIC_P2GIOGBASE_TIOEN _CONST64(0x0000004000000000)
  477. #define TX4938_PCIC_P2GIOGBASE_TBSDIS _CONST64(0x0000002000000000)
  478. #define TX4938_PCIC_P2GIOGBASE_TECHG _CONST64(0x0000001000000000)
  479. #define TX4938_PCIC_IDSEL_AD_TO_SLOT(ad) ((ad) - 11)
  480. #define TX4938_PCIC_MAX_DEVNU TX4938_PCIC_IDSEL_AD_TO_SLOT(32)
  481. /* bits for PDMCFG */
  482. #define TX4938_PCIC_PDMCFG_RSTFIFO 0x00200000
  483. #define TX4938_PCIC_PDMCFG_EXFER 0x00100000
  484. #define TX4938_PCIC_PDMCFG_REQDLY_MASK 0x00003800
  485. #define TX4938_PCIC_PDMCFG_REQDLY_NONE (0 << 11)
  486. #define TX4938_PCIC_PDMCFG_REQDLY_16 (1 << 11)
  487. #define TX4938_PCIC_PDMCFG_REQDLY_32 (2 << 11)
  488. #define TX4938_PCIC_PDMCFG_REQDLY_64 (3 << 11)
  489. #define TX4938_PCIC_PDMCFG_REQDLY_128 (4 << 11)
  490. #define TX4938_PCIC_PDMCFG_REQDLY_256 (5 << 11)
  491. #define TX4938_PCIC_PDMCFG_REQDLY_512 (6 << 11)
  492. #define TX4938_PCIC_PDMCFG_REQDLY_1024 (7 << 11)
  493. #define TX4938_PCIC_PDMCFG_ERRIE 0x00000400
  494. #define TX4938_PCIC_PDMCFG_NCCMPIE 0x00000200
  495. #define TX4938_PCIC_PDMCFG_NTCMPIE 0x00000100
  496. #define TX4938_PCIC_PDMCFG_CHNEN 0x00000080
  497. #define TX4938_PCIC_PDMCFG_XFRACT 0x00000040
  498. #define TX4938_PCIC_PDMCFG_BSWAP 0x00000020
  499. #define TX4938_PCIC_PDMCFG_XFRSIZE_MASK 0x0000000c
  500. #define TX4938_PCIC_PDMCFG_XFRSIZE_1DW 0x00000000
  501. #define TX4938_PCIC_PDMCFG_XFRSIZE_1QW 0x00000004
  502. #define TX4938_PCIC_PDMCFG_XFRSIZE_4QW 0x00000008
  503. #define TX4938_PCIC_PDMCFG_XFRDIRC 0x00000002
  504. #define TX4938_PCIC_PDMCFG_CHRST 0x00000001
  505. /* bits for PDMSTS */
  506. #define TX4938_PCIC_PDMSTS_REQCNT_MASK 0x3f000000
  507. #define TX4938_PCIC_PDMSTS_FIFOCNT_MASK 0x00f00000
  508. #define TX4938_PCIC_PDMSTS_FIFOWP_MASK 0x000c0000
  509. #define TX4938_PCIC_PDMSTS_FIFORP_MASK 0x00030000
  510. #define TX4938_PCIC_PDMSTS_ERRINT 0x00000800
  511. #define TX4938_PCIC_PDMSTS_DONEINT 0x00000400
  512. #define TX4938_PCIC_PDMSTS_CHNEN 0x00000200
  513. #define TX4938_PCIC_PDMSTS_XFRACT 0x00000100
  514. #define TX4938_PCIC_PDMSTS_ACCMP 0x00000080
  515. #define TX4938_PCIC_PDMSTS_NCCMP 0x00000040
  516. #define TX4938_PCIC_PDMSTS_NTCMP 0x00000020
  517. #define TX4938_PCIC_PDMSTS_CFGERR 0x00000008
  518. #define TX4938_PCIC_PDMSTS_PCIERR 0x00000004
  519. #define TX4938_PCIC_PDMSTS_CHNERR 0x00000002
  520. #define TX4938_PCIC_PDMSTS_DATAERR 0x00000001
  521. #define TX4938_PCIC_PDMSTS_ALL_CMP 0x000000e0
  522. #define TX4938_PCIC_PDMSTS_ALL_ERR 0x0000000f
  523. /*
  524. * DMA
  525. */
  526. /* bits for MCR */
  527. #define TX4938_DMA_MCR_EIS(ch) (0x10000000<<(ch))
  528. #define TX4938_DMA_MCR_DIS(ch) (0x01000000<<(ch))
  529. #define TX4938_DMA_MCR_RSFIF 0x00000080
  530. #define TX4938_DMA_MCR_FIFUM(ch) (0x00000008<<(ch))
  531. #define TX4938_DMA_MCR_RPRT 0x00000002
  532. #define TX4938_DMA_MCR_MSTEN 0x00000001
  533. /* bits for CCRn */
  534. #define TX4938_DMA_CCR_IMMCHN 0x20000000
  535. #define TX4938_DMA_CCR_USEXFSZ 0x10000000
  536. #define TX4938_DMA_CCR_LE 0x08000000
  537. #define TX4938_DMA_CCR_DBINH 0x04000000
  538. #define TX4938_DMA_CCR_SBINH 0x02000000
  539. #define TX4938_DMA_CCR_CHRST 0x01000000
  540. #define TX4938_DMA_CCR_RVBYTE 0x00800000
  541. #define TX4938_DMA_CCR_ACKPOL 0x00400000
  542. #define TX4938_DMA_CCR_REQPL 0x00200000
  543. #define TX4938_DMA_CCR_EGREQ 0x00100000
  544. #define TX4938_DMA_CCR_CHDN 0x00080000
  545. #define TX4938_DMA_CCR_DNCTL 0x00060000
  546. #define TX4938_DMA_CCR_EXTRQ 0x00010000
  547. #define TX4938_DMA_CCR_INTRQD 0x0000e000
  548. #define TX4938_DMA_CCR_INTENE 0x00001000
  549. #define TX4938_DMA_CCR_INTENC 0x00000800
  550. #define TX4938_DMA_CCR_INTENT 0x00000400
  551. #define TX4938_DMA_CCR_CHNEN 0x00000200
  552. #define TX4938_DMA_CCR_XFACT 0x00000100
  553. #define TX4938_DMA_CCR_SMPCHN 0x00000020
  554. #define TX4938_DMA_CCR_XFSZ(order) (((order) << 2) & 0x0000001c)
  555. #define TX4938_DMA_CCR_XFSZ_1W TX4938_DMA_CCR_XFSZ(2)
  556. #define TX4938_DMA_CCR_XFSZ_2W TX4938_DMA_CCR_XFSZ(3)
  557. #define TX4938_DMA_CCR_XFSZ_4W TX4938_DMA_CCR_XFSZ(4)
  558. #define TX4938_DMA_CCR_XFSZ_8W TX4938_DMA_CCR_XFSZ(5)
  559. #define TX4938_DMA_CCR_XFSZ_16W TX4938_DMA_CCR_XFSZ(6)
  560. #define TX4938_DMA_CCR_XFSZ_32W TX4938_DMA_CCR_XFSZ(7)
  561. #define TX4938_DMA_CCR_MEMIO 0x00000002
  562. #define TX4938_DMA_CCR_SNGAD 0x00000001
  563. /* bits for CSRn */
  564. #define TX4938_DMA_CSR_CHNEN 0x00000400
  565. #define TX4938_DMA_CSR_STLXFER 0x00000200
  566. #define TX4938_DMA_CSR_CHNACT 0x00000100
  567. #define TX4938_DMA_CSR_ABCHC 0x00000080
  568. #define TX4938_DMA_CSR_NCHNC 0x00000040
  569. #define TX4938_DMA_CSR_NTRNFC 0x00000020
  570. #define TX4938_DMA_CSR_EXTDN 0x00000010
  571. #define TX4938_DMA_CSR_CFERR 0x00000008
  572. #define TX4938_DMA_CSR_CHERR 0x00000004
  573. #define TX4938_DMA_CSR_DESERR 0x00000002
  574. #define TX4938_DMA_CSR_SORERR 0x00000001
  575. #ifndef __ASSEMBLY__
  576. #define tx4938_sdramcptr ((struct tx4938_sdramc_reg *)TX4938_SDRAMC_REG)
  577. #define tx4938_ebuscptr ((struct tx4938_ebusc_reg *)TX4938_EBUSC_REG)
  578. #define tx4938_dmaptr(ch) ((struct tx4938_dma_reg *)TX4938_DMA_REG(ch))
  579. #define tx4938_ndfmcptr ((struct tx4938_ndfmc_reg *)TX4938_NDFMC_REG)
  580. #define tx4938_pcicptr ((struct tx4938_pcic_reg *)TX4938_PCIC_REG)
  581. #define tx4938_pcic1ptr ((struct tx4938_pcic_reg *)TX4938_PCIC1_REG)
  582. #define tx4938_ccfgptr ((struct tx4938_ccfg_reg *)TX4938_CCFG_REG)
  583. #define tx4938_tmrptr(ch) ((struct tx4938_tmr_reg *)TX4938_TMR_REG(ch))
  584. #define tx4938_sioptr(ch) ((struct tx4938_sio_reg *)TX4938_SIO_REG(ch))
  585. #define tx4938_pioptr ((struct tx4938_pio_reg *)TX4938_PIO_REG)
  586. #define tx4938_aclcptr ((struct tx4938_aclc_reg *)TX4938_ACLC_REG)
  587. #define tx4938_spiptr ((struct tx4938_spi_reg *)TX4938_SPI_REG)
  588. #define tx4938_sramcptr ((struct tx4938_sramc_reg *)TX4938_SRAMC_REG)
  589. #define TX4938_REV_MAJ_MIN() ((unsigned long)tx4938_ccfgptr->crir & 0x00ff)
  590. #define TX4938_REV_PCODE() ((unsigned long)tx4938_ccfgptr->crir >> 16)
  591. #define TX4938_SDRAMC_BA(ch) ((tx4938_sdramcptr->cr[ch] >> 49) << 21)
  592. #define TX4938_SDRAMC_SIZE(ch) (((tx4938_sdramcptr->cr[ch] >> 33) + 1) << 21)
  593. #define TX4938_EBUSC_BA(ch) ((tx4938_ebuscptr->cr[ch] >> 48) << 20)
  594. #define TX4938_EBUSC_SIZE(ch) \
  595. (0x00100000 << ((unsigned long)(tx4938_ebuscptr->cr[ch] >> 8) & 0xf))
  596. #endif /* !__ASSEMBLY__ */
  597. #endif