tlb_uv.c 55 KB

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  1. /*
  2. * SGI UltraViolet TLB flush routines.
  3. *
  4. * (c) 2008-2011 Cliff Wickman <cpw@sgi.com>, SGI.
  5. *
  6. * This code is released under the GNU General Public License version 2 or
  7. * later.
  8. */
  9. #include <linux/seq_file.h>
  10. #include <linux/proc_fs.h>
  11. #include <linux/debugfs.h>
  12. #include <linux/kernel.h>
  13. #include <linux/slab.h>
  14. #include <linux/delay.h>
  15. #include <asm/mmu_context.h>
  16. #include <asm/uv/uv.h>
  17. #include <asm/uv/uv_mmrs.h>
  18. #include <asm/uv/uv_hub.h>
  19. #include <asm/uv/uv_bau.h>
  20. #include <asm/apic.h>
  21. #include <asm/idle.h>
  22. #include <asm/tsc.h>
  23. #include <asm/irq_vectors.h>
  24. #include <asm/timer.h>
  25. /* timeouts in nanoseconds (indexed by UVH_AGING_PRESCALE_SEL urgency7 30:28) */
  26. static int timeout_base_ns[] = {
  27. 20,
  28. 160,
  29. 1280,
  30. 10240,
  31. 81920,
  32. 655360,
  33. 5242880,
  34. 167772160
  35. };
  36. static int timeout_us;
  37. static int nobau;
  38. static int baudisabled;
  39. static spinlock_t disable_lock;
  40. static cycles_t congested_cycles;
  41. /* tunables: */
  42. static int max_concurr = MAX_BAU_CONCURRENT;
  43. static int max_concurr_const = MAX_BAU_CONCURRENT;
  44. static int plugged_delay = PLUGGED_DELAY;
  45. static int plugsb4reset = PLUGSB4RESET;
  46. static int timeoutsb4reset = TIMEOUTSB4RESET;
  47. static int ipi_reset_limit = IPI_RESET_LIMIT;
  48. static int complete_threshold = COMPLETE_THRESHOLD;
  49. static int congested_respns_us = CONGESTED_RESPONSE_US;
  50. static int congested_reps = CONGESTED_REPS;
  51. static int congested_period = CONGESTED_PERIOD;
  52. static struct tunables tunables[] = {
  53. {&max_concurr, MAX_BAU_CONCURRENT}, /* must be [0] */
  54. {&plugged_delay, PLUGGED_DELAY},
  55. {&plugsb4reset, PLUGSB4RESET},
  56. {&timeoutsb4reset, TIMEOUTSB4RESET},
  57. {&ipi_reset_limit, IPI_RESET_LIMIT},
  58. {&complete_threshold, COMPLETE_THRESHOLD},
  59. {&congested_respns_us, CONGESTED_RESPONSE_US},
  60. {&congested_reps, CONGESTED_REPS},
  61. {&congested_period, CONGESTED_PERIOD}
  62. };
  63. static struct dentry *tunables_dir;
  64. static struct dentry *tunables_file;
  65. /* these correspond to the statistics printed by ptc_seq_show() */
  66. static char *stat_description[] = {
  67. "sent: number of shootdown messages sent",
  68. "stime: time spent sending messages",
  69. "numuvhubs: number of hubs targeted with shootdown",
  70. "numuvhubs16: number times 16 or more hubs targeted",
  71. "numuvhubs8: number times 8 or more hubs targeted",
  72. "numuvhubs4: number times 4 or more hubs targeted",
  73. "numuvhubs2: number times 2 or more hubs targeted",
  74. "numuvhubs1: number times 1 hub targeted",
  75. "numcpus: number of cpus targeted with shootdown",
  76. "dto: number of destination timeouts",
  77. "retries: destination timeout retries sent",
  78. "rok: : destination timeouts successfully retried",
  79. "resetp: ipi-style resource resets for plugs",
  80. "resett: ipi-style resource resets for timeouts",
  81. "giveup: fall-backs to ipi-style shootdowns",
  82. "sto: number of source timeouts",
  83. "bz: number of stay-busy's",
  84. "throt: number times spun in throttle",
  85. "swack: image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE",
  86. "recv: shootdown messages received",
  87. "rtime: time spent processing messages",
  88. "all: shootdown all-tlb messages",
  89. "one: shootdown one-tlb messages",
  90. "mult: interrupts that found multiple messages",
  91. "none: interrupts that found no messages",
  92. "retry: number of retry messages processed",
  93. "canc: number messages canceled by retries",
  94. "nocan: number retries that found nothing to cancel",
  95. "reset: number of ipi-style reset requests processed",
  96. "rcan: number messages canceled by reset requests",
  97. "disable: number times use of the BAU was disabled",
  98. "enable: number times use of the BAU was re-enabled"
  99. };
  100. static int __init
  101. setup_nobau(char *arg)
  102. {
  103. nobau = 1;
  104. return 0;
  105. }
  106. early_param("nobau", setup_nobau);
  107. /* base pnode in this partition */
  108. static int uv_base_pnode __read_mostly;
  109. static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
  110. static DEFINE_PER_CPU(struct bau_control, bau_control);
  111. static DEFINE_PER_CPU(cpumask_var_t, uv_flush_tlb_mask);
  112. /*
  113. * Determine the first node on a uvhub. 'Nodes' are used for kernel
  114. * memory allocation.
  115. */
  116. static int __init uvhub_to_first_node(int uvhub)
  117. {
  118. int node, b;
  119. for_each_online_node(node) {
  120. b = uv_node_to_blade_id(node);
  121. if (uvhub == b)
  122. return node;
  123. }
  124. return -1;
  125. }
  126. /*
  127. * Determine the apicid of the first cpu on a uvhub.
  128. */
  129. static int __init uvhub_to_first_apicid(int uvhub)
  130. {
  131. int cpu;
  132. for_each_present_cpu(cpu)
  133. if (uvhub == uv_cpu_to_blade_id(cpu))
  134. return per_cpu(x86_cpu_to_apicid, cpu);
  135. return -1;
  136. }
  137. /*
  138. * Free a software acknowledge hardware resource by clearing its Pending
  139. * bit. This will return a reply to the sender.
  140. * If the message has timed out, a reply has already been sent by the
  141. * hardware but the resource has not been released. In that case our
  142. * clear of the Timeout bit (as well) will free the resource. No reply will
  143. * be sent (the hardware will only do one reply per message).
  144. */
  145. static void reply_to_message(struct msg_desc *mdp, struct bau_control *bcp,
  146. int do_acknowledge)
  147. {
  148. unsigned long dw;
  149. struct bau_pq_entry *msg;
  150. msg = mdp->msg;
  151. if (!msg->canceled && do_acknowledge) {
  152. dw = (msg->swack_vec << UV_SW_ACK_NPENDING) | msg->swack_vec;
  153. write_mmr_sw_ack(dw);
  154. }
  155. msg->replied_to = 1;
  156. msg->swack_vec = 0;
  157. }
  158. /*
  159. * Process the receipt of a RETRY message
  160. */
  161. static void bau_process_retry_msg(struct msg_desc *mdp,
  162. struct bau_control *bcp)
  163. {
  164. int i;
  165. int cancel_count = 0;
  166. unsigned long msg_res;
  167. unsigned long mmr = 0;
  168. struct bau_pq_entry *msg = mdp->msg;
  169. struct bau_pq_entry *msg2;
  170. struct ptc_stats *stat = bcp->statp;
  171. stat->d_retries++;
  172. /*
  173. * cancel any message from msg+1 to the retry itself
  174. */
  175. for (msg2 = msg+1, i = 0; i < DEST_Q_SIZE; msg2++, i++) {
  176. if (msg2 > mdp->queue_last)
  177. msg2 = mdp->queue_first;
  178. if (msg2 == msg)
  179. break;
  180. /* same conditions for cancellation as do_reset */
  181. if ((msg2->replied_to == 0) && (msg2->canceled == 0) &&
  182. (msg2->swack_vec) && ((msg2->swack_vec &
  183. msg->swack_vec) == 0) &&
  184. (msg2->sending_cpu == msg->sending_cpu) &&
  185. (msg2->msg_type != MSG_NOOP)) {
  186. mmr = read_mmr_sw_ack();
  187. msg_res = msg2->swack_vec;
  188. /*
  189. * This is a message retry; clear the resources held
  190. * by the previous message only if they timed out.
  191. * If it has not timed out we have an unexpected
  192. * situation to report.
  193. */
  194. if (mmr & (msg_res << UV_SW_ACK_NPENDING)) {
  195. unsigned long mr;
  196. /*
  197. * Is the resource timed out?
  198. * Make everyone ignore the cancelled message.
  199. */
  200. msg2->canceled = 1;
  201. stat->d_canceled++;
  202. cancel_count++;
  203. mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
  204. write_mmr_sw_ack(mr);
  205. }
  206. }
  207. }
  208. if (!cancel_count)
  209. stat->d_nocanceled++;
  210. }
  211. /*
  212. * Do all the things a cpu should do for a TLB shootdown message.
  213. * Other cpu's may come here at the same time for this message.
  214. */
  215. static void bau_process_message(struct msg_desc *mdp, struct bau_control *bcp,
  216. int do_acknowledge)
  217. {
  218. short socket_ack_count = 0;
  219. short *sp;
  220. struct atomic_short *asp;
  221. struct ptc_stats *stat = bcp->statp;
  222. struct bau_pq_entry *msg = mdp->msg;
  223. struct bau_control *smaster = bcp->socket_master;
  224. /*
  225. * This must be a normal message, or retry of a normal message
  226. */
  227. if (msg->address == TLB_FLUSH_ALL) {
  228. local_flush_tlb();
  229. stat->d_alltlb++;
  230. } else {
  231. __flush_tlb_one(msg->address);
  232. stat->d_onetlb++;
  233. }
  234. stat->d_requestee++;
  235. /*
  236. * One cpu on each uvhub has the additional job on a RETRY
  237. * of releasing the resource held by the message that is
  238. * being retried. That message is identified by sending
  239. * cpu number.
  240. */
  241. if (msg->msg_type == MSG_RETRY && bcp == bcp->uvhub_master)
  242. bau_process_retry_msg(mdp, bcp);
  243. /*
  244. * This is a swack message, so we have to reply to it.
  245. * Count each responding cpu on the socket. This avoids
  246. * pinging the count's cache line back and forth between
  247. * the sockets.
  248. */
  249. sp = &smaster->socket_acknowledge_count[mdp->msg_slot];
  250. asp = (struct atomic_short *)sp;
  251. socket_ack_count = atom_asr(1, asp);
  252. if (socket_ack_count == bcp->cpus_in_socket) {
  253. int msg_ack_count;
  254. /*
  255. * Both sockets dump their completed count total into
  256. * the message's count.
  257. */
  258. smaster->socket_acknowledge_count[mdp->msg_slot] = 0;
  259. asp = (struct atomic_short *)&msg->acknowledge_count;
  260. msg_ack_count = atom_asr(socket_ack_count, asp);
  261. if (msg_ack_count == bcp->cpus_in_uvhub) {
  262. /*
  263. * All cpus in uvhub saw it; reply
  264. * (unless we are in the UV2 workaround)
  265. */
  266. reply_to_message(mdp, bcp, do_acknowledge);
  267. }
  268. }
  269. return;
  270. }
  271. /*
  272. * Determine the first cpu on a pnode.
  273. */
  274. static int pnode_to_first_cpu(int pnode, struct bau_control *smaster)
  275. {
  276. int cpu;
  277. struct hub_and_pnode *hpp;
  278. for_each_present_cpu(cpu) {
  279. hpp = &smaster->thp[cpu];
  280. if (pnode == hpp->pnode)
  281. return cpu;
  282. }
  283. return -1;
  284. }
  285. /*
  286. * Last resort when we get a large number of destination timeouts is
  287. * to clear resources held by a given cpu.
  288. * Do this with IPI so that all messages in the BAU message queue
  289. * can be identified by their nonzero swack_vec field.
  290. *
  291. * This is entered for a single cpu on the uvhub.
  292. * The sender want's this uvhub to free a specific message's
  293. * swack resources.
  294. */
  295. static void do_reset(void *ptr)
  296. {
  297. int i;
  298. struct bau_control *bcp = &per_cpu(bau_control, smp_processor_id());
  299. struct reset_args *rap = (struct reset_args *)ptr;
  300. struct bau_pq_entry *msg;
  301. struct ptc_stats *stat = bcp->statp;
  302. stat->d_resets++;
  303. /*
  304. * We're looking for the given sender, and
  305. * will free its swack resource.
  306. * If all cpu's finally responded after the timeout, its
  307. * message 'replied_to' was set.
  308. */
  309. for (msg = bcp->queue_first, i = 0; i < DEST_Q_SIZE; msg++, i++) {
  310. unsigned long msg_res;
  311. /* do_reset: same conditions for cancellation as
  312. bau_process_retry_msg() */
  313. if ((msg->replied_to == 0) &&
  314. (msg->canceled == 0) &&
  315. (msg->sending_cpu == rap->sender) &&
  316. (msg->swack_vec) &&
  317. (msg->msg_type != MSG_NOOP)) {
  318. unsigned long mmr;
  319. unsigned long mr;
  320. /*
  321. * make everyone else ignore this message
  322. */
  323. msg->canceled = 1;
  324. /*
  325. * only reset the resource if it is still pending
  326. */
  327. mmr = read_mmr_sw_ack();
  328. msg_res = msg->swack_vec;
  329. mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
  330. if (mmr & msg_res) {
  331. stat->d_rcanceled++;
  332. write_mmr_sw_ack(mr);
  333. }
  334. }
  335. }
  336. return;
  337. }
  338. /*
  339. * Use IPI to get all target uvhubs to release resources held by
  340. * a given sending cpu number.
  341. */
  342. static void reset_with_ipi(struct pnmask *distribution, struct bau_control *bcp)
  343. {
  344. int pnode;
  345. int apnode;
  346. int maskbits;
  347. int sender = bcp->cpu;
  348. cpumask_t *mask = bcp->uvhub_master->cpumask;
  349. struct bau_control *smaster = bcp->socket_master;
  350. struct reset_args reset_args;
  351. reset_args.sender = sender;
  352. cpus_clear(*mask);
  353. /* find a single cpu for each uvhub in this distribution mask */
  354. maskbits = sizeof(struct pnmask) * BITSPERBYTE;
  355. /* each bit is a pnode relative to the partition base pnode */
  356. for (pnode = 0; pnode < maskbits; pnode++) {
  357. int cpu;
  358. if (!bau_uvhub_isset(pnode, distribution))
  359. continue;
  360. apnode = pnode + bcp->partition_base_pnode;
  361. cpu = pnode_to_first_cpu(apnode, smaster);
  362. cpu_set(cpu, *mask);
  363. }
  364. /* IPI all cpus; preemption is already disabled */
  365. smp_call_function_many(mask, do_reset, (void *)&reset_args, 1);
  366. return;
  367. }
  368. static inline unsigned long cycles_2_us(unsigned long long cyc)
  369. {
  370. unsigned long long ns;
  371. unsigned long us;
  372. int cpu = smp_processor_id();
  373. ns = (cyc * per_cpu(cyc2ns, cpu)) >> CYC2NS_SCALE_FACTOR;
  374. us = ns / 1000;
  375. return us;
  376. }
  377. /*
  378. * wait for all cpus on this hub to finish their sends and go quiet
  379. * leaves uvhub_quiesce set so that no new broadcasts are started by
  380. * bau_flush_send_and_wait()
  381. */
  382. static inline void quiesce_local_uvhub(struct bau_control *hmaster)
  383. {
  384. atom_asr(1, (struct atomic_short *)&hmaster->uvhub_quiesce);
  385. }
  386. /*
  387. * mark this quiet-requestor as done
  388. */
  389. static inline void end_uvhub_quiesce(struct bau_control *hmaster)
  390. {
  391. atom_asr(-1, (struct atomic_short *)&hmaster->uvhub_quiesce);
  392. }
  393. static unsigned long uv1_read_status(unsigned long mmr_offset, int right_shift)
  394. {
  395. unsigned long descriptor_status;
  396. descriptor_status = uv_read_local_mmr(mmr_offset);
  397. descriptor_status >>= right_shift;
  398. descriptor_status &= UV_ACT_STATUS_MASK;
  399. return descriptor_status;
  400. }
  401. /*
  402. * Wait for completion of a broadcast software ack message
  403. * return COMPLETE, RETRY(PLUGGED or TIMEOUT) or GIVEUP
  404. */
  405. static int uv1_wait_completion(struct bau_desc *bau_desc,
  406. unsigned long mmr_offset, int right_shift,
  407. struct bau_control *bcp, long try)
  408. {
  409. unsigned long descriptor_status;
  410. cycles_t ttm;
  411. struct ptc_stats *stat = bcp->statp;
  412. descriptor_status = uv1_read_status(mmr_offset, right_shift);
  413. /* spin on the status MMR, waiting for it to go idle */
  414. while ((descriptor_status != DS_IDLE)) {
  415. /*
  416. * Our software ack messages may be blocked because
  417. * there are no swack resources available. As long
  418. * as none of them has timed out hardware will NACK
  419. * our message and its state will stay IDLE.
  420. */
  421. if (descriptor_status == DS_SOURCE_TIMEOUT) {
  422. stat->s_stimeout++;
  423. return FLUSH_GIVEUP;
  424. } else if (descriptor_status == DS_DESTINATION_TIMEOUT) {
  425. stat->s_dtimeout++;
  426. ttm = get_cycles();
  427. /*
  428. * Our retries may be blocked by all destination
  429. * swack resources being consumed, and a timeout
  430. * pending. In that case hardware returns the
  431. * ERROR that looks like a destination timeout.
  432. */
  433. if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
  434. bcp->conseccompletes = 0;
  435. return FLUSH_RETRY_PLUGGED;
  436. }
  437. bcp->conseccompletes = 0;
  438. return FLUSH_RETRY_TIMEOUT;
  439. } else {
  440. /*
  441. * descriptor_status is still BUSY
  442. */
  443. cpu_relax();
  444. }
  445. descriptor_status = uv1_read_status(mmr_offset, right_shift);
  446. }
  447. bcp->conseccompletes++;
  448. return FLUSH_COMPLETE;
  449. }
  450. /*
  451. * UV2 has an extra bit of status in the ACTIVATION_STATUS_2 register.
  452. */
  453. static unsigned long uv2_read_status(unsigned long offset, int rshft, int desc)
  454. {
  455. unsigned long descriptor_status;
  456. unsigned long descriptor_status2;
  457. descriptor_status = ((read_lmmr(offset) >> rshft) & UV_ACT_STATUS_MASK);
  458. descriptor_status2 = (read_mmr_uv2_status() >> desc) & 0x1UL;
  459. descriptor_status = (descriptor_status << 1) | descriptor_status2;
  460. return descriptor_status;
  461. }
  462. /*
  463. * Return whether the status of the descriptor that is normally used for this
  464. * cpu (the one indexed by its hub-relative cpu number) is busy.
  465. * The status of the original 32 descriptors is always reflected in the 64
  466. * bits of UVH_LB_BAU_SB_ACTIVATION_STATUS_0.
  467. * The bit provided by the activation_status_2 register is irrelevant to
  468. * the status if it is only being tested for busy or not busy.
  469. */
  470. int normal_busy(struct bau_control *bcp)
  471. {
  472. int cpu = bcp->uvhub_cpu;
  473. int mmr_offset;
  474. int right_shift;
  475. mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
  476. right_shift = cpu * UV_ACT_STATUS_SIZE;
  477. return (((((read_lmmr(mmr_offset) >> right_shift) &
  478. UV_ACT_STATUS_MASK)) << 1) == UV2H_DESC_BUSY);
  479. }
  480. /*
  481. * Entered when a bau descriptor has gone into a permanent busy wait because
  482. * of a hardware bug.
  483. * Workaround the bug.
  484. */
  485. int handle_uv2_busy(struct bau_control *bcp)
  486. {
  487. int busy_one = bcp->using_desc;
  488. int normal = bcp->uvhub_cpu;
  489. int selected = -1;
  490. int i;
  491. unsigned long descriptor_status;
  492. unsigned long status;
  493. int mmr_offset;
  494. struct bau_desc *bau_desc_old;
  495. struct bau_desc *bau_desc_new;
  496. struct bau_control *hmaster = bcp->uvhub_master;
  497. struct ptc_stats *stat = bcp->statp;
  498. cycles_t ttm;
  499. stat->s_uv2_wars++;
  500. spin_lock(&hmaster->uvhub_lock);
  501. /* try for the original first */
  502. if (busy_one != normal) {
  503. if (!normal_busy(bcp))
  504. selected = normal;
  505. }
  506. if (selected < 0) {
  507. /* can't use the normal, select an alternate */
  508. mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_1;
  509. descriptor_status = read_lmmr(mmr_offset);
  510. /* scan available descriptors 32-63 */
  511. for (i = 0; i < UV_CPUS_PER_AS; i++) {
  512. if ((hmaster->inuse_map & (1 << i)) == 0) {
  513. status = ((descriptor_status >>
  514. (i * UV_ACT_STATUS_SIZE)) &
  515. UV_ACT_STATUS_MASK) << 1;
  516. if (status != UV2H_DESC_BUSY) {
  517. selected = i + UV_CPUS_PER_AS;
  518. break;
  519. }
  520. }
  521. }
  522. }
  523. if (busy_one != normal)
  524. /* mark the busy alternate as not in-use */
  525. hmaster->inuse_map &= ~(1 << (busy_one - UV_CPUS_PER_AS));
  526. if (selected >= 0) {
  527. /* switch to the selected descriptor */
  528. if (selected != normal) {
  529. /* set the selected alternate as in-use */
  530. hmaster->inuse_map |=
  531. (1 << (selected - UV_CPUS_PER_AS));
  532. if (selected > stat->s_uv2_wars_hw)
  533. stat->s_uv2_wars_hw = selected;
  534. }
  535. bau_desc_old = bcp->descriptor_base;
  536. bau_desc_old += (ITEMS_PER_DESC * busy_one);
  537. bcp->using_desc = selected;
  538. bau_desc_new = bcp->descriptor_base;
  539. bau_desc_new += (ITEMS_PER_DESC * selected);
  540. *bau_desc_new = *bau_desc_old;
  541. } else {
  542. /*
  543. * All are busy. Wait for the normal one for this cpu to
  544. * free up.
  545. */
  546. stat->s_uv2_war_waits++;
  547. spin_unlock(&hmaster->uvhub_lock);
  548. ttm = get_cycles();
  549. do {
  550. cpu_relax();
  551. } while (normal_busy(bcp));
  552. spin_lock(&hmaster->uvhub_lock);
  553. /* switch to the original descriptor */
  554. bcp->using_desc = normal;
  555. bau_desc_old = bcp->descriptor_base;
  556. bau_desc_old += (ITEMS_PER_DESC * bcp->using_desc);
  557. bcp->using_desc = (ITEMS_PER_DESC * normal);
  558. bau_desc_new = bcp->descriptor_base;
  559. bau_desc_new += (ITEMS_PER_DESC * normal);
  560. *bau_desc_new = *bau_desc_old; /* copy the entire descriptor */
  561. }
  562. spin_unlock(&hmaster->uvhub_lock);
  563. return FLUSH_RETRY_BUSYBUG;
  564. }
  565. static int uv2_wait_completion(struct bau_desc *bau_desc,
  566. unsigned long mmr_offset, int right_shift,
  567. struct bau_control *bcp, long try)
  568. {
  569. unsigned long descriptor_stat;
  570. cycles_t ttm;
  571. int desc = bcp->using_desc;
  572. long busy_reps = 0;
  573. struct ptc_stats *stat = bcp->statp;
  574. descriptor_stat = uv2_read_status(mmr_offset, right_shift, desc);
  575. /* spin on the status MMR, waiting for it to go idle */
  576. while (descriptor_stat != UV2H_DESC_IDLE) {
  577. /*
  578. * Our software ack messages may be blocked because
  579. * there are no swack resources available. As long
  580. * as none of them has timed out hardware will NACK
  581. * our message and its state will stay IDLE.
  582. */
  583. if ((descriptor_stat == UV2H_DESC_SOURCE_TIMEOUT) ||
  584. (descriptor_stat == UV2H_DESC_DEST_STRONG_NACK) ||
  585. (descriptor_stat == UV2H_DESC_DEST_PUT_ERR)) {
  586. stat->s_stimeout++;
  587. return FLUSH_GIVEUP;
  588. } else if (descriptor_stat == UV2H_DESC_DEST_TIMEOUT) {
  589. stat->s_dtimeout++;
  590. ttm = get_cycles();
  591. bcp->conseccompletes = 0;
  592. return FLUSH_RETRY_TIMEOUT;
  593. } else {
  594. busy_reps++;
  595. if (busy_reps > 1000000) {
  596. /* not to hammer on the clock */
  597. busy_reps = 0;
  598. ttm = get_cycles();
  599. if ((ttm - bcp->send_message) >
  600. (bcp->clocks_per_100_usec)) {
  601. return handle_uv2_busy(bcp);
  602. }
  603. }
  604. /*
  605. * descriptor_stat is still BUSY
  606. */
  607. cpu_relax();
  608. }
  609. descriptor_stat = uv2_read_status(mmr_offset, right_shift,
  610. desc);
  611. }
  612. bcp->conseccompletes++;
  613. return FLUSH_COMPLETE;
  614. }
  615. /*
  616. * There are 2 status registers; each and array[32] of 2 bits. Set up for
  617. * which register to read and position in that register based on cpu in
  618. * current hub.
  619. */
  620. static int wait_completion(struct bau_desc *bau_desc,
  621. struct bau_control *bcp, long try)
  622. {
  623. int right_shift;
  624. unsigned long mmr_offset;
  625. int desc = bcp->using_desc;
  626. if (desc < UV_CPUS_PER_AS) {
  627. mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
  628. right_shift = desc * UV_ACT_STATUS_SIZE;
  629. } else {
  630. mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_1;
  631. right_shift = ((desc - UV_CPUS_PER_AS) * UV_ACT_STATUS_SIZE);
  632. }
  633. if (bcp->uvhub_version == 1)
  634. return uv1_wait_completion(bau_desc, mmr_offset, right_shift,
  635. bcp, try);
  636. else
  637. return uv2_wait_completion(bau_desc, mmr_offset, right_shift,
  638. bcp, try);
  639. }
  640. static inline cycles_t sec_2_cycles(unsigned long sec)
  641. {
  642. unsigned long ns;
  643. cycles_t cyc;
  644. ns = sec * 1000000000;
  645. cyc = (ns << CYC2NS_SCALE_FACTOR)/(per_cpu(cyc2ns, smp_processor_id()));
  646. return cyc;
  647. }
  648. /*
  649. * Our retries are blocked by all destination sw ack resources being
  650. * in use, and a timeout is pending. In that case hardware immediately
  651. * returns the ERROR that looks like a destination timeout.
  652. */
  653. static void destination_plugged(struct bau_desc *bau_desc,
  654. struct bau_control *bcp,
  655. struct bau_control *hmaster, struct ptc_stats *stat)
  656. {
  657. udelay(bcp->plugged_delay);
  658. bcp->plugged_tries++;
  659. if (bcp->plugged_tries >= bcp->plugsb4reset) {
  660. bcp->plugged_tries = 0;
  661. quiesce_local_uvhub(hmaster);
  662. spin_lock(&hmaster->queue_lock);
  663. reset_with_ipi(&bau_desc->distribution, bcp);
  664. spin_unlock(&hmaster->queue_lock);
  665. end_uvhub_quiesce(hmaster);
  666. bcp->ipi_attempts++;
  667. stat->s_resets_plug++;
  668. }
  669. }
  670. static void destination_timeout(struct bau_desc *bau_desc,
  671. struct bau_control *bcp, struct bau_control *hmaster,
  672. struct ptc_stats *stat)
  673. {
  674. hmaster->max_concurr = 1;
  675. bcp->timeout_tries++;
  676. if (bcp->timeout_tries >= bcp->timeoutsb4reset) {
  677. bcp->timeout_tries = 0;
  678. quiesce_local_uvhub(hmaster);
  679. spin_lock(&hmaster->queue_lock);
  680. reset_with_ipi(&bau_desc->distribution, bcp);
  681. spin_unlock(&hmaster->queue_lock);
  682. end_uvhub_quiesce(hmaster);
  683. bcp->ipi_attempts++;
  684. stat->s_resets_timeout++;
  685. }
  686. }
  687. /*
  688. * Completions are taking a very long time due to a congested numalink
  689. * network.
  690. */
  691. static void disable_for_congestion(struct bau_control *bcp,
  692. struct ptc_stats *stat)
  693. {
  694. /* let only one cpu do this disabling */
  695. spin_lock(&disable_lock);
  696. if (!baudisabled && bcp->period_requests &&
  697. ((bcp->period_time / bcp->period_requests) > congested_cycles)) {
  698. int tcpu;
  699. struct bau_control *tbcp;
  700. /* it becomes this cpu's job to turn on the use of the
  701. BAU again */
  702. baudisabled = 1;
  703. bcp->set_bau_off = 1;
  704. bcp->set_bau_on_time = get_cycles();
  705. bcp->set_bau_on_time += sec_2_cycles(bcp->cong_period);
  706. stat->s_bau_disabled++;
  707. for_each_present_cpu(tcpu) {
  708. tbcp = &per_cpu(bau_control, tcpu);
  709. tbcp->baudisabled = 1;
  710. }
  711. }
  712. spin_unlock(&disable_lock);
  713. }
  714. static void count_max_concurr(int stat, struct bau_control *bcp,
  715. struct bau_control *hmaster)
  716. {
  717. bcp->plugged_tries = 0;
  718. bcp->timeout_tries = 0;
  719. if (stat != FLUSH_COMPLETE)
  720. return;
  721. if (bcp->conseccompletes <= bcp->complete_threshold)
  722. return;
  723. if (hmaster->max_concurr >= hmaster->max_concurr_const)
  724. return;
  725. hmaster->max_concurr++;
  726. }
  727. static void record_send_stats(cycles_t time1, cycles_t time2,
  728. struct bau_control *bcp, struct ptc_stats *stat,
  729. int completion_status, int try)
  730. {
  731. cycles_t elapsed;
  732. if (time2 > time1) {
  733. elapsed = time2 - time1;
  734. stat->s_time += elapsed;
  735. if ((completion_status == FLUSH_COMPLETE) && (try == 1)) {
  736. bcp->period_requests++;
  737. bcp->period_time += elapsed;
  738. if ((elapsed > congested_cycles) &&
  739. (bcp->period_requests > bcp->cong_reps))
  740. disable_for_congestion(bcp, stat);
  741. }
  742. } else
  743. stat->s_requestor--;
  744. if (completion_status == FLUSH_COMPLETE && try > 1)
  745. stat->s_retriesok++;
  746. else if (completion_status == FLUSH_GIVEUP)
  747. stat->s_giveup++;
  748. }
  749. /*
  750. * Because of a uv1 hardware bug only a limited number of concurrent
  751. * requests can be made.
  752. */
  753. static void uv1_throttle(struct bau_control *hmaster, struct ptc_stats *stat)
  754. {
  755. spinlock_t *lock = &hmaster->uvhub_lock;
  756. atomic_t *v;
  757. v = &hmaster->active_descriptor_count;
  758. if (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr)) {
  759. stat->s_throttles++;
  760. do {
  761. cpu_relax();
  762. } while (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr));
  763. }
  764. }
  765. /*
  766. * Handle the completion status of a message send.
  767. */
  768. static void handle_cmplt(int completion_status, struct bau_desc *bau_desc,
  769. struct bau_control *bcp, struct bau_control *hmaster,
  770. struct ptc_stats *stat)
  771. {
  772. if (completion_status == FLUSH_RETRY_PLUGGED)
  773. destination_plugged(bau_desc, bcp, hmaster, stat);
  774. else if (completion_status == FLUSH_RETRY_TIMEOUT)
  775. destination_timeout(bau_desc, bcp, hmaster, stat);
  776. }
  777. /*
  778. * Send a broadcast and wait for it to complete.
  779. *
  780. * The flush_mask contains the cpus the broadcast is to be sent to including
  781. * cpus that are on the local uvhub.
  782. *
  783. * Returns 0 if all flushing represented in the mask was done.
  784. * Returns 1 if it gives up entirely and the original cpu mask is to be
  785. * returned to the kernel.
  786. */
  787. int uv_flush_send_and_wait(struct cpumask *flush_mask, struct bau_control *bcp)
  788. {
  789. int seq_number = 0;
  790. int completion_stat = 0;
  791. int uv1 = 0;
  792. long try = 0;
  793. unsigned long index;
  794. cycles_t time1;
  795. cycles_t time2;
  796. struct ptc_stats *stat = bcp->statp;
  797. struct bau_control *hmaster = bcp->uvhub_master;
  798. struct uv1_bau_msg_header *uv1_hdr = NULL;
  799. struct uv2_bau_msg_header *uv2_hdr = NULL;
  800. struct bau_desc *bau_desc;
  801. if (bcp->uvhub_version == 1)
  802. uv1_throttle(hmaster, stat);
  803. while (hmaster->uvhub_quiesce)
  804. cpu_relax();
  805. time1 = get_cycles();
  806. do {
  807. bau_desc = bcp->descriptor_base;
  808. bau_desc += (ITEMS_PER_DESC * bcp->using_desc);
  809. if (bcp->uvhub_version == 1) {
  810. uv1 = 1;
  811. uv1_hdr = &bau_desc->header.uv1_hdr;
  812. } else
  813. uv2_hdr = &bau_desc->header.uv2_hdr;
  814. if ((try == 0) || (completion_stat == FLUSH_RETRY_BUSYBUG)) {
  815. if (uv1)
  816. uv1_hdr->msg_type = MSG_REGULAR;
  817. else
  818. uv2_hdr->msg_type = MSG_REGULAR;
  819. seq_number = bcp->message_number++;
  820. } else {
  821. if (uv1)
  822. uv1_hdr->msg_type = MSG_RETRY;
  823. else
  824. uv2_hdr->msg_type = MSG_RETRY;
  825. stat->s_retry_messages++;
  826. }
  827. if (uv1)
  828. uv1_hdr->sequence = seq_number;
  829. else
  830. uv2_hdr->sequence = seq_number;
  831. index = (1UL << AS_PUSH_SHIFT) | bcp->using_desc;
  832. bcp->send_message = get_cycles();
  833. write_mmr_activation(index);
  834. try++;
  835. completion_stat = wait_completion(bau_desc, bcp, try);
  836. /* UV2: wait_completion() may change the bcp->using_desc */
  837. handle_cmplt(completion_stat, bau_desc, bcp, hmaster, stat);
  838. if (bcp->ipi_attempts >= bcp->ipi_reset_limit) {
  839. bcp->ipi_attempts = 0;
  840. completion_stat = FLUSH_GIVEUP;
  841. break;
  842. }
  843. cpu_relax();
  844. } while ((completion_stat == FLUSH_RETRY_PLUGGED) ||
  845. (completion_stat == FLUSH_RETRY_BUSYBUG) ||
  846. (completion_stat == FLUSH_RETRY_TIMEOUT));
  847. time2 = get_cycles();
  848. count_max_concurr(completion_stat, bcp, hmaster);
  849. while (hmaster->uvhub_quiesce)
  850. cpu_relax();
  851. atomic_dec(&hmaster->active_descriptor_count);
  852. record_send_stats(time1, time2, bcp, stat, completion_stat, try);
  853. if (completion_stat == FLUSH_GIVEUP)
  854. /* FLUSH_GIVEUP will fall back to using IPI's for tlb flush */
  855. return 1;
  856. return 0;
  857. }
  858. /*
  859. * The BAU is disabled. When the disabled time period has expired, the cpu
  860. * that disabled it must re-enable it.
  861. * Return 0 if it is re-enabled for all cpus.
  862. */
  863. static int check_enable(struct bau_control *bcp, struct ptc_stats *stat)
  864. {
  865. int tcpu;
  866. struct bau_control *tbcp;
  867. if (bcp->set_bau_off) {
  868. if (get_cycles() >= bcp->set_bau_on_time) {
  869. stat->s_bau_reenabled++;
  870. baudisabled = 0;
  871. for_each_present_cpu(tcpu) {
  872. tbcp = &per_cpu(bau_control, tcpu);
  873. tbcp->baudisabled = 0;
  874. tbcp->period_requests = 0;
  875. tbcp->period_time = 0;
  876. }
  877. return 0;
  878. }
  879. }
  880. return -1;
  881. }
  882. static void record_send_statistics(struct ptc_stats *stat, int locals, int hubs,
  883. int remotes, struct bau_desc *bau_desc)
  884. {
  885. stat->s_requestor++;
  886. stat->s_ntargcpu += remotes + locals;
  887. stat->s_ntargremotes += remotes;
  888. stat->s_ntarglocals += locals;
  889. /* uvhub statistics */
  890. hubs = bau_uvhub_weight(&bau_desc->distribution);
  891. if (locals) {
  892. stat->s_ntarglocaluvhub++;
  893. stat->s_ntargremoteuvhub += (hubs - 1);
  894. } else
  895. stat->s_ntargremoteuvhub += hubs;
  896. stat->s_ntarguvhub += hubs;
  897. if (hubs >= 16)
  898. stat->s_ntarguvhub16++;
  899. else if (hubs >= 8)
  900. stat->s_ntarguvhub8++;
  901. else if (hubs >= 4)
  902. stat->s_ntarguvhub4++;
  903. else if (hubs >= 2)
  904. stat->s_ntarguvhub2++;
  905. else
  906. stat->s_ntarguvhub1++;
  907. }
  908. /*
  909. * Translate a cpu mask to the uvhub distribution mask in the BAU
  910. * activation descriptor.
  911. */
  912. static int set_distrib_bits(struct cpumask *flush_mask, struct bau_control *bcp,
  913. struct bau_desc *bau_desc, int *localsp, int *remotesp)
  914. {
  915. int cpu;
  916. int pnode;
  917. int cnt = 0;
  918. struct hub_and_pnode *hpp;
  919. for_each_cpu(cpu, flush_mask) {
  920. /*
  921. * The distribution vector is a bit map of pnodes, relative
  922. * to the partition base pnode (and the partition base nasid
  923. * in the header).
  924. * Translate cpu to pnode and hub using a local memory array.
  925. */
  926. hpp = &bcp->socket_master->thp[cpu];
  927. pnode = hpp->pnode - bcp->partition_base_pnode;
  928. bau_uvhub_set(pnode, &bau_desc->distribution);
  929. cnt++;
  930. if (hpp->uvhub == bcp->uvhub)
  931. (*localsp)++;
  932. else
  933. (*remotesp)++;
  934. }
  935. if (!cnt)
  936. return 1;
  937. return 0;
  938. }
  939. /*
  940. * globally purge translation cache of a virtual address or all TLB's
  941. * @cpumask: mask of all cpu's in which the address is to be removed
  942. * @mm: mm_struct containing virtual address range
  943. * @va: virtual address to be removed (or TLB_FLUSH_ALL for all TLB's on cpu)
  944. * @cpu: the current cpu
  945. *
  946. * This is the entry point for initiating any UV global TLB shootdown.
  947. *
  948. * Purges the translation caches of all specified processors of the given
  949. * virtual address, or purges all TLB's on specified processors.
  950. *
  951. * The caller has derived the cpumask from the mm_struct. This function
  952. * is called only if there are bits set in the mask. (e.g. flush_tlb_page())
  953. *
  954. * The cpumask is converted into a uvhubmask of the uvhubs containing
  955. * those cpus.
  956. *
  957. * Note that this function should be called with preemption disabled.
  958. *
  959. * Returns NULL if all remote flushing was done.
  960. * Returns pointer to cpumask if some remote flushing remains to be
  961. * done. The returned pointer is valid till preemption is re-enabled.
  962. */
  963. const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
  964. struct mm_struct *mm, unsigned long va,
  965. unsigned int cpu)
  966. {
  967. int locals = 0;
  968. int remotes = 0;
  969. int hubs = 0;
  970. struct bau_desc *bau_desc;
  971. struct cpumask *flush_mask;
  972. struct ptc_stats *stat;
  973. struct bau_control *bcp;
  974. /* kernel was booted 'nobau' */
  975. if (nobau)
  976. return cpumask;
  977. bcp = &per_cpu(bau_control, cpu);
  978. stat = bcp->statp;
  979. /* bau was disabled due to slow response */
  980. if (bcp->baudisabled) {
  981. if (check_enable(bcp, stat))
  982. return cpumask;
  983. }
  984. /*
  985. * Each sending cpu has a per-cpu mask which it fills from the caller's
  986. * cpu mask. All cpus are converted to uvhubs and copied to the
  987. * activation descriptor.
  988. */
  989. flush_mask = (struct cpumask *)per_cpu(uv_flush_tlb_mask, cpu);
  990. /* don't actually do a shootdown of the local cpu */
  991. cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
  992. if (cpu_isset(cpu, *cpumask))
  993. stat->s_ntargself++;
  994. bau_desc = bcp->descriptor_base;
  995. bau_desc += (ITEMS_PER_DESC * bcp->using_desc);
  996. bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
  997. if (set_distrib_bits(flush_mask, bcp, bau_desc, &locals, &remotes))
  998. return NULL;
  999. record_send_statistics(stat, locals, hubs, remotes, bau_desc);
  1000. bau_desc->payload.address = va;
  1001. bau_desc->payload.sending_cpu = cpu;
  1002. /*
  1003. * uv_flush_send_and_wait returns 0 if all cpu's were messaged,
  1004. * or 1 if it gave up and the original cpumask should be returned.
  1005. */
  1006. if (!uv_flush_send_and_wait(flush_mask, bcp))
  1007. return NULL;
  1008. else
  1009. return cpumask;
  1010. }
  1011. /*
  1012. * Search the message queue for any 'other' message with the same software
  1013. * acknowledge resource bit vector.
  1014. */
  1015. struct bau_pq_entry *find_another_by_swack(struct bau_pq_entry *msg,
  1016. struct bau_control *bcp, unsigned char swack_vec)
  1017. {
  1018. struct bau_pq_entry *msg_next = msg + 1;
  1019. if (msg_next > bcp->queue_last)
  1020. msg_next = bcp->queue_first;
  1021. while ((msg_next->swack_vec != 0) && (msg_next != msg)) {
  1022. if (msg_next->swack_vec == swack_vec)
  1023. return msg_next;
  1024. msg_next++;
  1025. if (msg_next > bcp->queue_last)
  1026. msg_next = bcp->queue_first;
  1027. }
  1028. return NULL;
  1029. }
  1030. /*
  1031. * UV2 needs to work around a bug in which an arriving message has not
  1032. * set a bit in the UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE register.
  1033. * Such a message must be ignored.
  1034. */
  1035. void process_uv2_message(struct msg_desc *mdp, struct bau_control *bcp)
  1036. {
  1037. unsigned long mmr_image;
  1038. unsigned char swack_vec;
  1039. struct bau_pq_entry *msg = mdp->msg;
  1040. struct bau_pq_entry *other_msg;
  1041. mmr_image = read_mmr_sw_ack();
  1042. swack_vec = msg->swack_vec;
  1043. if ((swack_vec & mmr_image) == 0) {
  1044. /*
  1045. * This message was assigned a swack resource, but no
  1046. * reserved acknowlegment is pending.
  1047. * The bug has prevented this message from setting the MMR.
  1048. * And no other message has used the same sw_ack resource.
  1049. * Do the requested shootdown but do not reply to the msg.
  1050. * (the 0 means make no acknowledge)
  1051. */
  1052. bau_process_message(mdp, bcp, 0);
  1053. return;
  1054. }
  1055. /*
  1056. * Some message has set the MMR 'pending' bit; it might have been
  1057. * another message. Look for that message.
  1058. */
  1059. other_msg = find_another_by_swack(msg, bcp, msg->swack_vec);
  1060. if (other_msg) {
  1061. /* There is another. Do not ack the current one. */
  1062. bau_process_message(mdp, bcp, 0);
  1063. /*
  1064. * Let the natural processing of that message acknowledge
  1065. * it. Don't get the processing of sw_ack's out of order.
  1066. */
  1067. return;
  1068. }
  1069. /*
  1070. * There is no other message using this sw_ack, so it is safe to
  1071. * acknowledge it.
  1072. */
  1073. bau_process_message(mdp, bcp, 1);
  1074. return;
  1075. }
  1076. /*
  1077. * The BAU message interrupt comes here. (registered by set_intr_gate)
  1078. * See entry_64.S
  1079. *
  1080. * We received a broadcast assist message.
  1081. *
  1082. * Interrupts are disabled; this interrupt could represent
  1083. * the receipt of several messages.
  1084. *
  1085. * All cores/threads on this hub get this interrupt.
  1086. * The last one to see it does the software ack.
  1087. * (the resource will not be freed until noninterruptable cpus see this
  1088. * interrupt; hardware may timeout the s/w ack and reply ERROR)
  1089. */
  1090. void uv_bau_message_interrupt(struct pt_regs *regs)
  1091. {
  1092. int count = 0;
  1093. cycles_t time_start;
  1094. struct bau_pq_entry *msg;
  1095. struct bau_control *bcp;
  1096. struct ptc_stats *stat;
  1097. struct msg_desc msgdesc;
  1098. ack_APIC_irq();
  1099. time_start = get_cycles();
  1100. bcp = &per_cpu(bau_control, smp_processor_id());
  1101. stat = bcp->statp;
  1102. msgdesc.queue_first = bcp->queue_first;
  1103. msgdesc.queue_last = bcp->queue_last;
  1104. msg = bcp->bau_msg_head;
  1105. while (msg->swack_vec) {
  1106. count++;
  1107. msgdesc.msg_slot = msg - msgdesc.queue_first;
  1108. msgdesc.msg = msg;
  1109. if (bcp->uvhub_version == 2)
  1110. process_uv2_message(&msgdesc, bcp);
  1111. else
  1112. bau_process_message(&msgdesc, bcp, 1);
  1113. msg++;
  1114. if (msg > msgdesc.queue_last)
  1115. msg = msgdesc.queue_first;
  1116. bcp->bau_msg_head = msg;
  1117. }
  1118. stat->d_time += (get_cycles() - time_start);
  1119. if (!count)
  1120. stat->d_nomsg++;
  1121. else if (count > 1)
  1122. stat->d_multmsg++;
  1123. }
  1124. /*
  1125. * Each target uvhub (i.e. a uvhub that has cpu's) needs to have
  1126. * shootdown message timeouts enabled. The timeout does not cause
  1127. * an interrupt, but causes an error message to be returned to
  1128. * the sender.
  1129. */
  1130. static void __init enable_timeouts(void)
  1131. {
  1132. int uvhub;
  1133. int nuvhubs;
  1134. int pnode;
  1135. unsigned long mmr_image;
  1136. nuvhubs = uv_num_possible_blades();
  1137. for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
  1138. if (!uv_blade_nr_possible_cpus(uvhub))
  1139. continue;
  1140. pnode = uv_blade_to_pnode(uvhub);
  1141. mmr_image = read_mmr_misc_control(pnode);
  1142. /*
  1143. * Set the timeout period and then lock it in, in three
  1144. * steps; captures and locks in the period.
  1145. *
  1146. * To program the period, the SOFT_ACK_MODE must be off.
  1147. */
  1148. mmr_image &= ~(1L << SOFTACK_MSHIFT);
  1149. write_mmr_misc_control(pnode, mmr_image);
  1150. /*
  1151. * Set the 4-bit period.
  1152. */
  1153. mmr_image &= ~((unsigned long)0xf << SOFTACK_PSHIFT);
  1154. mmr_image |= (SOFTACK_TIMEOUT_PERIOD << SOFTACK_PSHIFT);
  1155. write_mmr_misc_control(pnode, mmr_image);
  1156. /*
  1157. * UV1:
  1158. * Subsequent reversals of the timebase bit (3) cause an
  1159. * immediate timeout of one or all INTD resources as
  1160. * indicated in bits 2:0 (7 causes all of them to timeout).
  1161. */
  1162. mmr_image |= (1L << SOFTACK_MSHIFT);
  1163. if (is_uv2_hub()) {
  1164. mmr_image &= ~(1L << UV2_LEG_SHFT);
  1165. mmr_image |= (1L << UV2_EXT_SHFT);
  1166. }
  1167. write_mmr_misc_control(pnode, mmr_image);
  1168. }
  1169. }
  1170. static void *ptc_seq_start(struct seq_file *file, loff_t *offset)
  1171. {
  1172. if (*offset < num_possible_cpus())
  1173. return offset;
  1174. return NULL;
  1175. }
  1176. static void *ptc_seq_next(struct seq_file *file, void *data, loff_t *offset)
  1177. {
  1178. (*offset)++;
  1179. if (*offset < num_possible_cpus())
  1180. return offset;
  1181. return NULL;
  1182. }
  1183. static void ptc_seq_stop(struct seq_file *file, void *data)
  1184. {
  1185. }
  1186. static inline unsigned long long usec_2_cycles(unsigned long microsec)
  1187. {
  1188. unsigned long ns;
  1189. unsigned long long cyc;
  1190. ns = microsec * 1000;
  1191. cyc = (ns << CYC2NS_SCALE_FACTOR)/(per_cpu(cyc2ns, smp_processor_id()));
  1192. return cyc;
  1193. }
  1194. /*
  1195. * Display the statistics thru /proc/sgi_uv/ptc_statistics
  1196. * 'data' points to the cpu number
  1197. * Note: see the descriptions in stat_description[].
  1198. */
  1199. static int ptc_seq_show(struct seq_file *file, void *data)
  1200. {
  1201. struct ptc_stats *stat;
  1202. int cpu;
  1203. cpu = *(loff_t *)data;
  1204. if (!cpu) {
  1205. seq_printf(file,
  1206. "# cpu sent stime self locals remotes ncpus localhub ");
  1207. seq_printf(file,
  1208. "remotehub numuvhubs numuvhubs16 numuvhubs8 ");
  1209. seq_printf(file,
  1210. "numuvhubs4 numuvhubs2 numuvhubs1 dto retries rok ");
  1211. seq_printf(file,
  1212. "resetp resett giveup sto bz throt swack recv rtime ");
  1213. seq_printf(file,
  1214. "all one mult none retry canc nocan reset rcan ");
  1215. seq_printf(file,
  1216. "disable enable wars warshw warwaits\n");
  1217. }
  1218. if (cpu < num_possible_cpus() && cpu_online(cpu)) {
  1219. stat = &per_cpu(ptcstats, cpu);
  1220. /* source side statistics */
  1221. seq_printf(file,
  1222. "cpu %d %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
  1223. cpu, stat->s_requestor, cycles_2_us(stat->s_time),
  1224. stat->s_ntargself, stat->s_ntarglocals,
  1225. stat->s_ntargremotes, stat->s_ntargcpu,
  1226. stat->s_ntarglocaluvhub, stat->s_ntargremoteuvhub,
  1227. stat->s_ntarguvhub, stat->s_ntarguvhub16);
  1228. seq_printf(file, "%ld %ld %ld %ld %ld ",
  1229. stat->s_ntarguvhub8, stat->s_ntarguvhub4,
  1230. stat->s_ntarguvhub2, stat->s_ntarguvhub1,
  1231. stat->s_dtimeout);
  1232. seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld ",
  1233. stat->s_retry_messages, stat->s_retriesok,
  1234. stat->s_resets_plug, stat->s_resets_timeout,
  1235. stat->s_giveup, stat->s_stimeout,
  1236. stat->s_busy, stat->s_throttles);
  1237. /* destination side statistics */
  1238. seq_printf(file,
  1239. "%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
  1240. read_gmmr_sw_ack(uv_cpu_to_pnode(cpu)),
  1241. stat->d_requestee, cycles_2_us(stat->d_time),
  1242. stat->d_alltlb, stat->d_onetlb, stat->d_multmsg,
  1243. stat->d_nomsg, stat->d_retries, stat->d_canceled,
  1244. stat->d_nocanceled, stat->d_resets,
  1245. stat->d_rcanceled);
  1246. seq_printf(file, "%ld %ld %ld %ld %ld\n",
  1247. stat->s_bau_disabled, stat->s_bau_reenabled,
  1248. stat->s_uv2_wars, stat->s_uv2_wars_hw,
  1249. stat->s_uv2_war_waits);
  1250. }
  1251. return 0;
  1252. }
  1253. /*
  1254. * Display the tunables thru debugfs
  1255. */
  1256. static ssize_t tunables_read(struct file *file, char __user *userbuf,
  1257. size_t count, loff_t *ppos)
  1258. {
  1259. char *buf;
  1260. int ret;
  1261. buf = kasprintf(GFP_KERNEL, "%s %s %s\n%d %d %d %d %d %d %d %d %d\n",
  1262. "max_concur plugged_delay plugsb4reset",
  1263. "timeoutsb4reset ipi_reset_limit complete_threshold",
  1264. "congested_response_us congested_reps congested_period",
  1265. max_concurr, plugged_delay, plugsb4reset,
  1266. timeoutsb4reset, ipi_reset_limit, complete_threshold,
  1267. congested_respns_us, congested_reps, congested_period);
  1268. if (!buf)
  1269. return -ENOMEM;
  1270. ret = simple_read_from_buffer(userbuf, count, ppos, buf, strlen(buf));
  1271. kfree(buf);
  1272. return ret;
  1273. }
  1274. /*
  1275. * handle a write to /proc/sgi_uv/ptc_statistics
  1276. * -1: reset the statistics
  1277. * 0: display meaning of the statistics
  1278. */
  1279. static ssize_t ptc_proc_write(struct file *file, const char __user *user,
  1280. size_t count, loff_t *data)
  1281. {
  1282. int cpu;
  1283. int i;
  1284. int elements;
  1285. long input_arg;
  1286. char optstr[64];
  1287. struct ptc_stats *stat;
  1288. if (count == 0 || count > sizeof(optstr))
  1289. return -EINVAL;
  1290. if (copy_from_user(optstr, user, count))
  1291. return -EFAULT;
  1292. optstr[count - 1] = '\0';
  1293. if (strict_strtol(optstr, 10, &input_arg) < 0) {
  1294. printk(KERN_DEBUG "%s is invalid\n", optstr);
  1295. return -EINVAL;
  1296. }
  1297. if (input_arg == 0) {
  1298. elements = sizeof(stat_description)/sizeof(*stat_description);
  1299. printk(KERN_DEBUG "# cpu: cpu number\n");
  1300. printk(KERN_DEBUG "Sender statistics:\n");
  1301. for (i = 0; i < elements; i++)
  1302. printk(KERN_DEBUG "%s\n", stat_description[i]);
  1303. } else if (input_arg == -1) {
  1304. for_each_present_cpu(cpu) {
  1305. stat = &per_cpu(ptcstats, cpu);
  1306. memset(stat, 0, sizeof(struct ptc_stats));
  1307. }
  1308. }
  1309. return count;
  1310. }
  1311. static int local_atoi(const char *name)
  1312. {
  1313. int val = 0;
  1314. for (;; name++) {
  1315. switch (*name) {
  1316. case '0' ... '9':
  1317. val = 10*val+(*name-'0');
  1318. break;
  1319. default:
  1320. return val;
  1321. }
  1322. }
  1323. }
  1324. /*
  1325. * Parse the values written to /sys/kernel/debug/sgi_uv/bau_tunables.
  1326. * Zero values reset them to defaults.
  1327. */
  1328. static int parse_tunables_write(struct bau_control *bcp, char *instr,
  1329. int count)
  1330. {
  1331. char *p;
  1332. char *q;
  1333. int cnt = 0;
  1334. int val;
  1335. int e = sizeof(tunables) / sizeof(*tunables);
  1336. p = instr + strspn(instr, WHITESPACE);
  1337. q = p;
  1338. for (; *p; p = q + strspn(q, WHITESPACE)) {
  1339. q = p + strcspn(p, WHITESPACE);
  1340. cnt++;
  1341. if (q == p)
  1342. break;
  1343. }
  1344. if (cnt != e) {
  1345. printk(KERN_INFO "bau tunable error: should be %d values\n", e);
  1346. return -EINVAL;
  1347. }
  1348. p = instr + strspn(instr, WHITESPACE);
  1349. q = p;
  1350. for (cnt = 0; *p; p = q + strspn(q, WHITESPACE), cnt++) {
  1351. q = p + strcspn(p, WHITESPACE);
  1352. val = local_atoi(p);
  1353. switch (cnt) {
  1354. case 0:
  1355. if (val == 0) {
  1356. max_concurr = MAX_BAU_CONCURRENT;
  1357. max_concurr_const = MAX_BAU_CONCURRENT;
  1358. continue;
  1359. }
  1360. if (val < 1 || val > bcp->cpus_in_uvhub) {
  1361. printk(KERN_DEBUG
  1362. "Error: BAU max concurrent %d is invalid\n",
  1363. val);
  1364. return -EINVAL;
  1365. }
  1366. max_concurr = val;
  1367. max_concurr_const = val;
  1368. continue;
  1369. default:
  1370. if (val == 0)
  1371. *tunables[cnt].tunp = tunables[cnt].deflt;
  1372. else
  1373. *tunables[cnt].tunp = val;
  1374. continue;
  1375. }
  1376. if (q == p)
  1377. break;
  1378. }
  1379. return 0;
  1380. }
  1381. /*
  1382. * Handle a write to debugfs. (/sys/kernel/debug/sgi_uv/bau_tunables)
  1383. */
  1384. static ssize_t tunables_write(struct file *file, const char __user *user,
  1385. size_t count, loff_t *data)
  1386. {
  1387. int cpu;
  1388. int ret;
  1389. char instr[100];
  1390. struct bau_control *bcp;
  1391. if (count == 0 || count > sizeof(instr)-1)
  1392. return -EINVAL;
  1393. if (copy_from_user(instr, user, count))
  1394. return -EFAULT;
  1395. instr[count] = '\0';
  1396. cpu = get_cpu();
  1397. bcp = &per_cpu(bau_control, cpu);
  1398. ret = parse_tunables_write(bcp, instr, count);
  1399. put_cpu();
  1400. if (ret)
  1401. return ret;
  1402. for_each_present_cpu(cpu) {
  1403. bcp = &per_cpu(bau_control, cpu);
  1404. bcp->max_concurr = max_concurr;
  1405. bcp->max_concurr_const = max_concurr;
  1406. bcp->plugged_delay = plugged_delay;
  1407. bcp->plugsb4reset = plugsb4reset;
  1408. bcp->timeoutsb4reset = timeoutsb4reset;
  1409. bcp->ipi_reset_limit = ipi_reset_limit;
  1410. bcp->complete_threshold = complete_threshold;
  1411. bcp->cong_response_us = congested_respns_us;
  1412. bcp->cong_reps = congested_reps;
  1413. bcp->cong_period = congested_period;
  1414. }
  1415. return count;
  1416. }
  1417. static const struct seq_operations uv_ptc_seq_ops = {
  1418. .start = ptc_seq_start,
  1419. .next = ptc_seq_next,
  1420. .stop = ptc_seq_stop,
  1421. .show = ptc_seq_show
  1422. };
  1423. static int ptc_proc_open(struct inode *inode, struct file *file)
  1424. {
  1425. return seq_open(file, &uv_ptc_seq_ops);
  1426. }
  1427. static int tunables_open(struct inode *inode, struct file *file)
  1428. {
  1429. return 0;
  1430. }
  1431. static const struct file_operations proc_uv_ptc_operations = {
  1432. .open = ptc_proc_open,
  1433. .read = seq_read,
  1434. .write = ptc_proc_write,
  1435. .llseek = seq_lseek,
  1436. .release = seq_release,
  1437. };
  1438. static const struct file_operations tunables_fops = {
  1439. .open = tunables_open,
  1440. .read = tunables_read,
  1441. .write = tunables_write,
  1442. .llseek = default_llseek,
  1443. };
  1444. static int __init uv_ptc_init(void)
  1445. {
  1446. struct proc_dir_entry *proc_uv_ptc;
  1447. if (!is_uv_system())
  1448. return 0;
  1449. proc_uv_ptc = proc_create(UV_PTC_BASENAME, 0444, NULL,
  1450. &proc_uv_ptc_operations);
  1451. if (!proc_uv_ptc) {
  1452. printk(KERN_ERR "unable to create %s proc entry\n",
  1453. UV_PTC_BASENAME);
  1454. return -EINVAL;
  1455. }
  1456. tunables_dir = debugfs_create_dir(UV_BAU_TUNABLES_DIR, NULL);
  1457. if (!tunables_dir) {
  1458. printk(KERN_ERR "unable to create debugfs directory %s\n",
  1459. UV_BAU_TUNABLES_DIR);
  1460. return -EINVAL;
  1461. }
  1462. tunables_file = debugfs_create_file(UV_BAU_TUNABLES_FILE, 0600,
  1463. tunables_dir, NULL, &tunables_fops);
  1464. if (!tunables_file) {
  1465. printk(KERN_ERR "unable to create debugfs file %s\n",
  1466. UV_BAU_TUNABLES_FILE);
  1467. return -EINVAL;
  1468. }
  1469. return 0;
  1470. }
  1471. /*
  1472. * Initialize the sending side's sending buffers.
  1473. */
  1474. static void activation_descriptor_init(int node, int pnode, int base_pnode)
  1475. {
  1476. int i;
  1477. int cpu;
  1478. int uv1 = 0;
  1479. unsigned long gpa;
  1480. unsigned long m;
  1481. unsigned long n;
  1482. size_t dsize;
  1483. struct bau_desc *bau_desc;
  1484. struct bau_desc *bd2;
  1485. struct uv1_bau_msg_header *uv1_hdr;
  1486. struct uv2_bau_msg_header *uv2_hdr;
  1487. struct bau_control *bcp;
  1488. /*
  1489. * each bau_desc is 64 bytes; there are 8 (ITEMS_PER_DESC)
  1490. * per cpu; and one per cpu on the uvhub (ADP_SZ)
  1491. */
  1492. dsize = sizeof(struct bau_desc) * ADP_SZ * ITEMS_PER_DESC;
  1493. bau_desc = kmalloc_node(dsize, GFP_KERNEL, node);
  1494. BUG_ON(!bau_desc);
  1495. gpa = uv_gpa(bau_desc);
  1496. n = uv_gpa_to_gnode(gpa);
  1497. m = uv_gpa_to_offset(gpa);
  1498. if (is_uv1_hub())
  1499. uv1 = 1;
  1500. /* the 14-bit pnode */
  1501. write_mmr_descriptor_base(pnode, (n << UV_DESC_PSHIFT | m));
  1502. /*
  1503. * Initializing all 8 (ITEMS_PER_DESC) descriptors for each
  1504. * cpu even though we only use the first one; one descriptor can
  1505. * describe a broadcast to 256 uv hubs.
  1506. */
  1507. for (i = 0, bd2 = bau_desc; i < (ADP_SZ * ITEMS_PER_DESC); i++, bd2++) {
  1508. memset(bd2, 0, sizeof(struct bau_desc));
  1509. if (uv1) {
  1510. uv1_hdr = &bd2->header.uv1_hdr;
  1511. uv1_hdr->swack_flag = 1;
  1512. /*
  1513. * The base_dest_nasid set in the message header
  1514. * is the nasid of the first uvhub in the partition.
  1515. * The bit map will indicate destination pnode numbers
  1516. * relative to that base. They may not be consecutive
  1517. * if nasid striding is being used.
  1518. */
  1519. uv1_hdr->base_dest_nasid =
  1520. UV_PNODE_TO_NASID(base_pnode);
  1521. uv1_hdr->dest_subnodeid = UV_LB_SUBNODEID;
  1522. uv1_hdr->command = UV_NET_ENDPOINT_INTD;
  1523. uv1_hdr->int_both = 1;
  1524. /*
  1525. * all others need to be set to zero:
  1526. * fairness chaining multilevel count replied_to
  1527. */
  1528. } else {
  1529. uv2_hdr = &bd2->header.uv2_hdr;
  1530. uv2_hdr->swack_flag = 1;
  1531. uv2_hdr->base_dest_nasid =
  1532. UV_PNODE_TO_NASID(base_pnode);
  1533. uv2_hdr->dest_subnodeid = UV_LB_SUBNODEID;
  1534. uv2_hdr->command = UV_NET_ENDPOINT_INTD;
  1535. }
  1536. }
  1537. for_each_present_cpu(cpu) {
  1538. if (pnode != uv_blade_to_pnode(uv_cpu_to_blade_id(cpu)))
  1539. continue;
  1540. bcp = &per_cpu(bau_control, cpu);
  1541. bcp->descriptor_base = bau_desc;
  1542. }
  1543. }
  1544. /*
  1545. * initialize the destination side's receiving buffers
  1546. * entered for each uvhub in the partition
  1547. * - node is first node (kernel memory notion) on the uvhub
  1548. * - pnode is the uvhub's physical identifier
  1549. */
  1550. static void pq_init(int node, int pnode)
  1551. {
  1552. int cpu;
  1553. size_t plsize;
  1554. char *cp;
  1555. void *vp;
  1556. unsigned long pn;
  1557. unsigned long first;
  1558. unsigned long pn_first;
  1559. unsigned long last;
  1560. struct bau_pq_entry *pqp;
  1561. struct bau_control *bcp;
  1562. plsize = (DEST_Q_SIZE + 1) * sizeof(struct bau_pq_entry);
  1563. vp = kmalloc_node(plsize, GFP_KERNEL, node);
  1564. pqp = (struct bau_pq_entry *)vp;
  1565. BUG_ON(!pqp);
  1566. cp = (char *)pqp + 31;
  1567. pqp = (struct bau_pq_entry *)(((unsigned long)cp >> 5) << 5);
  1568. for_each_present_cpu(cpu) {
  1569. if (pnode != uv_cpu_to_pnode(cpu))
  1570. continue;
  1571. /* for every cpu on this pnode: */
  1572. bcp = &per_cpu(bau_control, cpu);
  1573. bcp->queue_first = pqp;
  1574. bcp->bau_msg_head = pqp;
  1575. bcp->queue_last = pqp + (DEST_Q_SIZE - 1);
  1576. }
  1577. /*
  1578. * need the gnode of where the memory was really allocated
  1579. */
  1580. pn = uv_gpa_to_gnode(uv_gpa(pqp));
  1581. first = uv_physnodeaddr(pqp);
  1582. pn_first = ((unsigned long)pn << UV_PAYLOADQ_PNODE_SHIFT) | first;
  1583. last = uv_physnodeaddr(pqp + (DEST_Q_SIZE - 1));
  1584. write_mmr_payload_first(pnode, pn_first);
  1585. write_mmr_payload_tail(pnode, first);
  1586. write_mmr_payload_last(pnode, last);
  1587. write_gmmr_sw_ack(pnode, 0xffffUL);
  1588. /* in effect, all msg_type's are set to MSG_NOOP */
  1589. memset(pqp, 0, sizeof(struct bau_pq_entry) * DEST_Q_SIZE);
  1590. }
  1591. /*
  1592. * Initialization of each UV hub's structures
  1593. */
  1594. static void __init init_uvhub(int uvhub, int vector, int base_pnode)
  1595. {
  1596. int node;
  1597. int pnode;
  1598. unsigned long apicid;
  1599. node = uvhub_to_first_node(uvhub);
  1600. pnode = uv_blade_to_pnode(uvhub);
  1601. activation_descriptor_init(node, pnode, base_pnode);
  1602. pq_init(node, pnode);
  1603. /*
  1604. * The below initialization can't be in firmware because the
  1605. * messaging IRQ will be determined by the OS.
  1606. */
  1607. apicid = uvhub_to_first_apicid(uvhub) | uv_apicid_hibits;
  1608. write_mmr_data_config(pnode, ((apicid << 32) | vector));
  1609. }
  1610. /*
  1611. * We will set BAU_MISC_CONTROL with a timeout period.
  1612. * But the BIOS has set UVH_AGING_PRESCALE_SEL and UVH_TRANSACTION_TIMEOUT.
  1613. * So the destination timeout period has to be calculated from them.
  1614. */
  1615. static int calculate_destination_timeout(void)
  1616. {
  1617. unsigned long mmr_image;
  1618. int mult1;
  1619. int mult2;
  1620. int index;
  1621. int base;
  1622. int ret;
  1623. unsigned long ts_ns;
  1624. if (is_uv1_hub()) {
  1625. mult1 = SOFTACK_TIMEOUT_PERIOD & BAU_MISC_CONTROL_MULT_MASK;
  1626. mmr_image = uv_read_local_mmr(UVH_AGING_PRESCALE_SEL);
  1627. index = (mmr_image >> BAU_URGENCY_7_SHIFT) & BAU_URGENCY_7_MASK;
  1628. mmr_image = uv_read_local_mmr(UVH_TRANSACTION_TIMEOUT);
  1629. mult2 = (mmr_image >> BAU_TRANS_SHIFT) & BAU_TRANS_MASK;
  1630. base = timeout_base_ns[index];
  1631. ts_ns = base * mult1 * mult2;
  1632. ret = ts_ns / 1000;
  1633. } else {
  1634. /* 4 bits 0/1 for 10/80us base, 3 bits of multiplier */
  1635. mmr_image = uv_read_local_mmr(UVH_LB_BAU_MISC_CONTROL);
  1636. mmr_image = (mmr_image & UV_SA_MASK) >> UV_SA_SHFT;
  1637. if (mmr_image & (1L << UV2_ACK_UNITS_SHFT))
  1638. base = 80;
  1639. else
  1640. base = 10;
  1641. mult1 = mmr_image & UV2_ACK_MASK;
  1642. ret = mult1 * base;
  1643. }
  1644. return ret;
  1645. }
  1646. static void __init init_per_cpu_tunables(void)
  1647. {
  1648. int cpu;
  1649. struct bau_control *bcp;
  1650. for_each_present_cpu(cpu) {
  1651. bcp = &per_cpu(bau_control, cpu);
  1652. bcp->baudisabled = 0;
  1653. bcp->statp = &per_cpu(ptcstats, cpu);
  1654. /* time interval to catch a hardware stay-busy bug */
  1655. bcp->timeout_interval = usec_2_cycles(2*timeout_us);
  1656. bcp->max_concurr = max_concurr;
  1657. bcp->max_concurr_const = max_concurr;
  1658. bcp->plugged_delay = plugged_delay;
  1659. bcp->plugsb4reset = plugsb4reset;
  1660. bcp->timeoutsb4reset = timeoutsb4reset;
  1661. bcp->ipi_reset_limit = ipi_reset_limit;
  1662. bcp->complete_threshold = complete_threshold;
  1663. bcp->cong_response_us = congested_respns_us;
  1664. bcp->cong_reps = congested_reps;
  1665. bcp->cong_period = congested_period;
  1666. bcp->clocks_per_100_usec = usec_2_cycles(100);
  1667. }
  1668. }
  1669. /*
  1670. * Scan all cpus to collect blade and socket summaries.
  1671. */
  1672. static int __init get_cpu_topology(int base_pnode,
  1673. struct uvhub_desc *uvhub_descs,
  1674. unsigned char *uvhub_mask)
  1675. {
  1676. int cpu;
  1677. int pnode;
  1678. int uvhub;
  1679. int socket;
  1680. struct bau_control *bcp;
  1681. struct uvhub_desc *bdp;
  1682. struct socket_desc *sdp;
  1683. for_each_present_cpu(cpu) {
  1684. bcp = &per_cpu(bau_control, cpu);
  1685. memset(bcp, 0, sizeof(struct bau_control));
  1686. pnode = uv_cpu_hub_info(cpu)->pnode;
  1687. if ((pnode - base_pnode) >= UV_DISTRIBUTION_SIZE) {
  1688. printk(KERN_EMERG
  1689. "cpu %d pnode %d-%d beyond %d; BAU disabled\n",
  1690. cpu, pnode, base_pnode, UV_DISTRIBUTION_SIZE);
  1691. return 1;
  1692. }
  1693. bcp->osnode = cpu_to_node(cpu);
  1694. bcp->partition_base_pnode = base_pnode;
  1695. uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
  1696. *(uvhub_mask + (uvhub/8)) |= (1 << (uvhub%8));
  1697. bdp = &uvhub_descs[uvhub];
  1698. bdp->num_cpus++;
  1699. bdp->uvhub = uvhub;
  1700. bdp->pnode = pnode;
  1701. /* kludge: 'assuming' one node per socket, and assuming that
  1702. disabling a socket just leaves a gap in node numbers */
  1703. socket = bcp->osnode & 1;
  1704. bdp->socket_mask |= (1 << socket);
  1705. sdp = &bdp->socket[socket];
  1706. sdp->cpu_number[sdp->num_cpus] = cpu;
  1707. sdp->num_cpus++;
  1708. if (sdp->num_cpus > MAX_CPUS_PER_SOCKET) {
  1709. printk(KERN_EMERG "%d cpus per socket invalid\n",
  1710. sdp->num_cpus);
  1711. return 1;
  1712. }
  1713. }
  1714. return 0;
  1715. }
  1716. /*
  1717. * Each socket is to get a local array of pnodes/hubs.
  1718. */
  1719. static void make_per_cpu_thp(struct bau_control *smaster)
  1720. {
  1721. int cpu;
  1722. size_t hpsz = sizeof(struct hub_and_pnode) * num_possible_cpus();
  1723. smaster->thp = kmalloc_node(hpsz, GFP_KERNEL, smaster->osnode);
  1724. memset(smaster->thp, 0, hpsz);
  1725. for_each_present_cpu(cpu) {
  1726. smaster->thp[cpu].pnode = uv_cpu_hub_info(cpu)->pnode;
  1727. smaster->thp[cpu].uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
  1728. }
  1729. }
  1730. /*
  1731. * Each uvhub is to get a local cpumask.
  1732. */
  1733. static void make_per_hub_cpumask(struct bau_control *hmaster)
  1734. {
  1735. int sz = sizeof(cpumask_t);
  1736. hmaster->cpumask = kzalloc_node(sz, GFP_KERNEL, hmaster->osnode);
  1737. }
  1738. /*
  1739. * Initialize all the per_cpu information for the cpu's on a given socket,
  1740. * given what has been gathered into the socket_desc struct.
  1741. * And reports the chosen hub and socket masters back to the caller.
  1742. */
  1743. static int scan_sock(struct socket_desc *sdp, struct uvhub_desc *bdp,
  1744. struct bau_control **smasterp,
  1745. struct bau_control **hmasterp)
  1746. {
  1747. int i;
  1748. int cpu;
  1749. struct bau_control *bcp;
  1750. for (i = 0; i < sdp->num_cpus; i++) {
  1751. cpu = sdp->cpu_number[i];
  1752. bcp = &per_cpu(bau_control, cpu);
  1753. bcp->cpu = cpu;
  1754. if (i == 0) {
  1755. *smasterp = bcp;
  1756. if (!(*hmasterp))
  1757. *hmasterp = bcp;
  1758. }
  1759. bcp->cpus_in_uvhub = bdp->num_cpus;
  1760. bcp->cpus_in_socket = sdp->num_cpus;
  1761. bcp->socket_master = *smasterp;
  1762. bcp->uvhub = bdp->uvhub;
  1763. if (is_uv1_hub())
  1764. bcp->uvhub_version = 1;
  1765. else if (is_uv2_hub())
  1766. bcp->uvhub_version = 2;
  1767. else {
  1768. printk(KERN_EMERG "uvhub version not 1 or 2\n");
  1769. return 1;
  1770. }
  1771. bcp->uvhub_master = *hmasterp;
  1772. bcp->uvhub_cpu = uv_cpu_hub_info(cpu)->blade_processor_id;
  1773. bcp->using_desc = bcp->uvhub_cpu;
  1774. if (bcp->uvhub_cpu >= MAX_CPUS_PER_UVHUB) {
  1775. printk(KERN_EMERG "%d cpus per uvhub invalid\n",
  1776. bcp->uvhub_cpu);
  1777. return 1;
  1778. }
  1779. }
  1780. return 0;
  1781. }
  1782. /*
  1783. * Summarize the blade and socket topology into the per_cpu structures.
  1784. */
  1785. static int __init summarize_uvhub_sockets(int nuvhubs,
  1786. struct uvhub_desc *uvhub_descs,
  1787. unsigned char *uvhub_mask)
  1788. {
  1789. int socket;
  1790. int uvhub;
  1791. unsigned short socket_mask;
  1792. for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
  1793. struct uvhub_desc *bdp;
  1794. struct bau_control *smaster = NULL;
  1795. struct bau_control *hmaster = NULL;
  1796. if (!(*(uvhub_mask + (uvhub/8)) & (1 << (uvhub%8))))
  1797. continue;
  1798. bdp = &uvhub_descs[uvhub];
  1799. socket_mask = bdp->socket_mask;
  1800. socket = 0;
  1801. while (socket_mask) {
  1802. struct socket_desc *sdp;
  1803. if ((socket_mask & 1)) {
  1804. sdp = &bdp->socket[socket];
  1805. if (scan_sock(sdp, bdp, &smaster, &hmaster))
  1806. return 1;
  1807. make_per_cpu_thp(smaster);
  1808. }
  1809. socket++;
  1810. socket_mask = (socket_mask >> 1);
  1811. }
  1812. make_per_hub_cpumask(hmaster);
  1813. }
  1814. return 0;
  1815. }
  1816. /*
  1817. * initialize the bau_control structure for each cpu
  1818. */
  1819. static int __init init_per_cpu(int nuvhubs, int base_part_pnode)
  1820. {
  1821. unsigned char *uvhub_mask;
  1822. void *vp;
  1823. struct uvhub_desc *uvhub_descs;
  1824. timeout_us = calculate_destination_timeout();
  1825. vp = kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
  1826. uvhub_descs = (struct uvhub_desc *)vp;
  1827. memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc));
  1828. uvhub_mask = kzalloc((nuvhubs+7)/8, GFP_KERNEL);
  1829. if (get_cpu_topology(base_part_pnode, uvhub_descs, uvhub_mask))
  1830. goto fail;
  1831. if (summarize_uvhub_sockets(nuvhubs, uvhub_descs, uvhub_mask))
  1832. goto fail;
  1833. kfree(uvhub_descs);
  1834. kfree(uvhub_mask);
  1835. init_per_cpu_tunables();
  1836. return 0;
  1837. fail:
  1838. kfree(uvhub_descs);
  1839. kfree(uvhub_mask);
  1840. return 1;
  1841. }
  1842. /*
  1843. * Initialization of BAU-related structures
  1844. */
  1845. static int __init uv_bau_init(void)
  1846. {
  1847. int uvhub;
  1848. int pnode;
  1849. int nuvhubs;
  1850. int cur_cpu;
  1851. int cpus;
  1852. int vector;
  1853. cpumask_var_t *mask;
  1854. if (!is_uv_system())
  1855. return 0;
  1856. if (nobau)
  1857. return 0;
  1858. for_each_possible_cpu(cur_cpu) {
  1859. mask = &per_cpu(uv_flush_tlb_mask, cur_cpu);
  1860. zalloc_cpumask_var_node(mask, GFP_KERNEL, cpu_to_node(cur_cpu));
  1861. }
  1862. nuvhubs = uv_num_possible_blades();
  1863. spin_lock_init(&disable_lock);
  1864. congested_cycles = usec_2_cycles(congested_respns_us);
  1865. uv_base_pnode = 0x7fffffff;
  1866. for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
  1867. cpus = uv_blade_nr_possible_cpus(uvhub);
  1868. if (cpus && (uv_blade_to_pnode(uvhub) < uv_base_pnode))
  1869. uv_base_pnode = uv_blade_to_pnode(uvhub);
  1870. }
  1871. enable_timeouts();
  1872. if (init_per_cpu(nuvhubs, uv_base_pnode)) {
  1873. nobau = 1;
  1874. return 0;
  1875. }
  1876. vector = UV_BAU_MESSAGE;
  1877. for_each_possible_blade(uvhub)
  1878. if (uv_blade_nr_possible_cpus(uvhub))
  1879. init_uvhub(uvhub, vector, uv_base_pnode);
  1880. alloc_intr_gate(vector, uv_bau_message_intr1);
  1881. for_each_possible_blade(uvhub) {
  1882. if (uv_blade_nr_possible_cpus(uvhub)) {
  1883. unsigned long val;
  1884. unsigned long mmr;
  1885. pnode = uv_blade_to_pnode(uvhub);
  1886. /* INIT the bau */
  1887. val = 1L << 63;
  1888. write_gmmr_activation(pnode, val);
  1889. mmr = 1; /* should be 1 to broadcast to both sockets */
  1890. if (!is_uv1_hub())
  1891. write_mmr_data_broadcast(pnode, mmr);
  1892. }
  1893. }
  1894. return 0;
  1895. }
  1896. core_initcall(uv_bau_init);
  1897. fs_initcall(uv_ptc_init);