cx88-video.c 53 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * video4linux video interface
  5. *
  6. * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  7. *
  8. * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@infradead.org>
  9. * - Multituner support
  10. * - video_ioctl2 conversion
  11. * - PAL/M fixes
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License as published by
  15. * the Free Software Foundation; either version 2 of the License, or
  16. * (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  26. */
  27. #include <linux/init.h>
  28. #include <linux/list.h>
  29. #include <linux/module.h>
  30. #include <linux/kmod.h>
  31. #include <linux/kernel.h>
  32. #include <linux/slab.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/kthread.h>
  37. #include <asm/div64.h>
  38. #include "cx88.h"
  39. #include <media/v4l2-common.h>
  40. #include <media/v4l2-ioctl.h>
  41. #include <media/wm8775.h>
  42. MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
  43. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  44. MODULE_LICENSE("GPL");
  45. MODULE_VERSION(CX88_VERSION);
  46. /* ------------------------------------------------------------------ */
  47. static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  48. static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  49. static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
  50. module_param_array(video_nr, int, NULL, 0444);
  51. module_param_array(vbi_nr, int, NULL, 0444);
  52. module_param_array(radio_nr, int, NULL, 0444);
  53. MODULE_PARM_DESC(video_nr,"video device numbers");
  54. MODULE_PARM_DESC(vbi_nr,"vbi device numbers");
  55. MODULE_PARM_DESC(radio_nr,"radio device numbers");
  56. static unsigned int video_debug;
  57. module_param(video_debug,int,0644);
  58. MODULE_PARM_DESC(video_debug,"enable debug messages [video]");
  59. static unsigned int irq_debug;
  60. module_param(irq_debug,int,0644);
  61. MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]");
  62. static unsigned int vid_limit = 16;
  63. module_param(vid_limit,int,0644);
  64. MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes");
  65. #define dprintk(level,fmt, arg...) if (video_debug >= level) \
  66. printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
  67. /* ------------------------------------------------------------------- */
  68. /* static data */
  69. static const struct cx8800_fmt formats[] = {
  70. {
  71. .name = "8 bpp, gray",
  72. .fourcc = V4L2_PIX_FMT_GREY,
  73. .cxformat = ColorFormatY8,
  74. .depth = 8,
  75. .flags = FORMAT_FLAGS_PACKED,
  76. },{
  77. .name = "15 bpp RGB, le",
  78. .fourcc = V4L2_PIX_FMT_RGB555,
  79. .cxformat = ColorFormatRGB15,
  80. .depth = 16,
  81. .flags = FORMAT_FLAGS_PACKED,
  82. },{
  83. .name = "15 bpp RGB, be",
  84. .fourcc = V4L2_PIX_FMT_RGB555X,
  85. .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
  86. .depth = 16,
  87. .flags = FORMAT_FLAGS_PACKED,
  88. },{
  89. .name = "16 bpp RGB, le",
  90. .fourcc = V4L2_PIX_FMT_RGB565,
  91. .cxformat = ColorFormatRGB16,
  92. .depth = 16,
  93. .flags = FORMAT_FLAGS_PACKED,
  94. },{
  95. .name = "16 bpp RGB, be",
  96. .fourcc = V4L2_PIX_FMT_RGB565X,
  97. .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
  98. .depth = 16,
  99. .flags = FORMAT_FLAGS_PACKED,
  100. },{
  101. .name = "24 bpp RGB, le",
  102. .fourcc = V4L2_PIX_FMT_BGR24,
  103. .cxformat = ColorFormatRGB24,
  104. .depth = 24,
  105. .flags = FORMAT_FLAGS_PACKED,
  106. },{
  107. .name = "32 bpp RGB, le",
  108. .fourcc = V4L2_PIX_FMT_BGR32,
  109. .cxformat = ColorFormatRGB32,
  110. .depth = 32,
  111. .flags = FORMAT_FLAGS_PACKED,
  112. },{
  113. .name = "32 bpp RGB, be",
  114. .fourcc = V4L2_PIX_FMT_RGB32,
  115. .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP,
  116. .depth = 32,
  117. .flags = FORMAT_FLAGS_PACKED,
  118. },{
  119. .name = "4:2:2, packed, YUYV",
  120. .fourcc = V4L2_PIX_FMT_YUYV,
  121. .cxformat = ColorFormatYUY2,
  122. .depth = 16,
  123. .flags = FORMAT_FLAGS_PACKED,
  124. },{
  125. .name = "4:2:2, packed, UYVY",
  126. .fourcc = V4L2_PIX_FMT_UYVY,
  127. .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
  128. .depth = 16,
  129. .flags = FORMAT_FLAGS_PACKED,
  130. },
  131. };
  132. static const struct cx8800_fmt* format_by_fourcc(unsigned int fourcc)
  133. {
  134. unsigned int i;
  135. for (i = 0; i < ARRAY_SIZE(formats); i++)
  136. if (formats[i].fourcc == fourcc)
  137. return formats+i;
  138. return NULL;
  139. }
  140. /* ------------------------------------------------------------------- */
  141. struct cx88_ctrl {
  142. /* control information */
  143. u32 id;
  144. s32 minimum;
  145. s32 maximum;
  146. u32 step;
  147. s32 default_value;
  148. /* control register information */
  149. u32 off;
  150. u32 reg;
  151. u32 sreg;
  152. u32 mask;
  153. u32 shift;
  154. };
  155. static const struct cx88_ctrl cx8800_vid_ctls[] = {
  156. /* --- video --- */
  157. {
  158. .id = V4L2_CID_BRIGHTNESS,
  159. .minimum = 0x00,
  160. .maximum = 0xff,
  161. .step = 1,
  162. .default_value = 0x7f,
  163. .off = 128,
  164. .reg = MO_CONTR_BRIGHT,
  165. .mask = 0x00ff,
  166. .shift = 0,
  167. },{
  168. .id = V4L2_CID_CONTRAST,
  169. .minimum = 0,
  170. .maximum = 0xff,
  171. .step = 1,
  172. .default_value = 0x3f,
  173. .off = 0,
  174. .reg = MO_CONTR_BRIGHT,
  175. .mask = 0xff00,
  176. .shift = 8,
  177. },{
  178. .id = V4L2_CID_HUE,
  179. .minimum = 0,
  180. .maximum = 0xff,
  181. .step = 1,
  182. .default_value = 0x7f,
  183. .off = 128,
  184. .reg = MO_HUE,
  185. .mask = 0x00ff,
  186. .shift = 0,
  187. },{
  188. /* strictly, this only describes only U saturation.
  189. * V saturation is handled specially through code.
  190. */
  191. .id = V4L2_CID_SATURATION,
  192. .minimum = 0,
  193. .maximum = 0xff,
  194. .step = 1,
  195. .default_value = 0x7f,
  196. .off = 0,
  197. .reg = MO_UV_SATURATION,
  198. .mask = 0x00ff,
  199. .shift = 0,
  200. }, {
  201. .id = V4L2_CID_SHARPNESS,
  202. .minimum = 0,
  203. .maximum = 4,
  204. .step = 1,
  205. .default_value = 0x0,
  206. .off = 0,
  207. /* NOTE: the value is converted and written to both even
  208. and odd registers in the code */
  209. .reg = MO_FILTER_ODD,
  210. .mask = 7 << 7,
  211. .shift = 7,
  212. }, {
  213. .id = V4L2_CID_CHROMA_AGC,
  214. .minimum = 0,
  215. .maximum = 1,
  216. .default_value = 0x1,
  217. .reg = MO_INPUT_FORMAT,
  218. .mask = 1 << 10,
  219. .shift = 10,
  220. }, {
  221. .id = V4L2_CID_COLOR_KILLER,
  222. .minimum = 0,
  223. .maximum = 1,
  224. .default_value = 0x1,
  225. .reg = MO_INPUT_FORMAT,
  226. .mask = 1 << 9,
  227. .shift = 9,
  228. }, {
  229. .id = V4L2_CID_BAND_STOP_FILTER,
  230. .minimum = 0,
  231. .maximum = 1,
  232. .step = 1,
  233. .default_value = 0x0,
  234. .off = 0,
  235. .reg = MO_HTOTAL,
  236. .mask = 3 << 11,
  237. .shift = 11,
  238. }
  239. };
  240. static const struct cx88_ctrl cx8800_aud_ctls[] = {
  241. {
  242. /* --- audio --- */
  243. .id = V4L2_CID_AUDIO_MUTE,
  244. .minimum = 0,
  245. .maximum = 1,
  246. .default_value = 1,
  247. .reg = AUD_VOL_CTL,
  248. .sreg = SHADOW_AUD_VOL_CTL,
  249. .mask = (1 << 6),
  250. .shift = 6,
  251. },{
  252. .id = V4L2_CID_AUDIO_VOLUME,
  253. .minimum = 0,
  254. .maximum = 0x3f,
  255. .step = 1,
  256. .default_value = 0x3f,
  257. .reg = AUD_VOL_CTL,
  258. .sreg = SHADOW_AUD_VOL_CTL,
  259. .mask = 0x3f,
  260. .shift = 0,
  261. },{
  262. .id = V4L2_CID_AUDIO_BALANCE,
  263. .minimum = 0,
  264. .maximum = 0x7f,
  265. .step = 1,
  266. .default_value = 0x40,
  267. .reg = AUD_BAL_CTL,
  268. .sreg = SHADOW_AUD_BAL_CTL,
  269. .mask = 0x7f,
  270. .shift = 0,
  271. }
  272. };
  273. enum {
  274. CX8800_VID_CTLS = ARRAY_SIZE(cx8800_vid_ctls),
  275. CX8800_AUD_CTLS = ARRAY_SIZE(cx8800_aud_ctls),
  276. };
  277. /* ------------------------------------------------------------------- */
  278. /* resource management */
  279. static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit)
  280. {
  281. struct cx88_core *core = dev->core;
  282. if (fh->resources & bit)
  283. /* have it already allocated */
  284. return 1;
  285. /* is it free? */
  286. mutex_lock(&core->lock);
  287. if (dev->resources & bit) {
  288. /* no, someone else uses it */
  289. mutex_unlock(&core->lock);
  290. return 0;
  291. }
  292. /* it's free, grab it */
  293. fh->resources |= bit;
  294. dev->resources |= bit;
  295. dprintk(1,"res: get %d\n",bit);
  296. mutex_unlock(&core->lock);
  297. return 1;
  298. }
  299. static
  300. int res_check(struct cx8800_fh *fh, unsigned int bit)
  301. {
  302. return (fh->resources & bit);
  303. }
  304. static
  305. int res_locked(struct cx8800_dev *dev, unsigned int bit)
  306. {
  307. return (dev->resources & bit);
  308. }
  309. static
  310. void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits)
  311. {
  312. struct cx88_core *core = dev->core;
  313. BUG_ON((fh->resources & bits) != bits);
  314. mutex_lock(&core->lock);
  315. fh->resources &= ~bits;
  316. dev->resources &= ~bits;
  317. dprintk(1,"res: put %d\n",bits);
  318. mutex_unlock(&core->lock);
  319. }
  320. /* ------------------------------------------------------------------ */
  321. int cx88_video_mux(struct cx88_core *core, unsigned int input)
  322. {
  323. /* struct cx88_core *core = dev->core; */
  324. dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
  325. input, INPUT(input).vmux,
  326. INPUT(input).gpio0,INPUT(input).gpio1,
  327. INPUT(input).gpio2,INPUT(input).gpio3);
  328. core->input = input;
  329. cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
  330. cx_write(MO_GP3_IO, INPUT(input).gpio3);
  331. cx_write(MO_GP0_IO, INPUT(input).gpio0);
  332. cx_write(MO_GP1_IO, INPUT(input).gpio1);
  333. cx_write(MO_GP2_IO, INPUT(input).gpio2);
  334. switch (INPUT(input).type) {
  335. case CX88_VMUX_SVIDEO:
  336. cx_set(MO_AFECFG_IO, 0x00000001);
  337. cx_set(MO_INPUT_FORMAT, 0x00010010);
  338. cx_set(MO_FILTER_EVEN, 0x00002020);
  339. cx_set(MO_FILTER_ODD, 0x00002020);
  340. break;
  341. default:
  342. cx_clear(MO_AFECFG_IO, 0x00000001);
  343. cx_clear(MO_INPUT_FORMAT, 0x00010010);
  344. cx_clear(MO_FILTER_EVEN, 0x00002020);
  345. cx_clear(MO_FILTER_ODD, 0x00002020);
  346. break;
  347. }
  348. /* if there are audioroutes defined, we have an external
  349. ADC to deal with audio */
  350. if (INPUT(input).audioroute) {
  351. /* The wm8775 module has the "2" route hardwired into
  352. the initialization. Some boards may use different
  353. routes for different inputs. HVR-1300 surely does */
  354. if (core->board.audio_chip &&
  355. core->board.audio_chip == V4L2_IDENT_WM8775) {
  356. call_all(core, audio, s_routing,
  357. INPUT(input).audioroute, 0, 0);
  358. }
  359. /* cx2388's C-ADC is connected to the tuner only.
  360. When used with S-Video, that ADC is busy dealing with
  361. chroma, so an external must be used for baseband audio */
  362. if (INPUT(input).type != CX88_VMUX_TELEVISION &&
  363. INPUT(input).type != CX88_VMUX_CABLE) {
  364. /* "I2S ADC mode" */
  365. core->tvaudio = WW_I2SADC;
  366. cx88_set_tvaudio(core);
  367. } else {
  368. /* Normal mode */
  369. cx_write(AUD_I2SCNTL, 0x0);
  370. cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
  371. }
  372. }
  373. return 0;
  374. }
  375. EXPORT_SYMBOL(cx88_video_mux);
  376. /* ------------------------------------------------------------------ */
  377. static int start_video_dma(struct cx8800_dev *dev,
  378. struct cx88_dmaqueue *q,
  379. struct cx88_buffer *buf)
  380. {
  381. struct cx88_core *core = dev->core;
  382. /* setup fifo + format */
  383. cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
  384. buf->bpl, buf->risc.dma);
  385. cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field);
  386. cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma);
  387. /* reset counter */
  388. cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET);
  389. q->count = 1;
  390. /* enable irqs */
  391. cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
  392. /* Enables corresponding bits at PCI_INT_STAT:
  393. bits 0 to 4: video, audio, transport stream, VIP, Host
  394. bit 7: timer
  395. bits 8 and 9: DMA complete for: SRC, DST
  396. bits 10 and 11: BERR signal asserted for RISC: RD, WR
  397. bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
  398. */
  399. cx_set(MO_VID_INTMSK, 0x0f0011);
  400. /* enable capture */
  401. cx_set(VID_CAPTURE_CONTROL,0x06);
  402. /* start dma */
  403. cx_set(MO_DEV_CNTRL2, (1<<5));
  404. cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
  405. return 0;
  406. }
  407. #ifdef CONFIG_PM
  408. static int stop_video_dma(struct cx8800_dev *dev)
  409. {
  410. struct cx88_core *core = dev->core;
  411. /* stop dma */
  412. cx_clear(MO_VID_DMACNTRL, 0x11);
  413. /* disable capture */
  414. cx_clear(VID_CAPTURE_CONTROL,0x06);
  415. /* disable irqs */
  416. cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
  417. cx_clear(MO_VID_INTMSK, 0x0f0011);
  418. return 0;
  419. }
  420. #endif
  421. static int restart_video_queue(struct cx8800_dev *dev,
  422. struct cx88_dmaqueue *q)
  423. {
  424. struct cx88_core *core = dev->core;
  425. struct cx88_buffer *buf, *prev;
  426. if (!list_empty(&q->active)) {
  427. buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
  428. dprintk(2,"restart_queue [%p/%d]: restart dma\n",
  429. buf, buf->vb.i);
  430. start_video_dma(dev, q, buf);
  431. list_for_each_entry(buf, &q->active, vb.queue)
  432. buf->count = q->count++;
  433. mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
  434. return 0;
  435. }
  436. prev = NULL;
  437. for (;;) {
  438. if (list_empty(&q->queued))
  439. return 0;
  440. buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
  441. if (NULL == prev) {
  442. list_move_tail(&buf->vb.queue, &q->active);
  443. start_video_dma(dev, q, buf);
  444. buf->vb.state = VIDEOBUF_ACTIVE;
  445. buf->count = q->count++;
  446. mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
  447. dprintk(2,"[%p/%d] restart_queue - first active\n",
  448. buf,buf->vb.i);
  449. } else if (prev->vb.width == buf->vb.width &&
  450. prev->vb.height == buf->vb.height &&
  451. prev->fmt == buf->fmt) {
  452. list_move_tail(&buf->vb.queue, &q->active);
  453. buf->vb.state = VIDEOBUF_ACTIVE;
  454. buf->count = q->count++;
  455. prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
  456. dprintk(2,"[%p/%d] restart_queue - move to active\n",
  457. buf,buf->vb.i);
  458. } else {
  459. return 0;
  460. }
  461. prev = buf;
  462. }
  463. }
  464. /* ------------------------------------------------------------------ */
  465. static int
  466. buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size)
  467. {
  468. struct cx8800_fh *fh = q->priv_data;
  469. struct cx8800_dev *dev = fh->dev;
  470. *size = dev->fmt->depth * dev->width * dev->height >> 3;
  471. if (0 == *count)
  472. *count = 32;
  473. if (*size * *count > vid_limit * 1024 * 1024)
  474. *count = (vid_limit * 1024 * 1024) / *size;
  475. return 0;
  476. }
  477. static int
  478. buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
  479. enum v4l2_field field)
  480. {
  481. struct cx8800_fh *fh = q->priv_data;
  482. struct cx8800_dev *dev = fh->dev;
  483. struct cx88_core *core = dev->core;
  484. struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
  485. struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
  486. int rc, init_buffer = 0;
  487. BUG_ON(NULL == dev->fmt);
  488. if (dev->width < 48 || dev->width > norm_maxw(core->tvnorm) ||
  489. dev->height < 32 || dev->height > norm_maxh(core->tvnorm))
  490. return -EINVAL;
  491. buf->vb.size = (dev->width * dev->height * dev->fmt->depth) >> 3;
  492. if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
  493. return -EINVAL;
  494. if (buf->fmt != dev->fmt ||
  495. buf->vb.width != dev->width ||
  496. buf->vb.height != dev->height ||
  497. buf->vb.field != field) {
  498. buf->fmt = dev->fmt;
  499. buf->vb.width = dev->width;
  500. buf->vb.height = dev->height;
  501. buf->vb.field = field;
  502. init_buffer = 1;
  503. }
  504. if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
  505. init_buffer = 1;
  506. if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL)))
  507. goto fail;
  508. }
  509. if (init_buffer) {
  510. buf->bpl = buf->vb.width * buf->fmt->depth >> 3;
  511. switch (buf->vb.field) {
  512. case V4L2_FIELD_TOP:
  513. cx88_risc_buffer(dev->pci, &buf->risc,
  514. dma->sglist, 0, UNSET,
  515. buf->bpl, 0, buf->vb.height);
  516. break;
  517. case V4L2_FIELD_BOTTOM:
  518. cx88_risc_buffer(dev->pci, &buf->risc,
  519. dma->sglist, UNSET, 0,
  520. buf->bpl, 0, buf->vb.height);
  521. break;
  522. case V4L2_FIELD_INTERLACED:
  523. cx88_risc_buffer(dev->pci, &buf->risc,
  524. dma->sglist, 0, buf->bpl,
  525. buf->bpl, buf->bpl,
  526. buf->vb.height >> 1);
  527. break;
  528. case V4L2_FIELD_SEQ_TB:
  529. cx88_risc_buffer(dev->pci, &buf->risc,
  530. dma->sglist,
  531. 0, buf->bpl * (buf->vb.height >> 1),
  532. buf->bpl, 0,
  533. buf->vb.height >> 1);
  534. break;
  535. case V4L2_FIELD_SEQ_BT:
  536. cx88_risc_buffer(dev->pci, &buf->risc,
  537. dma->sglist,
  538. buf->bpl * (buf->vb.height >> 1), 0,
  539. buf->bpl, 0,
  540. buf->vb.height >> 1);
  541. break;
  542. default:
  543. BUG();
  544. }
  545. }
  546. dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
  547. buf, buf->vb.i,
  548. dev->width, dev->height, dev->fmt->depth, dev->fmt->name,
  549. (unsigned long)buf->risc.dma);
  550. buf->vb.state = VIDEOBUF_PREPARED;
  551. return 0;
  552. fail:
  553. cx88_free_buffer(q,buf);
  554. return rc;
  555. }
  556. static void
  557. buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
  558. {
  559. struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
  560. struct cx88_buffer *prev;
  561. struct cx8800_fh *fh = vq->priv_data;
  562. struct cx8800_dev *dev = fh->dev;
  563. struct cx88_core *core = dev->core;
  564. struct cx88_dmaqueue *q = &dev->vidq;
  565. /* add jump to stopper */
  566. buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
  567. buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
  568. if (!list_empty(&q->queued)) {
  569. list_add_tail(&buf->vb.queue,&q->queued);
  570. buf->vb.state = VIDEOBUF_QUEUED;
  571. dprintk(2,"[%p/%d] buffer_queue - append to queued\n",
  572. buf, buf->vb.i);
  573. } else if (list_empty(&q->active)) {
  574. list_add_tail(&buf->vb.queue,&q->active);
  575. start_video_dma(dev, q, buf);
  576. buf->vb.state = VIDEOBUF_ACTIVE;
  577. buf->count = q->count++;
  578. mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
  579. dprintk(2,"[%p/%d] buffer_queue - first active\n",
  580. buf, buf->vb.i);
  581. } else {
  582. prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue);
  583. if (prev->vb.width == buf->vb.width &&
  584. prev->vb.height == buf->vb.height &&
  585. prev->fmt == buf->fmt) {
  586. list_add_tail(&buf->vb.queue,&q->active);
  587. buf->vb.state = VIDEOBUF_ACTIVE;
  588. buf->count = q->count++;
  589. prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
  590. dprintk(2,"[%p/%d] buffer_queue - append to active\n",
  591. buf, buf->vb.i);
  592. } else {
  593. list_add_tail(&buf->vb.queue,&q->queued);
  594. buf->vb.state = VIDEOBUF_QUEUED;
  595. dprintk(2,"[%p/%d] buffer_queue - first queued\n",
  596. buf, buf->vb.i);
  597. }
  598. }
  599. }
  600. static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
  601. {
  602. struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
  603. cx88_free_buffer(q,buf);
  604. }
  605. static const struct videobuf_queue_ops cx8800_video_qops = {
  606. .buf_setup = buffer_setup,
  607. .buf_prepare = buffer_prepare,
  608. .buf_queue = buffer_queue,
  609. .buf_release = buffer_release,
  610. };
  611. /* ------------------------------------------------------------------ */
  612. /* ------------------------------------------------------------------ */
  613. static struct videobuf_queue *get_queue(struct file *file)
  614. {
  615. struct video_device *vdev = video_devdata(file);
  616. struct cx8800_fh *fh = file->private_data;
  617. switch (vdev->vfl_type) {
  618. case VFL_TYPE_GRABBER:
  619. return &fh->vidq;
  620. case VFL_TYPE_VBI:
  621. return &fh->vbiq;
  622. default:
  623. BUG();
  624. return NULL;
  625. }
  626. }
  627. static int get_resource(struct file *file)
  628. {
  629. struct video_device *vdev = video_devdata(file);
  630. switch (vdev->vfl_type) {
  631. case VFL_TYPE_GRABBER:
  632. return RESOURCE_VIDEO;
  633. case VFL_TYPE_VBI:
  634. return RESOURCE_VBI;
  635. default:
  636. BUG();
  637. return 0;
  638. }
  639. }
  640. static int video_open(struct file *file)
  641. {
  642. struct video_device *vdev = video_devdata(file);
  643. struct cx8800_dev *dev = video_drvdata(file);
  644. struct cx88_core *core = dev->core;
  645. struct cx8800_fh *fh;
  646. enum v4l2_buf_type type = 0;
  647. int radio = 0;
  648. switch (vdev->vfl_type) {
  649. case VFL_TYPE_GRABBER:
  650. type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  651. break;
  652. case VFL_TYPE_VBI:
  653. type = V4L2_BUF_TYPE_VBI_CAPTURE;
  654. break;
  655. case VFL_TYPE_RADIO:
  656. radio = 1;
  657. break;
  658. }
  659. dprintk(1, "open dev=%s radio=%d type=%s\n",
  660. video_device_node_name(vdev), radio, v4l2_type_names[type]);
  661. /* allocate + initialize per filehandle data */
  662. fh = kzalloc(sizeof(*fh),GFP_KERNEL);
  663. if (unlikely(!fh))
  664. return -ENOMEM;
  665. v4l2_fh_init(&fh->fh, vdev);
  666. file->private_data = fh;
  667. fh->dev = dev;
  668. mutex_lock(&core->lock);
  669. videobuf_queue_sg_init(&fh->vidq, &cx8800_video_qops,
  670. &dev->pci->dev, &dev->slock,
  671. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  672. V4L2_FIELD_INTERLACED,
  673. sizeof(struct cx88_buffer),
  674. fh, NULL);
  675. videobuf_queue_sg_init(&fh->vbiq, &cx8800_vbi_qops,
  676. &dev->pci->dev, &dev->slock,
  677. V4L2_BUF_TYPE_VBI_CAPTURE,
  678. V4L2_FIELD_SEQ_TB,
  679. sizeof(struct cx88_buffer),
  680. fh, NULL);
  681. if (vdev->vfl_type == VFL_TYPE_RADIO) {
  682. dprintk(1,"video_open: setting radio device\n");
  683. cx_write(MO_GP3_IO, core->board.radio.gpio3);
  684. cx_write(MO_GP0_IO, core->board.radio.gpio0);
  685. cx_write(MO_GP1_IO, core->board.radio.gpio1);
  686. cx_write(MO_GP2_IO, core->board.radio.gpio2);
  687. if (core->board.radio.audioroute) {
  688. if(core->board.audio_chip &&
  689. core->board.audio_chip == V4L2_IDENT_WM8775) {
  690. call_all(core, audio, s_routing,
  691. core->board.radio.audioroute, 0, 0);
  692. }
  693. /* "I2S ADC mode" */
  694. core->tvaudio = WW_I2SADC;
  695. cx88_set_tvaudio(core);
  696. } else {
  697. /* FM Mode */
  698. core->tvaudio = WW_FM;
  699. cx88_set_tvaudio(core);
  700. cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1);
  701. }
  702. call_all(core, tuner, s_radio);
  703. }
  704. core->users++;
  705. mutex_unlock(&core->lock);
  706. v4l2_fh_add(&fh->fh);
  707. return 0;
  708. }
  709. static ssize_t
  710. video_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
  711. {
  712. struct video_device *vdev = video_devdata(file);
  713. struct cx8800_fh *fh = file->private_data;
  714. switch (vdev->vfl_type) {
  715. case VFL_TYPE_GRABBER:
  716. if (res_locked(fh->dev,RESOURCE_VIDEO))
  717. return -EBUSY;
  718. return videobuf_read_one(&fh->vidq, data, count, ppos,
  719. file->f_flags & O_NONBLOCK);
  720. case VFL_TYPE_VBI:
  721. if (!res_get(fh->dev,fh,RESOURCE_VBI))
  722. return -EBUSY;
  723. return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1,
  724. file->f_flags & O_NONBLOCK);
  725. default:
  726. BUG();
  727. return 0;
  728. }
  729. }
  730. static unsigned int
  731. video_poll(struct file *file, struct poll_table_struct *wait)
  732. {
  733. struct video_device *vdev = video_devdata(file);
  734. struct cx8800_fh *fh = file->private_data;
  735. struct cx88_buffer *buf;
  736. unsigned int rc = POLLERR;
  737. if (vdev->vfl_type == VFL_TYPE_VBI) {
  738. if (!res_get(fh->dev,fh,RESOURCE_VBI))
  739. return POLLERR;
  740. return videobuf_poll_stream(file, &fh->vbiq, wait);
  741. }
  742. mutex_lock(&fh->vidq.vb_lock);
  743. if (res_check(fh,RESOURCE_VIDEO)) {
  744. /* streaming capture */
  745. if (list_empty(&fh->vidq.stream))
  746. goto done;
  747. buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream);
  748. } else {
  749. /* read() capture */
  750. buf = (struct cx88_buffer*)fh->vidq.read_buf;
  751. if (NULL == buf)
  752. goto done;
  753. }
  754. poll_wait(file, &buf->vb.done, wait);
  755. if (buf->vb.state == VIDEOBUF_DONE ||
  756. buf->vb.state == VIDEOBUF_ERROR)
  757. rc = POLLIN|POLLRDNORM;
  758. else
  759. rc = 0;
  760. done:
  761. mutex_unlock(&fh->vidq.vb_lock);
  762. return rc;
  763. }
  764. static int video_release(struct file *file)
  765. {
  766. struct cx8800_fh *fh = file->private_data;
  767. struct cx8800_dev *dev = fh->dev;
  768. /* turn off overlay */
  769. if (res_check(fh, RESOURCE_OVERLAY)) {
  770. /* FIXME */
  771. res_free(dev,fh,RESOURCE_OVERLAY);
  772. }
  773. /* stop video capture */
  774. if (res_check(fh, RESOURCE_VIDEO)) {
  775. videobuf_queue_cancel(&fh->vidq);
  776. res_free(dev,fh,RESOURCE_VIDEO);
  777. }
  778. if (fh->vidq.read_buf) {
  779. buffer_release(&fh->vidq,fh->vidq.read_buf);
  780. kfree(fh->vidq.read_buf);
  781. }
  782. /* stop vbi capture */
  783. if (res_check(fh, RESOURCE_VBI)) {
  784. videobuf_stop(&fh->vbiq);
  785. res_free(dev,fh,RESOURCE_VBI);
  786. }
  787. videobuf_mmap_free(&fh->vidq);
  788. videobuf_mmap_free(&fh->vbiq);
  789. mutex_lock(&dev->core->lock);
  790. v4l2_fh_del(&fh->fh);
  791. v4l2_fh_exit(&fh->fh);
  792. file->private_data = NULL;
  793. kfree(fh);
  794. dev->core->users--;
  795. if (!dev->core->users)
  796. call_all(dev->core, core, s_power, 0);
  797. mutex_unlock(&dev->core->lock);
  798. return 0;
  799. }
  800. static int
  801. video_mmap(struct file *file, struct vm_area_struct * vma)
  802. {
  803. return videobuf_mmap_mapper(get_queue(file), vma);
  804. }
  805. /* ------------------------------------------------------------------ */
  806. /* VIDEO CTRL IOCTLS */
  807. static int cx8800_s_vid_ctrl(struct v4l2_ctrl *ctrl)
  808. {
  809. struct cx88_core *core =
  810. container_of(ctrl->handler, struct cx88_core, video_hdl);
  811. const struct cx88_ctrl *cc = ctrl->priv;
  812. u32 value, mask;
  813. mask = cc->mask;
  814. switch (ctrl->id) {
  815. case V4L2_CID_SATURATION:
  816. /* special v_sat handling */
  817. value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
  818. if (core->tvnorm & V4L2_STD_SECAM) {
  819. /* For SECAM, both U and V sat should be equal */
  820. value = value << 8 | value;
  821. } else {
  822. /* Keeps U Saturation proportional to V Sat */
  823. value = (value * 0x5a) / 0x7f << 8 | value;
  824. }
  825. mask = 0xffff;
  826. break;
  827. case V4L2_CID_SHARPNESS:
  828. /* 0b000, 0b100, 0b101, 0b110, or 0b111 */
  829. value = (ctrl->val < 1 ? 0 : ((ctrl->val + 3) << 7));
  830. /* needs to be set for both fields */
  831. cx_andor(MO_FILTER_EVEN, mask, value);
  832. break;
  833. case V4L2_CID_CHROMA_AGC:
  834. value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
  835. break;
  836. default:
  837. value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
  838. break;
  839. }
  840. dprintk(1, "set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
  841. ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
  842. mask, cc->sreg ? " [shadowed]" : "");
  843. if (cc->sreg)
  844. cx_sandor(cc->sreg, cc->reg, mask, value);
  845. else
  846. cx_andor(cc->reg, mask, value);
  847. return 0;
  848. }
  849. static int cx8800_s_aud_ctrl(struct v4l2_ctrl *ctrl)
  850. {
  851. struct cx88_core *core =
  852. container_of(ctrl->handler, struct cx88_core, audio_hdl);
  853. const struct cx88_ctrl *cc = ctrl->priv;
  854. u32 value,mask;
  855. /* Pass changes onto any WM8775 */
  856. if (core->board.audio_chip == V4L2_IDENT_WM8775) {
  857. switch (ctrl->id) {
  858. case V4L2_CID_AUDIO_MUTE:
  859. wm8775_s_ctrl(core, ctrl->id, ctrl->val);
  860. break;
  861. case V4L2_CID_AUDIO_VOLUME:
  862. wm8775_s_ctrl(core, ctrl->id, (ctrl->val) ?
  863. (0x90 + ctrl->val) << 8 : 0);
  864. break;
  865. case V4L2_CID_AUDIO_BALANCE:
  866. wm8775_s_ctrl(core, ctrl->id, ctrl->val << 9);
  867. break;
  868. default:
  869. break;
  870. }
  871. }
  872. mask = cc->mask;
  873. switch (ctrl->id) {
  874. case V4L2_CID_AUDIO_BALANCE:
  875. value = (ctrl->val < 0x40) ? (0x7f - ctrl->val) : (ctrl->val - 0x40);
  876. break;
  877. case V4L2_CID_AUDIO_VOLUME:
  878. value = 0x3f - (ctrl->val & 0x3f);
  879. break;
  880. default:
  881. value = ((ctrl->val - cc->off) << cc->shift) & cc->mask;
  882. break;
  883. }
  884. dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
  885. ctrl->id, ctrl->name, ctrl->val, cc->reg, value,
  886. mask, cc->sreg ? " [shadowed]" : "");
  887. if (cc->sreg)
  888. cx_sandor(cc->sreg, cc->reg, mask, value);
  889. else
  890. cx_andor(cc->reg, mask, value);
  891. return 0;
  892. }
  893. /* ------------------------------------------------------------------ */
  894. /* VIDEO IOCTLS */
  895. static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
  896. struct v4l2_format *f)
  897. {
  898. struct cx8800_fh *fh = priv;
  899. struct cx8800_dev *dev = fh->dev;
  900. f->fmt.pix.width = dev->width;
  901. f->fmt.pix.height = dev->height;
  902. f->fmt.pix.field = fh->vidq.field;
  903. f->fmt.pix.pixelformat = dev->fmt->fourcc;
  904. f->fmt.pix.bytesperline =
  905. (f->fmt.pix.width * dev->fmt->depth) >> 3;
  906. f->fmt.pix.sizeimage =
  907. f->fmt.pix.height * f->fmt.pix.bytesperline;
  908. f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
  909. return 0;
  910. }
  911. static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
  912. struct v4l2_format *f)
  913. {
  914. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  915. const struct cx8800_fmt *fmt;
  916. enum v4l2_field field;
  917. unsigned int maxw, maxh;
  918. fmt = format_by_fourcc(f->fmt.pix.pixelformat);
  919. if (NULL == fmt)
  920. return -EINVAL;
  921. field = f->fmt.pix.field;
  922. maxw = norm_maxw(core->tvnorm);
  923. maxh = norm_maxh(core->tvnorm);
  924. if (V4L2_FIELD_ANY == field) {
  925. field = (f->fmt.pix.height > maxh/2)
  926. ? V4L2_FIELD_INTERLACED
  927. : V4L2_FIELD_BOTTOM;
  928. }
  929. switch (field) {
  930. case V4L2_FIELD_TOP:
  931. case V4L2_FIELD_BOTTOM:
  932. maxh = maxh / 2;
  933. break;
  934. case V4L2_FIELD_INTERLACED:
  935. break;
  936. default:
  937. return -EINVAL;
  938. }
  939. f->fmt.pix.field = field;
  940. v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2,
  941. &f->fmt.pix.height, 32, maxh, 0, 0);
  942. f->fmt.pix.bytesperline =
  943. (f->fmt.pix.width * fmt->depth) >> 3;
  944. f->fmt.pix.sizeimage =
  945. f->fmt.pix.height * f->fmt.pix.bytesperline;
  946. return 0;
  947. }
  948. static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
  949. struct v4l2_format *f)
  950. {
  951. struct cx8800_fh *fh = priv;
  952. struct cx8800_dev *dev = fh->dev;
  953. int err = vidioc_try_fmt_vid_cap (file,priv,f);
  954. if (0 != err)
  955. return err;
  956. dev->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
  957. dev->width = f->fmt.pix.width;
  958. dev->height = f->fmt.pix.height;
  959. fh->vidq.field = f->fmt.pix.field;
  960. return 0;
  961. }
  962. void cx88_querycap(struct file *file, struct cx88_core *core,
  963. struct v4l2_capability *cap)
  964. {
  965. struct video_device *vdev = video_devdata(file);
  966. strlcpy(cap->card, core->board.name, sizeof(cap->card));
  967. cap->device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING;
  968. if (UNSET != core->board.tuner_type)
  969. cap->device_caps |= V4L2_CAP_TUNER;
  970. switch (vdev->vfl_type) {
  971. case VFL_TYPE_RADIO:
  972. cap->device_caps = V4L2_CAP_RADIO | V4L2_CAP_TUNER;
  973. break;
  974. case VFL_TYPE_GRABBER:
  975. cap->device_caps |= V4L2_CAP_VIDEO_CAPTURE;
  976. break;
  977. case VFL_TYPE_VBI:
  978. cap->device_caps |= V4L2_CAP_VBI_CAPTURE;
  979. break;
  980. }
  981. cap->capabilities = cap->device_caps | V4L2_CAP_VIDEO_CAPTURE |
  982. V4L2_CAP_VBI_CAPTURE | V4L2_CAP_DEVICE_CAPS;
  983. if (core->board.radio.type == CX88_RADIO)
  984. cap->capabilities |= V4L2_CAP_RADIO;
  985. }
  986. EXPORT_SYMBOL(cx88_querycap);
  987. static int vidioc_querycap(struct file *file, void *priv,
  988. struct v4l2_capability *cap)
  989. {
  990. struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
  991. struct cx88_core *core = dev->core;
  992. strcpy(cap->driver, "cx8800");
  993. sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci));
  994. cx88_querycap(file, core, cap);
  995. return 0;
  996. }
  997. static int vidioc_enum_fmt_vid_cap (struct file *file, void *priv,
  998. struct v4l2_fmtdesc *f)
  999. {
  1000. if (unlikely(f->index >= ARRAY_SIZE(formats)))
  1001. return -EINVAL;
  1002. strlcpy(f->description,formats[f->index].name,sizeof(f->description));
  1003. f->pixelformat = formats[f->index].fourcc;
  1004. return 0;
  1005. }
  1006. static int vidioc_reqbufs (struct file *file, void *priv, struct v4l2_requestbuffers *p)
  1007. {
  1008. return videobuf_reqbufs(get_queue(file), p);
  1009. }
  1010. static int vidioc_querybuf (struct file *file, void *priv, struct v4l2_buffer *p)
  1011. {
  1012. return videobuf_querybuf(get_queue(file), p);
  1013. }
  1014. static int vidioc_qbuf (struct file *file, void *priv, struct v4l2_buffer *p)
  1015. {
  1016. return videobuf_qbuf(get_queue(file), p);
  1017. }
  1018. static int vidioc_dqbuf (struct file *file, void *priv, struct v4l2_buffer *p)
  1019. {
  1020. return videobuf_dqbuf(get_queue(file), p,
  1021. file->f_flags & O_NONBLOCK);
  1022. }
  1023. static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i)
  1024. {
  1025. struct video_device *vdev = video_devdata(file);
  1026. struct cx8800_fh *fh = priv;
  1027. struct cx8800_dev *dev = fh->dev;
  1028. if ((vdev->vfl_type == VFL_TYPE_GRABBER && i != V4L2_BUF_TYPE_VIDEO_CAPTURE) ||
  1029. (vdev->vfl_type == VFL_TYPE_VBI && i != V4L2_BUF_TYPE_VBI_CAPTURE))
  1030. return -EINVAL;
  1031. if (unlikely(!res_get(dev, fh, get_resource(file))))
  1032. return -EBUSY;
  1033. return videobuf_streamon(get_queue(file));
  1034. }
  1035. static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
  1036. {
  1037. struct video_device *vdev = video_devdata(file);
  1038. struct cx8800_fh *fh = priv;
  1039. struct cx8800_dev *dev = fh->dev;
  1040. int err, res;
  1041. if ((vdev->vfl_type == VFL_TYPE_GRABBER && i != V4L2_BUF_TYPE_VIDEO_CAPTURE) ||
  1042. (vdev->vfl_type == VFL_TYPE_VBI && i != V4L2_BUF_TYPE_VBI_CAPTURE))
  1043. return -EINVAL;
  1044. res = get_resource(file);
  1045. err = videobuf_streamoff(get_queue(file));
  1046. if (err < 0)
  1047. return err;
  1048. res_free(dev,fh,res);
  1049. return 0;
  1050. }
  1051. static int vidioc_s_std (struct file *file, void *priv, v4l2_std_id *tvnorms)
  1052. {
  1053. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1054. mutex_lock(&core->lock);
  1055. cx88_set_tvnorm(core,*tvnorms);
  1056. mutex_unlock(&core->lock);
  1057. return 0;
  1058. }
  1059. /* only one input in this sample driver */
  1060. int cx88_enum_input (struct cx88_core *core,struct v4l2_input *i)
  1061. {
  1062. static const char * const iname[] = {
  1063. [ CX88_VMUX_COMPOSITE1 ] = "Composite1",
  1064. [ CX88_VMUX_COMPOSITE2 ] = "Composite2",
  1065. [ CX88_VMUX_COMPOSITE3 ] = "Composite3",
  1066. [ CX88_VMUX_COMPOSITE4 ] = "Composite4",
  1067. [ CX88_VMUX_SVIDEO ] = "S-Video",
  1068. [ CX88_VMUX_TELEVISION ] = "Television",
  1069. [ CX88_VMUX_CABLE ] = "Cable TV",
  1070. [ CX88_VMUX_DVB ] = "DVB",
  1071. [ CX88_VMUX_DEBUG ] = "for debug only",
  1072. };
  1073. unsigned int n = i->index;
  1074. if (n >= 4)
  1075. return -EINVAL;
  1076. if (0 == INPUT(n).type)
  1077. return -EINVAL;
  1078. i->type = V4L2_INPUT_TYPE_CAMERA;
  1079. strcpy(i->name,iname[INPUT(n).type]);
  1080. if ((CX88_VMUX_TELEVISION == INPUT(n).type) ||
  1081. (CX88_VMUX_CABLE == INPUT(n).type)) {
  1082. i->type = V4L2_INPUT_TYPE_TUNER;
  1083. i->std = CX88_NORMS;
  1084. }
  1085. return 0;
  1086. }
  1087. EXPORT_SYMBOL(cx88_enum_input);
  1088. static int vidioc_enum_input (struct file *file, void *priv,
  1089. struct v4l2_input *i)
  1090. {
  1091. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1092. return cx88_enum_input (core,i);
  1093. }
  1094. static int vidioc_g_input (struct file *file, void *priv, unsigned int *i)
  1095. {
  1096. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1097. *i = core->input;
  1098. return 0;
  1099. }
  1100. static int vidioc_s_input (struct file *file, void *priv, unsigned int i)
  1101. {
  1102. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1103. if (i >= 4)
  1104. return -EINVAL;
  1105. mutex_lock(&core->lock);
  1106. cx88_newstation(core);
  1107. cx88_video_mux(core,i);
  1108. mutex_unlock(&core->lock);
  1109. return 0;
  1110. }
  1111. static int vidioc_g_tuner (struct file *file, void *priv,
  1112. struct v4l2_tuner *t)
  1113. {
  1114. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1115. u32 reg;
  1116. if (unlikely(UNSET == core->board.tuner_type))
  1117. return -EINVAL;
  1118. if (0 != t->index)
  1119. return -EINVAL;
  1120. strcpy(t->name, "Television");
  1121. t->type = V4L2_TUNER_ANALOG_TV;
  1122. t->capability = V4L2_TUNER_CAP_NORM;
  1123. t->rangehigh = 0xffffffffUL;
  1124. cx88_get_stereo(core ,t);
  1125. reg = cx_read(MO_DEVICE_STATUS);
  1126. t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
  1127. return 0;
  1128. }
  1129. static int vidioc_s_tuner (struct file *file, void *priv,
  1130. struct v4l2_tuner *t)
  1131. {
  1132. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1133. if (UNSET == core->board.tuner_type)
  1134. return -EINVAL;
  1135. if (0 != t->index)
  1136. return -EINVAL;
  1137. cx88_set_stereo(core, t->audmode, 1);
  1138. return 0;
  1139. }
  1140. static int vidioc_g_frequency (struct file *file, void *priv,
  1141. struct v4l2_frequency *f)
  1142. {
  1143. struct cx8800_fh *fh = priv;
  1144. struct cx88_core *core = fh->dev->core;
  1145. if (unlikely(UNSET == core->board.tuner_type))
  1146. return -EINVAL;
  1147. f->frequency = core->freq;
  1148. call_all(core, tuner, g_frequency, f);
  1149. return 0;
  1150. }
  1151. int cx88_set_freq (struct cx88_core *core,
  1152. struct v4l2_frequency *f)
  1153. {
  1154. if (unlikely(UNSET == core->board.tuner_type))
  1155. return -EINVAL;
  1156. if (unlikely(f->tuner != 0))
  1157. return -EINVAL;
  1158. mutex_lock(&core->lock);
  1159. core->freq = f->frequency;
  1160. cx88_newstation(core);
  1161. call_all(core, tuner, s_frequency, f);
  1162. /* When changing channels it is required to reset TVAUDIO */
  1163. msleep (10);
  1164. cx88_set_tvaudio(core);
  1165. mutex_unlock(&core->lock);
  1166. return 0;
  1167. }
  1168. EXPORT_SYMBOL(cx88_set_freq);
  1169. static int vidioc_s_frequency (struct file *file, void *priv,
  1170. struct v4l2_frequency *f)
  1171. {
  1172. struct cx8800_fh *fh = priv;
  1173. struct cx88_core *core = fh->dev->core;
  1174. return cx88_set_freq(core, f);
  1175. }
  1176. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1177. static int vidioc_g_register (struct file *file, void *fh,
  1178. struct v4l2_dbg_register *reg)
  1179. {
  1180. struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
  1181. if (!v4l2_chip_match_host(&reg->match))
  1182. return -EINVAL;
  1183. /* cx2388x has a 24-bit register space */
  1184. reg->val = cx_read(reg->reg & 0xffffff);
  1185. reg->size = 4;
  1186. return 0;
  1187. }
  1188. static int vidioc_s_register (struct file *file, void *fh,
  1189. struct v4l2_dbg_register *reg)
  1190. {
  1191. struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
  1192. if (!v4l2_chip_match_host(&reg->match))
  1193. return -EINVAL;
  1194. cx_write(reg->reg & 0xffffff, reg->val);
  1195. return 0;
  1196. }
  1197. #endif
  1198. /* ----------------------------------------------------------- */
  1199. /* RADIO ESPECIFIC IOCTLS */
  1200. /* ----------------------------------------------------------- */
  1201. static int radio_g_tuner (struct file *file, void *priv,
  1202. struct v4l2_tuner *t)
  1203. {
  1204. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1205. if (unlikely(t->index > 0))
  1206. return -EINVAL;
  1207. strcpy(t->name, "Radio");
  1208. t->type = V4L2_TUNER_RADIO;
  1209. call_all(core, tuner, g_tuner, t);
  1210. return 0;
  1211. }
  1212. /* FIXME: Should add a standard for radio */
  1213. static int radio_s_tuner (struct file *file, void *priv,
  1214. struct v4l2_tuner *t)
  1215. {
  1216. struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
  1217. if (0 != t->index)
  1218. return -EINVAL;
  1219. call_all(core, tuner, s_tuner, t);
  1220. return 0;
  1221. }
  1222. /* ----------------------------------------------------------- */
  1223. static void cx8800_vid_timeout(unsigned long data)
  1224. {
  1225. struct cx8800_dev *dev = (struct cx8800_dev*)data;
  1226. struct cx88_core *core = dev->core;
  1227. struct cx88_dmaqueue *q = &dev->vidq;
  1228. struct cx88_buffer *buf;
  1229. unsigned long flags;
  1230. cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
  1231. cx_clear(MO_VID_DMACNTRL, 0x11);
  1232. cx_clear(VID_CAPTURE_CONTROL, 0x06);
  1233. spin_lock_irqsave(&dev->slock,flags);
  1234. while (!list_empty(&q->active)) {
  1235. buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
  1236. list_del(&buf->vb.queue);
  1237. buf->vb.state = VIDEOBUF_ERROR;
  1238. wake_up(&buf->vb.done);
  1239. printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name,
  1240. buf, buf->vb.i, (unsigned long)buf->risc.dma);
  1241. }
  1242. restart_video_queue(dev,q);
  1243. spin_unlock_irqrestore(&dev->slock,flags);
  1244. }
  1245. static const char *cx88_vid_irqs[32] = {
  1246. "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
  1247. "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
  1248. "y_oflow", "u_oflow", "v_oflow", "vbi_oflow",
  1249. "y_sync", "u_sync", "v_sync", "vbi_sync",
  1250. "opc_err", "par_err", "rip_err", "pci_abort",
  1251. };
  1252. static void cx8800_vid_irq(struct cx8800_dev *dev)
  1253. {
  1254. struct cx88_core *core = dev->core;
  1255. u32 status, mask, count;
  1256. status = cx_read(MO_VID_INTSTAT);
  1257. mask = cx_read(MO_VID_INTMSK);
  1258. if (0 == (status & mask))
  1259. return;
  1260. cx_write(MO_VID_INTSTAT, status);
  1261. if (irq_debug || (status & mask & ~0xff))
  1262. cx88_print_irqbits(core->name, "irq vid",
  1263. cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
  1264. status, mask);
  1265. /* risc op code error */
  1266. if (status & (1 << 16)) {
  1267. printk(KERN_WARNING "%s/0: video risc op code error\n",core->name);
  1268. cx_clear(MO_VID_DMACNTRL, 0x11);
  1269. cx_clear(VID_CAPTURE_CONTROL, 0x06);
  1270. cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
  1271. }
  1272. /* risc1 y */
  1273. if (status & 0x01) {
  1274. spin_lock(&dev->slock);
  1275. count = cx_read(MO_VIDY_GPCNT);
  1276. cx88_wakeup(core, &dev->vidq, count);
  1277. spin_unlock(&dev->slock);
  1278. }
  1279. /* risc1 vbi */
  1280. if (status & 0x08) {
  1281. spin_lock(&dev->slock);
  1282. count = cx_read(MO_VBI_GPCNT);
  1283. cx88_wakeup(core, &dev->vbiq, count);
  1284. spin_unlock(&dev->slock);
  1285. }
  1286. /* risc2 y */
  1287. if (status & 0x10) {
  1288. dprintk(2,"stopper video\n");
  1289. spin_lock(&dev->slock);
  1290. restart_video_queue(dev,&dev->vidq);
  1291. spin_unlock(&dev->slock);
  1292. }
  1293. /* risc2 vbi */
  1294. if (status & 0x80) {
  1295. dprintk(2,"stopper vbi\n");
  1296. spin_lock(&dev->slock);
  1297. cx8800_restart_vbi_queue(dev,&dev->vbiq);
  1298. spin_unlock(&dev->slock);
  1299. }
  1300. }
  1301. static irqreturn_t cx8800_irq(int irq, void *dev_id)
  1302. {
  1303. struct cx8800_dev *dev = dev_id;
  1304. struct cx88_core *core = dev->core;
  1305. u32 status;
  1306. int loop, handled = 0;
  1307. for (loop = 0; loop < 10; loop++) {
  1308. status = cx_read(MO_PCI_INTSTAT) &
  1309. (core->pci_irqmask | PCI_INT_VIDINT);
  1310. if (0 == status)
  1311. goto out;
  1312. cx_write(MO_PCI_INTSTAT, status);
  1313. handled = 1;
  1314. if (status & core->pci_irqmask)
  1315. cx88_core_irq(core,status);
  1316. if (status & PCI_INT_VIDINT)
  1317. cx8800_vid_irq(dev);
  1318. };
  1319. if (10 == loop) {
  1320. printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
  1321. core->name);
  1322. cx_write(MO_PCI_INTMSK,0);
  1323. }
  1324. out:
  1325. return IRQ_RETVAL(handled);
  1326. }
  1327. /* ----------------------------------------------------------- */
  1328. /* exported stuff */
  1329. static const struct v4l2_file_operations video_fops =
  1330. {
  1331. .owner = THIS_MODULE,
  1332. .open = video_open,
  1333. .release = video_release,
  1334. .read = video_read,
  1335. .poll = video_poll,
  1336. .mmap = video_mmap,
  1337. .unlocked_ioctl = video_ioctl2,
  1338. };
  1339. static const struct v4l2_ioctl_ops video_ioctl_ops = {
  1340. .vidioc_querycap = vidioc_querycap,
  1341. .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
  1342. .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
  1343. .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
  1344. .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
  1345. .vidioc_g_fmt_vbi_cap = cx8800_vbi_fmt,
  1346. .vidioc_try_fmt_vbi_cap = cx8800_vbi_fmt,
  1347. .vidioc_s_fmt_vbi_cap = cx8800_vbi_fmt,
  1348. .vidioc_reqbufs = vidioc_reqbufs,
  1349. .vidioc_querybuf = vidioc_querybuf,
  1350. .vidioc_qbuf = vidioc_qbuf,
  1351. .vidioc_dqbuf = vidioc_dqbuf,
  1352. .vidioc_s_std = vidioc_s_std,
  1353. .vidioc_enum_input = vidioc_enum_input,
  1354. .vidioc_g_input = vidioc_g_input,
  1355. .vidioc_s_input = vidioc_s_input,
  1356. .vidioc_streamon = vidioc_streamon,
  1357. .vidioc_streamoff = vidioc_streamoff,
  1358. .vidioc_g_tuner = vidioc_g_tuner,
  1359. .vidioc_s_tuner = vidioc_s_tuner,
  1360. .vidioc_g_frequency = vidioc_g_frequency,
  1361. .vidioc_s_frequency = vidioc_s_frequency,
  1362. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1363. .vidioc_g_register = vidioc_g_register,
  1364. .vidioc_s_register = vidioc_s_register,
  1365. #endif
  1366. };
  1367. static struct video_device cx8800_vbi_template;
  1368. static const struct video_device cx8800_video_template = {
  1369. .name = "cx8800-video",
  1370. .fops = &video_fops,
  1371. .ioctl_ops = &video_ioctl_ops,
  1372. .tvnorms = CX88_NORMS,
  1373. .current_norm = V4L2_STD_NTSC_M,
  1374. };
  1375. static const struct v4l2_file_operations radio_fops =
  1376. {
  1377. .owner = THIS_MODULE,
  1378. .open = video_open,
  1379. .release = video_release,
  1380. .unlocked_ioctl = video_ioctl2,
  1381. };
  1382. static const struct v4l2_ioctl_ops radio_ioctl_ops = {
  1383. .vidioc_querycap = vidioc_querycap,
  1384. .vidioc_g_tuner = radio_g_tuner,
  1385. .vidioc_s_tuner = radio_s_tuner,
  1386. .vidioc_g_frequency = vidioc_g_frequency,
  1387. .vidioc_s_frequency = vidioc_s_frequency,
  1388. #ifdef CONFIG_VIDEO_ADV_DEBUG
  1389. .vidioc_g_register = vidioc_g_register,
  1390. .vidioc_s_register = vidioc_s_register,
  1391. #endif
  1392. };
  1393. static const struct video_device cx8800_radio_template = {
  1394. .name = "cx8800-radio",
  1395. .fops = &radio_fops,
  1396. .ioctl_ops = &radio_ioctl_ops,
  1397. };
  1398. static const struct v4l2_ctrl_ops cx8800_ctrl_vid_ops = {
  1399. .s_ctrl = cx8800_s_vid_ctrl,
  1400. };
  1401. static const struct v4l2_ctrl_ops cx8800_ctrl_aud_ops = {
  1402. .s_ctrl = cx8800_s_aud_ctrl,
  1403. };
  1404. /* ----------------------------------------------------------- */
  1405. static void cx8800_unregister_video(struct cx8800_dev *dev)
  1406. {
  1407. if (dev->radio_dev) {
  1408. if (video_is_registered(dev->radio_dev))
  1409. video_unregister_device(dev->radio_dev);
  1410. else
  1411. video_device_release(dev->radio_dev);
  1412. dev->radio_dev = NULL;
  1413. }
  1414. if (dev->vbi_dev) {
  1415. if (video_is_registered(dev->vbi_dev))
  1416. video_unregister_device(dev->vbi_dev);
  1417. else
  1418. video_device_release(dev->vbi_dev);
  1419. dev->vbi_dev = NULL;
  1420. }
  1421. if (dev->video_dev) {
  1422. if (video_is_registered(dev->video_dev))
  1423. video_unregister_device(dev->video_dev);
  1424. else
  1425. video_device_release(dev->video_dev);
  1426. dev->video_dev = NULL;
  1427. }
  1428. }
  1429. static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
  1430. const struct pci_device_id *pci_id)
  1431. {
  1432. struct cx8800_dev *dev;
  1433. struct cx88_core *core;
  1434. int err;
  1435. int i;
  1436. dev = kzalloc(sizeof(*dev),GFP_KERNEL);
  1437. if (NULL == dev)
  1438. return -ENOMEM;
  1439. /* pci init */
  1440. dev->pci = pci_dev;
  1441. if (pci_enable_device(pci_dev)) {
  1442. err = -EIO;
  1443. goto fail_free;
  1444. }
  1445. core = cx88_core_get(dev->pci);
  1446. if (NULL == core) {
  1447. err = -EINVAL;
  1448. goto fail_free;
  1449. }
  1450. dev->core = core;
  1451. /* print pci info */
  1452. dev->pci_rev = pci_dev->revision;
  1453. pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
  1454. printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
  1455. "latency: %d, mmio: 0x%llx\n", core->name,
  1456. pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
  1457. dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0));
  1458. pci_set_master(pci_dev);
  1459. if (!pci_dma_supported(pci_dev,DMA_BIT_MASK(32))) {
  1460. printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name);
  1461. err = -EIO;
  1462. goto fail_core;
  1463. }
  1464. /* Initialize VBI template */
  1465. memcpy( &cx8800_vbi_template, &cx8800_video_template,
  1466. sizeof(cx8800_vbi_template) );
  1467. strcpy(cx8800_vbi_template.name,"cx8800-vbi");
  1468. /* initialize driver struct */
  1469. spin_lock_init(&dev->slock);
  1470. core->tvnorm = cx8800_video_template.current_norm;
  1471. /* init video dma queues */
  1472. INIT_LIST_HEAD(&dev->vidq.active);
  1473. INIT_LIST_HEAD(&dev->vidq.queued);
  1474. dev->vidq.timeout.function = cx8800_vid_timeout;
  1475. dev->vidq.timeout.data = (unsigned long)dev;
  1476. init_timer(&dev->vidq.timeout);
  1477. cx88_risc_stopper(dev->pci,&dev->vidq.stopper,
  1478. MO_VID_DMACNTRL,0x11,0x00);
  1479. /* init vbi dma queues */
  1480. INIT_LIST_HEAD(&dev->vbiq.active);
  1481. INIT_LIST_HEAD(&dev->vbiq.queued);
  1482. dev->vbiq.timeout.function = cx8800_vbi_timeout;
  1483. dev->vbiq.timeout.data = (unsigned long)dev;
  1484. init_timer(&dev->vbiq.timeout);
  1485. cx88_risc_stopper(dev->pci,&dev->vbiq.stopper,
  1486. MO_VID_DMACNTRL,0x88,0x00);
  1487. /* get irq */
  1488. err = request_irq(pci_dev->irq, cx8800_irq,
  1489. IRQF_SHARED | IRQF_DISABLED, core->name, dev);
  1490. if (err < 0) {
  1491. printk(KERN_ERR "%s/0: can't get IRQ %d\n",
  1492. core->name,pci_dev->irq);
  1493. goto fail_core;
  1494. }
  1495. cx_set(MO_PCI_INTMSK, core->pci_irqmask);
  1496. for (i = 0; i < CX8800_AUD_CTLS; i++) {
  1497. const struct cx88_ctrl *cc = &cx8800_aud_ctls[i];
  1498. struct v4l2_ctrl *vc;
  1499. vc = v4l2_ctrl_new_std(&core->audio_hdl, &cx8800_ctrl_aud_ops,
  1500. cc->id, cc->minimum, cc->maximum, cc->step, cc->default_value);
  1501. if (vc == NULL) {
  1502. err = core->audio_hdl.error;
  1503. goto fail_core;
  1504. }
  1505. vc->priv = (void *)cc;
  1506. }
  1507. for (i = 0; i < CX8800_VID_CTLS; i++) {
  1508. const struct cx88_ctrl *cc = &cx8800_vid_ctls[i];
  1509. struct v4l2_ctrl *vc;
  1510. vc = v4l2_ctrl_new_std(&core->video_hdl, &cx8800_ctrl_vid_ops,
  1511. cc->id, cc->minimum, cc->maximum, cc->step, cc->default_value);
  1512. if (vc == NULL) {
  1513. err = core->video_hdl.error;
  1514. goto fail_core;
  1515. }
  1516. vc->priv = (void *)cc;
  1517. if (vc->id == V4L2_CID_CHROMA_AGC)
  1518. core->chroma_agc = vc;
  1519. }
  1520. v4l2_ctrl_add_handler(&core->video_hdl, &core->audio_hdl);
  1521. /* load and configure helper modules */
  1522. if (core->board.audio_chip == V4L2_IDENT_WM8775) {
  1523. struct i2c_board_info wm8775_info = {
  1524. .type = "wm8775",
  1525. .addr = 0x36 >> 1,
  1526. .platform_data = &core->wm8775_data,
  1527. };
  1528. struct v4l2_subdev *sd;
  1529. if (core->boardnr == CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1)
  1530. core->wm8775_data.is_nova_s = true;
  1531. else
  1532. core->wm8775_data.is_nova_s = false;
  1533. sd = v4l2_i2c_new_subdev_board(&core->v4l2_dev, &core->i2c_adap,
  1534. &wm8775_info, NULL);
  1535. if (sd != NULL) {
  1536. core->sd_wm8775 = sd;
  1537. sd->grp_id = WM8775_GID;
  1538. }
  1539. }
  1540. if (core->board.audio_chip == V4L2_IDENT_TVAUDIO) {
  1541. /* This probes for a tda9874 as is used on some
  1542. Pixelview Ultra boards. */
  1543. v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap,
  1544. "tvaudio", 0, I2C_ADDRS(0xb0 >> 1));
  1545. }
  1546. switch (core->boardnr) {
  1547. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  1548. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: {
  1549. static const struct i2c_board_info rtc_info = {
  1550. I2C_BOARD_INFO("isl1208", 0x6f)
  1551. };
  1552. request_module("rtc-isl1208");
  1553. core->i2c_rtc = i2c_new_device(&core->i2c_adap, &rtc_info);
  1554. }
  1555. /* break intentionally omitted */
  1556. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  1557. request_module("ir-kbd-i2c");
  1558. }
  1559. /* Sets device info at pci_dev */
  1560. pci_set_drvdata(pci_dev, dev);
  1561. dev->width = 320;
  1562. dev->height = 240;
  1563. dev->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
  1564. /* initial device configuration */
  1565. mutex_lock(&core->lock);
  1566. cx88_set_tvnorm(core, core->tvnorm);
  1567. v4l2_ctrl_handler_setup(&core->video_hdl);
  1568. v4l2_ctrl_handler_setup(&core->audio_hdl);
  1569. cx88_video_mux(core, 0);
  1570. /* register v4l devices */
  1571. dev->video_dev = cx88_vdev_init(core,dev->pci,
  1572. &cx8800_video_template,"video");
  1573. video_set_drvdata(dev->video_dev, dev);
  1574. dev->video_dev->ctrl_handler = &core->video_hdl;
  1575. err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER,
  1576. video_nr[core->nr]);
  1577. if (err < 0) {
  1578. printk(KERN_ERR "%s/0: can't register video device\n",
  1579. core->name);
  1580. goto fail_unreg;
  1581. }
  1582. printk(KERN_INFO "%s/0: registered device %s [v4l2]\n",
  1583. core->name, video_device_node_name(dev->video_dev));
  1584. dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi");
  1585. video_set_drvdata(dev->vbi_dev, dev);
  1586. err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI,
  1587. vbi_nr[core->nr]);
  1588. if (err < 0) {
  1589. printk(KERN_ERR "%s/0: can't register vbi device\n",
  1590. core->name);
  1591. goto fail_unreg;
  1592. }
  1593. printk(KERN_INFO "%s/0: registered device %s\n",
  1594. core->name, video_device_node_name(dev->vbi_dev));
  1595. if (core->board.radio.type == CX88_RADIO) {
  1596. dev->radio_dev = cx88_vdev_init(core,dev->pci,
  1597. &cx8800_radio_template,"radio");
  1598. video_set_drvdata(dev->radio_dev, dev);
  1599. dev->radio_dev->ctrl_handler = &core->audio_hdl;
  1600. err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO,
  1601. radio_nr[core->nr]);
  1602. if (err < 0) {
  1603. printk(KERN_ERR "%s/0: can't register radio device\n",
  1604. core->name);
  1605. goto fail_unreg;
  1606. }
  1607. printk(KERN_INFO "%s/0: registered device %s\n",
  1608. core->name, video_device_node_name(dev->radio_dev));
  1609. }
  1610. /* start tvaudio thread */
  1611. if (core->board.tuner_type != TUNER_ABSENT) {
  1612. core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio");
  1613. if (IS_ERR(core->kthread)) {
  1614. err = PTR_ERR(core->kthread);
  1615. printk(KERN_ERR "%s/0: failed to create cx88 audio thread, err=%d\n",
  1616. core->name, err);
  1617. }
  1618. }
  1619. mutex_unlock(&core->lock);
  1620. return 0;
  1621. fail_unreg:
  1622. cx8800_unregister_video(dev);
  1623. free_irq(pci_dev->irq, dev);
  1624. mutex_unlock(&core->lock);
  1625. fail_core:
  1626. cx88_core_put(core,dev->pci);
  1627. fail_free:
  1628. kfree(dev);
  1629. return err;
  1630. }
  1631. static void __devexit cx8800_finidev(struct pci_dev *pci_dev)
  1632. {
  1633. struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
  1634. struct cx88_core *core = dev->core;
  1635. /* stop thread */
  1636. if (core->kthread) {
  1637. kthread_stop(core->kthread);
  1638. core->kthread = NULL;
  1639. }
  1640. if (core->ir)
  1641. cx88_ir_stop(core);
  1642. cx88_shutdown(core); /* FIXME */
  1643. pci_disable_device(pci_dev);
  1644. /* unregister stuff */
  1645. free_irq(pci_dev->irq, dev);
  1646. cx8800_unregister_video(dev);
  1647. pci_set_drvdata(pci_dev, NULL);
  1648. /* free memory */
  1649. btcx_riscmem_free(dev->pci,&dev->vidq.stopper);
  1650. cx88_core_put(core,dev->pci);
  1651. kfree(dev);
  1652. }
  1653. #ifdef CONFIG_PM
  1654. static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
  1655. {
  1656. struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
  1657. struct cx88_core *core = dev->core;
  1658. /* stop video+vbi capture */
  1659. spin_lock(&dev->slock);
  1660. if (!list_empty(&dev->vidq.active)) {
  1661. printk("%s/0: suspend video\n", core->name);
  1662. stop_video_dma(dev);
  1663. del_timer(&dev->vidq.timeout);
  1664. }
  1665. if (!list_empty(&dev->vbiq.active)) {
  1666. printk("%s/0: suspend vbi\n", core->name);
  1667. cx8800_stop_vbi_dma(dev);
  1668. del_timer(&dev->vbiq.timeout);
  1669. }
  1670. spin_unlock(&dev->slock);
  1671. if (core->ir)
  1672. cx88_ir_stop(core);
  1673. /* FIXME -- shutdown device */
  1674. cx88_shutdown(core);
  1675. pci_save_state(pci_dev);
  1676. if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
  1677. pci_disable_device(pci_dev);
  1678. dev->state.disabled = 1;
  1679. }
  1680. return 0;
  1681. }
  1682. static int cx8800_resume(struct pci_dev *pci_dev)
  1683. {
  1684. struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
  1685. struct cx88_core *core = dev->core;
  1686. int err;
  1687. if (dev->state.disabled) {
  1688. err=pci_enable_device(pci_dev);
  1689. if (err) {
  1690. printk(KERN_ERR "%s/0: can't enable device\n",
  1691. core->name);
  1692. return err;
  1693. }
  1694. dev->state.disabled = 0;
  1695. }
  1696. err= pci_set_power_state(pci_dev, PCI_D0);
  1697. if (err) {
  1698. printk(KERN_ERR "%s/0: can't set power state\n", core->name);
  1699. pci_disable_device(pci_dev);
  1700. dev->state.disabled = 1;
  1701. return err;
  1702. }
  1703. pci_restore_state(pci_dev);
  1704. /* FIXME: re-initialize hardware */
  1705. cx88_reset(core);
  1706. if (core->ir)
  1707. cx88_ir_start(core);
  1708. cx_set(MO_PCI_INTMSK, core->pci_irqmask);
  1709. /* restart video+vbi capture */
  1710. spin_lock(&dev->slock);
  1711. if (!list_empty(&dev->vidq.active)) {
  1712. printk("%s/0: resume video\n", core->name);
  1713. restart_video_queue(dev,&dev->vidq);
  1714. }
  1715. if (!list_empty(&dev->vbiq.active)) {
  1716. printk("%s/0: resume vbi\n", core->name);
  1717. cx8800_restart_vbi_queue(dev,&dev->vbiq);
  1718. }
  1719. spin_unlock(&dev->slock);
  1720. return 0;
  1721. }
  1722. #endif
  1723. /* ----------------------------------------------------------- */
  1724. static const struct pci_device_id cx8800_pci_tbl[] = {
  1725. {
  1726. .vendor = 0x14f1,
  1727. .device = 0x8800,
  1728. .subvendor = PCI_ANY_ID,
  1729. .subdevice = PCI_ANY_ID,
  1730. },{
  1731. /* --- end of list --- */
  1732. }
  1733. };
  1734. MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
  1735. static struct pci_driver cx8800_pci_driver = {
  1736. .name = "cx8800",
  1737. .id_table = cx8800_pci_tbl,
  1738. .probe = cx8800_initdev,
  1739. .remove = __devexit_p(cx8800_finidev),
  1740. #ifdef CONFIG_PM
  1741. .suspend = cx8800_suspend,
  1742. .resume = cx8800_resume,
  1743. #endif
  1744. };
  1745. static int __init cx8800_init(void)
  1746. {
  1747. printk(KERN_INFO "cx88/0: cx2388x v4l2 driver version %s loaded\n",
  1748. CX88_VERSION);
  1749. return pci_register_driver(&cx8800_pci_driver);
  1750. }
  1751. static void __exit cx8800_fini(void)
  1752. {
  1753. pci_unregister_driver(&cx8800_pci_driver);
  1754. }
  1755. module_init(cx8800_init);
  1756. module_exit(cx8800_fini);