aspenite.c 4.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227
  1. /*
  2. * linux/arch/arm/mach-mmp/aspenite.c
  3. *
  4. * Support for the Marvell PXA168-based Aspenite and Zylonite2
  5. * Development Platform.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * publishhed by the Free Software Foundation.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/kernel.h>
  13. #include <linux/platform_device.h>
  14. #include <linux/smc91x.h>
  15. #include <linux/mtd/mtd.h>
  16. #include <linux/mtd/partitions.h>
  17. #include <linux/mtd/nand.h>
  18. #include <asm/mach-types.h>
  19. #include <asm/mach/arch.h>
  20. #include <mach/addr-map.h>
  21. #include <mach/mfp-pxa168.h>
  22. #include <mach/pxa168.h>
  23. #include <mach/gpio.h>
  24. #include <video/pxa168fb.h>
  25. #include "common.h"
  26. static unsigned long common_pin_config[] __initdata = {
  27. /* Data Flash Interface */
  28. GPIO0_DFI_D15,
  29. GPIO1_DFI_D14,
  30. GPIO2_DFI_D13,
  31. GPIO3_DFI_D12,
  32. GPIO4_DFI_D11,
  33. GPIO5_DFI_D10,
  34. GPIO6_DFI_D9,
  35. GPIO7_DFI_D8,
  36. GPIO8_DFI_D7,
  37. GPIO9_DFI_D6,
  38. GPIO10_DFI_D5,
  39. GPIO11_DFI_D4,
  40. GPIO12_DFI_D3,
  41. GPIO13_DFI_D2,
  42. GPIO14_DFI_D1,
  43. GPIO15_DFI_D0,
  44. /* Static Memory Controller */
  45. GPIO18_SMC_nCS0,
  46. GPIO34_SMC_nCS1,
  47. GPIO23_SMC_nLUA,
  48. GPIO25_SMC_nLLA,
  49. GPIO28_SMC_RDY,
  50. GPIO29_SMC_SCLK,
  51. GPIO35_SMC_BE1,
  52. GPIO36_SMC_BE2,
  53. GPIO27_GPIO, /* Ethernet IRQ */
  54. /* UART1 */
  55. GPIO107_UART1_RXD,
  56. GPIO108_UART1_TXD,
  57. /* SSP1 */
  58. GPIO113_I2S_MCLK,
  59. GPIO114_I2S_FRM,
  60. GPIO115_I2S_BCLK,
  61. GPIO116_I2S_RXD,
  62. GPIO117_I2S_TXD,
  63. /* LCD */
  64. GPIO56_LCD_FCLK_RD,
  65. GPIO57_LCD_LCLK_A0,
  66. GPIO58_LCD_PCLK_WR,
  67. GPIO59_LCD_DENA_BIAS,
  68. GPIO60_LCD_DD0,
  69. GPIO61_LCD_DD1,
  70. GPIO62_LCD_DD2,
  71. GPIO63_LCD_DD3,
  72. GPIO64_LCD_DD4,
  73. GPIO65_LCD_DD5,
  74. GPIO66_LCD_DD6,
  75. GPIO67_LCD_DD7,
  76. GPIO68_LCD_DD8,
  77. GPIO69_LCD_DD9,
  78. GPIO70_LCD_DD10,
  79. GPIO71_LCD_DD11,
  80. GPIO72_LCD_DD12,
  81. GPIO73_LCD_DD13,
  82. GPIO74_LCD_DD14,
  83. GPIO75_LCD_DD15,
  84. GPIO76_LCD_DD16,
  85. GPIO77_LCD_DD17,
  86. GPIO78_LCD_DD18,
  87. GPIO79_LCD_DD19,
  88. GPIO80_LCD_DD20,
  89. GPIO81_LCD_DD21,
  90. GPIO82_LCD_DD22,
  91. GPIO83_LCD_DD23,
  92. };
  93. static struct smc91x_platdata smc91x_info = {
  94. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  95. };
  96. static struct resource smc91x_resources[] = {
  97. [0] = {
  98. .start = SMC_CS1_PHYS_BASE + 0x300,
  99. .end = SMC_CS1_PHYS_BASE + 0xfffff,
  100. .flags = IORESOURCE_MEM,
  101. },
  102. [1] = {
  103. .start = gpio_to_irq(27),
  104. .end = gpio_to_irq(27),
  105. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  106. }
  107. };
  108. static struct platform_device smc91x_device = {
  109. .name = "smc91x",
  110. .id = 0,
  111. .dev = {
  112. .platform_data = &smc91x_info,
  113. },
  114. .num_resources = ARRAY_SIZE(smc91x_resources),
  115. .resource = smc91x_resources,
  116. };
  117. static struct mtd_partition aspenite_nand_partitions[] = {
  118. {
  119. .name = "bootloader",
  120. .offset = 0,
  121. .size = SZ_1M,
  122. .mask_flags = MTD_WRITEABLE,
  123. }, {
  124. .name = "reserved",
  125. .offset = MTDPART_OFS_APPEND,
  126. .size = SZ_128K,
  127. .mask_flags = MTD_WRITEABLE,
  128. }, {
  129. .name = "reserved",
  130. .offset = MTDPART_OFS_APPEND,
  131. .size = SZ_8M,
  132. .mask_flags = MTD_WRITEABLE,
  133. }, {
  134. .name = "kernel",
  135. .offset = MTDPART_OFS_APPEND,
  136. .size = (SZ_2M + SZ_1M),
  137. .mask_flags = 0,
  138. }, {
  139. .name = "filesystem",
  140. .offset = MTDPART_OFS_APPEND,
  141. .size = SZ_48M,
  142. .mask_flags = 0,
  143. }
  144. };
  145. static struct pxa3xx_nand_platform_data aspenite_nand_info = {
  146. .enable_arbiter = 1,
  147. .parts = aspenite_nand_partitions,
  148. .nr_parts = ARRAY_SIZE(aspenite_nand_partitions),
  149. };
  150. static struct i2c_board_info aspenite_i2c_info[] __initdata = {
  151. { I2C_BOARD_INFO("wm8753", 0x1b), },
  152. };
  153. static struct fb_videomode video_modes[] = {
  154. [0] = {
  155. .pixclock = 30120,
  156. .refresh = 60,
  157. .xres = 800,
  158. .yres = 480,
  159. .hsync_len = 1,
  160. .left_margin = 215,
  161. .right_margin = 40,
  162. .vsync_len = 1,
  163. .upper_margin = 34,
  164. .lower_margin = 10,
  165. .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
  166. },
  167. };
  168. struct pxa168fb_mach_info aspenite_lcd_info = {
  169. .id = "Graphic Frame",
  170. .modes = video_modes,
  171. .num_modes = ARRAY_SIZE(video_modes),
  172. .pix_fmt = PIX_FMT_RGB565,
  173. .io_pin_allocation_mode = PIN_MODE_DUMB_24,
  174. .dumb_mode = DUMB_MODE_RGB888,
  175. .active = 1,
  176. .panel_rbswap = 0,
  177. .invert_pixclock = 0,
  178. };
  179. static void __init common_init(void)
  180. {
  181. mfp_config(ARRAY_AND_SIZE(common_pin_config));
  182. /* on-chip devices */
  183. pxa168_add_uart(1);
  184. pxa168_add_twsi(1, NULL, ARRAY_AND_SIZE(aspenite_i2c_info));
  185. pxa168_add_ssp(1);
  186. pxa168_add_nand(&aspenite_nand_info);
  187. pxa168_add_fb(&aspenite_lcd_info);
  188. /* off-chip devices */
  189. platform_device_register(&smc91x_device);
  190. }
  191. MACHINE_START(ASPENITE, "PXA168-based Aspenite Development Platform")
  192. .phys_io = APB_PHYS_BASE,
  193. .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
  194. .map_io = mmp_map_io,
  195. .init_irq = pxa168_init_irq,
  196. .timer = &pxa168_timer,
  197. .init_machine = common_init,
  198. MACHINE_END
  199. MACHINE_START(ZYLONITE2, "PXA168-based Zylonite2 Development Platform")
  200. .phys_io = APB_PHYS_BASE,
  201. .io_pg_offst = (APB_VIRT_BASE >> 18) & 0xfffc,
  202. .map_io = mmp_map_io,
  203. .init_irq = pxa168_init_irq,
  204. .timer = &pxa168_timer,
  205. .init_machine = common_init,
  206. MACHINE_END