r8a7778.dtsi 2.7 KB

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  1. /*
  2. * Device Tree Source for Renesas r8a7778
  3. *
  4. * Copyright (C) 2013 Renesas Solutions Corp.
  5. * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
  6. *
  7. * based on r8a7779
  8. *
  9. * Copyright (C) 2013 Renesas Solutions Corp.
  10. * Copyright (C) 2013 Simon Horman
  11. *
  12. * This file is licensed under the terms of the GNU General Public License
  13. * version 2. This program is licensed "as is" without any warranty of any
  14. * kind, whether express or implied.
  15. */
  16. /include/ "skeleton.dtsi"
  17. / {
  18. compatible = "renesas,r8a7778";
  19. cpus {
  20. cpu@0 {
  21. compatible = "arm,cortex-a9";
  22. };
  23. };
  24. gic: interrupt-controller@fe438000 {
  25. compatible = "arm,cortex-a9-gic";
  26. #interrupt-cells = <3>;
  27. interrupt-controller;
  28. reg = <0xfe438000 0x1000>,
  29. <0xfe430000 0x100>;
  30. };
  31. /* irqpin: IRQ0 - IRQ3 */
  32. irqpin: irqpin@fe78001c {
  33. compatible = "renesas,intc-irqpin";
  34. #interrupt-cells = <2>;
  35. interrupt-controller;
  36. status = "disabled"; /* default off */
  37. reg = <0xfe78001c 4>,
  38. <0xfe780010 4>,
  39. <0xfe780024 4>,
  40. <0xfe780044 4>,
  41. <0xfe780064 4>;
  42. interrupt-parent = <&gic>;
  43. interrupts = <0 27 0x4
  44. 0 28 0x4
  45. 0 29 0x4
  46. 0 30 0x4>;
  47. sense-bitfield-width = <2>;
  48. };
  49. gpio0: gpio@ffc40000 {
  50. compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
  51. reg = <0xffc40000 0x2c>;
  52. interrupt-parent = <&gic>;
  53. interrupts = <0 103 0x4>;
  54. #gpio-cells = <2>;
  55. gpio-controller;
  56. gpio-ranges = <&pfc 0 0 32>;
  57. #interrupt-cells = <2>;
  58. interrupt-controller;
  59. };
  60. gpio1: gpio@ffc41000 {
  61. compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
  62. reg = <0xffc41000 0x2c>;
  63. interrupt-parent = <&gic>;
  64. interrupts = <0 103 0x4>;
  65. #gpio-cells = <2>;
  66. gpio-controller;
  67. gpio-ranges = <&pfc 0 32 32>;
  68. #interrupt-cells = <2>;
  69. interrupt-controller;
  70. };
  71. gpio2: gpio@ffc42000 {
  72. compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
  73. reg = <0xffc42000 0x2c>;
  74. interrupt-parent = <&gic>;
  75. interrupts = <0 103 0x4>;
  76. #gpio-cells = <2>;
  77. gpio-controller;
  78. gpio-ranges = <&pfc 0 64 32>;
  79. #interrupt-cells = <2>;
  80. interrupt-controller;
  81. };
  82. gpio3: gpio@ffc43000 {
  83. compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
  84. reg = <0xffc43000 0x2c>;
  85. interrupt-parent = <&gic>;
  86. interrupts = <0 103 0x4>;
  87. #gpio-cells = <2>;
  88. gpio-controller;
  89. gpio-ranges = <&pfc 0 96 32>;
  90. #interrupt-cells = <2>;
  91. interrupt-controller;
  92. };
  93. gpio4: gpio@ffc44000 {
  94. compatible = "renesas,gpio-r8a7778", "renesas,gpio-rcar";
  95. reg = <0xffc44000 0x2c>;
  96. interrupt-parent = <&gic>;
  97. interrupts = <0 103 0x4>;
  98. #gpio-cells = <2>;
  99. gpio-controller;
  100. gpio-ranges = <&pfc 0 128 27>;
  101. #interrupt-cells = <2>;
  102. interrupt-controller;
  103. };
  104. pfc: pfc@fffc0000 {
  105. compatible = "renesas,pfc-r8a7778";
  106. reg = <0xfffc000 0x118>;
  107. #gpio-range-cells = <3>;
  108. };
  109. };