atl1c_main.c 75 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712
  1. /*
  2. * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
  3. *
  4. * Derived from Intel e1000 driver
  5. * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the Free
  9. * Software Foundation; either version 2 of the License, or (at your option)
  10. * any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc., 59
  19. * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  20. */
  21. #include "atl1c.h"
  22. #define ATL1C_DRV_VERSION "1.0.1.0-NAPI"
  23. char atl1c_driver_name[] = "atl1c";
  24. char atl1c_driver_version[] = ATL1C_DRV_VERSION;
  25. /*
  26. * atl1c_pci_tbl - PCI Device ID Table
  27. *
  28. * Wildcard entries (PCI_ANY_ID) should come last
  29. * Last entry must be all 0s
  30. *
  31. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  32. * Class, Class Mask, private data (not used) }
  33. */
  34. static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = {
  35. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
  36. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
  37. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)},
  38. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)},
  39. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)},
  40. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)},
  41. /* required last entry */
  42. { 0 }
  43. };
  44. MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
  45. MODULE_AUTHOR("Jie Yang");
  46. MODULE_AUTHOR("Qualcomm Atheros Inc., <nic-devel@qualcomm.com>");
  47. MODULE_DESCRIPTION("Qualcom Atheros 100/1000M Ethernet Network Driver");
  48. MODULE_LICENSE("GPL");
  49. MODULE_VERSION(ATL1C_DRV_VERSION);
  50. static int atl1c_stop_mac(struct atl1c_hw *hw);
  51. static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
  52. static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed);
  53. static void atl1c_start_mac(struct atl1c_adapter *adapter);
  54. static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
  55. int *work_done, int work_to_do);
  56. static int atl1c_up(struct atl1c_adapter *adapter);
  57. static void atl1c_down(struct atl1c_adapter *adapter);
  58. static const u16 atl1c_pay_load_size[] = {
  59. 128, 256, 512, 1024, 2048, 4096,
  60. };
  61. static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
  62. NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
  63. static void atl1c_pcie_patch(struct atl1c_hw *hw)
  64. {
  65. u32 mst_data, data;
  66. /* pclk sel could switch to 25M */
  67. AT_READ_REG(hw, REG_MASTER_CTRL, &mst_data);
  68. mst_data &= ~MASTER_CTRL_CLK_SEL_DIS;
  69. AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data);
  70. /* WoL/PCIE related settings */
  71. if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) {
  72. AT_READ_REG(hw, REG_PCIE_PHYMISC, &data);
  73. data |= PCIE_PHYMISC_FORCE_RCV_DET;
  74. AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);
  75. } else { /* new dev set bit5 of MASTER */
  76. if (!(mst_data & MASTER_CTRL_WAKEN_25M))
  77. AT_WRITE_REG(hw, REG_MASTER_CTRL,
  78. mst_data | MASTER_CTRL_WAKEN_25M);
  79. }
  80. /* aspm/PCIE setting only for l2cb 1.0 */
  81. if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) {
  82. AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data);
  83. data = FIELD_SETX(data, PCIE_PHYMISC2_CDR_BW,
  84. L2CB1_PCIE_PHYMISC2_CDR_BW);
  85. data = FIELD_SETX(data, PCIE_PHYMISC2_L0S_TH,
  86. L2CB1_PCIE_PHYMISC2_L0S_TH);
  87. AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data);
  88. /* extend L1 sync timer */
  89. AT_READ_REG(hw, REG_LINK_CTRL, &data);
  90. data |= LINK_CTRL_EXT_SYNC;
  91. AT_WRITE_REG(hw, REG_LINK_CTRL, data);
  92. }
  93. /* l2cb 1.x & l1d 1.x */
  94. if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) {
  95. AT_READ_REG(hw, REG_PM_CTRL, &data);
  96. data |= PM_CTRL_L0S_BUFSRX_EN;
  97. AT_WRITE_REG(hw, REG_PM_CTRL, data);
  98. /* clear vendor msg */
  99. AT_READ_REG(hw, REG_DMA_DBG, &data);
  100. AT_WRITE_REG(hw, REG_DMA_DBG, data & ~DMA_DBG_VENDOR_MSG);
  101. }
  102. }
  103. /* FIXME: no need any more ? */
  104. /*
  105. * atl1c_init_pcie - init PCIE module
  106. */
  107. static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
  108. {
  109. u32 data;
  110. u32 pci_cmd;
  111. struct pci_dev *pdev = hw->adapter->pdev;
  112. int pos;
  113. AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
  114. pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
  115. pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
  116. PCI_COMMAND_IO);
  117. AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
  118. /*
  119. * Clear any PowerSaveing Settings
  120. */
  121. pci_enable_wake(pdev, PCI_D3hot, 0);
  122. pci_enable_wake(pdev, PCI_D3cold, 0);
  123. /* wol sts read-clear */
  124. AT_READ_REG(hw, REG_WOL_CTRL, &data);
  125. AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
  126. /*
  127. * Mask some pcie error bits
  128. */
  129. pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
  130. pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, &data);
  131. data &= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP);
  132. pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data);
  133. /* clear error status */
  134. pci_write_config_word(pdev, pci_pcie_cap(pdev) + PCI_EXP_DEVSTA,
  135. PCI_EXP_DEVSTA_NFED |
  136. PCI_EXP_DEVSTA_FED |
  137. PCI_EXP_DEVSTA_CED |
  138. PCI_EXP_DEVSTA_URD);
  139. AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data);
  140. data &= ~LTSSM_ID_EN_WRO;
  141. AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data);
  142. atl1c_pcie_patch(hw);
  143. if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
  144. atl1c_disable_l0s_l1(hw);
  145. msleep(5);
  146. }
  147. /*
  148. * atl1c_irq_enable - Enable default interrupt generation settings
  149. * @adapter: board private structure
  150. */
  151. static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
  152. {
  153. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  154. AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
  155. AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
  156. AT_WRITE_FLUSH(&adapter->hw);
  157. }
  158. }
  159. /*
  160. * atl1c_irq_disable - Mask off interrupt generation on the NIC
  161. * @adapter: board private structure
  162. */
  163. static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
  164. {
  165. atomic_inc(&adapter->irq_sem);
  166. AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
  167. AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
  168. AT_WRITE_FLUSH(&adapter->hw);
  169. synchronize_irq(adapter->pdev->irq);
  170. }
  171. /*
  172. * atl1c_irq_reset - reset interrupt confiure on the NIC
  173. * @adapter: board private structure
  174. */
  175. static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
  176. {
  177. atomic_set(&adapter->irq_sem, 1);
  178. atl1c_irq_enable(adapter);
  179. }
  180. /*
  181. * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
  182. * of the idle status register until the device is actually idle
  183. */
  184. static u32 atl1c_wait_until_idle(struct atl1c_hw *hw, u32 modu_ctrl)
  185. {
  186. int timeout;
  187. u32 data;
  188. for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
  189. AT_READ_REG(hw, REG_IDLE_STATUS, &data);
  190. if ((data & modu_ctrl) == 0)
  191. return 0;
  192. msleep(1);
  193. }
  194. return data;
  195. }
  196. /*
  197. * atl1c_phy_config - Timer Call-back
  198. * @data: pointer to netdev cast into an unsigned long
  199. */
  200. static void atl1c_phy_config(unsigned long data)
  201. {
  202. struct atl1c_adapter *adapter = (struct atl1c_adapter *) data;
  203. struct atl1c_hw *hw = &adapter->hw;
  204. unsigned long flags;
  205. spin_lock_irqsave(&adapter->mdio_lock, flags);
  206. atl1c_restart_autoneg(hw);
  207. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  208. }
  209. void atl1c_reinit_locked(struct atl1c_adapter *adapter)
  210. {
  211. WARN_ON(in_interrupt());
  212. atl1c_down(adapter);
  213. atl1c_up(adapter);
  214. clear_bit(__AT_RESETTING, &adapter->flags);
  215. }
  216. static void atl1c_check_link_status(struct atl1c_adapter *adapter)
  217. {
  218. struct atl1c_hw *hw = &adapter->hw;
  219. struct net_device *netdev = adapter->netdev;
  220. struct pci_dev *pdev = adapter->pdev;
  221. int err;
  222. unsigned long flags;
  223. u16 speed, duplex, phy_data;
  224. spin_lock_irqsave(&adapter->mdio_lock, flags);
  225. /* MII_BMSR must read twise */
  226. atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
  227. atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
  228. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  229. if ((phy_data & BMSR_LSTATUS) == 0) {
  230. /* link down */
  231. hw->hibernate = true;
  232. if (atl1c_stop_mac(hw) != 0)
  233. if (netif_msg_hw(adapter))
  234. dev_warn(&pdev->dev, "stop mac failed\n");
  235. atl1c_set_aspm(hw, SPEED_0);
  236. atl1c_post_phy_linkchg(hw, SPEED_0);
  237. netif_carrier_off(netdev);
  238. netif_stop_queue(netdev);
  239. } else {
  240. /* Link Up */
  241. hw->hibernate = false;
  242. spin_lock_irqsave(&adapter->mdio_lock, flags);
  243. err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
  244. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  245. if (unlikely(err))
  246. return;
  247. /* link result is our setting */
  248. if (adapter->link_speed != speed ||
  249. adapter->link_duplex != duplex) {
  250. adapter->link_speed = speed;
  251. adapter->link_duplex = duplex;
  252. atl1c_set_aspm(hw, speed);
  253. atl1c_post_phy_linkchg(hw, speed);
  254. atl1c_start_mac(adapter);
  255. if (netif_msg_link(adapter))
  256. dev_info(&pdev->dev,
  257. "%s: %s NIC Link is Up<%d Mbps %s>\n",
  258. atl1c_driver_name, netdev->name,
  259. adapter->link_speed,
  260. adapter->link_duplex == FULL_DUPLEX ?
  261. "Full Duplex" : "Half Duplex");
  262. }
  263. if (!netif_carrier_ok(netdev))
  264. netif_carrier_on(netdev);
  265. }
  266. }
  267. static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
  268. {
  269. struct net_device *netdev = adapter->netdev;
  270. struct pci_dev *pdev = adapter->pdev;
  271. u16 phy_data;
  272. u16 link_up;
  273. spin_lock(&adapter->mdio_lock);
  274. atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  275. atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  276. spin_unlock(&adapter->mdio_lock);
  277. link_up = phy_data & BMSR_LSTATUS;
  278. /* notify upper layer link down ASAP */
  279. if (!link_up) {
  280. if (netif_carrier_ok(netdev)) {
  281. /* old link state: Up */
  282. netif_carrier_off(netdev);
  283. if (netif_msg_link(adapter))
  284. dev_info(&pdev->dev,
  285. "%s: %s NIC Link is Down\n",
  286. atl1c_driver_name, netdev->name);
  287. adapter->link_speed = SPEED_0;
  288. }
  289. }
  290. set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event);
  291. schedule_work(&adapter->common_task);
  292. }
  293. static void atl1c_common_task(struct work_struct *work)
  294. {
  295. struct atl1c_adapter *adapter;
  296. struct net_device *netdev;
  297. adapter = container_of(work, struct atl1c_adapter, common_task);
  298. netdev = adapter->netdev;
  299. if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) {
  300. netif_device_detach(netdev);
  301. atl1c_down(adapter);
  302. atl1c_up(adapter);
  303. netif_device_attach(netdev);
  304. }
  305. if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE,
  306. &adapter->work_event))
  307. atl1c_check_link_status(adapter);
  308. }
  309. static void atl1c_del_timer(struct atl1c_adapter *adapter)
  310. {
  311. del_timer_sync(&adapter->phy_config_timer);
  312. }
  313. /*
  314. * atl1c_tx_timeout - Respond to a Tx Hang
  315. * @netdev: network interface device structure
  316. */
  317. static void atl1c_tx_timeout(struct net_device *netdev)
  318. {
  319. struct atl1c_adapter *adapter = netdev_priv(netdev);
  320. /* Do the reset outside of interrupt context */
  321. set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
  322. schedule_work(&adapter->common_task);
  323. }
  324. /*
  325. * atl1c_set_multi - Multicast and Promiscuous mode set
  326. * @netdev: network interface device structure
  327. *
  328. * The set_multi entry point is called whenever the multicast address
  329. * list or the network interface flags are updated. This routine is
  330. * responsible for configuring the hardware for proper multicast,
  331. * promiscuous mode, and all-multi behavior.
  332. */
  333. static void atl1c_set_multi(struct net_device *netdev)
  334. {
  335. struct atl1c_adapter *adapter = netdev_priv(netdev);
  336. struct atl1c_hw *hw = &adapter->hw;
  337. struct netdev_hw_addr *ha;
  338. u32 mac_ctrl_data;
  339. u32 hash_value;
  340. /* Check for Promiscuous and All Multicast modes */
  341. AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
  342. if (netdev->flags & IFF_PROMISC) {
  343. mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
  344. } else if (netdev->flags & IFF_ALLMULTI) {
  345. mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
  346. mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
  347. } else {
  348. mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
  349. }
  350. AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
  351. /* clear the old settings from the multicast hash table */
  352. AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
  353. AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
  354. /* comoute mc addresses' hash value ,and put it into hash table */
  355. netdev_for_each_mc_addr(ha, netdev) {
  356. hash_value = atl1c_hash_mc_addr(hw, ha->addr);
  357. atl1c_hash_set(hw, hash_value);
  358. }
  359. }
  360. static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
  361. {
  362. if (features & NETIF_F_HW_VLAN_RX) {
  363. /* enable VLAN tag insert/strip */
  364. *mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
  365. } else {
  366. /* disable VLAN tag insert/strip */
  367. *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
  368. }
  369. }
  370. static void atl1c_vlan_mode(struct net_device *netdev,
  371. netdev_features_t features)
  372. {
  373. struct atl1c_adapter *adapter = netdev_priv(netdev);
  374. struct pci_dev *pdev = adapter->pdev;
  375. u32 mac_ctrl_data = 0;
  376. if (netif_msg_pktdata(adapter))
  377. dev_dbg(&pdev->dev, "atl1c_vlan_mode\n");
  378. atl1c_irq_disable(adapter);
  379. AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
  380. __atl1c_vlan_mode(features, &mac_ctrl_data);
  381. AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
  382. atl1c_irq_enable(adapter);
  383. }
  384. static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
  385. {
  386. struct pci_dev *pdev = adapter->pdev;
  387. if (netif_msg_pktdata(adapter))
  388. dev_dbg(&pdev->dev, "atl1c_restore_vlan\n");
  389. atl1c_vlan_mode(adapter->netdev, adapter->netdev->features);
  390. }
  391. /*
  392. * atl1c_set_mac - Change the Ethernet Address of the NIC
  393. * @netdev: network interface device structure
  394. * @p: pointer to an address structure
  395. *
  396. * Returns 0 on success, negative on failure
  397. */
  398. static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
  399. {
  400. struct atl1c_adapter *adapter = netdev_priv(netdev);
  401. struct sockaddr *addr = p;
  402. if (!is_valid_ether_addr(addr->sa_data))
  403. return -EADDRNOTAVAIL;
  404. if (netif_running(netdev))
  405. return -EBUSY;
  406. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  407. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  408. netdev->addr_assign_type &= ~NET_ADDR_RANDOM;
  409. atl1c_hw_set_mac_addr(&adapter->hw);
  410. return 0;
  411. }
  412. static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
  413. struct net_device *dev)
  414. {
  415. int mtu = dev->mtu;
  416. adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
  417. roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
  418. }
  419. static netdev_features_t atl1c_fix_features(struct net_device *netdev,
  420. netdev_features_t features)
  421. {
  422. /*
  423. * Since there is no support for separate rx/tx vlan accel
  424. * enable/disable make sure tx flag is always in same state as rx.
  425. */
  426. if (features & NETIF_F_HW_VLAN_RX)
  427. features |= NETIF_F_HW_VLAN_TX;
  428. else
  429. features &= ~NETIF_F_HW_VLAN_TX;
  430. if (netdev->mtu > MAX_TSO_FRAME_SIZE)
  431. features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
  432. return features;
  433. }
  434. static int atl1c_set_features(struct net_device *netdev,
  435. netdev_features_t features)
  436. {
  437. netdev_features_t changed = netdev->features ^ features;
  438. if (changed & NETIF_F_HW_VLAN_RX)
  439. atl1c_vlan_mode(netdev, features);
  440. return 0;
  441. }
  442. /*
  443. * atl1c_change_mtu - Change the Maximum Transfer Unit
  444. * @netdev: network interface device structure
  445. * @new_mtu: new value for maximum frame size
  446. *
  447. * Returns 0 on success, negative on failure
  448. */
  449. static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
  450. {
  451. struct atl1c_adapter *adapter = netdev_priv(netdev);
  452. struct atl1c_hw *hw = &adapter->hw;
  453. int old_mtu = netdev->mtu;
  454. int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
  455. /* Fast Ethernet controller doesn't support jumbo packet */
  456. if (((hw->nic_type == athr_l2c ||
  457. hw->nic_type == athr_l2c_b ||
  458. hw->nic_type == athr_l2c_b2) && new_mtu > ETH_DATA_LEN) ||
  459. max_frame < ETH_ZLEN + ETH_FCS_LEN ||
  460. max_frame > MAX_JUMBO_FRAME_SIZE) {
  461. if (netif_msg_link(adapter))
  462. dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
  463. return -EINVAL;
  464. }
  465. /* set MTU */
  466. if (old_mtu != new_mtu && netif_running(netdev)) {
  467. while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
  468. msleep(1);
  469. netdev->mtu = new_mtu;
  470. adapter->hw.max_frame_size = new_mtu;
  471. atl1c_set_rxbufsize(adapter, netdev);
  472. atl1c_down(adapter);
  473. netdev_update_features(netdev);
  474. atl1c_up(adapter);
  475. clear_bit(__AT_RESETTING, &adapter->flags);
  476. if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
  477. u32 phy_data;
  478. AT_READ_REG(&adapter->hw, 0x1414, &phy_data);
  479. phy_data |= 0x10000000;
  480. AT_WRITE_REG(&adapter->hw, 0x1414, phy_data);
  481. }
  482. }
  483. return 0;
  484. }
  485. /*
  486. * caller should hold mdio_lock
  487. */
  488. static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
  489. {
  490. struct atl1c_adapter *adapter = netdev_priv(netdev);
  491. u16 result;
  492. atl1c_read_phy_reg(&adapter->hw, reg_num, &result);
  493. return result;
  494. }
  495. static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
  496. int reg_num, int val)
  497. {
  498. struct atl1c_adapter *adapter = netdev_priv(netdev);
  499. atl1c_write_phy_reg(&adapter->hw, reg_num, val);
  500. }
  501. /*
  502. * atl1c_mii_ioctl -
  503. * @netdev:
  504. * @ifreq:
  505. * @cmd:
  506. */
  507. static int atl1c_mii_ioctl(struct net_device *netdev,
  508. struct ifreq *ifr, int cmd)
  509. {
  510. struct atl1c_adapter *adapter = netdev_priv(netdev);
  511. struct pci_dev *pdev = adapter->pdev;
  512. struct mii_ioctl_data *data = if_mii(ifr);
  513. unsigned long flags;
  514. int retval = 0;
  515. if (!netif_running(netdev))
  516. return -EINVAL;
  517. spin_lock_irqsave(&adapter->mdio_lock, flags);
  518. switch (cmd) {
  519. case SIOCGMIIPHY:
  520. data->phy_id = 0;
  521. break;
  522. case SIOCGMIIREG:
  523. if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  524. &data->val_out)) {
  525. retval = -EIO;
  526. goto out;
  527. }
  528. break;
  529. case SIOCSMIIREG:
  530. if (data->reg_num & ~(0x1F)) {
  531. retval = -EFAULT;
  532. goto out;
  533. }
  534. dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
  535. data->reg_num, data->val_in);
  536. if (atl1c_write_phy_reg(&adapter->hw,
  537. data->reg_num, data->val_in)) {
  538. retval = -EIO;
  539. goto out;
  540. }
  541. break;
  542. default:
  543. retval = -EOPNOTSUPP;
  544. break;
  545. }
  546. out:
  547. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  548. return retval;
  549. }
  550. /*
  551. * atl1c_ioctl -
  552. * @netdev:
  553. * @ifreq:
  554. * @cmd:
  555. */
  556. static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  557. {
  558. switch (cmd) {
  559. case SIOCGMIIPHY:
  560. case SIOCGMIIREG:
  561. case SIOCSMIIREG:
  562. return atl1c_mii_ioctl(netdev, ifr, cmd);
  563. default:
  564. return -EOPNOTSUPP;
  565. }
  566. }
  567. /*
  568. * atl1c_alloc_queues - Allocate memory for all rings
  569. * @adapter: board private structure to initialize
  570. *
  571. */
  572. static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter)
  573. {
  574. return 0;
  575. }
  576. static void atl1c_set_mac_type(struct atl1c_hw *hw)
  577. {
  578. switch (hw->device_id) {
  579. case PCI_DEVICE_ID_ATTANSIC_L2C:
  580. hw->nic_type = athr_l2c;
  581. break;
  582. case PCI_DEVICE_ID_ATTANSIC_L1C:
  583. hw->nic_type = athr_l1c;
  584. break;
  585. case PCI_DEVICE_ID_ATHEROS_L2C_B:
  586. hw->nic_type = athr_l2c_b;
  587. break;
  588. case PCI_DEVICE_ID_ATHEROS_L2C_B2:
  589. hw->nic_type = athr_l2c_b2;
  590. break;
  591. case PCI_DEVICE_ID_ATHEROS_L1D:
  592. hw->nic_type = athr_l1d;
  593. break;
  594. case PCI_DEVICE_ID_ATHEROS_L1D_2_0:
  595. hw->nic_type = athr_l1d_2;
  596. break;
  597. default:
  598. break;
  599. }
  600. }
  601. static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
  602. {
  603. u32 link_ctrl_data;
  604. atl1c_set_mac_type(hw);
  605. AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
  606. hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE |
  607. ATL1C_TXQ_MODE_ENHANCE;
  608. hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT |
  609. ATL1C_ASPM_L1_SUPPORT;
  610. hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
  611. if (hw->nic_type == athr_l1c ||
  612. hw->nic_type == athr_l1d ||
  613. hw->nic_type == athr_l1d_2)
  614. hw->link_cap_flags |= ATL1C_LINK_CAP_1000M;
  615. return 0;
  616. }
  617. struct atl1c_platform_patch {
  618. u16 pci_did;
  619. u8 pci_revid;
  620. u16 subsystem_vid;
  621. u16 subsystem_did;
  622. u32 patch_flag;
  623. #define ATL1C_LINK_PATCH 0x1
  624. };
  625. static const struct atl1c_platform_patch plats[] __devinitdata = {
  626. {0x2060, 0xC1, 0x1019, 0x8152, 0x1},
  627. {0x2060, 0xC1, 0x1019, 0x2060, 0x1},
  628. {0x2060, 0xC1, 0x1019, 0xE000, 0x1},
  629. {0x2062, 0xC0, 0x1019, 0x8152, 0x1},
  630. {0x2062, 0xC0, 0x1019, 0x2062, 0x1},
  631. {0x2062, 0xC0, 0x1458, 0xE000, 0x1},
  632. {0x2062, 0xC1, 0x1019, 0x8152, 0x1},
  633. {0x2062, 0xC1, 0x1019, 0x2062, 0x1},
  634. {0x2062, 0xC1, 0x1458, 0xE000, 0x1},
  635. {0x2062, 0xC1, 0x1565, 0x2802, 0x1},
  636. {0x2062, 0xC1, 0x1565, 0x2801, 0x1},
  637. {0x1073, 0xC0, 0x1019, 0x8151, 0x1},
  638. {0x1073, 0xC0, 0x1019, 0x1073, 0x1},
  639. {0x1073, 0xC0, 0x1458, 0xE000, 0x1},
  640. {0x1083, 0xC0, 0x1458, 0xE000, 0x1},
  641. {0x1083, 0xC0, 0x1019, 0x8151, 0x1},
  642. {0x1083, 0xC0, 0x1019, 0x1083, 0x1},
  643. {0x1083, 0xC0, 0x1462, 0x7680, 0x1},
  644. {0x1083, 0xC0, 0x1565, 0x2803, 0x1},
  645. {0},
  646. };
  647. static void __devinit atl1c_patch_assign(struct atl1c_hw *hw)
  648. {
  649. int i = 0;
  650. hw->msi_lnkpatch = false;
  651. while (plats[i].pci_did != 0) {
  652. if (plats[i].pci_did == hw->device_id &&
  653. plats[i].pci_revid == hw->revision_id &&
  654. plats[i].subsystem_vid == hw->subsystem_vendor_id &&
  655. plats[i].subsystem_did == hw->subsystem_id) {
  656. if (plats[i].patch_flag & ATL1C_LINK_PATCH)
  657. hw->msi_lnkpatch = true;
  658. }
  659. i++;
  660. }
  661. }
  662. /*
  663. * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
  664. * @adapter: board private structure to initialize
  665. *
  666. * atl1c_sw_init initializes the Adapter private data structure.
  667. * Fields are initialized based on PCI device information and
  668. * OS network device settings (MTU size).
  669. */
  670. static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
  671. {
  672. struct atl1c_hw *hw = &adapter->hw;
  673. struct pci_dev *pdev = adapter->pdev;
  674. u32 revision;
  675. adapter->wol = 0;
  676. device_set_wakeup_enable(&pdev->dev, false);
  677. adapter->link_speed = SPEED_0;
  678. adapter->link_duplex = FULL_DUPLEX;
  679. adapter->tpd_ring[0].count = 1024;
  680. adapter->rfd_ring.count = 512;
  681. hw->vendor_id = pdev->vendor;
  682. hw->device_id = pdev->device;
  683. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  684. hw->subsystem_id = pdev->subsystem_device;
  685. AT_READ_REG(hw, PCI_CLASS_REVISION, &revision);
  686. hw->revision_id = revision & 0xFF;
  687. /* before link up, we assume hibernate is true */
  688. hw->hibernate = true;
  689. hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
  690. if (atl1c_setup_mac_funcs(hw) != 0) {
  691. dev_err(&pdev->dev, "set mac function pointers failed\n");
  692. return -1;
  693. }
  694. atl1c_patch_assign(hw);
  695. hw->intr_mask = IMR_NORMAL_MASK;
  696. hw->phy_configured = false;
  697. hw->preamble_len = 7;
  698. hw->max_frame_size = adapter->netdev->mtu;
  699. hw->autoneg_advertised = ADVERTISED_Autoneg;
  700. hw->indirect_tab = 0xE4E4E4E4;
  701. hw->base_cpu = 0;
  702. hw->ict = 50000; /* 100ms */
  703. hw->smb_timer = 200000; /* 400ms */
  704. hw->rx_imt = 200;
  705. hw->tx_imt = 1000;
  706. hw->tpd_burst = 5;
  707. hw->rfd_burst = 8;
  708. hw->dma_order = atl1c_dma_ord_out;
  709. hw->dmar_block = atl1c_dma_req_1024;
  710. if (atl1c_alloc_queues(adapter)) {
  711. dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
  712. return -ENOMEM;
  713. }
  714. /* TODO */
  715. atl1c_set_rxbufsize(adapter, adapter->netdev);
  716. atomic_set(&adapter->irq_sem, 1);
  717. spin_lock_init(&adapter->mdio_lock);
  718. spin_lock_init(&adapter->tx_lock);
  719. set_bit(__AT_DOWN, &adapter->flags);
  720. return 0;
  721. }
  722. static inline void atl1c_clean_buffer(struct pci_dev *pdev,
  723. struct atl1c_buffer *buffer_info, int in_irq)
  724. {
  725. u16 pci_driection;
  726. if (buffer_info->flags & ATL1C_BUFFER_FREE)
  727. return;
  728. if (buffer_info->dma) {
  729. if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
  730. pci_driection = PCI_DMA_FROMDEVICE;
  731. else
  732. pci_driection = PCI_DMA_TODEVICE;
  733. if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
  734. pci_unmap_single(pdev, buffer_info->dma,
  735. buffer_info->length, pci_driection);
  736. else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
  737. pci_unmap_page(pdev, buffer_info->dma,
  738. buffer_info->length, pci_driection);
  739. }
  740. if (buffer_info->skb) {
  741. if (in_irq)
  742. dev_kfree_skb_irq(buffer_info->skb);
  743. else
  744. dev_kfree_skb(buffer_info->skb);
  745. }
  746. buffer_info->dma = 0;
  747. buffer_info->skb = NULL;
  748. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
  749. }
  750. /*
  751. * atl1c_clean_tx_ring - Free Tx-skb
  752. * @adapter: board private structure
  753. */
  754. static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
  755. enum atl1c_trans_queue type)
  756. {
  757. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  758. struct atl1c_buffer *buffer_info;
  759. struct pci_dev *pdev = adapter->pdev;
  760. u16 index, ring_count;
  761. ring_count = tpd_ring->count;
  762. for (index = 0; index < ring_count; index++) {
  763. buffer_info = &tpd_ring->buffer_info[index];
  764. atl1c_clean_buffer(pdev, buffer_info, 0);
  765. }
  766. /* Zero out Tx-buffers */
  767. memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
  768. ring_count);
  769. atomic_set(&tpd_ring->next_to_clean, 0);
  770. tpd_ring->next_to_use = 0;
  771. }
  772. /*
  773. * atl1c_clean_rx_ring - Free rx-reservation skbs
  774. * @adapter: board private structure
  775. */
  776. static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
  777. {
  778. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  779. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  780. struct atl1c_buffer *buffer_info;
  781. struct pci_dev *pdev = adapter->pdev;
  782. int j;
  783. for (j = 0; j < rfd_ring->count; j++) {
  784. buffer_info = &rfd_ring->buffer_info[j];
  785. atl1c_clean_buffer(pdev, buffer_info, 0);
  786. }
  787. /* zero out the descriptor ring */
  788. memset(rfd_ring->desc, 0, rfd_ring->size);
  789. rfd_ring->next_to_clean = 0;
  790. rfd_ring->next_to_use = 0;
  791. rrd_ring->next_to_use = 0;
  792. rrd_ring->next_to_clean = 0;
  793. }
  794. /*
  795. * Read / Write Ptr Initialize:
  796. */
  797. static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
  798. {
  799. struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
  800. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  801. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  802. struct atl1c_buffer *buffer_info;
  803. int i, j;
  804. for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
  805. tpd_ring[i].next_to_use = 0;
  806. atomic_set(&tpd_ring[i].next_to_clean, 0);
  807. buffer_info = tpd_ring[i].buffer_info;
  808. for (j = 0; j < tpd_ring->count; j++)
  809. ATL1C_SET_BUFFER_STATE(&buffer_info[i],
  810. ATL1C_BUFFER_FREE);
  811. }
  812. rfd_ring->next_to_use = 0;
  813. rfd_ring->next_to_clean = 0;
  814. rrd_ring->next_to_use = 0;
  815. rrd_ring->next_to_clean = 0;
  816. for (j = 0; j < rfd_ring->count; j++) {
  817. buffer_info = &rfd_ring->buffer_info[j];
  818. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
  819. }
  820. }
  821. /*
  822. * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
  823. * @adapter: board private structure
  824. *
  825. * Free all transmit software resources
  826. */
  827. static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
  828. {
  829. struct pci_dev *pdev = adapter->pdev;
  830. pci_free_consistent(pdev, adapter->ring_header.size,
  831. adapter->ring_header.desc,
  832. adapter->ring_header.dma);
  833. adapter->ring_header.desc = NULL;
  834. /* Note: just free tdp_ring.buffer_info,
  835. * it contain rfd_ring.buffer_info, do not double free */
  836. if (adapter->tpd_ring[0].buffer_info) {
  837. kfree(adapter->tpd_ring[0].buffer_info);
  838. adapter->tpd_ring[0].buffer_info = NULL;
  839. }
  840. }
  841. /*
  842. * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources
  843. * @adapter: board private structure
  844. *
  845. * Return 0 on success, negative on failure
  846. */
  847. static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
  848. {
  849. struct pci_dev *pdev = adapter->pdev;
  850. struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
  851. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  852. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  853. struct atl1c_ring_header *ring_header = &adapter->ring_header;
  854. int size;
  855. int i;
  856. int count = 0;
  857. int rx_desc_count = 0;
  858. u32 offset = 0;
  859. rrd_ring->count = rfd_ring->count;
  860. for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
  861. tpd_ring[i].count = tpd_ring[0].count;
  862. /* 2 tpd queue, one high priority queue,
  863. * another normal priority queue */
  864. size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
  865. rfd_ring->count);
  866. tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
  867. if (unlikely(!tpd_ring->buffer_info)) {
  868. dev_err(&pdev->dev, "kzalloc failed, size = %d\n",
  869. size);
  870. goto err_nomem;
  871. }
  872. for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
  873. tpd_ring[i].buffer_info =
  874. (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
  875. count += tpd_ring[i].count;
  876. }
  877. rfd_ring->buffer_info =
  878. (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
  879. count += rfd_ring->count;
  880. rx_desc_count += rfd_ring->count;
  881. /*
  882. * real ring DMA buffer
  883. * each ring/block may need up to 8 bytes for alignment, hence the
  884. * additional bytes tacked onto the end.
  885. */
  886. ring_header->size = size =
  887. sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
  888. sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
  889. sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
  890. 8 * 4;
  891. ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
  892. &ring_header->dma);
  893. if (unlikely(!ring_header->desc)) {
  894. dev_err(&pdev->dev, "pci_alloc_consistend failed\n");
  895. goto err_nomem;
  896. }
  897. memset(ring_header->desc, 0, ring_header->size);
  898. /* init TPD ring */
  899. tpd_ring[0].dma = roundup(ring_header->dma, 8);
  900. offset = tpd_ring[0].dma - ring_header->dma;
  901. for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
  902. tpd_ring[i].dma = ring_header->dma + offset;
  903. tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
  904. tpd_ring[i].size =
  905. sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
  906. offset += roundup(tpd_ring[i].size, 8);
  907. }
  908. /* init RFD ring */
  909. rfd_ring->dma = ring_header->dma + offset;
  910. rfd_ring->desc = (u8 *) ring_header->desc + offset;
  911. rfd_ring->size = sizeof(struct atl1c_rx_free_desc) * rfd_ring->count;
  912. offset += roundup(rfd_ring->size, 8);
  913. /* init RRD ring */
  914. rrd_ring->dma = ring_header->dma + offset;
  915. rrd_ring->desc = (u8 *) ring_header->desc + offset;
  916. rrd_ring->size = sizeof(struct atl1c_recv_ret_status) *
  917. rrd_ring->count;
  918. offset += roundup(rrd_ring->size, 8);
  919. return 0;
  920. err_nomem:
  921. kfree(tpd_ring->buffer_info);
  922. return -ENOMEM;
  923. }
  924. static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
  925. {
  926. struct atl1c_hw *hw = &adapter->hw;
  927. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  928. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  929. struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
  930. adapter->tpd_ring;
  931. /* TPD */
  932. AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
  933. (u32)((tpd_ring[atl1c_trans_normal].dma &
  934. AT_DMA_HI_ADDR_MASK) >> 32));
  935. /* just enable normal priority TX queue */
  936. AT_WRITE_REG(hw, REG_TPD_PRI0_ADDR_LO,
  937. (u32)(tpd_ring[atl1c_trans_normal].dma &
  938. AT_DMA_LO_ADDR_MASK));
  939. AT_WRITE_REG(hw, REG_TPD_PRI1_ADDR_LO,
  940. (u32)(tpd_ring[atl1c_trans_high].dma &
  941. AT_DMA_LO_ADDR_MASK));
  942. AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
  943. (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
  944. /* RFD */
  945. AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
  946. (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32));
  947. AT_WRITE_REG(hw, REG_RFD0_HEAD_ADDR_LO,
  948. (u32)(rfd_ring->dma & AT_DMA_LO_ADDR_MASK));
  949. AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
  950. rfd_ring->count & RFD_RING_SIZE_MASK);
  951. AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
  952. adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
  953. /* RRD */
  954. AT_WRITE_REG(hw, REG_RRD0_HEAD_ADDR_LO,
  955. (u32)(rrd_ring->dma & AT_DMA_LO_ADDR_MASK));
  956. AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
  957. (rrd_ring->count & RRD_RING_SIZE_MASK));
  958. if (hw->nic_type == athr_l2c_b) {
  959. AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L);
  960. AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L);
  961. AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L);
  962. AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L);
  963. AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L);
  964. AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L);
  965. AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/
  966. AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/
  967. }
  968. /* Load all of base address above */
  969. AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
  970. }
  971. static void atl1c_configure_tx(struct atl1c_adapter *adapter)
  972. {
  973. struct atl1c_hw *hw = &adapter->hw;
  974. int max_pay_load;
  975. u16 tx_offload_thresh;
  976. u32 txq_ctrl_data;
  977. tx_offload_thresh = MAX_TSO_FRAME_SIZE;
  978. AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
  979. (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
  980. max_pay_load = pcie_get_readrq(adapter->pdev) >> 8;
  981. hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
  982. /*
  983. * if BIOS had changed the dam-read-max-length to an invalid value,
  984. * restore it to default value
  985. */
  986. if (hw->dmar_block < DEVICE_CTRL_MAXRRS_MIN) {
  987. pcie_set_readrq(adapter->pdev, 128 << DEVICE_CTRL_MAXRRS_MIN);
  988. hw->dmar_block = DEVICE_CTRL_MAXRRS_MIN;
  989. }
  990. txq_ctrl_data =
  991. hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2 ?
  992. L2CB_TXQ_CFGV : L1C_TXQ_CFGV;
  993. AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
  994. }
  995. static void atl1c_configure_rx(struct atl1c_adapter *adapter)
  996. {
  997. struct atl1c_hw *hw = &adapter->hw;
  998. u32 rxq_ctrl_data;
  999. rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
  1000. RXQ_RFD_BURST_NUM_SHIFT;
  1001. if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
  1002. rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
  1003. /* aspm for gigabit */
  1004. if (hw->nic_type != athr_l1d_2 && (hw->device_id & 1) != 0)
  1005. rxq_ctrl_data = FIELD_SETX(rxq_ctrl_data, ASPM_THRUPUT_LIMIT,
  1006. ASPM_THRUPUT_LIMIT_100M);
  1007. AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
  1008. }
  1009. static void atl1c_configure_dma(struct atl1c_adapter *adapter)
  1010. {
  1011. struct atl1c_hw *hw = &adapter->hw;
  1012. u32 dma_ctrl_data;
  1013. dma_ctrl_data = FIELDX(DMA_CTRL_RORDER_MODE, DMA_CTRL_RORDER_MODE_OUT) |
  1014. DMA_CTRL_RREQ_PRI_DATA |
  1015. FIELDX(DMA_CTRL_RREQ_BLEN, hw->dmar_block) |
  1016. FIELDX(DMA_CTRL_WDLY_CNT, DMA_CTRL_WDLY_CNT_DEF) |
  1017. FIELDX(DMA_CTRL_RDLY_CNT, DMA_CTRL_RDLY_CNT_DEF);
  1018. AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
  1019. }
  1020. /*
  1021. * Stop the mac, transmit and receive units
  1022. * hw - Struct containing variables accessed by shared code
  1023. * return : 0 or idle status (if error)
  1024. */
  1025. static int atl1c_stop_mac(struct atl1c_hw *hw)
  1026. {
  1027. u32 data;
  1028. AT_READ_REG(hw, REG_RXQ_CTRL, &data);
  1029. data &= ~RXQ_CTRL_EN;
  1030. AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
  1031. AT_READ_REG(hw, REG_TXQ_CTRL, &data);
  1032. data &= ~TXQ_CTRL_EN;
  1033. AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
  1034. atl1c_wait_until_idle(hw, IDLE_STATUS_RXQ_BUSY | IDLE_STATUS_TXQ_BUSY);
  1035. AT_READ_REG(hw, REG_MAC_CTRL, &data);
  1036. data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
  1037. AT_WRITE_REG(hw, REG_MAC_CTRL, data);
  1038. return (int)atl1c_wait_until_idle(hw,
  1039. IDLE_STATUS_TXMAC_BUSY | IDLE_STATUS_RXMAC_BUSY);
  1040. }
  1041. static void atl1c_start_mac(struct atl1c_adapter *adapter)
  1042. {
  1043. struct atl1c_hw *hw = &adapter->hw;
  1044. u32 mac, txq, rxq;
  1045. hw->mac_duplex = adapter->link_duplex == FULL_DUPLEX ? true : false;
  1046. hw->mac_speed = adapter->link_speed == SPEED_1000 ?
  1047. atl1c_mac_speed_1000 : atl1c_mac_speed_10_100;
  1048. AT_READ_REG(hw, REG_TXQ_CTRL, &txq);
  1049. AT_READ_REG(hw, REG_RXQ_CTRL, &rxq);
  1050. AT_READ_REG(hw, REG_MAC_CTRL, &mac);
  1051. txq |= TXQ_CTRL_EN;
  1052. rxq |= RXQ_CTRL_EN;
  1053. mac |= MAC_CTRL_TX_EN | MAC_CTRL_TX_FLOW |
  1054. MAC_CTRL_RX_EN | MAC_CTRL_RX_FLOW |
  1055. MAC_CTRL_ADD_CRC | MAC_CTRL_PAD |
  1056. MAC_CTRL_BC_EN | MAC_CTRL_SINGLE_PAUSE_EN |
  1057. MAC_CTRL_HASH_ALG_CRC32;
  1058. if (hw->mac_duplex)
  1059. mac |= MAC_CTRL_DUPLX;
  1060. else
  1061. mac &= ~MAC_CTRL_DUPLX;
  1062. mac = FIELD_SETX(mac, MAC_CTRL_SPEED, hw->mac_speed);
  1063. mac = FIELD_SETX(mac, MAC_CTRL_PRMLEN, hw->preamble_len);
  1064. AT_WRITE_REG(hw, REG_TXQ_CTRL, txq);
  1065. AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq);
  1066. AT_WRITE_REG(hw, REG_MAC_CTRL, mac);
  1067. }
  1068. /*
  1069. * Reset the transmit and receive units; mask and clear all interrupts.
  1070. * hw - Struct containing variables accessed by shared code
  1071. * return : 0 or idle status (if error)
  1072. */
  1073. static int atl1c_reset_mac(struct atl1c_hw *hw)
  1074. {
  1075. struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter;
  1076. struct pci_dev *pdev = adapter->pdev;
  1077. u32 ctrl_data = 0;
  1078. AT_WRITE_REG(hw, REG_IMR, 0);
  1079. AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT);
  1080. atl1c_stop_mac(hw);
  1081. /*
  1082. * Issue Soft Reset to the MAC. This will reset the chip's
  1083. * transmit, receive, DMA. It will not effect
  1084. * the current PCI configuration. The global reset bit is self-
  1085. * clearing, and should clear within a microsecond.
  1086. */
  1087. AT_READ_REG(hw, REG_MASTER_CTRL, &ctrl_data);
  1088. ctrl_data |= MASTER_CTRL_OOB_DIS;
  1089. AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data | MASTER_CTRL_SOFT_RST);
  1090. AT_WRITE_FLUSH(hw);
  1091. msleep(10);
  1092. /* Wait at least 10ms for All module to be Idle */
  1093. if (atl1c_wait_until_idle(hw, IDLE_STATUS_MASK)) {
  1094. dev_err(&pdev->dev,
  1095. "MAC state machine can't be idle since"
  1096. " disabled for 10ms second\n");
  1097. return -1;
  1098. }
  1099. AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data);
  1100. /* driver control speed/duplex */
  1101. AT_READ_REG(hw, REG_MAC_CTRL, &ctrl_data);
  1102. AT_WRITE_REG(hw, REG_MAC_CTRL, ctrl_data | MAC_CTRL_SPEED_MODE_SW);
  1103. /* clk switch setting */
  1104. AT_READ_REG(hw, REG_SERDES, &ctrl_data);
  1105. switch (hw->nic_type) {
  1106. case athr_l2c_b:
  1107. ctrl_data &= ~(SERDES_PHY_CLK_SLOWDOWN |
  1108. SERDES_MAC_CLK_SLOWDOWN);
  1109. AT_WRITE_REG(hw, REG_SERDES, ctrl_data);
  1110. break;
  1111. case athr_l2c_b2:
  1112. case athr_l1d_2:
  1113. ctrl_data |= SERDES_PHY_CLK_SLOWDOWN | SERDES_MAC_CLK_SLOWDOWN;
  1114. AT_WRITE_REG(hw, REG_SERDES, ctrl_data);
  1115. break;
  1116. default:
  1117. break;
  1118. }
  1119. return 0;
  1120. }
  1121. static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
  1122. {
  1123. u16 ctrl_flags = hw->ctrl_flags;
  1124. hw->ctrl_flags &= ~(ATL1C_ASPM_L0S_SUPPORT | ATL1C_ASPM_L1_SUPPORT);
  1125. atl1c_set_aspm(hw, SPEED_0);
  1126. hw->ctrl_flags = ctrl_flags;
  1127. }
  1128. /*
  1129. * Set ASPM state.
  1130. * Enable/disable L0s/L1 depend on link state.
  1131. */
  1132. static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed)
  1133. {
  1134. u32 pm_ctrl_data;
  1135. u32 link_l1_timer;
  1136. AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
  1137. pm_ctrl_data &= ~(PM_CTRL_ASPM_L1_EN |
  1138. PM_CTRL_ASPM_L0S_EN |
  1139. PM_CTRL_MAC_ASPM_CHK);
  1140. /* L1 timer */
  1141. if (hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
  1142. pm_ctrl_data &= ~PMCTRL_TXL1_AFTER_L0S;
  1143. link_l1_timer =
  1144. link_speed == SPEED_1000 || link_speed == SPEED_100 ?
  1145. L1D_PMCTRL_L1_ENTRY_TM_16US : 1;
  1146. pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
  1147. L1D_PMCTRL_L1_ENTRY_TM, link_l1_timer);
  1148. } else {
  1149. link_l1_timer = hw->nic_type == athr_l2c_b ?
  1150. L2CB1_PM_CTRL_L1_ENTRY_TM : L1C_PM_CTRL_L1_ENTRY_TM;
  1151. if (link_speed != SPEED_1000 && link_speed != SPEED_100)
  1152. link_l1_timer = 1;
  1153. pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
  1154. PM_CTRL_L1_ENTRY_TIMER, link_l1_timer);
  1155. }
  1156. /* L0S/L1 enable */
  1157. if (hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT)
  1158. pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN | PM_CTRL_MAC_ASPM_CHK;
  1159. if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
  1160. pm_ctrl_data |= PM_CTRL_ASPM_L1_EN | PM_CTRL_MAC_ASPM_CHK;
  1161. /* l2cb & l1d & l2cb2 & l1d2 */
  1162. if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
  1163. hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
  1164. pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
  1165. PM_CTRL_PM_REQ_TIMER, PM_CTRL_PM_REQ_TO_DEF);
  1166. pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER |
  1167. PM_CTRL_SERDES_PD_EX_L1 |
  1168. PM_CTRL_CLK_SWH_L1;
  1169. pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN |
  1170. PM_CTRL_SERDES_PLL_L1_EN |
  1171. PM_CTRL_SERDES_BUFS_RX_L1_EN |
  1172. PM_CTRL_SA_DLY_EN |
  1173. PM_CTRL_HOTRST);
  1174. /* disable l0s if link down or l2cb */
  1175. if (link_speed == SPEED_0 || hw->nic_type == athr_l2c_b)
  1176. pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
  1177. } else { /* l1c */
  1178. pm_ctrl_data =
  1179. FIELD_SETX(pm_ctrl_data, PM_CTRL_L1_ENTRY_TIMER, 0);
  1180. if (link_speed != SPEED_0) {
  1181. pm_ctrl_data |= PM_CTRL_SERDES_L1_EN |
  1182. PM_CTRL_SERDES_PLL_L1_EN |
  1183. PM_CTRL_SERDES_BUFS_RX_L1_EN;
  1184. pm_ctrl_data &= ~(PM_CTRL_SERDES_PD_EX_L1 |
  1185. PM_CTRL_CLK_SWH_L1 |
  1186. PM_CTRL_ASPM_L0S_EN |
  1187. PM_CTRL_ASPM_L1_EN);
  1188. } else { /* link down */
  1189. pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
  1190. pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN |
  1191. PM_CTRL_SERDES_PLL_L1_EN |
  1192. PM_CTRL_SERDES_BUFS_RX_L1_EN |
  1193. PM_CTRL_ASPM_L0S_EN);
  1194. }
  1195. }
  1196. AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
  1197. return;
  1198. }
  1199. /*
  1200. * atl1c_configure - Configure Transmit&Receive Unit after Reset
  1201. * @adapter: board private structure
  1202. *
  1203. * Configure the Tx /Rx unit of the MAC after a reset.
  1204. */
  1205. static int atl1c_configure(struct atl1c_adapter *adapter)
  1206. {
  1207. struct atl1c_hw *hw = &adapter->hw;
  1208. u32 master_ctrl_data = 0;
  1209. u32 intr_modrt_data;
  1210. u32 data;
  1211. AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
  1212. master_ctrl_data &= ~(MASTER_CTRL_TX_ITIMER_EN |
  1213. MASTER_CTRL_RX_ITIMER_EN |
  1214. MASTER_CTRL_INT_RDCLR);
  1215. /* clear interrupt status */
  1216. AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
  1217. /* Clear any WOL status */
  1218. AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
  1219. /* set Interrupt Clear Timer
  1220. * HW will enable self to assert interrupt event to system after
  1221. * waiting x-time for software to notify it accept interrupt.
  1222. */
  1223. data = CLK_GATING_EN_ALL;
  1224. if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) {
  1225. if (hw->nic_type == athr_l2c_b)
  1226. data &= ~CLK_GATING_RXMAC_EN;
  1227. } else
  1228. data = 0;
  1229. AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data);
  1230. AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
  1231. hw->ict & INT_RETRIG_TIMER_MASK);
  1232. atl1c_configure_des_ring(adapter);
  1233. if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
  1234. intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
  1235. IRQ_MODRT_TX_TIMER_SHIFT;
  1236. intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
  1237. IRQ_MODRT_RX_TIMER_SHIFT;
  1238. AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
  1239. master_ctrl_data |=
  1240. MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
  1241. }
  1242. if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
  1243. master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
  1244. master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN;
  1245. AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
  1246. AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
  1247. hw->smb_timer & SMB_STAT_TIMER_MASK);
  1248. /* set MTU */
  1249. AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
  1250. VLAN_HLEN + ETH_FCS_LEN);
  1251. atl1c_configure_tx(adapter);
  1252. atl1c_configure_rx(adapter);
  1253. atl1c_configure_dma(adapter);
  1254. return 0;
  1255. }
  1256. static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
  1257. {
  1258. u16 hw_reg_addr = 0;
  1259. unsigned long *stats_item = NULL;
  1260. u32 data;
  1261. /* update rx status */
  1262. hw_reg_addr = REG_MAC_RX_STATUS_BIN;
  1263. stats_item = &adapter->hw_stats.rx_ok;
  1264. while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
  1265. AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
  1266. *stats_item += data;
  1267. stats_item++;
  1268. hw_reg_addr += 4;
  1269. }
  1270. /* update tx status */
  1271. hw_reg_addr = REG_MAC_TX_STATUS_BIN;
  1272. stats_item = &adapter->hw_stats.tx_ok;
  1273. while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
  1274. AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
  1275. *stats_item += data;
  1276. stats_item++;
  1277. hw_reg_addr += 4;
  1278. }
  1279. }
  1280. /*
  1281. * atl1c_get_stats - Get System Network Statistics
  1282. * @netdev: network interface device structure
  1283. *
  1284. * Returns the address of the device statistics structure.
  1285. * The statistics are actually updated from the timer callback.
  1286. */
  1287. static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
  1288. {
  1289. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1290. struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
  1291. struct net_device_stats *net_stats = &netdev->stats;
  1292. atl1c_update_hw_stats(adapter);
  1293. net_stats->rx_packets = hw_stats->rx_ok;
  1294. net_stats->tx_packets = hw_stats->tx_ok;
  1295. net_stats->rx_bytes = hw_stats->rx_byte_cnt;
  1296. net_stats->tx_bytes = hw_stats->tx_byte_cnt;
  1297. net_stats->multicast = hw_stats->rx_mcast;
  1298. net_stats->collisions = hw_stats->tx_1_col +
  1299. hw_stats->tx_2_col * 2 +
  1300. hw_stats->tx_late_col + hw_stats->tx_abort_col;
  1301. net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
  1302. hw_stats->rx_len_err + hw_stats->rx_sz_ov +
  1303. hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
  1304. net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
  1305. net_stats->rx_length_errors = hw_stats->rx_len_err;
  1306. net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
  1307. net_stats->rx_frame_errors = hw_stats->rx_align_err;
  1308. net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
  1309. net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
  1310. net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
  1311. hw_stats->tx_underrun + hw_stats->tx_trunc;
  1312. net_stats->tx_fifo_errors = hw_stats->tx_underrun;
  1313. net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
  1314. net_stats->tx_window_errors = hw_stats->tx_late_col;
  1315. return net_stats;
  1316. }
  1317. static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
  1318. {
  1319. u16 phy_data;
  1320. spin_lock(&adapter->mdio_lock);
  1321. atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
  1322. spin_unlock(&adapter->mdio_lock);
  1323. }
  1324. static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
  1325. enum atl1c_trans_queue type)
  1326. {
  1327. struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
  1328. &adapter->tpd_ring[type];
  1329. struct atl1c_buffer *buffer_info;
  1330. struct pci_dev *pdev = adapter->pdev;
  1331. u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  1332. u16 hw_next_to_clean;
  1333. u16 reg;
  1334. reg = type == atl1c_trans_high ? REG_TPD_PRI1_CIDX : REG_TPD_PRI0_CIDX;
  1335. AT_READ_REGW(&adapter->hw, reg, &hw_next_to_clean);
  1336. while (next_to_clean != hw_next_to_clean) {
  1337. buffer_info = &tpd_ring->buffer_info[next_to_clean];
  1338. atl1c_clean_buffer(pdev, buffer_info, 1);
  1339. if (++next_to_clean == tpd_ring->count)
  1340. next_to_clean = 0;
  1341. atomic_set(&tpd_ring->next_to_clean, next_to_clean);
  1342. }
  1343. if (netif_queue_stopped(adapter->netdev) &&
  1344. netif_carrier_ok(adapter->netdev)) {
  1345. netif_wake_queue(adapter->netdev);
  1346. }
  1347. return true;
  1348. }
  1349. /*
  1350. * atl1c_intr - Interrupt Handler
  1351. * @irq: interrupt number
  1352. * @data: pointer to a network interface device structure
  1353. * @pt_regs: CPU registers structure
  1354. */
  1355. static irqreturn_t atl1c_intr(int irq, void *data)
  1356. {
  1357. struct net_device *netdev = data;
  1358. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1359. struct pci_dev *pdev = adapter->pdev;
  1360. struct atl1c_hw *hw = &adapter->hw;
  1361. int max_ints = AT_MAX_INT_WORK;
  1362. int handled = IRQ_NONE;
  1363. u32 status;
  1364. u32 reg_data;
  1365. do {
  1366. AT_READ_REG(hw, REG_ISR, &reg_data);
  1367. status = reg_data & hw->intr_mask;
  1368. if (status == 0 || (status & ISR_DIS_INT) != 0) {
  1369. if (max_ints != AT_MAX_INT_WORK)
  1370. handled = IRQ_HANDLED;
  1371. break;
  1372. }
  1373. /* link event */
  1374. if (status & ISR_GPHY)
  1375. atl1c_clear_phy_int(adapter);
  1376. /* Ack ISR */
  1377. AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
  1378. if (status & ISR_RX_PKT) {
  1379. if (likely(napi_schedule_prep(&adapter->napi))) {
  1380. hw->intr_mask &= ~ISR_RX_PKT;
  1381. AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
  1382. __napi_schedule(&adapter->napi);
  1383. }
  1384. }
  1385. if (status & ISR_TX_PKT)
  1386. atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
  1387. handled = IRQ_HANDLED;
  1388. /* check if PCIE PHY Link down */
  1389. if (status & ISR_ERROR) {
  1390. if (netif_msg_hw(adapter))
  1391. dev_err(&pdev->dev,
  1392. "atl1c hardware error (status = 0x%x)\n",
  1393. status & ISR_ERROR);
  1394. /* reset MAC */
  1395. set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
  1396. schedule_work(&adapter->common_task);
  1397. return IRQ_HANDLED;
  1398. }
  1399. if (status & ISR_OVER)
  1400. if (netif_msg_intr(adapter))
  1401. dev_warn(&pdev->dev,
  1402. "TX/RX overflow (status = 0x%x)\n",
  1403. status & ISR_OVER);
  1404. /* link event */
  1405. if (status & (ISR_GPHY | ISR_MANUAL)) {
  1406. netdev->stats.tx_carrier_errors++;
  1407. atl1c_link_chg_event(adapter);
  1408. break;
  1409. }
  1410. } while (--max_ints > 0);
  1411. /* re-enable Interrupt*/
  1412. AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
  1413. return handled;
  1414. }
  1415. static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
  1416. struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
  1417. {
  1418. /*
  1419. * The pid field in RRS in not correct sometimes, so we
  1420. * cannot figure out if the packet is fragmented or not,
  1421. * so we tell the KERNEL CHECKSUM_NONE
  1422. */
  1423. skb_checksum_none_assert(skb);
  1424. }
  1425. static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter)
  1426. {
  1427. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  1428. struct pci_dev *pdev = adapter->pdev;
  1429. struct atl1c_buffer *buffer_info, *next_info;
  1430. struct sk_buff *skb;
  1431. void *vir_addr = NULL;
  1432. u16 num_alloc = 0;
  1433. u16 rfd_next_to_use, next_next;
  1434. struct atl1c_rx_free_desc *rfd_desc;
  1435. next_next = rfd_next_to_use = rfd_ring->next_to_use;
  1436. if (++next_next == rfd_ring->count)
  1437. next_next = 0;
  1438. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  1439. next_info = &rfd_ring->buffer_info[next_next];
  1440. while (next_info->flags & ATL1C_BUFFER_FREE) {
  1441. rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
  1442. skb = netdev_alloc_skb(adapter->netdev, adapter->rx_buffer_len);
  1443. if (unlikely(!skb)) {
  1444. if (netif_msg_rx_err(adapter))
  1445. dev_warn(&pdev->dev, "alloc rx buffer failed\n");
  1446. break;
  1447. }
  1448. /*
  1449. * Make buffer alignment 2 beyond a 16 byte boundary
  1450. * this will result in a 16 byte aligned IP header after
  1451. * the 14 byte MAC header is removed
  1452. */
  1453. vir_addr = skb->data;
  1454. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
  1455. buffer_info->skb = skb;
  1456. buffer_info->length = adapter->rx_buffer_len;
  1457. buffer_info->dma = pci_map_single(pdev, vir_addr,
  1458. buffer_info->length,
  1459. PCI_DMA_FROMDEVICE);
  1460. ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
  1461. ATL1C_PCIMAP_FROMDEVICE);
  1462. rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  1463. rfd_next_to_use = next_next;
  1464. if (++next_next == rfd_ring->count)
  1465. next_next = 0;
  1466. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  1467. next_info = &rfd_ring->buffer_info[next_next];
  1468. num_alloc++;
  1469. }
  1470. if (num_alloc) {
  1471. /* TODO: update mailbox here */
  1472. wmb();
  1473. rfd_ring->next_to_use = rfd_next_to_use;
  1474. AT_WRITE_REG(&adapter->hw, REG_MB_RFD0_PROD_IDX,
  1475. rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
  1476. }
  1477. return num_alloc;
  1478. }
  1479. static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
  1480. struct atl1c_recv_ret_status *rrs, u16 num)
  1481. {
  1482. u16 i;
  1483. /* the relationship between rrd and rfd is one map one */
  1484. for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
  1485. rrd_ring->next_to_clean)) {
  1486. rrs->word3 &= ~RRS_RXD_UPDATED;
  1487. if (++rrd_ring->next_to_clean == rrd_ring->count)
  1488. rrd_ring->next_to_clean = 0;
  1489. }
  1490. }
  1491. static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
  1492. struct atl1c_recv_ret_status *rrs, u16 num)
  1493. {
  1494. u16 i;
  1495. u16 rfd_index;
  1496. struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
  1497. rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
  1498. RRS_RX_RFD_INDEX_MASK;
  1499. for (i = 0; i < num; i++) {
  1500. buffer_info[rfd_index].skb = NULL;
  1501. ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
  1502. ATL1C_BUFFER_FREE);
  1503. if (++rfd_index == rfd_ring->count)
  1504. rfd_index = 0;
  1505. }
  1506. rfd_ring->next_to_clean = rfd_index;
  1507. }
  1508. static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
  1509. int *work_done, int work_to_do)
  1510. {
  1511. u16 rfd_num, rfd_index;
  1512. u16 count = 0;
  1513. u16 length;
  1514. struct pci_dev *pdev = adapter->pdev;
  1515. struct net_device *netdev = adapter->netdev;
  1516. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  1517. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  1518. struct sk_buff *skb;
  1519. struct atl1c_recv_ret_status *rrs;
  1520. struct atl1c_buffer *buffer_info;
  1521. while (1) {
  1522. if (*work_done >= work_to_do)
  1523. break;
  1524. rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
  1525. if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
  1526. rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
  1527. RRS_RX_RFD_CNT_MASK;
  1528. if (unlikely(rfd_num != 1))
  1529. /* TODO support mul rfd*/
  1530. if (netif_msg_rx_err(adapter))
  1531. dev_warn(&pdev->dev,
  1532. "Multi rfd not support yet!\n");
  1533. goto rrs_checked;
  1534. } else {
  1535. break;
  1536. }
  1537. rrs_checked:
  1538. atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
  1539. if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
  1540. atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
  1541. if (netif_msg_rx_err(adapter))
  1542. dev_warn(&pdev->dev,
  1543. "wrong packet! rrs word3 is %x\n",
  1544. rrs->word3);
  1545. continue;
  1546. }
  1547. length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
  1548. RRS_PKT_SIZE_MASK);
  1549. /* Good Receive */
  1550. if (likely(rfd_num == 1)) {
  1551. rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
  1552. RRS_RX_RFD_INDEX_MASK;
  1553. buffer_info = &rfd_ring->buffer_info[rfd_index];
  1554. pci_unmap_single(pdev, buffer_info->dma,
  1555. buffer_info->length, PCI_DMA_FROMDEVICE);
  1556. skb = buffer_info->skb;
  1557. } else {
  1558. /* TODO */
  1559. if (netif_msg_rx_err(adapter))
  1560. dev_warn(&pdev->dev,
  1561. "Multi rfd not support yet!\n");
  1562. break;
  1563. }
  1564. atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
  1565. skb_put(skb, length - ETH_FCS_LEN);
  1566. skb->protocol = eth_type_trans(skb, netdev);
  1567. atl1c_rx_checksum(adapter, skb, rrs);
  1568. if (rrs->word3 & RRS_VLAN_INS) {
  1569. u16 vlan;
  1570. AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
  1571. vlan = le16_to_cpu(vlan);
  1572. __vlan_hwaccel_put_tag(skb, vlan);
  1573. }
  1574. netif_receive_skb(skb);
  1575. (*work_done)++;
  1576. count++;
  1577. }
  1578. if (count)
  1579. atl1c_alloc_rx_buffer(adapter);
  1580. }
  1581. /*
  1582. * atl1c_clean - NAPI Rx polling callback
  1583. * @adapter: board private structure
  1584. */
  1585. static int atl1c_clean(struct napi_struct *napi, int budget)
  1586. {
  1587. struct atl1c_adapter *adapter =
  1588. container_of(napi, struct atl1c_adapter, napi);
  1589. int work_done = 0;
  1590. /* Keep link state information with original netdev */
  1591. if (!netif_carrier_ok(adapter->netdev))
  1592. goto quit_polling;
  1593. /* just enable one RXQ */
  1594. atl1c_clean_rx_irq(adapter, &work_done, budget);
  1595. if (work_done < budget) {
  1596. quit_polling:
  1597. napi_complete(napi);
  1598. adapter->hw.intr_mask |= ISR_RX_PKT;
  1599. AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
  1600. }
  1601. return work_done;
  1602. }
  1603. #ifdef CONFIG_NET_POLL_CONTROLLER
  1604. /*
  1605. * Polling 'interrupt' - used by things like netconsole to send skbs
  1606. * without having to re-enable interrupts. It's not called while
  1607. * the interrupt routine is executing.
  1608. */
  1609. static void atl1c_netpoll(struct net_device *netdev)
  1610. {
  1611. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1612. disable_irq(adapter->pdev->irq);
  1613. atl1c_intr(adapter->pdev->irq, netdev);
  1614. enable_irq(adapter->pdev->irq);
  1615. }
  1616. #endif
  1617. static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
  1618. {
  1619. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1620. u16 next_to_use = 0;
  1621. u16 next_to_clean = 0;
  1622. next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  1623. next_to_use = tpd_ring->next_to_use;
  1624. return (u16)(next_to_clean > next_to_use) ?
  1625. (next_to_clean - next_to_use - 1) :
  1626. (tpd_ring->count + next_to_clean - next_to_use - 1);
  1627. }
  1628. /*
  1629. * get next usable tpd
  1630. * Note: should call atl1c_tdp_avail to make sure
  1631. * there is enough tpd to use
  1632. */
  1633. static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
  1634. enum atl1c_trans_queue type)
  1635. {
  1636. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1637. struct atl1c_tpd_desc *tpd_desc;
  1638. u16 next_to_use = 0;
  1639. next_to_use = tpd_ring->next_to_use;
  1640. if (++tpd_ring->next_to_use == tpd_ring->count)
  1641. tpd_ring->next_to_use = 0;
  1642. tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
  1643. memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
  1644. return tpd_desc;
  1645. }
  1646. static struct atl1c_buffer *
  1647. atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
  1648. {
  1649. struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
  1650. return &tpd_ring->buffer_info[tpd -
  1651. (struct atl1c_tpd_desc *)tpd_ring->desc];
  1652. }
  1653. /* Calculate the transmit packet descript needed*/
  1654. static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
  1655. {
  1656. u16 tpd_req;
  1657. u16 proto_hdr_len = 0;
  1658. tpd_req = skb_shinfo(skb)->nr_frags + 1;
  1659. if (skb_is_gso(skb)) {
  1660. proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1661. if (proto_hdr_len < skb_headlen(skb))
  1662. tpd_req++;
  1663. if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
  1664. tpd_req++;
  1665. }
  1666. return tpd_req;
  1667. }
  1668. static int atl1c_tso_csum(struct atl1c_adapter *adapter,
  1669. struct sk_buff *skb,
  1670. struct atl1c_tpd_desc **tpd,
  1671. enum atl1c_trans_queue type)
  1672. {
  1673. struct pci_dev *pdev = adapter->pdev;
  1674. u8 hdr_len;
  1675. u32 real_len;
  1676. unsigned short offload_type;
  1677. int err;
  1678. if (skb_is_gso(skb)) {
  1679. if (skb_header_cloned(skb)) {
  1680. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  1681. if (unlikely(err))
  1682. return -1;
  1683. }
  1684. offload_type = skb_shinfo(skb)->gso_type;
  1685. if (offload_type & SKB_GSO_TCPV4) {
  1686. real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
  1687. + ntohs(ip_hdr(skb)->tot_len));
  1688. if (real_len < skb->len)
  1689. pskb_trim(skb, real_len);
  1690. hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
  1691. if (unlikely(skb->len == hdr_len)) {
  1692. /* only xsum need */
  1693. if (netif_msg_tx_queued(adapter))
  1694. dev_warn(&pdev->dev,
  1695. "IPV4 tso with zero data??\n");
  1696. goto check_sum;
  1697. } else {
  1698. ip_hdr(skb)->check = 0;
  1699. tcp_hdr(skb)->check = ~csum_tcpudp_magic(
  1700. ip_hdr(skb)->saddr,
  1701. ip_hdr(skb)->daddr,
  1702. 0, IPPROTO_TCP, 0);
  1703. (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
  1704. }
  1705. }
  1706. if (offload_type & SKB_GSO_TCPV6) {
  1707. struct atl1c_tpd_ext_desc *etpd =
  1708. *(struct atl1c_tpd_ext_desc **)(tpd);
  1709. memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
  1710. *tpd = atl1c_get_tpd(adapter, type);
  1711. ipv6_hdr(skb)->payload_len = 0;
  1712. /* check payload == 0 byte ? */
  1713. hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
  1714. if (unlikely(skb->len == hdr_len)) {
  1715. /* only xsum need */
  1716. if (netif_msg_tx_queued(adapter))
  1717. dev_warn(&pdev->dev,
  1718. "IPV6 tso with zero data??\n");
  1719. goto check_sum;
  1720. } else
  1721. tcp_hdr(skb)->check = ~csum_ipv6_magic(
  1722. &ipv6_hdr(skb)->saddr,
  1723. &ipv6_hdr(skb)->daddr,
  1724. 0, IPPROTO_TCP, 0);
  1725. etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
  1726. etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
  1727. etpd->pkt_len = cpu_to_le32(skb->len);
  1728. (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
  1729. }
  1730. (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
  1731. (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
  1732. TPD_TCPHDR_OFFSET_SHIFT;
  1733. (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
  1734. TPD_MSS_SHIFT;
  1735. return 0;
  1736. }
  1737. check_sum:
  1738. if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
  1739. u8 css, cso;
  1740. cso = skb_checksum_start_offset(skb);
  1741. if (unlikely(cso & 0x1)) {
  1742. if (netif_msg_tx_err(adapter))
  1743. dev_err(&adapter->pdev->dev,
  1744. "payload offset should not an event number\n");
  1745. return -1;
  1746. } else {
  1747. css = cso + skb->csum_offset;
  1748. (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
  1749. TPD_PLOADOFFSET_SHIFT;
  1750. (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
  1751. TPD_CCSUM_OFFSET_SHIFT;
  1752. (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
  1753. }
  1754. }
  1755. return 0;
  1756. }
  1757. static void atl1c_tx_map(struct atl1c_adapter *adapter,
  1758. struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
  1759. enum atl1c_trans_queue type)
  1760. {
  1761. struct atl1c_tpd_desc *use_tpd = NULL;
  1762. struct atl1c_buffer *buffer_info = NULL;
  1763. u16 buf_len = skb_headlen(skb);
  1764. u16 map_len = 0;
  1765. u16 mapped_len = 0;
  1766. u16 hdr_len = 0;
  1767. u16 nr_frags;
  1768. u16 f;
  1769. int tso;
  1770. nr_frags = skb_shinfo(skb)->nr_frags;
  1771. tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
  1772. if (tso) {
  1773. /* TSO */
  1774. map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1775. use_tpd = tpd;
  1776. buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
  1777. buffer_info->length = map_len;
  1778. buffer_info->dma = pci_map_single(adapter->pdev,
  1779. skb->data, hdr_len, PCI_DMA_TODEVICE);
  1780. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
  1781. ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
  1782. ATL1C_PCIMAP_TODEVICE);
  1783. mapped_len += map_len;
  1784. use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1785. use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
  1786. }
  1787. if (mapped_len < buf_len) {
  1788. /* mapped_len == 0, means we should use the first tpd,
  1789. which is given by caller */
  1790. if (mapped_len == 0)
  1791. use_tpd = tpd;
  1792. else {
  1793. use_tpd = atl1c_get_tpd(adapter, type);
  1794. memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
  1795. }
  1796. buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
  1797. buffer_info->length = buf_len - mapped_len;
  1798. buffer_info->dma =
  1799. pci_map_single(adapter->pdev, skb->data + mapped_len,
  1800. buffer_info->length, PCI_DMA_TODEVICE);
  1801. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
  1802. ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
  1803. ATL1C_PCIMAP_TODEVICE);
  1804. use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1805. use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
  1806. }
  1807. for (f = 0; f < nr_frags; f++) {
  1808. struct skb_frag_struct *frag;
  1809. frag = &skb_shinfo(skb)->frags[f];
  1810. use_tpd = atl1c_get_tpd(adapter, type);
  1811. memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
  1812. buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
  1813. buffer_info->length = skb_frag_size(frag);
  1814. buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev,
  1815. frag, 0,
  1816. buffer_info->length,
  1817. DMA_TO_DEVICE);
  1818. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
  1819. ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE,
  1820. ATL1C_PCIMAP_TODEVICE);
  1821. use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1822. use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
  1823. }
  1824. /* The last tpd */
  1825. use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
  1826. /* The last buffer info contain the skb address,
  1827. so it will be free after unmap */
  1828. buffer_info->skb = skb;
  1829. }
  1830. static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
  1831. struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
  1832. {
  1833. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1834. u16 reg;
  1835. reg = type == atl1c_trans_high ? REG_TPD_PRI1_PIDX : REG_TPD_PRI0_PIDX;
  1836. AT_WRITE_REGW(&adapter->hw, reg, tpd_ring->next_to_use);
  1837. }
  1838. static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
  1839. struct net_device *netdev)
  1840. {
  1841. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1842. unsigned long flags;
  1843. u16 tpd_req = 1;
  1844. struct atl1c_tpd_desc *tpd;
  1845. enum atl1c_trans_queue type = atl1c_trans_normal;
  1846. if (test_bit(__AT_DOWN, &adapter->flags)) {
  1847. dev_kfree_skb_any(skb);
  1848. return NETDEV_TX_OK;
  1849. }
  1850. tpd_req = atl1c_cal_tpd_req(skb);
  1851. if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
  1852. if (netif_msg_pktdata(adapter))
  1853. dev_info(&adapter->pdev->dev, "tx locked\n");
  1854. return NETDEV_TX_LOCKED;
  1855. }
  1856. if (atl1c_tpd_avail(adapter, type) < tpd_req) {
  1857. /* no enough descriptor, just stop queue */
  1858. netif_stop_queue(netdev);
  1859. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1860. return NETDEV_TX_BUSY;
  1861. }
  1862. tpd = atl1c_get_tpd(adapter, type);
  1863. /* do TSO and check sum */
  1864. if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
  1865. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1866. dev_kfree_skb_any(skb);
  1867. return NETDEV_TX_OK;
  1868. }
  1869. if (unlikely(vlan_tx_tag_present(skb))) {
  1870. u16 vlan = vlan_tx_tag_get(skb);
  1871. __le16 tag;
  1872. vlan = cpu_to_le16(vlan);
  1873. AT_VLAN_TO_TAG(vlan, tag);
  1874. tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
  1875. tpd->vlan_tag = tag;
  1876. }
  1877. if (skb_network_offset(skb) != ETH_HLEN)
  1878. tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
  1879. atl1c_tx_map(adapter, skb, tpd, type);
  1880. atl1c_tx_queue(adapter, skb, tpd, type);
  1881. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1882. return NETDEV_TX_OK;
  1883. }
  1884. static void atl1c_free_irq(struct atl1c_adapter *adapter)
  1885. {
  1886. struct net_device *netdev = adapter->netdev;
  1887. free_irq(adapter->pdev->irq, netdev);
  1888. if (adapter->have_msi)
  1889. pci_disable_msi(adapter->pdev);
  1890. }
  1891. static int atl1c_request_irq(struct atl1c_adapter *adapter)
  1892. {
  1893. struct pci_dev *pdev = adapter->pdev;
  1894. struct net_device *netdev = adapter->netdev;
  1895. int flags = 0;
  1896. int err = 0;
  1897. adapter->have_msi = true;
  1898. err = pci_enable_msi(adapter->pdev);
  1899. if (err) {
  1900. if (netif_msg_ifup(adapter))
  1901. dev_err(&pdev->dev,
  1902. "Unable to allocate MSI interrupt Error: %d\n",
  1903. err);
  1904. adapter->have_msi = false;
  1905. }
  1906. if (!adapter->have_msi)
  1907. flags |= IRQF_SHARED;
  1908. err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
  1909. netdev->name, netdev);
  1910. if (err) {
  1911. if (netif_msg_ifup(adapter))
  1912. dev_err(&pdev->dev,
  1913. "Unable to allocate interrupt Error: %d\n",
  1914. err);
  1915. if (adapter->have_msi)
  1916. pci_disable_msi(adapter->pdev);
  1917. return err;
  1918. }
  1919. if (netif_msg_ifup(adapter))
  1920. dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
  1921. return err;
  1922. }
  1923. static int atl1c_up(struct atl1c_adapter *adapter)
  1924. {
  1925. struct net_device *netdev = adapter->netdev;
  1926. int num;
  1927. int err;
  1928. netif_carrier_off(netdev);
  1929. atl1c_init_ring_ptrs(adapter);
  1930. atl1c_set_multi(netdev);
  1931. atl1c_restore_vlan(adapter);
  1932. num = atl1c_alloc_rx_buffer(adapter);
  1933. if (unlikely(num == 0)) {
  1934. err = -ENOMEM;
  1935. goto err_alloc_rx;
  1936. }
  1937. if (atl1c_configure(adapter)) {
  1938. err = -EIO;
  1939. goto err_up;
  1940. }
  1941. err = atl1c_request_irq(adapter);
  1942. if (unlikely(err))
  1943. goto err_up;
  1944. clear_bit(__AT_DOWN, &adapter->flags);
  1945. napi_enable(&adapter->napi);
  1946. atl1c_irq_enable(adapter);
  1947. atl1c_check_link_status(adapter);
  1948. netif_start_queue(netdev);
  1949. return err;
  1950. err_up:
  1951. err_alloc_rx:
  1952. atl1c_clean_rx_ring(adapter);
  1953. return err;
  1954. }
  1955. static void atl1c_down(struct atl1c_adapter *adapter)
  1956. {
  1957. struct net_device *netdev = adapter->netdev;
  1958. atl1c_del_timer(adapter);
  1959. adapter->work_event = 0; /* clear all event */
  1960. /* signal that we're down so the interrupt handler does not
  1961. * reschedule our watchdog timer */
  1962. set_bit(__AT_DOWN, &adapter->flags);
  1963. netif_carrier_off(netdev);
  1964. napi_disable(&adapter->napi);
  1965. atl1c_irq_disable(adapter);
  1966. atl1c_free_irq(adapter);
  1967. /* disable ASPM if device inactive */
  1968. atl1c_disable_l0s_l1(&adapter->hw);
  1969. /* reset MAC to disable all RX/TX */
  1970. atl1c_reset_mac(&adapter->hw);
  1971. msleep(1);
  1972. adapter->link_speed = SPEED_0;
  1973. adapter->link_duplex = -1;
  1974. atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
  1975. atl1c_clean_tx_ring(adapter, atl1c_trans_high);
  1976. atl1c_clean_rx_ring(adapter);
  1977. }
  1978. /*
  1979. * atl1c_open - Called when a network interface is made active
  1980. * @netdev: network interface device structure
  1981. *
  1982. * Returns 0 on success, negative value on failure
  1983. *
  1984. * The open entry point is called when a network interface is made
  1985. * active by the system (IFF_UP). At this point all resources needed
  1986. * for transmit and receive operations are allocated, the interrupt
  1987. * handler is registered with the OS, the watchdog timer is started,
  1988. * and the stack is notified that the interface is ready.
  1989. */
  1990. static int atl1c_open(struct net_device *netdev)
  1991. {
  1992. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1993. int err;
  1994. /* disallow open during test */
  1995. if (test_bit(__AT_TESTING, &adapter->flags))
  1996. return -EBUSY;
  1997. /* allocate rx/tx dma buffer & descriptors */
  1998. err = atl1c_setup_ring_resources(adapter);
  1999. if (unlikely(err))
  2000. return err;
  2001. err = atl1c_up(adapter);
  2002. if (unlikely(err))
  2003. goto err_up;
  2004. return 0;
  2005. err_up:
  2006. atl1c_free_irq(adapter);
  2007. atl1c_free_ring_resources(adapter);
  2008. atl1c_reset_mac(&adapter->hw);
  2009. return err;
  2010. }
  2011. /*
  2012. * atl1c_close - Disables a network interface
  2013. * @netdev: network interface device structure
  2014. *
  2015. * Returns 0, this is not allowed to fail
  2016. *
  2017. * The close entry point is called when an interface is de-activated
  2018. * by the OS. The hardware is still under the drivers control, but
  2019. * needs to be disabled. A global MAC reset is issued to stop the
  2020. * hardware, and all transmit and receive resources are freed.
  2021. */
  2022. static int atl1c_close(struct net_device *netdev)
  2023. {
  2024. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2025. WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
  2026. atl1c_down(adapter);
  2027. atl1c_free_ring_resources(adapter);
  2028. return 0;
  2029. }
  2030. static int atl1c_suspend(struct device *dev)
  2031. {
  2032. struct pci_dev *pdev = to_pci_dev(dev);
  2033. struct net_device *netdev = pci_get_drvdata(pdev);
  2034. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2035. struct atl1c_hw *hw = &adapter->hw;
  2036. u32 wufc = adapter->wol;
  2037. atl1c_disable_l0s_l1(hw);
  2038. if (netif_running(netdev)) {
  2039. WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
  2040. atl1c_down(adapter);
  2041. }
  2042. netif_device_detach(netdev);
  2043. if (wufc)
  2044. if (atl1c_phy_to_ps_link(hw) != 0)
  2045. dev_dbg(&pdev->dev, "phy power saving failed");
  2046. atl1c_power_saving(hw, wufc);
  2047. return 0;
  2048. }
  2049. #ifdef CONFIG_PM_SLEEP
  2050. static int atl1c_resume(struct device *dev)
  2051. {
  2052. struct pci_dev *pdev = to_pci_dev(dev);
  2053. struct net_device *netdev = pci_get_drvdata(pdev);
  2054. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2055. AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
  2056. atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
  2057. atl1c_phy_reset(&adapter->hw);
  2058. atl1c_reset_mac(&adapter->hw);
  2059. atl1c_phy_init(&adapter->hw);
  2060. #if 0
  2061. AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data);
  2062. pm_data &= ~PM_CTRLSTAT_PME_EN;
  2063. AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data);
  2064. #endif
  2065. netif_device_attach(netdev);
  2066. if (netif_running(netdev))
  2067. atl1c_up(adapter);
  2068. return 0;
  2069. }
  2070. #endif
  2071. static void atl1c_shutdown(struct pci_dev *pdev)
  2072. {
  2073. struct net_device *netdev = pci_get_drvdata(pdev);
  2074. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2075. atl1c_suspend(&pdev->dev);
  2076. pci_wake_from_d3(pdev, adapter->wol);
  2077. pci_set_power_state(pdev, PCI_D3hot);
  2078. }
  2079. static const struct net_device_ops atl1c_netdev_ops = {
  2080. .ndo_open = atl1c_open,
  2081. .ndo_stop = atl1c_close,
  2082. .ndo_validate_addr = eth_validate_addr,
  2083. .ndo_start_xmit = atl1c_xmit_frame,
  2084. .ndo_set_mac_address = atl1c_set_mac_addr,
  2085. .ndo_set_rx_mode = atl1c_set_multi,
  2086. .ndo_change_mtu = atl1c_change_mtu,
  2087. .ndo_fix_features = atl1c_fix_features,
  2088. .ndo_set_features = atl1c_set_features,
  2089. .ndo_do_ioctl = atl1c_ioctl,
  2090. .ndo_tx_timeout = atl1c_tx_timeout,
  2091. .ndo_get_stats = atl1c_get_stats,
  2092. #ifdef CONFIG_NET_POLL_CONTROLLER
  2093. .ndo_poll_controller = atl1c_netpoll,
  2094. #endif
  2095. };
  2096. static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
  2097. {
  2098. SET_NETDEV_DEV(netdev, &pdev->dev);
  2099. pci_set_drvdata(pdev, netdev);
  2100. netdev->netdev_ops = &atl1c_netdev_ops;
  2101. netdev->watchdog_timeo = AT_TX_WATCHDOG;
  2102. atl1c_set_ethtool_ops(netdev);
  2103. /* TODO: add when ready */
  2104. netdev->hw_features = NETIF_F_SG |
  2105. NETIF_F_HW_CSUM |
  2106. NETIF_F_HW_VLAN_RX |
  2107. NETIF_F_TSO |
  2108. NETIF_F_TSO6;
  2109. netdev->features = netdev->hw_features |
  2110. NETIF_F_HW_VLAN_TX;
  2111. return 0;
  2112. }
  2113. /*
  2114. * atl1c_probe - Device Initialization Routine
  2115. * @pdev: PCI device information struct
  2116. * @ent: entry in atl1c_pci_tbl
  2117. *
  2118. * Returns 0 on success, negative on failure
  2119. *
  2120. * atl1c_probe initializes an adapter identified by a pci_dev structure.
  2121. * The OS initialization, configuring of the adapter private structure,
  2122. * and a hardware reset occur.
  2123. */
  2124. static int __devinit atl1c_probe(struct pci_dev *pdev,
  2125. const struct pci_device_id *ent)
  2126. {
  2127. struct net_device *netdev;
  2128. struct atl1c_adapter *adapter;
  2129. static int cards_found;
  2130. int err = 0;
  2131. /* enable device (incl. PCI PM wakeup and hotplug setup) */
  2132. err = pci_enable_device_mem(pdev);
  2133. if (err) {
  2134. dev_err(&pdev->dev, "cannot enable PCI device\n");
  2135. return err;
  2136. }
  2137. /*
  2138. * The atl1c chip can DMA to 64-bit addresses, but it uses a single
  2139. * shared register for the high 32 bits, so only a single, aligned,
  2140. * 4 GB physical address range can be used at a time.
  2141. *
  2142. * Supporting 64-bit DMA on this hardware is more trouble than it's
  2143. * worth. It is far easier to limit to 32-bit DMA than update
  2144. * various kernel subsystems to support the mechanics required by a
  2145. * fixed-high-32-bit system.
  2146. */
  2147. if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
  2148. (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
  2149. dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
  2150. goto err_dma;
  2151. }
  2152. err = pci_request_regions(pdev, atl1c_driver_name);
  2153. if (err) {
  2154. dev_err(&pdev->dev, "cannot obtain PCI resources\n");
  2155. goto err_pci_reg;
  2156. }
  2157. pci_set_master(pdev);
  2158. netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
  2159. if (netdev == NULL) {
  2160. err = -ENOMEM;
  2161. goto err_alloc_etherdev;
  2162. }
  2163. err = atl1c_init_netdev(netdev, pdev);
  2164. if (err) {
  2165. dev_err(&pdev->dev, "init netdevice failed\n");
  2166. goto err_init_netdev;
  2167. }
  2168. adapter = netdev_priv(netdev);
  2169. adapter->bd_number = cards_found;
  2170. adapter->netdev = netdev;
  2171. adapter->pdev = pdev;
  2172. adapter->hw.adapter = adapter;
  2173. adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
  2174. adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  2175. if (!adapter->hw.hw_addr) {
  2176. err = -EIO;
  2177. dev_err(&pdev->dev, "cannot map device registers\n");
  2178. goto err_ioremap;
  2179. }
  2180. /* init mii data */
  2181. adapter->mii.dev = netdev;
  2182. adapter->mii.mdio_read = atl1c_mdio_read;
  2183. adapter->mii.mdio_write = atl1c_mdio_write;
  2184. adapter->mii.phy_id_mask = 0x1f;
  2185. adapter->mii.reg_num_mask = MDIO_CTRL_REG_MASK;
  2186. netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
  2187. setup_timer(&adapter->phy_config_timer, atl1c_phy_config,
  2188. (unsigned long)adapter);
  2189. /* setup the private structure */
  2190. err = atl1c_sw_init(adapter);
  2191. if (err) {
  2192. dev_err(&pdev->dev, "net device private data init failed\n");
  2193. goto err_sw_init;
  2194. }
  2195. atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
  2196. /* Init GPHY as early as possible due to power saving issue */
  2197. atl1c_phy_reset(&adapter->hw);
  2198. err = atl1c_reset_mac(&adapter->hw);
  2199. if (err) {
  2200. err = -EIO;
  2201. goto err_reset;
  2202. }
  2203. /* reset the controller to
  2204. * put the device in a known good starting state */
  2205. err = atl1c_phy_init(&adapter->hw);
  2206. if (err) {
  2207. err = -EIO;
  2208. goto err_reset;
  2209. }
  2210. if (atl1c_read_mac_addr(&adapter->hw)) {
  2211. /* got a random MAC address, set NET_ADDR_RANDOM to netdev */
  2212. netdev->addr_assign_type |= NET_ADDR_RANDOM;
  2213. }
  2214. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  2215. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  2216. if (netif_msg_probe(adapter))
  2217. dev_dbg(&pdev->dev, "mac address : %pM\n",
  2218. adapter->hw.mac_addr);
  2219. atl1c_hw_set_mac_addr(&adapter->hw);
  2220. INIT_WORK(&adapter->common_task, atl1c_common_task);
  2221. adapter->work_event = 0;
  2222. err = register_netdev(netdev);
  2223. if (err) {
  2224. dev_err(&pdev->dev, "register netdevice failed\n");
  2225. goto err_register;
  2226. }
  2227. if (netif_msg_probe(adapter))
  2228. dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
  2229. cards_found++;
  2230. return 0;
  2231. err_reset:
  2232. err_register:
  2233. err_sw_init:
  2234. iounmap(adapter->hw.hw_addr);
  2235. err_init_netdev:
  2236. err_ioremap:
  2237. free_netdev(netdev);
  2238. err_alloc_etherdev:
  2239. pci_release_regions(pdev);
  2240. err_pci_reg:
  2241. err_dma:
  2242. pci_disable_device(pdev);
  2243. return err;
  2244. }
  2245. /*
  2246. * atl1c_remove - Device Removal Routine
  2247. * @pdev: PCI device information struct
  2248. *
  2249. * atl1c_remove is called by the PCI subsystem to alert the driver
  2250. * that it should release a PCI device. The could be caused by a
  2251. * Hot-Plug event, or because the driver is going to be removed from
  2252. * memory.
  2253. */
  2254. static void __devexit atl1c_remove(struct pci_dev *pdev)
  2255. {
  2256. struct net_device *netdev = pci_get_drvdata(pdev);
  2257. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2258. unregister_netdev(netdev);
  2259. atl1c_phy_disable(&adapter->hw);
  2260. iounmap(adapter->hw.hw_addr);
  2261. pci_release_regions(pdev);
  2262. pci_disable_device(pdev);
  2263. free_netdev(netdev);
  2264. }
  2265. /*
  2266. * atl1c_io_error_detected - called when PCI error is detected
  2267. * @pdev: Pointer to PCI device
  2268. * @state: The current pci connection state
  2269. *
  2270. * This function is called after a PCI bus error affecting
  2271. * this device has been detected.
  2272. */
  2273. static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
  2274. pci_channel_state_t state)
  2275. {
  2276. struct net_device *netdev = pci_get_drvdata(pdev);
  2277. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2278. netif_device_detach(netdev);
  2279. if (state == pci_channel_io_perm_failure)
  2280. return PCI_ERS_RESULT_DISCONNECT;
  2281. if (netif_running(netdev))
  2282. atl1c_down(adapter);
  2283. pci_disable_device(pdev);
  2284. /* Request a slot slot reset. */
  2285. return PCI_ERS_RESULT_NEED_RESET;
  2286. }
  2287. /*
  2288. * atl1c_io_slot_reset - called after the pci bus has been reset.
  2289. * @pdev: Pointer to PCI device
  2290. *
  2291. * Restart the card from scratch, as if from a cold-boot. Implementation
  2292. * resembles the first-half of the e1000_resume routine.
  2293. */
  2294. static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
  2295. {
  2296. struct net_device *netdev = pci_get_drvdata(pdev);
  2297. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2298. if (pci_enable_device(pdev)) {
  2299. if (netif_msg_hw(adapter))
  2300. dev_err(&pdev->dev,
  2301. "Cannot re-enable PCI device after reset\n");
  2302. return PCI_ERS_RESULT_DISCONNECT;
  2303. }
  2304. pci_set_master(pdev);
  2305. pci_enable_wake(pdev, PCI_D3hot, 0);
  2306. pci_enable_wake(pdev, PCI_D3cold, 0);
  2307. atl1c_reset_mac(&adapter->hw);
  2308. return PCI_ERS_RESULT_RECOVERED;
  2309. }
  2310. /*
  2311. * atl1c_io_resume - called when traffic can start flowing again.
  2312. * @pdev: Pointer to PCI device
  2313. *
  2314. * This callback is called when the error recovery driver tells us that
  2315. * its OK to resume normal operation. Implementation resembles the
  2316. * second-half of the atl1c_resume routine.
  2317. */
  2318. static void atl1c_io_resume(struct pci_dev *pdev)
  2319. {
  2320. struct net_device *netdev = pci_get_drvdata(pdev);
  2321. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2322. if (netif_running(netdev)) {
  2323. if (atl1c_up(adapter)) {
  2324. if (netif_msg_hw(adapter))
  2325. dev_err(&pdev->dev,
  2326. "Cannot bring device back up after reset\n");
  2327. return;
  2328. }
  2329. }
  2330. netif_device_attach(netdev);
  2331. }
  2332. static struct pci_error_handlers atl1c_err_handler = {
  2333. .error_detected = atl1c_io_error_detected,
  2334. .slot_reset = atl1c_io_slot_reset,
  2335. .resume = atl1c_io_resume,
  2336. };
  2337. static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume);
  2338. static struct pci_driver atl1c_driver = {
  2339. .name = atl1c_driver_name,
  2340. .id_table = atl1c_pci_tbl,
  2341. .probe = atl1c_probe,
  2342. .remove = __devexit_p(atl1c_remove),
  2343. .shutdown = atl1c_shutdown,
  2344. .err_handler = &atl1c_err_handler,
  2345. .driver.pm = &atl1c_pm_ops,
  2346. };
  2347. /*
  2348. * atl1c_init_module - Driver Registration Routine
  2349. *
  2350. * atl1c_init_module is the first routine called when the driver is
  2351. * loaded. All it does is register with the PCI subsystem.
  2352. */
  2353. static int __init atl1c_init_module(void)
  2354. {
  2355. return pci_register_driver(&atl1c_driver);
  2356. }
  2357. /*
  2358. * atl1c_exit_module - Driver Exit Cleanup Routine
  2359. *
  2360. * atl1c_exit_module is called just before the driver is removed
  2361. * from memory.
  2362. */
  2363. static void __exit atl1c_exit_module(void)
  2364. {
  2365. pci_unregister_driver(&atl1c_driver);
  2366. }
  2367. module_init(atl1c_init_module);
  2368. module_exit(atl1c_exit_module);