ar9003_mac.c 4.1 KB

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  1. /*
  2. * Copyright (c) 2010 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "hw.h"
  17. static void ar9003_hw_rx_enable(struct ath_hw *hw)
  18. {
  19. REG_WRITE(hw, AR_CR, 0);
  20. }
  21. static void ar9003_hw_set_desc_link(void *ds, u32 ds_link)
  22. {
  23. ((struct ar9003_txc *) ds)->link = ds_link;
  24. }
  25. static void ar9003_hw_get_desc_link(void *ds, u32 **ds_link)
  26. {
  27. *ds_link = &((struct ar9003_txc *) ds)->link;
  28. }
  29. void ar9003_hw_attach_mac_ops(struct ath_hw *hw)
  30. {
  31. struct ath_hw_ops *ops = ath9k_hw_ops(hw);
  32. ops->rx_enable = ar9003_hw_rx_enable;
  33. ops->set_desc_link = ar9003_hw_set_desc_link;
  34. ops->get_desc_link = ar9003_hw_get_desc_link;
  35. }
  36. void ath9k_hw_set_rx_bufsize(struct ath_hw *ah, u16 buf_size)
  37. {
  38. REG_WRITE(ah, AR_DATABUF_SIZE, buf_size & AR_DATABUF_SIZE_MASK);
  39. }
  40. EXPORT_SYMBOL(ath9k_hw_set_rx_bufsize);
  41. void ath9k_hw_addrxbuf_edma(struct ath_hw *ah, u32 rxdp,
  42. enum ath9k_rx_qtype qtype)
  43. {
  44. if (qtype == ATH9K_RX_QUEUE_HP)
  45. REG_WRITE(ah, AR_HP_RXDP, rxdp);
  46. else
  47. REG_WRITE(ah, AR_LP_RXDP, rxdp);
  48. }
  49. EXPORT_SYMBOL(ath9k_hw_addrxbuf_edma);
  50. int ath9k_hw_process_rxdesc_edma(struct ath_hw *ah, struct ath_rx_status *rxs,
  51. void *buf_addr)
  52. {
  53. struct ar9003_rxs *rxsp = (struct ar9003_rxs *) buf_addr;
  54. unsigned int phyerr;
  55. /* TODO: byte swap on big endian for ar9300_10 */
  56. if ((rxsp->status11 & AR_RxDone) == 0)
  57. return -EINPROGRESS;
  58. if (MS(rxsp->ds_info, AR_DescId) != 0x168c)
  59. return -EINVAL;
  60. if ((rxsp->ds_info & (AR_TxRxDesc | AR_CtrlStat)) != 0)
  61. return -EINPROGRESS;
  62. rxs->rs_status = 0;
  63. rxs->rs_flags = 0;
  64. rxs->rs_datalen = rxsp->status2 & AR_DataLen;
  65. rxs->rs_tstamp = rxsp->status3;
  66. /* XXX: Keycache */
  67. rxs->rs_rssi = MS(rxsp->status5, AR_RxRSSICombined);
  68. rxs->rs_rssi_ctl0 = MS(rxsp->status1, AR_RxRSSIAnt00);
  69. rxs->rs_rssi_ctl1 = MS(rxsp->status1, AR_RxRSSIAnt01);
  70. rxs->rs_rssi_ctl2 = MS(rxsp->status1, AR_RxRSSIAnt02);
  71. rxs->rs_rssi_ext0 = MS(rxsp->status5, AR_RxRSSIAnt10);
  72. rxs->rs_rssi_ext1 = MS(rxsp->status5, AR_RxRSSIAnt11);
  73. rxs->rs_rssi_ext2 = MS(rxsp->status5, AR_RxRSSIAnt12);
  74. if (rxsp->status11 & AR_RxKeyIdxValid)
  75. rxs->rs_keyix = MS(rxsp->status11, AR_KeyIdx);
  76. else
  77. rxs->rs_keyix = ATH9K_RXKEYIX_INVALID;
  78. rxs->rs_rate = MS(rxsp->status1, AR_RxRate);
  79. rxs->rs_more = (rxsp->status2 & AR_RxMore) ? 1 : 0;
  80. rxs->rs_isaggr = (rxsp->status11 & AR_RxAggr) ? 1 : 0;
  81. rxs->rs_moreaggr = (rxsp->status11 & AR_RxMoreAggr) ? 1 : 0;
  82. rxs->rs_antenna = (MS(rxsp->status4, AR_RxAntenna) & 0x7);
  83. rxs->rs_flags = (rxsp->status4 & AR_GI) ? ATH9K_RX_GI : 0;
  84. rxs->rs_flags |= (rxsp->status4 & AR_2040) ? ATH9K_RX_2040 : 0;
  85. rxs->evm0 = rxsp->status6;
  86. rxs->evm1 = rxsp->status7;
  87. rxs->evm2 = rxsp->status8;
  88. rxs->evm3 = rxsp->status9;
  89. rxs->evm4 = (rxsp->status10 & 0xffff);
  90. if (rxsp->status11 & AR_PreDelimCRCErr)
  91. rxs->rs_flags |= ATH9K_RX_DELIM_CRC_PRE;
  92. if (rxsp->status11 & AR_PostDelimCRCErr)
  93. rxs->rs_flags |= ATH9K_RX_DELIM_CRC_POST;
  94. if (rxsp->status11 & AR_DecryptBusyErr)
  95. rxs->rs_flags |= ATH9K_RX_DECRYPT_BUSY;
  96. if ((rxsp->status11 & AR_RxFrameOK) == 0) {
  97. if (rxsp->status11 & AR_CRCErr) {
  98. rxs->rs_status |= ATH9K_RXERR_CRC;
  99. } else if (rxsp->status11 & AR_PHYErr) {
  100. rxs->rs_status |= ATH9K_RXERR_PHY;
  101. phyerr = MS(rxsp->status11, AR_PHYErrCode);
  102. rxs->rs_phyerr = phyerr;
  103. } else if (rxsp->status11 & AR_DecryptCRCErr) {
  104. rxs->rs_status |= ATH9K_RXERR_DECRYPT;
  105. } else if (rxsp->status11 & AR_MichaelErr) {
  106. rxs->rs_status |= ATH9K_RXERR_MIC;
  107. }
  108. }
  109. return 0;
  110. }
  111. EXPORT_SYMBOL(ath9k_hw_process_rxdesc_edma);