pci.c 24 KB

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  1. /*
  2. * Copyright IBM Corp. 2012
  3. *
  4. * Author(s):
  5. * Jan Glauber <jang@linux.vnet.ibm.com>
  6. *
  7. * The System z PCI code is a rewrite from a prototype by
  8. * the following people (Kudoz!):
  9. * Alexander Schmidt <alexschm@de.ibm.com>
  10. * Christoph Raisch <raisch@de.ibm.com>
  11. * Hannes Hering <hering2@de.ibm.com>
  12. * Hoang-Nam Nguyen <hnguyen@de.ibm.com>
  13. * Jan-Bernd Themann <themann@de.ibm.com>
  14. * Stefan Roscher <stefan.roscher@de.ibm.com>
  15. * Thomas Klein <tklein@de.ibm.com>
  16. */
  17. #define COMPONENT "zPCI"
  18. #define pr_fmt(fmt) COMPONENT ": " fmt
  19. #include <linux/kernel.h>
  20. #include <linux/slab.h>
  21. #include <linux/err.h>
  22. #include <linux/export.h>
  23. #include <linux/delay.h>
  24. #include <linux/irq.h>
  25. #include <linux/kernel_stat.h>
  26. #include <linux/seq_file.h>
  27. #include <linux/pci.h>
  28. #include <linux/msi.h>
  29. #include <asm/isc.h>
  30. #include <asm/airq.h>
  31. #include <asm/facility.h>
  32. #include <asm/pci_insn.h>
  33. #include <asm/pci_clp.h>
  34. #include <asm/pci_dma.h>
  35. #define DEBUG /* enable pr_debug */
  36. #define SIC_IRQ_MODE_ALL 0
  37. #define SIC_IRQ_MODE_SINGLE 1
  38. #define ZPCI_NR_DMA_SPACES 1
  39. #define ZPCI_MSI_VEC_BITS 6
  40. #define ZPCI_NR_DEVICES CONFIG_PCI_NR_FUNCTIONS
  41. /* list of all detected zpci devices */
  42. LIST_HEAD(zpci_list);
  43. EXPORT_SYMBOL_GPL(zpci_list);
  44. DEFINE_MUTEX(zpci_list_lock);
  45. EXPORT_SYMBOL_GPL(zpci_list_lock);
  46. struct pci_hp_callback_ops hotplug_ops;
  47. EXPORT_SYMBOL_GPL(hotplug_ops);
  48. static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES);
  49. static DEFINE_SPINLOCK(zpci_domain_lock);
  50. struct callback {
  51. irq_handler_t handler;
  52. void *data;
  53. };
  54. struct zdev_irq_map {
  55. unsigned long aibv; /* AI bit vector */
  56. int msi_vecs; /* consecutive MSI-vectors used */
  57. int __unused;
  58. struct callback cb[ZPCI_NR_MSI_VECS]; /* callback handler array */
  59. spinlock_t lock; /* protect callbacks against de-reg */
  60. };
  61. struct intr_bucket {
  62. /* amap of adapters, one bit per dev, corresponds to one irq nr */
  63. unsigned long *alloc;
  64. /* AI summary bit, global page for all devices */
  65. unsigned long *aisb;
  66. /* pointer to aibv and callback data in zdev */
  67. struct zdev_irq_map *imap[ZPCI_NR_DEVICES];
  68. /* protects the whole bucket struct */
  69. spinlock_t lock;
  70. };
  71. static struct intr_bucket *bucket;
  72. /* Adapter local summary indicator */
  73. static u8 *zpci_irq_si;
  74. static atomic_t irq_retries = ATOMIC_INIT(0);
  75. /* I/O Map */
  76. static DEFINE_SPINLOCK(zpci_iomap_lock);
  77. static DECLARE_BITMAP(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
  78. struct zpci_iomap_entry *zpci_iomap_start;
  79. EXPORT_SYMBOL_GPL(zpci_iomap_start);
  80. /* highest irq summary bit */
  81. static int __read_mostly aisb_max;
  82. static struct kmem_cache *zdev_irq_cache;
  83. static inline int irq_to_msi_nr(unsigned int irq)
  84. {
  85. return irq & ZPCI_MSI_MASK;
  86. }
  87. static inline int irq_to_dev_nr(unsigned int irq)
  88. {
  89. return irq >> ZPCI_MSI_VEC_BITS;
  90. }
  91. static inline struct zdev_irq_map *get_imap(unsigned int irq)
  92. {
  93. return bucket->imap[irq_to_dev_nr(irq)];
  94. }
  95. struct zpci_dev *get_zdev(struct pci_dev *pdev)
  96. {
  97. return (struct zpci_dev *) pdev->sysdata;
  98. }
  99. struct zpci_dev *get_zdev_by_fid(u32 fid)
  100. {
  101. struct zpci_dev *tmp, *zdev = NULL;
  102. mutex_lock(&zpci_list_lock);
  103. list_for_each_entry(tmp, &zpci_list, entry) {
  104. if (tmp->fid == fid) {
  105. zdev = tmp;
  106. break;
  107. }
  108. }
  109. mutex_unlock(&zpci_list_lock);
  110. return zdev;
  111. }
  112. bool zpci_fid_present(u32 fid)
  113. {
  114. return (get_zdev_by_fid(fid) != NULL) ? true : false;
  115. }
  116. static struct zpci_dev *get_zdev_by_bus(struct pci_bus *bus)
  117. {
  118. return (bus && bus->sysdata) ? (struct zpci_dev *) bus->sysdata : NULL;
  119. }
  120. int pci_domain_nr(struct pci_bus *bus)
  121. {
  122. return ((struct zpci_dev *) bus->sysdata)->domain;
  123. }
  124. EXPORT_SYMBOL_GPL(pci_domain_nr);
  125. int pci_proc_domain(struct pci_bus *bus)
  126. {
  127. return pci_domain_nr(bus);
  128. }
  129. EXPORT_SYMBOL_GPL(pci_proc_domain);
  130. /* Store PCI function information block */
  131. static int zpci_store_fib(struct zpci_dev *zdev, u8 *fc)
  132. {
  133. struct zpci_fib *fib;
  134. u8 status, cc;
  135. fib = (void *) get_zeroed_page(GFP_KERNEL);
  136. if (!fib)
  137. return -ENOMEM;
  138. do {
  139. cc = __stpcifc(zdev->fh, 0, fib, &status);
  140. if (cc == 2) {
  141. msleep(ZPCI_INSN_BUSY_DELAY);
  142. memset(fib, 0, PAGE_SIZE);
  143. }
  144. } while (cc == 2);
  145. if (cc)
  146. pr_err_once("%s: cc: %u status: %u\n",
  147. __func__, cc, status);
  148. /* Return PCI function controls */
  149. *fc = fib->fc;
  150. free_page((unsigned long) fib);
  151. return (cc) ? -EIO : 0;
  152. }
  153. /* Modify PCI: Register adapter interruptions */
  154. static int zpci_register_airq(struct zpci_dev *zdev, unsigned int aisb,
  155. u64 aibv)
  156. {
  157. u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT);
  158. struct zpci_fib *fib;
  159. int rc;
  160. fib = (void *) get_zeroed_page(GFP_KERNEL);
  161. if (!fib)
  162. return -ENOMEM;
  163. fib->isc = PCI_ISC;
  164. fib->noi = zdev->irq_map->msi_vecs;
  165. fib->sum = 1; /* enable summary notifications */
  166. fib->aibv = aibv;
  167. fib->aibvo = 0; /* every function has its own page */
  168. fib->aisb = (u64) bucket->aisb + aisb / 8;
  169. fib->aisbo = aisb & ZPCI_MSI_MASK;
  170. rc = mpcifc_instr(req, fib);
  171. pr_debug("%s mpcifc returned noi: %d\n", __func__, fib->noi);
  172. free_page((unsigned long) fib);
  173. return rc;
  174. }
  175. struct mod_pci_args {
  176. u64 base;
  177. u64 limit;
  178. u64 iota;
  179. };
  180. static int mod_pci(struct zpci_dev *zdev, int fn, u8 dmaas, struct mod_pci_args *args)
  181. {
  182. u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, fn);
  183. struct zpci_fib *fib;
  184. int rc;
  185. /* The FIB must be available even if it's not used */
  186. fib = (void *) get_zeroed_page(GFP_KERNEL);
  187. if (!fib)
  188. return -ENOMEM;
  189. fib->pba = args->base;
  190. fib->pal = args->limit;
  191. fib->iota = args->iota;
  192. rc = mpcifc_instr(req, fib);
  193. free_page((unsigned long) fib);
  194. return rc;
  195. }
  196. /* Modify PCI: Register I/O address translation parameters */
  197. int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas,
  198. u64 base, u64 limit, u64 iota)
  199. {
  200. struct mod_pci_args args = { base, limit, iota };
  201. WARN_ON_ONCE(iota & 0x3fff);
  202. args.iota |= ZPCI_IOTA_RTTO_FLAG;
  203. return mod_pci(zdev, ZPCI_MOD_FC_REG_IOAT, dmaas, &args);
  204. }
  205. /* Modify PCI: Unregister I/O address translation parameters */
  206. int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas)
  207. {
  208. struct mod_pci_args args = { 0, 0, 0 };
  209. return mod_pci(zdev, ZPCI_MOD_FC_DEREG_IOAT, dmaas, &args);
  210. }
  211. /* Modify PCI: Unregister adapter interruptions */
  212. static int zpci_unregister_airq(struct zpci_dev *zdev)
  213. {
  214. struct mod_pci_args args = { 0, 0, 0 };
  215. return mod_pci(zdev, ZPCI_MOD_FC_DEREG_INT, 0, &args);
  216. }
  217. #define ZPCI_PCIAS_CFGSPC 15
  218. static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len)
  219. {
  220. u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
  221. u64 data;
  222. int rc;
  223. rc = pcilg_instr(&data, req, offset);
  224. data = data << ((8 - len) * 8);
  225. data = le64_to_cpu(data);
  226. if (!rc)
  227. *val = (u32) data;
  228. else
  229. *val = 0xffffffff;
  230. return rc;
  231. }
  232. static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len)
  233. {
  234. u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
  235. u64 data = val;
  236. int rc;
  237. data = cpu_to_le64(data);
  238. data = data >> ((8 - len) * 8);
  239. rc = pcistg_instr(data, req, offset);
  240. return rc;
  241. }
  242. void synchronize_irq(unsigned int irq)
  243. {
  244. /*
  245. * Not needed, the handler is protected by a lock and IRQs that occur
  246. * after the handler is deleted are just NOPs.
  247. */
  248. }
  249. EXPORT_SYMBOL_GPL(synchronize_irq);
  250. void enable_irq(unsigned int irq)
  251. {
  252. struct msi_desc *msi = irq_get_msi_desc(irq);
  253. zpci_msi_set_mask_bits(msi, 1, 0);
  254. }
  255. EXPORT_SYMBOL_GPL(enable_irq);
  256. void disable_irq(unsigned int irq)
  257. {
  258. struct msi_desc *msi = irq_get_msi_desc(irq);
  259. zpci_msi_set_mask_bits(msi, 1, 1);
  260. }
  261. EXPORT_SYMBOL_GPL(disable_irq);
  262. void disable_irq_nosync(unsigned int irq)
  263. {
  264. disable_irq(irq);
  265. }
  266. EXPORT_SYMBOL_GPL(disable_irq_nosync);
  267. unsigned long probe_irq_on(void)
  268. {
  269. return 0;
  270. }
  271. EXPORT_SYMBOL_GPL(probe_irq_on);
  272. int probe_irq_off(unsigned long val)
  273. {
  274. return 0;
  275. }
  276. EXPORT_SYMBOL_GPL(probe_irq_off);
  277. unsigned int probe_irq_mask(unsigned long val)
  278. {
  279. return val;
  280. }
  281. EXPORT_SYMBOL_GPL(probe_irq_mask);
  282. void __devinit pcibios_fixup_bus(struct pci_bus *bus)
  283. {
  284. }
  285. resource_size_t pcibios_align_resource(void *data, const struct resource *res,
  286. resource_size_t size,
  287. resource_size_t align)
  288. {
  289. return 0;
  290. }
  291. /* combine single writes by using store-block insn */
  292. void __iowrite64_copy(void __iomem *to, const void *from, size_t count)
  293. {
  294. zpci_memcpy_toio(to, from, count);
  295. }
  296. /* Create a virtual mapping cookie for a PCI BAR */
  297. void __iomem *pci_iomap(struct pci_dev *pdev, int bar, unsigned long max)
  298. {
  299. struct zpci_dev *zdev = get_zdev(pdev);
  300. u64 addr;
  301. int idx;
  302. if ((bar & 7) != bar)
  303. return NULL;
  304. idx = zdev->bars[bar].map_idx;
  305. spin_lock(&zpci_iomap_lock);
  306. zpci_iomap_start[idx].fh = zdev->fh;
  307. zpci_iomap_start[idx].bar = bar;
  308. spin_unlock(&zpci_iomap_lock);
  309. addr = ZPCI_IOMAP_ADDR_BASE | ((u64) idx << 48);
  310. return (void __iomem *) addr;
  311. }
  312. EXPORT_SYMBOL_GPL(pci_iomap);
  313. void pci_iounmap(struct pci_dev *pdev, void __iomem *addr)
  314. {
  315. unsigned int idx;
  316. idx = (((__force u64) addr) & ~ZPCI_IOMAP_ADDR_BASE) >> 48;
  317. spin_lock(&zpci_iomap_lock);
  318. zpci_iomap_start[idx].fh = 0;
  319. zpci_iomap_start[idx].bar = 0;
  320. spin_unlock(&zpci_iomap_lock);
  321. }
  322. EXPORT_SYMBOL_GPL(pci_iounmap);
  323. static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
  324. int size, u32 *val)
  325. {
  326. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  327. if (!zdev || devfn != ZPCI_DEVFN)
  328. return 0;
  329. return zpci_cfg_load(zdev, where, val, size);
  330. }
  331. static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
  332. int size, u32 val)
  333. {
  334. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  335. if (!zdev || devfn != ZPCI_DEVFN)
  336. return 0;
  337. return zpci_cfg_store(zdev, where, val, size);
  338. }
  339. static struct pci_ops pci_root_ops = {
  340. .read = pci_read,
  341. .write = pci_write,
  342. };
  343. /* store the last handled bit to implement fair scheduling of devices */
  344. static DEFINE_PER_CPU(unsigned long, next_sbit);
  345. static void zpci_irq_handler(void *dont, void *need)
  346. {
  347. unsigned long sbit, mbit, last = 0, start = __get_cpu_var(next_sbit);
  348. int rescan = 0, max = aisb_max;
  349. struct zdev_irq_map *imap;
  350. kstat_cpu(smp_processor_id()).irqs[IOINT_PCI]++;
  351. sbit = start;
  352. scan:
  353. /* find summary_bit */
  354. for_each_set_bit_left_cont(sbit, bucket->aisb, max) {
  355. clear_bit(63 - (sbit & 63), bucket->aisb + (sbit >> 6));
  356. last = sbit;
  357. /* find vector bit */
  358. imap = bucket->imap[sbit];
  359. for_each_set_bit_left(mbit, &imap->aibv, imap->msi_vecs) {
  360. kstat_cpu(smp_processor_id()).irqs[IOINT_MSI]++;
  361. clear_bit(63 - mbit, &imap->aibv);
  362. spin_lock(&imap->lock);
  363. if (imap->cb[mbit].handler)
  364. imap->cb[mbit].handler(mbit,
  365. imap->cb[mbit].data);
  366. spin_unlock(&imap->lock);
  367. }
  368. }
  369. if (rescan)
  370. goto out;
  371. /* scan the skipped bits */
  372. if (start > 0) {
  373. sbit = 0;
  374. max = start;
  375. start = 0;
  376. goto scan;
  377. }
  378. /* enable interrupts again */
  379. sic_instr(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
  380. /* check again to not lose initiative */
  381. rmb();
  382. max = aisb_max;
  383. sbit = find_first_bit_left(bucket->aisb, max);
  384. if (sbit != max) {
  385. atomic_inc(&irq_retries);
  386. rescan++;
  387. goto scan;
  388. }
  389. out:
  390. /* store next device bit to scan */
  391. __get_cpu_var(next_sbit) = (++last >= aisb_max) ? 0 : last;
  392. }
  393. /* msi_vecs - number of requested interrupts, 0 place function to error state */
  394. static int zpci_setup_msi(struct pci_dev *pdev, int msi_vecs)
  395. {
  396. struct zpci_dev *zdev = get_zdev(pdev);
  397. unsigned int aisb, msi_nr;
  398. struct msi_desc *msi;
  399. int rc;
  400. /* store the number of used MSI vectors */
  401. zdev->irq_map->msi_vecs = min(msi_vecs, ZPCI_NR_MSI_VECS);
  402. spin_lock(&bucket->lock);
  403. aisb = find_first_zero_bit(bucket->alloc, PAGE_SIZE);
  404. /* alloc map exhausted? */
  405. if (aisb == PAGE_SIZE) {
  406. spin_unlock(&bucket->lock);
  407. return -EIO;
  408. }
  409. set_bit(aisb, bucket->alloc);
  410. spin_unlock(&bucket->lock);
  411. zdev->aisb = aisb;
  412. if (aisb + 1 > aisb_max)
  413. aisb_max = aisb + 1;
  414. /* wire up IRQ shortcut pointer */
  415. bucket->imap[zdev->aisb] = zdev->irq_map;
  416. pr_debug("%s: imap[%u] linked to %p\n", __func__, zdev->aisb, zdev->irq_map);
  417. /* TODO: irq number 0 wont be found if we return less than requested MSIs.
  418. * ignore it for now and fix in common code.
  419. */
  420. msi_nr = aisb << ZPCI_MSI_VEC_BITS;
  421. list_for_each_entry(msi, &pdev->msi_list, list) {
  422. rc = zpci_setup_msi_irq(zdev, msi, msi_nr,
  423. aisb << ZPCI_MSI_VEC_BITS);
  424. if (rc)
  425. return rc;
  426. msi_nr++;
  427. }
  428. rc = zpci_register_airq(zdev, aisb, (u64) &zdev->irq_map->aibv);
  429. if (rc) {
  430. clear_bit(aisb, bucket->alloc);
  431. dev_err(&pdev->dev, "register MSI failed with: %d\n", rc);
  432. return rc;
  433. }
  434. return (zdev->irq_map->msi_vecs == msi_vecs) ?
  435. 0 : zdev->irq_map->msi_vecs;
  436. }
  437. static void zpci_teardown_msi(struct pci_dev *pdev)
  438. {
  439. struct zpci_dev *zdev = get_zdev(pdev);
  440. struct msi_desc *msi;
  441. int aisb, rc;
  442. rc = zpci_unregister_airq(zdev);
  443. if (rc) {
  444. dev_err(&pdev->dev, "deregister MSI failed with: %d\n", rc);
  445. return;
  446. }
  447. msi = list_first_entry(&pdev->msi_list, struct msi_desc, list);
  448. aisb = irq_to_dev_nr(msi->irq);
  449. list_for_each_entry(msi, &pdev->msi_list, list)
  450. zpci_teardown_msi_irq(zdev, msi);
  451. clear_bit(aisb, bucket->alloc);
  452. if (aisb + 1 == aisb_max)
  453. aisb_max--;
  454. }
  455. int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
  456. {
  457. pr_debug("%s: requesting %d MSI-X interrupts...", __func__, nvec);
  458. if (type != PCI_CAP_ID_MSIX && type != PCI_CAP_ID_MSI)
  459. return -EINVAL;
  460. return zpci_setup_msi(pdev, nvec);
  461. }
  462. void arch_teardown_msi_irqs(struct pci_dev *pdev)
  463. {
  464. pr_info("%s: on pdev: %p\n", __func__, pdev);
  465. zpci_teardown_msi(pdev);
  466. }
  467. static void zpci_map_resources(struct zpci_dev *zdev)
  468. {
  469. struct pci_dev *pdev = zdev->pdev;
  470. resource_size_t len;
  471. int i;
  472. for (i = 0; i < PCI_BAR_COUNT; i++) {
  473. len = pci_resource_len(pdev, i);
  474. if (!len)
  475. continue;
  476. pdev->resource[i].start = (resource_size_t) pci_iomap(pdev, i, 0);
  477. pdev->resource[i].end = pdev->resource[i].start + len - 1;
  478. pr_debug("BAR%i: -> start: %Lx end: %Lx\n",
  479. i, pdev->resource[i].start, pdev->resource[i].end);
  480. }
  481. };
  482. static void zpci_unmap_resources(struct pci_dev *pdev)
  483. {
  484. resource_size_t len;
  485. int i;
  486. for (i = 0; i < PCI_BAR_COUNT; i++) {
  487. len = pci_resource_len(pdev, i);
  488. if (!len)
  489. continue;
  490. pci_iounmap(pdev, (void *) pdev->resource[i].start);
  491. }
  492. };
  493. struct zpci_dev *zpci_alloc_device(void)
  494. {
  495. struct zpci_dev *zdev;
  496. /* Alloc memory for our private pci device data */
  497. zdev = kzalloc(sizeof(*zdev), GFP_KERNEL);
  498. if (!zdev)
  499. return ERR_PTR(-ENOMEM);
  500. /* Alloc aibv & callback space */
  501. zdev->irq_map = kmem_cache_zalloc(zdev_irq_cache, GFP_KERNEL);
  502. if (!zdev->irq_map)
  503. goto error;
  504. WARN_ON((u64) zdev->irq_map & 0xff);
  505. return zdev;
  506. error:
  507. kfree(zdev);
  508. return ERR_PTR(-ENOMEM);
  509. }
  510. void zpci_free_device(struct zpci_dev *zdev)
  511. {
  512. kmem_cache_free(zdev_irq_cache, zdev->irq_map);
  513. kfree(zdev);
  514. }
  515. /* Called on removal of pci_dev, leaves zpci and bus device */
  516. static void zpci_remove_device(struct pci_dev *pdev)
  517. {
  518. struct zpci_dev *zdev = get_zdev(pdev);
  519. dev_info(&pdev->dev, "Removing device %u\n", zdev->domain);
  520. zdev->state = ZPCI_FN_STATE_CONFIGURED;
  521. zpci_dma_exit_device(zdev);
  522. zpci_sysfs_remove_device(&pdev->dev);
  523. zpci_unmap_resources(pdev);
  524. list_del(&zdev->entry); /* can be called from init */
  525. zdev->pdev = NULL;
  526. }
  527. static void zpci_scan_devices(void)
  528. {
  529. struct zpci_dev *zdev;
  530. mutex_lock(&zpci_list_lock);
  531. list_for_each_entry(zdev, &zpci_list, entry)
  532. if (zdev->state == ZPCI_FN_STATE_CONFIGURED)
  533. zpci_scan_device(zdev);
  534. mutex_unlock(&zpci_list_lock);
  535. }
  536. /*
  537. * Too late for any s390 specific setup, since interrupts must be set up
  538. * already which requires DMA setup too and the pci scan will access the
  539. * config space, which only works if the function handle is enabled.
  540. */
  541. int pcibios_enable_device(struct pci_dev *pdev, int mask)
  542. {
  543. struct resource *res;
  544. u16 cmd;
  545. int i;
  546. pci_read_config_word(pdev, PCI_COMMAND, &cmd);
  547. for (i = 0; i < PCI_BAR_COUNT; i++) {
  548. res = &pdev->resource[i];
  549. if (res->flags & IORESOURCE_IO)
  550. return -EINVAL;
  551. if (res->flags & IORESOURCE_MEM)
  552. cmd |= PCI_COMMAND_MEMORY;
  553. }
  554. pci_write_config_word(pdev, PCI_COMMAND, cmd);
  555. return 0;
  556. }
  557. void pcibios_disable_device(struct pci_dev *pdev)
  558. {
  559. zpci_remove_device(pdev);
  560. pdev->sysdata = NULL;
  561. }
  562. int pcibios_add_platform_entries(struct pci_dev *pdev)
  563. {
  564. return zpci_sysfs_add_device(&pdev->dev);
  565. }
  566. int zpci_request_irq(unsigned int irq, irq_handler_t handler, void *data)
  567. {
  568. int msi_nr = irq_to_msi_nr(irq);
  569. struct zdev_irq_map *imap;
  570. struct msi_desc *msi;
  571. msi = irq_get_msi_desc(irq);
  572. if (!msi)
  573. return -EIO;
  574. imap = get_imap(irq);
  575. spin_lock_init(&imap->lock);
  576. pr_debug("%s: register handler for IRQ:MSI %d:%d\n", __func__, irq >> 6, msi_nr);
  577. imap->cb[msi_nr].handler = handler;
  578. imap->cb[msi_nr].data = data;
  579. /*
  580. * The generic MSI code returns with the interrupt disabled on the
  581. * card, using the MSI mask bits. Firmware doesn't appear to unmask
  582. * at that level, so we do it here by hand.
  583. */
  584. zpci_msi_set_mask_bits(msi, 1, 0);
  585. return 0;
  586. }
  587. void zpci_free_irq(unsigned int irq)
  588. {
  589. struct zdev_irq_map *imap = get_imap(irq);
  590. int msi_nr = irq_to_msi_nr(irq);
  591. unsigned long flags;
  592. pr_debug("%s: for irq: %d\n", __func__, irq);
  593. spin_lock_irqsave(&imap->lock, flags);
  594. imap->cb[msi_nr].handler = NULL;
  595. imap->cb[msi_nr].data = NULL;
  596. spin_unlock_irqrestore(&imap->lock, flags);
  597. }
  598. int request_irq(unsigned int irq, irq_handler_t handler,
  599. unsigned long irqflags, const char *devname, void *dev_id)
  600. {
  601. pr_debug("%s: irq: %d handler: %p flags: %lx dev: %s\n",
  602. __func__, irq, handler, irqflags, devname);
  603. return zpci_request_irq(irq, handler, dev_id);
  604. }
  605. EXPORT_SYMBOL_GPL(request_irq);
  606. void free_irq(unsigned int irq, void *dev_id)
  607. {
  608. zpci_free_irq(irq);
  609. }
  610. EXPORT_SYMBOL_GPL(free_irq);
  611. static int __init zpci_irq_init(void)
  612. {
  613. int cpu, rc;
  614. bucket = kzalloc(sizeof(*bucket), GFP_KERNEL);
  615. if (!bucket)
  616. return -ENOMEM;
  617. bucket->aisb = (unsigned long *) get_zeroed_page(GFP_KERNEL);
  618. if (!bucket->aisb) {
  619. rc = -ENOMEM;
  620. goto out_aisb;
  621. }
  622. bucket->alloc = (unsigned long *) get_zeroed_page(GFP_KERNEL);
  623. if (!bucket->alloc) {
  624. rc = -ENOMEM;
  625. goto out_alloc;
  626. }
  627. isc_register(PCI_ISC);
  628. zpci_irq_si = s390_register_adapter_interrupt(&zpci_irq_handler, NULL, PCI_ISC);
  629. if (IS_ERR(zpci_irq_si)) {
  630. rc = PTR_ERR(zpci_irq_si);
  631. zpci_irq_si = NULL;
  632. goto out_ai;
  633. }
  634. for_each_online_cpu(cpu)
  635. per_cpu(next_sbit, cpu) = 0;
  636. spin_lock_init(&bucket->lock);
  637. /* set summary to 1 to be called every time for the ISC */
  638. *zpci_irq_si = 1;
  639. sic_instr(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
  640. return 0;
  641. out_ai:
  642. isc_unregister(PCI_ISC);
  643. free_page((unsigned long) bucket->alloc);
  644. out_alloc:
  645. free_page((unsigned long) bucket->aisb);
  646. out_aisb:
  647. kfree(bucket);
  648. return rc;
  649. }
  650. static void zpci_irq_exit(void)
  651. {
  652. free_page((unsigned long) bucket->alloc);
  653. free_page((unsigned long) bucket->aisb);
  654. s390_unregister_adapter_interrupt(zpci_irq_si, PCI_ISC);
  655. isc_unregister(PCI_ISC);
  656. kfree(bucket);
  657. }
  658. static struct resource *zpci_alloc_bus_resource(unsigned long start, unsigned long size,
  659. unsigned long flags, int domain)
  660. {
  661. struct resource *r;
  662. char *name;
  663. int rc;
  664. r = kzalloc(sizeof(*r), GFP_KERNEL);
  665. if (!r)
  666. return ERR_PTR(-ENOMEM);
  667. r->start = start;
  668. r->end = r->start + size - 1;
  669. r->flags = flags;
  670. r->parent = &iomem_resource;
  671. name = kmalloc(18, GFP_KERNEL);
  672. if (!name) {
  673. kfree(r);
  674. return ERR_PTR(-ENOMEM);
  675. }
  676. sprintf(name, "PCI Bus: %04x:%02x", domain, ZPCI_BUS_NR);
  677. r->name = name;
  678. rc = request_resource(&iomem_resource, r);
  679. if (rc)
  680. pr_debug("request resource %pR failed\n", r);
  681. return r;
  682. }
  683. static int zpci_alloc_iomap(struct zpci_dev *zdev)
  684. {
  685. int entry;
  686. spin_lock(&zpci_iomap_lock);
  687. entry = find_first_zero_bit(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
  688. if (entry == ZPCI_IOMAP_MAX_ENTRIES) {
  689. spin_unlock(&zpci_iomap_lock);
  690. return -ENOSPC;
  691. }
  692. set_bit(entry, zpci_iomap);
  693. spin_unlock(&zpci_iomap_lock);
  694. return entry;
  695. }
  696. static void zpci_free_iomap(struct zpci_dev *zdev, int entry)
  697. {
  698. spin_lock(&zpci_iomap_lock);
  699. memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry));
  700. clear_bit(entry, zpci_iomap);
  701. spin_unlock(&zpci_iomap_lock);
  702. }
  703. static int zpci_create_device_bus(struct zpci_dev *zdev)
  704. {
  705. struct resource *res;
  706. LIST_HEAD(resources);
  707. int i;
  708. /* allocate mapping entry for each used bar */
  709. for (i = 0; i < PCI_BAR_COUNT; i++) {
  710. unsigned long addr, size, flags;
  711. int entry;
  712. if (!zdev->bars[i].size)
  713. continue;
  714. entry = zpci_alloc_iomap(zdev);
  715. if (entry < 0)
  716. return entry;
  717. zdev->bars[i].map_idx = entry;
  718. /* only MMIO is supported */
  719. flags = IORESOURCE_MEM;
  720. if (zdev->bars[i].val & 8)
  721. flags |= IORESOURCE_PREFETCH;
  722. if (zdev->bars[i].val & 4)
  723. flags |= IORESOURCE_MEM_64;
  724. addr = ZPCI_IOMAP_ADDR_BASE + ((u64) entry << 48);
  725. size = 1UL << zdev->bars[i].size;
  726. res = zpci_alloc_bus_resource(addr, size, flags, zdev->domain);
  727. if (IS_ERR(res)) {
  728. zpci_free_iomap(zdev, entry);
  729. return PTR_ERR(res);
  730. }
  731. pci_add_resource(&resources, res);
  732. }
  733. zdev->bus = pci_create_root_bus(NULL, ZPCI_BUS_NR, &pci_root_ops,
  734. zdev, &resources);
  735. if (!zdev->bus)
  736. return -EIO;
  737. zdev->bus->max_bus_speed = zdev->max_bus_speed;
  738. return 0;
  739. }
  740. static int zpci_alloc_domain(struct zpci_dev *zdev)
  741. {
  742. spin_lock(&zpci_domain_lock);
  743. zdev->domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES);
  744. if (zdev->domain == ZPCI_NR_DEVICES) {
  745. spin_unlock(&zpci_domain_lock);
  746. return -ENOSPC;
  747. }
  748. set_bit(zdev->domain, zpci_domain);
  749. spin_unlock(&zpci_domain_lock);
  750. return 0;
  751. }
  752. static void zpci_free_domain(struct zpci_dev *zdev)
  753. {
  754. spin_lock(&zpci_domain_lock);
  755. clear_bit(zdev->domain, zpci_domain);
  756. spin_unlock(&zpci_domain_lock);
  757. }
  758. int zpci_enable_device(struct zpci_dev *zdev)
  759. {
  760. int rc;
  761. rc = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
  762. if (rc)
  763. goto out;
  764. pr_info("Enabled fh: 0x%x fid: 0x%x\n", zdev->fh, zdev->fid);
  765. rc = zpci_dma_init_device(zdev);
  766. if (rc)
  767. goto out_dma;
  768. return 0;
  769. out_dma:
  770. clp_disable_fh(zdev);
  771. out:
  772. return rc;
  773. }
  774. EXPORT_SYMBOL_GPL(zpci_enable_device);
  775. int zpci_create_device(struct zpci_dev *zdev)
  776. {
  777. int rc;
  778. rc = zpci_alloc_domain(zdev);
  779. if (rc)
  780. goto out;
  781. rc = zpci_create_device_bus(zdev);
  782. if (rc)
  783. goto out_bus;
  784. mutex_lock(&zpci_list_lock);
  785. list_add_tail(&zdev->entry, &zpci_list);
  786. if (hotplug_ops.create_slot)
  787. hotplug_ops.create_slot(zdev);
  788. mutex_unlock(&zpci_list_lock);
  789. if (zdev->state == ZPCI_FN_STATE_STANDBY)
  790. return 0;
  791. rc = zpci_enable_device(zdev);
  792. if (rc)
  793. goto out_start;
  794. return 0;
  795. out_start:
  796. mutex_lock(&zpci_list_lock);
  797. list_del(&zdev->entry);
  798. if (hotplug_ops.remove_slot)
  799. hotplug_ops.remove_slot(zdev);
  800. mutex_unlock(&zpci_list_lock);
  801. out_bus:
  802. zpci_free_domain(zdev);
  803. out:
  804. return rc;
  805. }
  806. void zpci_stop_device(struct zpci_dev *zdev)
  807. {
  808. zpci_dma_exit_device(zdev);
  809. /*
  810. * Note: SCLP disables fh via set-pci-fn so don't
  811. * do that here.
  812. */
  813. }
  814. EXPORT_SYMBOL_GPL(zpci_stop_device);
  815. int zpci_scan_device(struct zpci_dev *zdev)
  816. {
  817. zdev->pdev = pci_scan_single_device(zdev->bus, ZPCI_DEVFN);
  818. if (!zdev->pdev) {
  819. pr_err("pci_scan_single_device failed for fid: 0x%x\n",
  820. zdev->fid);
  821. goto out;
  822. }
  823. zpci_map_resources(zdev);
  824. pci_bus_add_devices(zdev->bus);
  825. /* now that pdev was added to the bus mark it as used */
  826. zdev->state = ZPCI_FN_STATE_ONLINE;
  827. return 0;
  828. out:
  829. zpci_dma_exit_device(zdev);
  830. clp_disable_fh(zdev);
  831. return -EIO;
  832. }
  833. EXPORT_SYMBOL_GPL(zpci_scan_device);
  834. static inline int barsize(u8 size)
  835. {
  836. return (size) ? (1 << size) >> 10 : 0;
  837. }
  838. static int zpci_mem_init(void)
  839. {
  840. zdev_irq_cache = kmem_cache_create("PCI_IRQ_cache", sizeof(struct zdev_irq_map),
  841. L1_CACHE_BYTES, SLAB_HWCACHE_ALIGN, NULL);
  842. if (!zdev_irq_cache)
  843. goto error_zdev;
  844. /* TODO: use realloc */
  845. zpci_iomap_start = kzalloc(ZPCI_IOMAP_MAX_ENTRIES * sizeof(*zpci_iomap_start),
  846. GFP_KERNEL);
  847. if (!zpci_iomap_start)
  848. goto error_iomap;
  849. return 0;
  850. error_iomap:
  851. kmem_cache_destroy(zdev_irq_cache);
  852. error_zdev:
  853. return -ENOMEM;
  854. }
  855. static void zpci_mem_exit(void)
  856. {
  857. kfree(zpci_iomap_start);
  858. kmem_cache_destroy(zdev_irq_cache);
  859. }
  860. unsigned int pci_probe = 1;
  861. EXPORT_SYMBOL_GPL(pci_probe);
  862. char * __init pcibios_setup(char *str)
  863. {
  864. if (!strcmp(str, "off")) {
  865. pci_probe = 0;
  866. return NULL;
  867. }
  868. return str;
  869. }
  870. static int __init pci_base_init(void)
  871. {
  872. int rc;
  873. if (!pci_probe)
  874. return 0;
  875. if (!test_facility(2) || !test_facility(69)
  876. || !test_facility(71) || !test_facility(72))
  877. return 0;
  878. pr_info("Probing PCI hardware: PCI:%d SID:%d AEN:%d\n",
  879. test_facility(69), test_facility(70),
  880. test_facility(71));
  881. rc = zpci_mem_init();
  882. if (rc)
  883. goto out_mem;
  884. rc = zpci_msihash_init();
  885. if (rc)
  886. goto out_hash;
  887. rc = zpci_irq_init();
  888. if (rc)
  889. goto out_irq;
  890. rc = zpci_dma_init();
  891. if (rc)
  892. goto out_dma;
  893. rc = clp_find_pci_devices();
  894. if (rc)
  895. goto out_find;
  896. zpci_scan_devices();
  897. return 0;
  898. out_find:
  899. zpci_dma_exit();
  900. out_dma:
  901. zpci_irq_exit();
  902. out_irq:
  903. zpci_msihash_exit();
  904. out_hash:
  905. zpci_mem_exit();
  906. out_mem:
  907. return rc;
  908. }
  909. subsys_initcall(pci_base_init);