EventClass.py 3.5 KB

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  1. # EventClass.py
  2. #
  3. # This is a library defining some events types classes, which could
  4. # be used by other scripts to analyzing the perf samples.
  5. #
  6. # Currently there are just a few classes defined for examples,
  7. # PerfEvent is the base class for all perf event sample, PebsEvent
  8. # is a HW base Intel x86 PEBS event, and user could add more SW/HW
  9. # event classes based on requirements.
  10. import struct
  11. # Event types, user could add more here
  12. EVTYPE_GENERIC = 0
  13. EVTYPE_PEBS = 1 # Basic PEBS event
  14. EVTYPE_PEBS_LL = 2 # PEBS event with load latency info
  15. EVTYPE_IBS = 3
  16. #
  17. # Currently we don't have good way to tell the event type, but by
  18. # the size of raw buffer, raw PEBS event with load latency data's
  19. # size is 176 bytes, while the pure PEBS event's size is 144 bytes.
  20. #
  21. def create_event(name, comm, dso, symbol, raw_buf):
  22. if (len(raw_buf) == 144):
  23. event = PebsEvent(name, comm, dso, symbol, raw_buf)
  24. elif (len(raw_buf) == 176):
  25. event = PebsNHM(name, comm, dso, symbol, raw_buf)
  26. else:
  27. event = PerfEvent(name, comm, dso, symbol, raw_buf)
  28. return event
  29. class PerfEvent(object):
  30. event_num = 0
  31. def __init__(self, name, comm, dso, symbol, raw_buf, ev_type=EVTYPE_GENERIC):
  32. self.name = name
  33. self.comm = comm
  34. self.dso = dso
  35. self.symbol = symbol
  36. self.raw_buf = raw_buf
  37. self.ev_type = ev_type
  38. PerfEvent.event_num += 1
  39. def show(self):
  40. print "PMU event: name=%12s, symbol=%24s, comm=%8s, dso=%12s" % (self.name, self.symbol, self.comm, self.dso)
  41. #
  42. # Basic Intel PEBS (Precise Event-based Sampling) event, whose raw buffer
  43. # contains the context info when that event happened: the EFLAGS and
  44. # linear IP info, as well as all the registers.
  45. #
  46. class PebsEvent(PerfEvent):
  47. pebs_num = 0
  48. def __init__(self, name, comm, dso, symbol, raw_buf, ev_type=EVTYPE_PEBS):
  49. tmp_buf=raw_buf[0:80]
  50. flags, ip, ax, bx, cx, dx, si, di, bp, sp = struct.unpack('QQQQQQQQQQ', tmp_buf)
  51. self.flags = flags
  52. self.ip = ip
  53. self.ax = ax
  54. self.bx = bx
  55. self.cx = cx
  56. self.dx = dx
  57. self.si = si
  58. self.di = di
  59. self.bp = bp
  60. self.sp = sp
  61. PerfEvent.__init__(self, name, comm, dso, symbol, raw_buf, ev_type)
  62. PebsEvent.pebs_num += 1
  63. del tmp_buf
  64. #
  65. # Intel Nehalem and Westmere support PEBS plus Load Latency info which lie
  66. # in the four 64 bit words write after the PEBS data:
  67. # Status: records the IA32_PERF_GLOBAL_STATUS register value
  68. # DLA: Data Linear Address (EIP)
  69. # DSE: Data Source Encoding, where the latency happens, hit or miss
  70. # in L1/L2/L3 or IO operations
  71. # LAT: the actual latency in cycles
  72. #
  73. class PebsNHM(PebsEvent):
  74. pebs_nhm_num = 0
  75. def __init__(self, name, comm, dso, symbol, raw_buf, ev_type=EVTYPE_PEBS_LL):
  76. tmp_buf=raw_buf[144:176]
  77. status, dla, dse, lat = struct.unpack('QQQQ', tmp_buf)
  78. self.status = status
  79. self.dla = dla
  80. self.dse = dse
  81. self.lat = lat
  82. PebsEvent.__init__(self, name, comm, dso, symbol, raw_buf, ev_type)
  83. PebsNHM.pebs_nhm_num += 1
  84. del tmp_buf